Multi-power-supply power-on detection circuit, power supply system and electronic device

Abstract

The invention relates to the technical field of electronic circuits, in particular to a multi-power-supply power-on detection circuit, a power supply system and an electronic device. The multi-power-supply power-on detection circuit at least comprises a level shifting unit, the input end of the level shifting unit is electrically connected with a first input power supply, and the level shifting unit is used for pulling up the first input power supply to a comparison voltage within a preset voltage range; the input end of the level comparison output unit is electrically connected with the second input power supply and the input end of the level shift unit, and the level comparison output unit is used for outputting a first control signal under the condition that the comparison voltage is greater than the analog voltage; outputting a second control signal under the condition that the comparison voltage is not greater than the analog voltage; wherein the first control signal controls the analog circuit not to work, and the second control signal controls the analog circuit to work. The multi-power-supply power-on detection circuit is simple in structure, low in cost, capable of being matched with different power supply systems and free of static power consumption.

Description

Technical Field

[0001] The present application relates to the technical field of electronic circuits, and in particular to a multi-power supply power-on detection circuit, a power supply system and an electronic device. Background Art

[0002] In integrated circuit chips, multi-power supply power-on detection circuits are commonly used module circuits in multi-power supply systems. Their function is to detect the power-on status of multiple power supplies to prevent leakage or circuit damage during the power-on process. For example, in an analog and digital dual power supply system, it is usually required that the digital power supply be powered on first to ensure that the control signal to the analog circuit is in a certain state before the analog circuit is powered on. Once the analog power supply is powered on before the digital power supply, the analog circuit will be powered on, resulting in leakage or even damage to the analog circuit.

[0003] Therefore, there is an urgent need for a multi-power supply power-on detection circuit with lower static power consumption. Summary of the invention

[0004] In order to solve the above technical problems, an embodiment of the present application provides a multi-power supply power-on detection circuit, a power supply system and an electronic device.

[0005] In a first aspect of an embodiment of the present application, a multi-power supply power-on detection circuit is provided, which is used to perform power-on detection on multiple input power supplies, wherein the multiple input power supplies include at least a first input power supply and a second input power supply, and the multi-power supply power-on detection circuit includes at least:

[0006] a level shift unit, wherein an input terminal of the level shift unit is electrically connected to the first input power source, and the level shift unit is used to pull up the first input power source to a comparison voltage within a preset voltage range;

[0007] A level comparison output unit, wherein the input end of the level comparison output unit is electrically connected to the second input power supply and the input end of the level shift unit respectively, and the level comparison output unit is used to output a first control signal when the comparison voltage is greater than the analog voltage, and output a second control signal when the comparison voltage is not greater than the analog voltage; wherein the first control signal controls the analog circuit not to work, and the second control signal controls the analog circuit to work.

[0008] In an optional embodiment of the present application, the level shift unit at least includes:

[0009] A level shift module, wherein an output end of the level shift module is electrically connected to an input end of the level comparison output unit;

[0010] A first transistor device, wherein a gate of the first transistor device is electrically connected to the first input power supply, a source of the first transistor device is electrically connected to an input end of the level shift module, and a drain of the first transistor is grounded.

[0011] In an optional embodiment of the present application, the level comparison output unit includes:

[0012] a level comparison module, wherein an input end of the level comparison module is electrically connected to the second input power supply and an output end of the level shift module respectively;

[0013] A comparison output module, wherein the control end of the comparison output module is electrically connected to the gate of the first transistor device, the input end of the comparison output module is electrically connected to the output end of the level comparison module, the first output end of the comparison output module is grounded, and the second output end of the comparison output module is used to output the first control signal or the second control signal.

[0014] In an optional embodiment of the present application, the level comparison module at least includes:

[0015] a second transistor device, wherein a gate and a drain of the second transistor device are electrically connected to an input terminal of the level shift module, and a source of the second transistor device is electrically connected to the second input power supply;

[0016] A third transistor device, wherein a gate of the third transistor device is electrically connected to the gate of the second transistor device, a source of the third transistor device is electrically connected to the second input power supply, and a drain of the third transistor device is electrically connected to the input end of the comparison output module.

[0017] In an optional embodiment of the present application, the comparison output module at least includes:

[0018] a fourth transistor device, wherein a gate of the fourth transistor device is electrically connected to the first input power supply, and a source of the fourth transistor device is electrically connected to a drain of the third transistor device;

[0019] A fifth transistor device, wherein a gate of the fifth transistor device is electrically connected to the first input power supply, a source of the fifth transistor device is electrically connected to a drain of the fourth transistor device, and a drain of the fifth transistor device is grounded.

[0020] In an optional embodiment of the present application, the first transistor device, the second transistor device, the third transistor device and the fourth transistor device are all transistor devices of the first conductivity type; the fifth transistor device is a transistor device of the second conductivity type; wherein the first conductivity type and the second conductivity type are different.

[0021] In an optional embodiment of the present application, the first transistor device, the second transistor device, the third transistor device and the fourth transistor device are all P-type transistor devices; and the fifth transistor device is an N-type transistor device.

[0022] In an optional embodiment of the present application, the level shift module includes a plurality of transistors, and each transistor is formed by connecting a different number of diodes.

[0023] In an optional embodiment of the present application, the number of the transistors is positively correlated with the absolute value of the voltage difference between the first input power supply and the second input power supply.

[0024] In an optional embodiment of the present application, the first input power supply is a digital power supply; and / or the second input power supply is an analog power supply.

[0025] A second aspect of an embodiment of the present application provides a power supply system, including:

[0026] a first input power source and a second input power source;

[0027] In the multi-power supply power-on detection circuit as described in any of the above items, the first input power supply is electrically connected to the input end of the level shifting unit in the multi-power supply power-on detection circuit, and the second input power supply is electrically connected to the input end of the level comparison output unit in the multi-power supply power-on detection circuit.

[0028] According to a third aspect of the embodiments of the present application, an electronic device is provided, including:

[0029] A first input power supply and a second input power supply; wherein the voltage of the first input power supply is not greater than the voltage of the second input power supply;

[0030] In the multi-power supply power-on detection circuit as described in any of the above items, the first input power supply is electrically connected to the input end of the level shifting unit in the multi-power supply power-on detection circuit, and the second input power supply is electrically connected to the input end of the level comparison output unit in the multi-power supply power-on detection circuit.

[0031] In the first aspect, the multi-power supply power-on detection circuit provided by the embodiment of the present application at least includes: a level shift unit and a level comparison output unit, through which the digital voltage of the first input power supply is pulled up to a comparison voltage within a preset voltage range, and then the comparison voltage is compared with the analog voltage of the second input power supply through the level comparison output unit, and a first control signal is output when the comparison voltage is greater than the analog voltage, and a second control signal is output when the comparison voltage is not greater than the analog voltage. The analog circuit is controlled to work by the second control signal and the analog circuit is controlled not to work by the first control signal, so that the analog circuit is controlled not to work when the first input power supply is not powered on, thereby achieving the purpose of no static power consumption of the analog circuit, and the analog circuit is controlled to work by the first control signal when the digital voltage is powered on, thereby providing a multi-power supply power-on detection circuit that can ensure the normal operation of the analog circuit and has lower static power consumption;

[0032] On the second aspect, the multi-power supply power-on detection circuit provided in the embodiment of the present application raises the voltage of the first input power supply to a comparison voltage within a preset range by setting a level shift unit, and controls the voltage difference between the comparison voltage and the analog voltage within a certain range to ensure the normal operation of the level comparison output unit; in this way, it adapts to power supply systems with different voltage ranges, thereby improving the scope of application of the multi-power supply power-on detection circuit in the embodiment of the present application.

[0033] On the third aspect, an embodiment of the present application provides a multi-power supply power-on detection circuit, which has only a level shifting unit and a level comparison output unit, has a simple structure, and can adapt to different power supply systems by adjusting the size of the preset voltage range of the level shifting unit, and achieves an adaptation range of power supply systems with larger voltage differences through a simple circuit structure and a low-cost circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

[0035] Figure 1 A schematic diagram of the structure of a multi-power supply power-on detection circuit provided in an embodiment of the present application;

[0036] Figure 2 A schematic diagram of the structure of a multi-power supply power-on detection circuit provided in an embodiment of the present application;

[0037] Figure 3 A simulation diagram of a multi-power supply power-on detection circuit provided in an embodiment of the present application;

[0038] Figure 4A schematic diagram of the structure of a level shift module in a multi-power supply power-on detection circuit provided in an embodiment of the present application;

[0039] Figure 5 A schematic diagram of a level conversion interface provided for one embodiment of the present application.

[0040] in:

[0041] 10. Multi-power supply power-on detection circuit; 100. level shift unit; 110. level shift module; 200. level comparison output unit; 210. level comparison module; 220. comparison output module. DETAILED DESCRIPTION

[0042] In the process of implementing the present application, the applicant discovered that there is an urgent need for a multi-power supply power-on detection circuit with lower static power consumption.

[0043] In view of the above problems, a multi-power supply power-on detection circuit, a power supply system and an electronic device are provided in the embodiments of the present application. In order to make the purpose, technical solution and advantages of the present application clearer, the following embodiments and the accompanying drawings further describe a multi-power supply power-on detection circuit, a power supply system and an electronic device of the present application in detail. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0044] The serial numbers assigned to the components herein, such as "first", "second", etc., are only used to distinguish the objects described and do not have any order or technical meaning. The "connection" and "coupling" mentioned in this application, unless otherwise specified, include direct and indirect connections (couplings). In the description of this application, it should be understood that the orientation or position relationship indicated by the terms "upper", "lower", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", etc. are based on the orientation or position relationship shown in the accompanying drawings, which is only for the convenience of describing this application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation to this application.

[0045] In the present application, unless otherwise clearly specified and limited, a first feature being “above” or “below” a second feature may mean that the first and second features are in direct contact, or the first and second features are in indirect contact through an intermediate medium. Moreover, a first feature being “above”, “above”, and “above” a second feature may mean that the first feature is directly above or obliquely above the second feature, or simply means that the first feature is higher in level than the second feature. A first feature being “below”, “below”, and “below” a second feature may mean that the first feature is directly below or obliquely below the second feature, or simply means that the first feature is lower in level than the second feature.

[0046] The following is a brief description of the application environment of the multi-power supply power-on detection circuit provided in the embodiment of the present application:

[0047] The multi-power supply power-on detection circuit provided in the embodiment of the present application is used to perform power-on detection on multiple input power supplies, wherein the multiple input power supplies include at least a first input power supply and a second input power supply. Of course, the multiple input power supplies include but are not limited to the first input power supply and the second input power supply. The number of the first input power supply and the second input power supply can be one group or multiple groups respectively. The embodiment of the present application does not make specific limitations and can be flexibly adjusted according to actual conditions. It should be explained that in actual applications, the first input power supply needs to be powered on first, and after the first input power supply and the digital circuit are stable and a stable control signal is generated, the second input power supply is powered on to ensure the normal and stable operation of the analog circuit and avoid affecting the working stability of the analog circuit.

[0048] See also Figure 1 The embodiment of the present application provides a multi-power supply power-on detection circuit 10, wherein the multi-power supply power-on detection circuit 10 at least includes: a level shift unit 100 and a level comparison output unit 200, wherein:

[0049] The level shift unit 100, the input end of which is electrically connected to the first input power supply VDD1, is used to pull up the first input power supply VDD1 to a comparison voltage Vs within a preset voltage range. Generally, the voltage difference between the first input power supply VDD1 and the second input power supply VDD2 is large, and the voltage of the first input power supply VDD1 is generally much smaller than the voltage of the analog voltage. The level shift unit 100 pulls up the voltage of the first input power supply VDD1 to a voltage within a preset range, that is, obtains the comparison voltage Vs after the first input power supply VDD1 is pulled up, and then compares the comparison voltage Vs with the analog voltage of the analog voltage, so that the voltage difference is controlled within a certain range, thereby ensuring the normal operation of the level comparison output unit 200; at the same time, it can also adapt to input power supplies of different voltage systems, thereby improving the application scope of the multi-power supply power-on detection circuit 10 of the embodiment of the present application. The level shift unit 100 can be a boost circuit, a voltage stabilizer, or a capacitor booster, etc., as long as it can achieve the purpose of boosting the first input power supply VDD1. The preset voltage range can be flexibly adjusted according to actual conditions. For example, if the digital voltage of the first input power supply VDD1 is too low or the analog voltage of the second input power supply VDD2 is too high, the preset voltage range can be adjusted higher. Correspondingly, if the digital voltage of the first input power supply VDD1 is too high or the analog voltage of the second input power supply VDD2 is too low, the preset voltage range can be adjusted lower to meet the voltage adaptation scenarios of different power supply systems.

[0050] The input end of the level comparison output unit 200 is electrically connected to the second input power supply VDD2 and the input end of the level shift unit 100, respectively. The level comparison output unit 200 is used to output a first control signal when the comparison voltage Vs is greater than the analog voltage, and output a second control signal when the comparison voltage Vs is not greater than the analog voltage; wherein the first control signal controls the analog circuit not to work, and the second control signal controls the analog circuit to work. The first control signal and the second control signal are high-level signals or low-level signals, and the control of the analog circuit working mode is achieved through different level signals. In the embodiment of the present application, the case where the comparison voltage Vs is not greater than the analog voltage is that the first input power supply VDD1 is not powered on, or the first input power supply VDD1 is powered on but has not risen to the normal working voltage, and is in an unstable power supply state; the case where the comparison voltage Vs is greater than the analog voltage is that the first input power supply VDD1 is powered on and has risen to the normal working voltage range, and is in a stable power supply state. For example, when the second input power supply VDD2 is powered on and the first input power supply VDD1 is not powered on, the first control signal (for example Figure 2 The high-level signal is used to control the analog circuit so as not to cause leakage. When the first input power source VDD1 is powered on, the second control signal (for example, Figure 2 The ISO signal in the output unit 200 is a low-level signal to enable the analog circuit to work normally. The comparison object of the level comparison output unit 200 refers to the comparison voltage Vs after the first input power supply VDD1 is pulled up and the analog voltage of the second input power supply VDD2. The level comparison output unit 200 can directly compare the comparison voltage Vs and the analog voltage, or convert the comparison voltage Vs and the analog voltage into the same physical quantity or physical unit for comparison. The embodiment of the present application does not specifically limit the comparison method, and can be flexibly adjusted according to actual conditions, as long as the purpose of comparing the comparison voltage Vs and the analog voltage can be achieved. The comparison output unit can be composed of a level comparator, etc., which is not specifically limited in the embodiment of the present application.

[0051] In the first aspect, the multi-power supply power-on detection circuit 10 provided in the embodiment of the present application at least includes: a level shift unit 100 and a level comparison output unit 200, through which the digital voltage of the first input power supply VDD1 is pulled up to a comparison voltage Vs within a preset voltage range, and then the comparison voltage Vs is compared with the analog voltage of the second input power supply VDD2 through the level comparison output unit 200, and a first control signal is output when the comparison voltage Vs is greater than the analog voltage, and a second control signal is output when the comparison voltage Vs is not greater than the analog voltage. The analog circuit is controlled to work through the second control signal and the analog circuit is controlled not to work through the first control signal, so that the analog circuit is controlled not to work when the first input power supply VDD1 is not powered on, thereby achieving the purpose of no static power consumption of the analog circuit, and the analog circuit is controlled to work through the first control signal when the digital voltage is powered on, thereby providing a multi-power supply power-on detection circuit 10 that can ensure the normal operation of the analog circuit and has lower static power consumption;

[0052] On the second aspect, the multi-power supply power-on detection circuit 10 provided in the embodiment of the present application raises the voltage of the first input power supply VDD1 to a comparison voltage Vs within a preset range by setting a level shift unit 100, and controls the voltage difference between the comparison voltage Vs and the analog voltage within a certain range to ensure the normal operation of the level comparison output unit 200; in this way, it adapts to power supply systems with different voltage ranges, thereby improving the scope of application of the multi-power supply power-on detection circuit 10 in the embodiment of the present application.

[0053] On the third aspect, an embodiment of the present application provides a multi-power supply power-on detection circuit 10, which has only a level shift unit 100 and a level comparison output unit 200, has a simple structure, and can adapt to different power supply systems by adjusting the size of the preset voltage range of the level shift unit 100, and realizes the adaptation range of power supply systems with larger voltage differences through simple circuit structure and low-cost circuits.

[0054] Please continue to see Figure 2 In an optional embodiment of the present application, the level shift unit 100 at least includes: a level shift module 110 and a first transistor device M1, wherein:

[0055] The output end of the level shift module 110 is electrically connected to the input end of the level comparison output unit 200; similarly, the level shift module 110 can be a boost circuit, a voltage stabilizer or a capacitor booster, etc., as long as it can achieve the purpose of boosting the first input power supply VDD1.

[0056] The gate of the first transistor device M1 is electrically connected to the first input power supply VDD1, the source of the first transistor device M1 is electrically connected to the input end of the level shift module 110, and the drain of the first transistor is grounded. The first transistor device M1 can be an N-type device or a P-type device, and it is sufficient to turn on or off the device through the digital voltage of the first input power supply VDD1, thereby controlling the conduction or disconnection of the path where the level shift module 110 and the second transistor device M2 and the third transistor device M3 are located.

[0057] The level shift unit 100 of the embodiment of the present application at least includes a level shift module 110 and a first transistor device M1. The level shift module 110 and the first transistor device M1 can realize the conduction or shutoff of the path where the level shift module 110 is located through a simple structure, thereby outputting a first control signal when the first input power supply VDD1 is not powered on, so as to achieve the purpose of controlling the analog circuit to not work. The structure is simple and ingenious, thereby achieving the purpose of reducing the power consumption of the analog circuit.

[0058] Please continue to see Figure 2 In an optional embodiment of the present application, the level comparison output unit 200 includes: a level comparison module 210 and a comparison output module 220, wherein:

[0059] The input end of the level comparison module 210 is electrically connected to the second input power supply VDD2 and the output end of the level shift module 110 respectively; in an optional embodiment of the present application, the level comparison module 210 at least includes: a second transistor device M2 and a third transistor device M3, wherein:

[0060] The gate and drain of the second transistor device M2 are electrically connected to the input terminal of the level shift module 110, and the source of the second transistor device M2 is electrically connected to the second input power supply VDD2;

[0061] The gate of the third transistor device M3 is electrically connected to the gate of the second transistor device M2 , the source of the third transistor device M3 is electrically connected to the second input power supply VDD2 , and the drain of the third transistor device M3 is electrically connected to the input terminal of the comparison output module 220 .

[0062] The control end of the comparison output module 220 is electrically connected to the gate of the first transistor device M1, the input end of the comparison output module 220 is electrically connected to the output end of the level comparison module 210, the first output end of the comparison output module 220 is grounded, and the second output end of the comparison output module 220 is used to output the first control signal or the second control signal. In an optional embodiment of the present application, the comparison output module 220 at least includes: a fourth transistor device M4 and a fifth transistor device M5, wherein:

[0063] The gate of the fourth transistor device M4 is electrically connected to the first input power source VDD1, and the source of the fourth transistor device M4 is electrically connected to the drain of the third transistor device M3;

[0064] A gate of the fifth transistor device M5 is electrically connected to the first input power source VDD1 , a source of the fifth transistor device M5 is electrically connected to a drain of the fourth transistor device M4 , and a drain of the fifth transistor device M5 is grounded.

[0065] In an optional embodiment of the present application, the first transistor device M1, the second transistor device M2, the third transistor device M3 and the fourth transistor device M4 are all transistor devices of the first conductivity type; the fifth transistor device M5 is a transistor device of the second conductivity type; wherein the first conductivity type and the second conductivity type are different.

[0066] In an optional embodiment of the present application, the first transistor device M1, the second transistor device M2, the third transistor device M3 and the fourth transistor device M4 are all P-type transistor devices; and the fifth transistor device M5 is an N-type transistor device.

[0067] Taking all the above embodiments as examples, the working principle of the multi-power supply power-on detection circuit 10 provided in the embodiment of the present application is described in detail:

[0068] In the first case, the second input power supply VDD2 is powered on first, and the first input power supply VDD1 is not powered on. At this time, the first input power supply VDD1 is at a low level. By setting a suitable level shift voltage, the current of the second transistor device M2 can be very small. In addition, the second transistor device M2 and the third transistor device M3 are in a mirror relationship. By setting the current mirror ratio, the third transistor device M3 is in a weak conduction state. Since the first input power supply VDD1 is at a low level, the fourth transistor device M4 is turned on, and the fifth transistor device M5 is disconnected. At this time, the output ISO is at a high level, and the state where the first input power supply VDD1 is not powered on is successfully detected, and no static current flows through the fifth transistor device M5.

[0069] In the second case, the first input power supply VDD1 and the second input power supply VDD2 are both powered on, the gate voltage of the first transistor device M1 is the first input power supply VDD1, and the source voltage is raised at the same time. After passing through the level shifting module 110, the level of Vs is raised, so that the second transistor device M2 is in a disconnected state, and no static current flows through the second transistor device M2. Since the Vs level is raised, the third transistor device M3 is also in a disconnected state, and the gates of the fourth transistor device M4 and the fifth transistor device M5 are connected to the first input power supply VDD1. At this time, the fifth transistor device M5 is turned on. Since the third transistor device M3 is disconnected, the ISO output is low level, and no static current flows through the third transistor device M3, and the state that the first input power supply VDD1 is powered on is successfully detected.

[0070] See also Figure 3 , Figure 3 The simulation results based on the structure of the multi-power supply power-on detection circuit 10 provided above are as follows: the digital voltage V1 of the first input power supply VDD1 is 1.2 V in normal operation, and the analog voltage V2 of the second input power supply VDD2 is 1.8 V. In the abnormal power-on area, the second input power supply VDD2 is powered on first, and the first input power supply VDD1 is powered on later, and a high-level first control signal iso is output. When in normal working state, a low-level second control signal iso is output, and there is no static current Ivdd in the overall circuit.

[0071] See also Figure 4 In an optional embodiment of the present application, the level shift module 110 includes a plurality of transistors, each of which is formed by connecting a number of diodes that are not completely the same. The number of the transistors is positively correlated with the absolute value of the voltage difference between the first input power supply VDD1 and the second input power supply VDD2, thereby achieving the adaptability of the overall multi-power supply power-on detection circuit 10 to different power supply systems.

[0072] In an optional embodiment of the present application, the first input power supply is a digital power supply; and / or the second input power supply is an analog power supply. That is, the control switching between the digital power supply and the analog power supply is realized by the multi-power supply power-on detection circuit 10, so as to ensure the normal operation of the analog circuit and reduce the static power consumption.

[0073] In an optional embodiment of the present application, the above-mentioned analog circuit is a low-noise amplifier circuit, which at least includes: an amplifier input circuit and an amplifier output circuit; wherein, there is at least one group of tail inductance structures in the amplifier input circuit and the amplifier output circuit; a first resonant circuit, the first resonant circuit is a closed structure, the first resonant circuit is coupled to the tail inductance structure, and the first resonant circuit is used to discharge the current generated by the tail inductance structure; the first resonant circuit at least includes: a secondary coil, coupled to the primary coil in the tail inductance structure; a first capacitor module, the first end of the first capacitor module is electrically connected to the secondary coil.

[0074] In an optional embodiment of the present application, the first resonant circuit further includes: a first adjustable resistor, wherein the first end of the first adjustable resistor is electrically connected to the first end of the secondary coil, and the second end of the first adjustable resistor is electrically connected to the second end of the first capacitor module; wherein the secondary coil, the first capacitor module and the first adjustable resistor are electrically connected to each other to form a closed structure.

[0075] In an optional embodiment of the present application, the amplifier input circuit at least includes: an electrostatic protection circuit, the input end of the electrostatic protection circuit is used to receive the radio frequency signal to be amplified, and the electrostatic protection circuit is grounded; a second capacitor module, the first end of the second capacitor module is electrically connected to the output end of the electrostatic protection circuit, and the second end of the capacitor module is grounded; a first electronic switch module, the control end of the first electronic switch module is electrically connected to the second capacitor module and the bias voltage, the source end of the first electronic switch module is electrically connected to the amplifier output circuit, and the drain end of the first electronic switch module is electrically connected to the primary coil in the tail inductance structure.

[0076] In an optional embodiment of the present application, the first electronic switch module at least includes: a first electronic switch device, a gate of the first electronic switch device is electrically connected to the second capacitor module and the first bias voltage, and a drain of the first electronic switch device is electrically connected to the primary coil in the tail inductor structure; a second electronic switch device, a gate of the second electronic switch device is used to connect to the second bias voltage, a source of the second electronic switch is electrically connected to the amplification output circuit, and a drain of the second electronic switch device is electrically connected to the source of the first electronic switch device.

[0077] In an optional embodiment of the present application, the amplification output circuit includes at least: a second electronic switch module, the gate of the second electronic switch module is used to receive an enable signal, and the drain of the second electronic switch module is electrically connected to the second capacitor module; a second resonant circuit, the input end of the second resonant circuit is electrically connected to the source of the second crystal module; an output matching circuit, the input end of the output matching circuit is electrically connected to the output end of the second resonant circuit, and the output matching circuit is used to perform frequency matching and gain adjustment on the signal output by the second resonant circuit and then output the target RF signal.

[0078] In an optional embodiment of the present application, the output matching circuit includes at least: at least two groups of capacitor devices connected in parallel, the first end of the capacitor device is electrically connected to the output end of the second resonant circuit; a first attenuation device, the input end of the first attenuation device is electrically connected to the second end of the capacitor device, the first attenuation device and the capacitor device perform frequency matching and gain adjustment on the signal output by the second resonant circuit to the target RF signal; an output module, the input end of the output module is electrically connected to the output end of the first attenuation device, and the output module is used to output the target RF signal.

[0079] In an optional embodiment of the present application, the above-mentioned low-noise amplifier circuit further includes: a second attenuation device, wherein the input end of the second attenuation device is electrically connected to the source of the second electronic switch module, and the output end of the second attenuation device is electrically connected to the second resonant device.

[0080] In an optional embodiment of the present application, the tail inductance structure in the amplifier input circuit includes at least: the primary coil; a plurality of third electronic switch modules, the gates of the third electronic switch modules are used to receive control signals, the sources of the third electronic switch modules are electrically connected to the primary coil respectively, and the drains of the third electronic switches are grounded.

[0081] When the low-noise amplifier circuit is working, in order to prevent external static electricity from interfering with the signal in the low-noise amplifier circuit, in an optional embodiment of the present application, the low-noise amplifier circuit further includes: a multi-stage impedance protection module, at least one detection control module is arranged between two adjacent stages of the impedance protection modules, the input end of the front-stage impedance protection module in the multi-stage impedance protection module is electrically connected to the static power source, and the last-stage impedance protection module in the multi-stage impedance protection module is electrically connected to the static power source and the amplifier input circuit or the amplifier output circuit respectively;

[0082] The detection control module is used to detect the output voltage of the front-stage impedance protection module. The rear-stage impedance protection module is activated when the output voltage is greater than a preset voltage, and discharges the electrostatic voltage of the electrostatic power source; wherein the front-stage impedance protection module refers to an impedance protection module electrically connected to the detection control module and located at the front stage of the detection control module, and the rear-stage impedance protection module refers to an impedance protection module electrically connected to the detection control module and located at the rear stage of the detection control module. wherein the front-stage impedance protection module includes: a plurality of diode devices connected in series.

[0083] In an optional embodiment of the present application, the front-stage impedance protection module includes: a first diode module and a second diode module connected in parallel, the input ends of the first diode module and the second diode module are respectively electrically connected to the static power source, and the output ends of the first diode module and the second diode module are respectively grounded; wherein, the first diode module and the second diode module respectively include at least two diode devices connected in series, and the diode devices in the first diode module are connected in opposite directions to the diode devices in the second diode module.

[0084] In an optional embodiment of the present application, the post-stage impedance protection module at least includes: a transistor device, a control end of the transistor device is electrically connected to the detection control module, a first connection end of the transistor device is electrically connected to a connection point between the pre-stage impedance protection module and the electrostatic power source, a second connection end of the transistor device is grounded, and the transistor device is started when the operating voltage of the pre-stage impedance protection module is greater than a preset voltage, and discharges the electrostatic voltage of the electrostatic power source.

[0085] In an optional embodiment of the present application, the transistor device is an N-type transistor.

[0086] In an optional embodiment of the present application, the detection control module at least includes:

[0087] A first resistor device, wherein a first end of the first resistor device is electrically connected to the front-stage impedance protection module;

[0088] A second resistor device, wherein a first end of the second resistor device is electrically connected to a second end of the first resistor device and a control end of the post-stage impedance protection module respectively, and a second end of the second resistor device is grounded.

[0089] In an optional embodiment of the present application, it also includes: a current limiting device, wherein the input end of the current limiting device is electrically connected to the connection point between the front-stage impedance protection module and the static power source, and the output end of the current limiting device is electrically connected to the first connection end of the rear-stage impedance protection module.

[0090] In an optional embodiment of the present application, the current limiting device includes a plurality of capacitor devices connected in series.

[0091] In an optional embodiment of the present application, the multi-stage impedance protection module is a two-stage impedance protection module.

[0092] An embodiment of the present application provides a power supply system, including:

[0093] A first input power supply VDD1 and a second input power supply VDD2; wherein the voltage of the first input power supply VDD1 is not greater than the voltage of the second input power supply VDD2;

[0094] In the multi-power supply power-on detection circuit 10 as described in any of the above items, the first input power supply VDD1 is electrically connected to the input end of the level shift unit 100 in the multi-power supply power-on detection circuit 10, and the second input power supply VDD2 is electrically connected to the input end of the level comparison output unit 200 in the multi-power supply power-on detection circuit 10.

[0095] The beneficial effects of the multi-power supply power-on detection circuit 10 have been described in detail in the above embodiments and will not be repeated here. Based on the above embodiments, the present application provides a power supply system with a simple structure, low cost, adaptability to different power supply voltages, and no static power consumption.

[0096] An embodiment of the present application provides an electronic device, including:

[0097] A first input power source VDD1 and a second input power source VDD2;

[0098] In the multi-power supply power-on detection circuit 10 as described in any of the above items, the first input power supply VDD1 is electrically connected to the input end of the level shift unit 100 in the multi-power supply power-on detection circuit 10, and the second input power supply VDD2 is electrically connected to the input end of the level comparison output unit 200 in the multi-power supply power-on detection circuit 10.

[0099] Among them, the voltage of the first input power supply VDD1 is not greater than the voltage of the second input power supply VDD2; the beneficial effects of the multi-power supply power-on detection circuit 10 have been described in detail in the above embodiment and will not be repeated here. Based on the above embodiment, the embodiment of the present application provides an electronic device with a simple structure, low cost, adaptability to different power supply systems, and no static power consumption.

[0100] In an optional embodiment of the present application, the electronic device is taken as a level conversion interface as an example for description:

[0101] In actual scenarios, devices in different power domains often communicate with each other, especially from devices in the low power domain to devices in the high power domain. Level shifting devices need to be added in the middle, which increases the complexity of the system and the cost of use. Therefore, if the devices in the high power domain can directly receive the control signals of the low power domain devices, the system design can be greatly simplified.

[0102] The level conversion interface includes Figure 5 In: Device1 and Device2, the first input power VDD1 of the level conversion interface is a low power domain, and the second input power VDD2 of the level conversion interface is a high power domain, wherein Device1 works in the low power domain and Device2 works in the high power domain, and can be compatible with different control levels. If Device1 directly sends a control signal to Device2, since the control signal may be an intermediate level for Device2, leakage may occur, or even logic judgment errors may occur, resulting in uncontrollable failure. The level conversion interface provided in the embodiment of the present application can realize that the control signal of the low power domain directly controls the device of the high power domain without generating additional leakage, and the function is correct.

[0103] It should be understood that, although the various steps in the flow chart are displayed in sequence according to the indication of the arrows, these steps are not necessarily executed in sequence according to the order indicated by the arrows. Unless there is a clear description in this article, the execution of these steps is not strictly limited in order, and these steps can be executed in other orders. Moreover, at least a portion of the steps in the figure may include multiple sub-steps or multiple stages, and these sub-steps or stages are not necessarily executed at the same time, but can be executed at different times, and the execution order of these sub-steps or stages is not necessarily to be carried out in sequence, but can be executed in turn or alternately with other steps or at least a portion of the sub-steps or stages of other steps.

[0104] The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0105] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be construed as limiting the scope of the patent application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent application shall be subject to the attached claims.

Claims

1. A multi-power supply power-on detection circuit, characterized in that: Used to perform power-on detection on multiple input power supplies, the multiple input power supplies include at least a first input power supply and a second input power supply, and the multi-power supply power-on detection circuit includes at least: a level shift unit, wherein an input terminal of the level shift unit is electrically connected to the first input power source, and the level shift unit is used to pull up the first input power source to a comparison voltage within a preset voltage range; A level comparison output unit, wherein the input end of the level comparison output unit is electrically connected to the second input power supply and the input end of the level shift unit respectively, and the level comparison output unit is used to output a first control signal when the comparison voltage is greater than the second voltage of the second input power supply, and output a second control signal when the comparison voltage is not greater than the second voltage; wherein the first control signal controls the analog circuit not to work, and the second control signal controls the analog circuit to work.

2. The multi-power supply power-on detection circuit according to claim 1, characterized in that: The level shift unit at least comprises: A level shift module, wherein an output end of the level shift module is electrically connected to an input end of the level comparison output unit; A first transistor device, wherein a gate of the first transistor device is electrically connected to the first input power supply, a source of the first transistor device is electrically connected to an input end of the level shift module, and a drain of the first transistor is grounded.

3. The multi-power supply power-on detection circuit according to claim 2, characterized in that: The level comparison output unit comprises: a level comparison module, wherein an input end of the level comparison module is electrically connected to the second input power supply and an output end of the level shift module respectively; A comparison output module, wherein the control end of the comparison output module is electrically connected to the gate of the first transistor device, the input end of the comparison output module is electrically connected to the output end of the level comparison module, the first output end of the comparison output module is grounded, and the second output end of the comparison output module is used to output the first control signal or the second control signal.

4. The multi-power supply power-on detection circuit according to claim 3, characterized in that: The level comparison module at least includes: a second transistor device, wherein a gate and a drain of the second transistor device are electrically connected to an input terminal of the level shift module, and a source of the second transistor device is electrically connected to the second input power supply; A third transistor device, wherein a gate of the third transistor device is electrically connected to the gate of the second transistor device, a source of the third transistor device is electrically connected to the second input power supply, and a drain of the third transistor device is electrically connected to the input end of the comparison output module.

5. The multi-power supply power-on detection circuit according to claim 4, characterized in that: The comparison output module at least includes: a fourth transistor device, wherein a gate of the fourth transistor device is electrically connected to the first input power supply, and a source of the fourth transistor device is electrically connected to a drain of the third transistor device; A fifth transistor device, wherein a gate of the fifth transistor device is electrically connected to the first input power supply, a source of the fifth transistor device is electrically connected to a drain of the fourth transistor device, and a drain of the fifth transistor device is grounded.

6. The multi-power supply power-on detection circuit according to claim 5, characterized in that: The first transistor device, the second transistor device, the third transistor device and the fourth transistor device are all transistor devices of the first conductivity type; the fifth transistor device is a transistor device of the second conductivity type; wherein the first conductivity type and the second conductivity type are different.

7. The multi-power supply power-on detection circuit according to claim 6, characterized in that: The first transistor device, the second transistor device, the third transistor device and the fourth transistor device are all P-type transistor devices; the fifth transistor device is an N-type transistor device.

8. The multi-power supply power-on detection circuit according to claim 1, characterized in that: The level shift module includes a plurality of transistors, each of which is formed by connecting diodes with different numbers.

9. The multi-power supply power-on detection circuit according to claim 8, characterized in that: The number of the transistors is positively correlated to the absolute value of the voltage difference between the first input power source and the second input power source.

10. The multi-power supply power-on detection circuit according to claim 1, characterized in that: The first input power source is a digital power source; and / or the second input power source is an analog power source.

11. A power supply system, characterized in that: include: a first input power source and a second input power source; In the multi-power supply power-on detection circuit as described in any one of claims 1 to 10 above, the first input power supply is electrically connected to the input end of the level shifting unit in the multi-power supply power-on detection circuit, and the second input power supply is electrically connected to the input end of the level comparison output unit in the multi-power supply power-on detection circuit.

12. An electronic device, characterized in that: include: A first input power supply and a second input power supply; wherein the voltage of the first input power supply is not greater than the voltage of the second input power supply; In the multi-power supply power-on detection circuit as described in any one of claims 1 to 10 above, the first input power supply is electrically connected to the input end of the level shifting unit in the multi-power supply power-on detection circuit, and the second input power supply is electrically connected to the input end of the level comparison output unit in the multi-power supply power-on detection circuit.

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