Silicon wafer, method and device for improving warping degree of silicon wafer, equipment and medium

Abstract

The invention provides a silicon wafer, a method and device for improving the warping degree of the silicon wafer, equipment and a medium. The method comprises the steps that the warping state of the silicon wafer and the measurement value of the warping degree are acquired; when the warping state of the silicon wafer is convex warping, determining a first thickness and a first thin film deposition process frequency according to the measurement value of the warping degree and a target thickness, and executing a thin film deposition process according to the first thickness and the first thin film deposition process frequency to form a back sealing thin film conforming to the target thickness; and when the warping state of the silicon wafer is concave warping, determining a second thickness and the number of times of a second thin film deposition process according to the measurement value of the warping degree and the target thickness, and executing the thin film deposition process according to the second thickness and the number of times of the second thin film deposition process to form a back sealing thin film conforming to the target thickness.

Description

Technical Field

[0001] The present disclosure relates to the field of semiconductor manufacturing technology, and in particular to a silicon wafer and a method, device, equipment and medium for improving the warpage of the silicon wafer. Background Art

[0002] In the semiconductor manufacturing process, the warping of single-crystal silicon wafers will affect the quality of the single-crystal silicon wafers and the progress of the semiconductor manufacturing process. For example, during the photolithography process, if the single-crystal silicon wafer is deformed, its illuminated surface will be uneven, which will cause the mask structure to fail to form a clear image, thereby affecting the accuracy of etching. With the continuous improvement of the process technology, the structural precision of semiconductor devices has also increased. Therefore, the warping of single-crystal silicon wafers needs to be controlled within a more stringent range.

[0003] For doped silicon wafers in single crystal silicon wafers, it is necessary to prevent self-doping during the epitaxial growth stage, that is, in the high temperature environment of the epitaxial growth process, the dopant of the doped silicon wafer will diffuse outward from the front and back of the silicon wafer, and then mix with the reaction gas of the epitaxial growth and deposit to form the epitaxial layer of the silicon wafer, which will cause resistivity drift and seriously affect the quality of the silicon wafer. Silicon wafer back-sealing technology is a commonly used means to prevent self-doping. It deposits a back-sealing film such as a silicon dioxide film on the back of the silicon wafer to seal the dopant atoms in the silicon wafer, thereby effectively inhibiting the outward diffusion of the dopant.

[0004] At present, the warpage of the silicon wafer after back sealing is relatively poor. How to improve the warpage of the silicon wafer after back sealing is a problem that needs to be solved. Summary of the invention

[0005] The present disclosure provides a silicon wafer and a method, device, equipment and medium for improving the warpage of the silicon wafer; the warpage of the silicon wafer after back sealing can be reduced, thereby improving the flatness of the silicon wafer after back sealing.

[0006] The technical solution of the present disclosure is achieved as follows: In a first aspect, the present disclosure provides a method for improving the warpage of a silicon wafer, the method comprising: Obtaining the warpage state of the silicon wafer and the measurement value of the warpage; When the warping state of the silicon wafer is convex warping, a first thickness and a first thin film deposition process number are determined according to the warping measurement value and the target thickness, and a thin film deposition process is performed according to the first thickness and the first thin film deposition process number to form a back sealing film that meets the target thickness; the convex warping means that the central part of the front side of the silicon wafer is higher than the edge part, and the back sealing film layer of the first thickness generates tensile stress on the back surface of the silicon wafer; When the warping state of the silicon wafer is concave warping, the second thickness and the number of second thin film deposition processes are determined according to the measured value of the warping degree and the target thickness, and the thin film deposition process is performed according to the second thickness and the second thin film deposition process number to form a back sealing film that meets the target thickness. The concave warping indicates that the central part of the front side of the silicon wafer is lower than the edge part, and the back sealing film layer of the second thickness produces compressive stress on the back surface of the silicon wafer.

[0007] In a second aspect, the present disclosure provides a device for improving the warpage of a silicon wafer, the device comprising: an acquisition unit, a determination unit and an execution unit; wherein: The acquisition unit is configured to acquire the warping state of the silicon wafer and the measurement value of the warping degree; The determining unit is configured to determine a first thickness and a first thin film deposition process number according to a measured value of the warpage and a target thickness when the warpage state of the silicon wafer is a convex warpage, wherein the convex warpage indicates that a central portion of the front surface of the silicon wafer is higher than an edge portion, and a back sealing film layer of the first thickness generates tensile stress on a back surface of the silicon wafer; And, when the warping state of the silicon wafer is concave warping, determining a second thickness and a second thin film deposition process number according to the measured value of the warping degree and the target thickness, the concave warping means that the central part of the front side of the silicon wafer is lower than the edge part, and the back sealing film layer of the second thickness generates compressive stress on the back and front sides of the silicon wafer; The execution unit is configured to, when the warping state of the silicon wafer is convex warping, execute a thin film deposition process according to the first thickness and the first thin film deposition process number to form a back sealing film that meets the target thickness; and, when the warping state of the silicon wafer is concave warping, execute a thin film deposition process according to the second thickness and the second thin film deposition process number to form a back sealing film that meets the target thickness.

[0008] In a third aspect, the present disclosure provides a computing device, comprising a processor and a memory; the processor is used to execute instructions stored in the memory to implement the method for improving the warpage of a silicon wafer as described in the first aspect.

[0009] In a fourth aspect, the present disclosure provides a computer-readable storage medium storing at least one instruction, wherein the at least one instruction is used to be executed by a processor to implement the method for improving the warpage of a silicon wafer as described in the first aspect.

[0010] In a fifth aspect, the present disclosure provides a silicon wafer, a back side of which is formed with a back-sealing film according to the method for improving the warpage of a silicon wafer as described in the first aspect, and a measurement value of the warpage of the silicon wafer is in the range of [0, 500].

[0011] The present disclosure provides a silicon wafer and a method, device, equipment and medium for improving the warpage of the silicon wafer; the warpage of the silicon wafer is improved by utilizing the relationship between the thickness of the back seal film layer and the stress generated thereby, thereby reducing the warpage of the silicon wafer after the back seal is deposited and improving the flatness of the silicon wafer after the back seal is deposited. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Figure 1 A schematic diagram of the structure of a deposition chamber provided in the present invention.

[0013] Figure 2 A schematic flow chart of a method for improving silicon wafer warpage provided in the present invention.

[0014] Figure 3 (A) is a schematic diagram of the convex warping state provided by the present disclosure.

[0015] Figure 3 (B) is a schematic diagram of the concave warping state provided by the present disclosure.

[0016] Figure 4 This is a box plot of Example 1 provided in the present disclosure.

[0017] Figure 5 This is a box plot of Example 2 provided in the present disclosure.

[0018] Figure 6 This is a box plot of Example 3 provided in the present disclosure.

[0019] Figure 7 This is a box plot of Example 4 provided in the present disclosure.

[0020] Figure 8 This is a box plot of Example 5 provided in the present disclosure.

[0021] Fig. 9 This is a box plot of Example 6 provided in the present disclosure.

[0022] Fig.10 This is a box plot of Example 7 provided in the present disclosure.

[0023] Fig.11 This is a box plot of Example 8 provided in the present disclosure.

[0024] Fig.12 A schematic diagram of comparing the measured values ​​of the warpage of a silicon wafer before and after a thin film deposition process is provided in the present disclosure.

[0025] Fig.13 Another schematic diagram of comparing the measurement values ​​of silicon wafer warpage before and after performing a thin film deposition process provided by the present disclosure.

[0026] Fig.14A schematic diagram of the composition of a device for improving the warpage of a silicon wafer provided in the present invention.

[0027] Fig.15 A schematic diagram of the structure of a computing device provided by the present disclosure. DETAILED DESCRIPTION

[0028] The technical solutions in the present disclosure will be described clearly and completely below in conjunction with the accompanying drawings in the present disclosure.

[0029] In order to be able to clearly distinguish the two surfaces of the silicon wafer later, in the present disclosure, the front side of the silicon wafer is the surface of the silicon wafer that is patterned during the semiconductor device manufacturing process, and the surface of the silicon wafer opposite to the front side is the back side.

[0030] See also Figure 1 , which shows a schematic diagram of a structural example of a deposition chamber that can be applied to the method for improving the warpage of a silicon wafer proposed in the present disclosure. Figure 1 As shown, the deposition chamber 1 includes a carrier 11 for carrying a silicon wafer W to be back-sealed, and a gas jet disposed above the carrier 11 for spraying a reaction gas (such as Figure 1 In some examples, the front side of the silicon wafer W contacts the carrier 11, so that the back side of the silicon wafer W faces the injection device 12 to react chemically with the reaction gas. In some examples, the reaction gas can be a silicon source gas and an oxygen source gas, such as silane SiH 4 and nitrous oxide N 2 O, these reaction gases react chemically with the back side of the silicon wafer W under the high temperature environment provided by the heating device 13, thereby depositing a back sealing film on the back side of the silicon wafer W, and this process of forming the back sealing film can be referred to as a back sealing deposition process in the present disclosure.

[0031] During the back seal deposition process, the high temperature environment causes the hardness of the silicon wafer to decrease, the gravity of the silicon wafer will affect the flatness of the silicon wafer, and the stress of the back seal film will also affect the flatness of the silicon wafer. Combined with these effects, it is easy to cause the flatness of the silicon wafer after the back seal to deteriorate. In order to eliminate this deterioration, the present disclosure uses the bending of wafer (BOW) as an evaluation index of flatness, and provides a method for improving the bending of silicon wafer, such as Figure 2 As shown, the method includes: S201: Obtaining the warping state of the silicon wafer and the measurement value of the warping degree.

[0032] In the present disclosure, silicon wafers with poor flatness are usually in two warping states, namely, convex warping and concave warping. Figure 3 (A) and Figure 3 As shown in (B), convex warping means that the center of the front of the silicon wafer is higher than the edge, and concave warping means that the center of the front of the silicon wafer is lower than the edge. For these two warping states, the vertical distance between the highest point and the lowest point on the front of the silicon wafer is used as a measure of the warpage to evaluate the degree of convexity or concavity of the silicon wafer. It can be understood that in the convex warpage state, the highest point on the front of the silicon wafer is in the center of the front of the silicon wafer, and the lowest point on the front of the silicon wafer is at the edge of the front of the silicon wafer. In the concave warpage state, the highest point on the front of the silicon wafer is at the edge of the front of the silicon wafer, and the lowest point on the front of the silicon wafer is in the center of the front of the silicon wafer. In some examples, when the silicon wafer is convexly warped, the center of the front of the silicon wafer is higher than the edge, and the warpage is positive. When the silicon wafer is concavely warped, the center of the front of the silicon wafer is lower than the edge, and the warpage is negative.

[0033] Before the back-sealing deposition process is performed in the above-mentioned deposition chamber, the warping state of the silicon wafer to be back-sealed and the measured value of the warping can be detected by means of flatness detection. In some examples, a beam of light can be first divided into two beams by double-sided interference under polar coordinates with the center of the front of the silicon wafer as the pole, and irradiated to the front and back of the silicon wafer respectively to obtain the reflected light of the front and back of the silicon wafer; then, the reflected light is merged to generate interference fringes formed by the phase difference between the two reflected light beams; then, the phase difference between the two reflected light beams is measured by measuring the interference fringes, and the morphological information of the front of the silicon wafer is calculated according to the phase difference. Subsequently, the warping state of the silicon wafer is determined to be convex warping or concave warping according to the morphological information, and when the warping state of the silicon wafer is convex warping or concave warping, the difference between the maximum height and the minimum height in the morphological information on the front of the silicon wafer is determined as the measured value of the warping. Specifically, the height data of each sampling point on the front of the silicon wafer can be measured by contact or non-contact measurement means. After obtaining the height data of all sampling points, the fitting surface of the front side of the silicon wafer is obtained by fitting. Based on the fitting surface, it is possible to analyze whether the warping state of the silicon wafer is convex warping or concave warping, and the warping degree is calculated based on the difference between the maximum height and the minimum height in the fitting surface.

[0034] S202: When the warping state of the silicon wafer is convex warping, determine a first thickness and a first thin film deposition process number according to the warping measurement value and the target thickness, and perform a thin film deposition process according to the first thickness and the first thin film deposition process number to form a back sealing film meeting the target thickness.

[0035] S203: When the warping state of the silicon wafer is concave warping, determine the second thickness and the number of second thin film deposition processes according to the warping measurement value and the target thickness, and perform a thin film deposition process according to the second thickness and the number of second thin film deposition processes to form a back sealing film that meets the target thickness.

[0036] Specifically, the stress of the back-sealing film comes from the difference in thermal expansion coefficients between different materials. That is to say, when the temperature changes the same, the thermal expansion coefficients of the material of the back-sealing film and the material of the silicon wafer are different, resulting in a difference in the rate of expansion or contraction. At this time, stress will be generated at the junction of the back-sealing film and the silicon wafer. This stress will stretch or compress the back of the silicon wafer on which the back-sealing film is deposited. The present disclosure can be referred to as tensile stress and compressive stress, respectively. The inventors found that as the thickness of the back-sealing film continues to increase, the stress generated by the film will change accordingly, and may even transform between tensile stress and compressive stress. Based on the above findings, the present disclosure uses the relationship between the thickness of the back-sealing film layer and the stress generated by it to improve the warpage of the silicon wafer, thereby reducing the warpage of the silicon wafer after the back-sealing is deposited, and improving the flatness of the silicon wafer after the back-sealing is deposited.

[0037] The relationship between the thickness of the back-sealing film layer and the stress generated therefrom is described below through examples.

[0038] Embodiment 1 Setting based on Figure 1 The thin film deposition process performed in the deposition chamber shown is the atmospheric pressure chemical vapor deposition (APCVD) process, and the temperature of the thin film deposition process is 450 degrees, and the material of the back-sealing film is silicon dioxide. Based on the above settings, a back-sealing film with a thickness of 500 angstroms is deposited on 16 silicon wafers to be back-sealed with an average warpage of 1408.39nm, as shown in FIG. Figure 4 As shown in the figure, the average warpage of the deposited silicon wafer is 1069.79nm. It can be seen that the 500 angstrom thick back-sealing film can provide tensile stress on the back of the silicon wafer to reduce the concave warpage of the silicon wafer, and the warpage elimination value is 338.6nm, that is, the absolute value of the average warpage is reduced by 338.6nm.

[0039] Embodiment 2 Consistent with the setting of Example 1, a back-sealing film with a thickness of 750 angstroms was deposited on 16 silicon wafers to be back-sealed with an average warpage of 2551.95, as shown in FIG. Figure 5As shown, the average warpage of the deposited silicon wafer is 1680.55nm, from which it can be seen that the 750 angstrom thick back-sealing film can provide tensile stress on the back of the silicon wafer to reduce the convex warpage of the silicon wafer, and the warpage elimination measurement value is 871.4nm, that is, the absolute value of the average warpage is reduced by 871.4nm.

[0040] Embodiment 3 Consistent with the setting of Example 1, a back-sealing film with a thickness of 1000 angstroms was deposited on 16 silicon wafers to be back-sealed with an average warpage of 1784.12 nm. Figure 6 As shown, the average warpage of the deposited silicon wafer is 543.89nm, from which it can be seen that the back-sealing film with a thickness of 1000 angstroms can provide tensile stress on the back of the silicon wafer to reduce the convex warpage of the silicon wafer, and the warpage elimination measurement value is 1240.23nm, that is, the absolute value of the average warpage is reduced by 1240.23nm.

[0041] Embodiment 4 Consistent with the setting of Example 1, a back-sealing film with a thickness of 1200 angstroms was deposited on 16 silicon wafers to be back-sealed with an average warpage of 1042.57 nm. Figure 7 As shown, the average warpage of the deposited silicon wafer is -145.91nm. It can be seen that the back-sealing film with a thickness of 1200 angstroms can provide tensile stress on the back of the silicon wafer to reduce the convex warpage of the silicon wafer. The warpage elimination measurement value is 1188.48nm, that is, the absolute value of the average warpage is reduced by 1188.48 nm.

[0042] Embodiment 5 Consistent with the setting of Example 1, a back-sealing film with a thickness of 1500 angstroms was deposited on 16 silicon wafers to be back-sealed with an average warpage of 1324.26 nm. Figure 8 As shown, the average warpage of the deposited silicon wafer is 671.44 nm. It can be seen that the back-sealing film with a thickness of 1500 angstroms can provide tensile stress on the back of the silicon wafer to reduce the convex warpage of the silicon wafer, and the warpage elimination measurement value is 652.82 nm, that is, the absolute value of the average warpage is reduced by 652.82 nm.

[0043] Embodiment 6 Consistent with the setting of Example 1, a back-sealing film with a thickness of 2000 angstroms was deposited on 16 silicon wafers to be back-sealed with an average warpage of -1201.23 nm. Fig. 9 As shown, the average warpage of the deposited silicon wafer is 711.27 nm. It can be seen that the back-sealing film with a thickness of 2000 angstroms can provide compressive stress on the back of the silicon wafer to reduce the concave warpage of the silicon wafer, and the warpage elimination measurement value is 1912.5 nm.

[0044] Embodiment 7 Consistent with the setting of Example 1, a back-sealing film with a thickness of 2200 angstroms was deposited on 16 silicon wafers to be back-sealed with an average warpage of -2383.91 nm. Fig.10 As shown, the average warpage of the deposited silicon wafer is -292.84 nm. It can be seen that the back-sealing film with a thickness of 2200 angstroms can provide compressive stress on the back of the silicon wafer to reduce the concave warpage of the silicon wafer, and the warpage elimination measurement value is 2091.07 nm.

[0045] Embodiment 8 Consistent with the setting of Example 1, a back-sealing film with a thickness of 2500 angstroms was deposited on 16 silicon wafers to be back-sealed with an average warpage of -2618.77 nm. Fig.11 As shown, the average warpage of the deposited silicon wafer is -882.15 nm. It can be seen that the back-sealing film with a thickness of 2500 angstroms can provide compressive stress on the back of the silicon wafer to reduce the concave warpage of the silicon wafer, and the warpage elimination measurement value is 1736.62 nm.

[0046] By analyzing the results of the above 8 embodiments, it can be seen that when the silicon wafer to be back-sealed is convexly warped, the degree of convex warping can be reduced by depositing a back-sealing film layer with a first thickness, i.e., 500 angstroms to 1500 angstroms. When the silicon wafer to be back-sealed is concavely warped, the degree of concave warping can be reduced by depositing a back-sealing film layer with a second thickness, i.e., 2000 angstroms to 2500 angstroms.

[0047] Specifically, when the thickness of the back-sealing film layer is 500 angstroms to 1500 angstroms, the deposition thickness is small, and the internal stress and defects are less accumulated, so that during the back-sealing deposition process, the molecules and atoms of the film are arranged more orderly, thereby forming a film layer with uniform structure and regular grain arrangement. Under such conditions of a film layer with uniform structure and regular grain arrangement, due to the thermal expansion coefficient of silicon dioxide (0.5×10 -6 / K) is smaller than the thermal expansion coefficient of single crystal silicon (2.5×10 -6 / K), which means that when the temperature changes, the expansion degree of the film is less than that of the silicon wafer, thereby forming a tensile stress on the back side of the silicon wafer (i.e., the back cover), and then reducing the convex warping degree of the silicon wafer from the front side of the silicon wafer. It is worth noting that, in combination with Examples 6 to 8, it can be seen that when the first thickness is in the range of 750 angstroms to 1200 angstroms, the warping elimination metric value is higher than other thickness values ​​in the range of 500 angstroms to 1500 angstroms, that is, when the first thickness is in the range of 750 angstroms to 1200 angstroms, its ability to reduce the convex warping degree is stronger.

[0048] When the thickness of the back seal film layer is 2000 angstroms to 2500 angstroms, its deposition thickness is large, and the internal stress and defects are accumulated more, so that during the back seal deposition process, the regularity of the molecular and atomic arrangement of the film is poor, and it is impossible to form a film layer with uniform structure and regular grain arrangement, and a longer relaxation time is required to reach equilibrium, thereby forming compressive stress on the back side of the silicon wafer (i.e., the back cover), and then from the front side of the silicon wafer, the degree of concave warpage of the silicon wafer is reduced. It is worth noting that, in combination with Examples 1 to 5, it can be seen that when the second thickness is in the range of 2000 angstroms to 2200 angstroms, the warpage elimination metric value is higher than other thickness values ​​in the range of 2000 angstroms to 2500 angstroms, that is, when the second thickness is in the range of 2000 angstroms to 2200 angstroms, its ability to reduce the degree of concave warpage is stronger.

[0049] By analyzing the comparison results of the above-mentioned embodiments 1 to 8, the corresponding relationship between the thickness of the back-sealing film layer and the stress generated by it can be obtained, so that the appropriate film deposition process can be selected for the different warping states and warping degrees of the silicon wafer to perform film deposition to reduce the warping degree of the silicon wafer. It can be understood that as the number of silicon wafers tested in the embodiments continues to increase, the accuracy of the corresponding relationship will be further improved.

[0050] In some examples, when the warping state of the silicon wafer is convex warping, determining the first thickness and the number of first thin film deposition processes according to the warping measurement value and the target thickness includes: Selecting a plurality of first candidate groups consisting of first thickness candidate values ​​and corresponding first thin film deposition process times according to the target thickness and the interval range of the first thickness; For each first candidate group of first thickness candidate values ​​and corresponding first thin film deposition process number candidate values, obtaining a warpage elimination metric value corresponding to each first candidate group; According to the warpage measurement value and the warpage elimination measurement value corresponding to each candidate group, a first candidate group with the smallest absolute value of difference is selected from all first candidate groups; The first thickness candidate value in the first candidate group with the smallest absolute value of the difference and the corresponding first thin film deposition process number candidate value are determined as the first thickness and the first thin film deposition process number.

[0051] For the above example, specifically, the thickness of the back seal film to be deposited on the silicon wafer is usually fixed, which can be referred to as the target thickness in the present disclosure. By selecting multiple first thicknesses within the range of the first thickness and sequentially performing the back seal deposition process, a back seal film of the target thickness can be deposited, and the number of times the back seal deposition process is performed is the number of first film deposition processes. For example, taking the target thickness of 2000 angstroms as an example, by performing 2 back seal deposition processes (i.e., the number of first film deposition processes is 2), the thickness of the back seal film layer deposited by each back seal deposition process is 1000 angstroms to achieve. Or by performing 4 back seal deposition processes (i.e., the number of first film deposition processes is 4), the thickness of the back seal film layer deposited by each back seal deposition process is 500 angstroms to achieve. Or by performing 3 back seal deposition processes (i.e., the number of first film deposition processes is 3), the thickness of the back seal film layer is respectively 500 angstroms, 1000 angstroms and 500 angstroms to achieve. In the above possible implementation means, 3 first candidate groups are formed, each of which includes a first thickness candidate value and a corresponding first film deposition process number candidate value. Of course, more first candidate groups can be formed based on the interval range of the first thickness, which will not be elaborated in the present disclosure.

[0052] For each first candidate group, the sum of the warpage elimination metric values ​​can be calculated according to the warpage elimination metric value corresponding to the first thickness candidate value and the first film deposition process number candidate value, and the sum is the warpage elimination metric value corresponding to each first candidate group. Combined with the above example, taking the first candidate group in which the first thickness candidate value is 1000 angstroms and the first film deposition process number candidate value is 2 times as an example, the warpage elimination metric value corresponding to the film thickness of 1000 angstroms is 1240.23nm, and the number of executions of the film deposition process is 2 times, then the sum of the warpage elimination metric values ​​is 1240.23nm+1240.23nm=2×1240.23nm, that is, the warpage elimination metric value corresponding to the first candidate group is 2480.46nm.

[0053] After obtaining the warpage elimination metric values ​​corresponding to all first candidate groups according to the above example, the difference between the metric value of the warpage of the silicon wafer and the warpage elimination metric value corresponding to each first candidate group is obtained, and the first thickness candidate value in the first candidate group with the smallest absolute value of the difference and the corresponding first film deposition process number candidate value are determined as the first thickness and the first film deposition process number. It can be understood that when the film deposition process is performed according to the first thickness candidate value in the first candidate group with the smallest absolute value of the difference and the corresponding first film deposition process number candidate value, the warpage of the silicon wafer after the back-seal deposition can be minimized, thereby reducing the warpage of the silicon wafer after the back-seal and improving the flatness of the silicon wafer after the back-seal.

[0054] In some examples, when the warping state of the silicon wafer is convex warping, determining the second thickness and the number of second thin film deposition processes according to the warping measurement value and the target thickness includes: Selecting a plurality of second candidate groups consisting of second thickness candidate values ​​and corresponding second thin film deposition process times according to the target thickness and the interval range of the second thickness; For each second thickness candidate value and the corresponding second thin film deposition process number candidate value in each second candidate group, obtaining a warpage elimination metric value corresponding to each second candidate group; According to the warpage measurement value and the warpage elimination measurement value corresponding to each second candidate group, selecting a second candidate group with the smallest absolute value of difference from all second candidate groups; The second thickness candidate value in the second candidate group with the smallest absolute value of the difference and the corresponding second thin film deposition process number candidate value are determined as the second thickness and the second thin film deposition process number.

[0055] For the above example, specifically, for the target thickness, a plurality of second thicknesses can be selected within the range of the second thickness to sequentially perform the back-sealing deposition process to deposit a back-sealing film of the target thickness, and the number of times the back-sealing deposition process is performed is the number of second film deposition processes. In addition, one or more second candidate groups can also be formed, and each second candidate group includes a second thickness candidate value and a corresponding second film deposition process number candidate value.

[0056] For each second candidate group, the sum of the warpage elimination metric values ​​can also be calculated according to the warpage elimination metric values ​​corresponding to the second thickness candidate values ​​according to the second film deposition process times candidate values, and the sum is the warpage elimination metric value corresponding to each second candidate group. After obtaining the warpage elimination metric values ​​corresponding to all second candidate groups, the difference between the warpage metric value of the silicon wafer and the warpage elimination metric value corresponding to each second candidate group is obtained, and the second thickness candidate value in the second candidate group with the smallest absolute value of the difference and the corresponding second film deposition process times candidate value are determined as the second thickness and the second film deposition process times. It can be understood that when the film deposition process is performed according to the second thickness candidate value in the second candidate group with the smallest absolute value of the difference and the corresponding second film deposition process times candidate value, the warpage of the silicon wafer after the back-seal deposition can be minimized, thereby reducing the warpage of the silicon wafer after the back-seal and improving the flatness of the silicon wafer after the back-seal.

[0057] For the above two examples, a group of 10 convex warped silicon wafers A and a group of 10 concave warped silicon wafers B with a target thickness of 2000 angstroms are used as examples for back-sealing deposition. For the 10 silicon wafers in group A, the average warpage measurement value is 2503. According to the first thickness of 1000 angstroms and the first thin film deposition process number of 2 times, the thin film deposition process is performed on these 10 silicon wafers respectively. The measurement values ​​of the silicon wafer warpage before and after the thin film deposition process are compared. Fig.12 As shown in the figure, the average warpage of the silicon wafer after back sealing dropped to -17.3.

[0058] For the 10 silicon wafers in group B, the average warpage measurement value is -2423.1. According to the second thickness of 2000 angstroms and the second thin film deposition process number of 1, the thin film deposition process is performed on these 10 silicon wafers respectively. The comparison of the warpage measurement values ​​of the silicon wafers before and after the thin film deposition process is as follows: Fig.13 As shown in the figure, the average warpage of the silicon wafer after back sealing dropped to -365.6.

[0059] pass Fig.12 as well as Fig.13 It can be seen that the technical solution provided by the present disclosure can effectively reduce the warping degree of the silicon wafer and improve the flatness.

[0060] Based on the same inventive concept as the above technical solution, see Fig.14 , which shows a device 140 for improving the warpage of a silicon wafer provided by the present disclosure, comprising: an acquisition unit 1401, a determination unit 1402 and an execution unit 1403; wherein, An acquisition unit 1401 is configured to acquire a warping state of a silicon wafer and a measurement value of a warping degree; The determining unit 1402 is configured to determine a first thickness and a first thin film deposition process number according to a measured value of the warpage and a target thickness when the warpage state of the silicon wafer is a convex warpage, wherein the convex warpage indicates that a central portion of the front side of the silicon wafer is higher than an edge portion, and a back sealing film layer of the first thickness generates a tensile stress on a back side of the silicon wafer; And, when the warping state of the silicon wafer is concave warping, the second thickness and the number of second thin film deposition processes are determined according to the measured value of the warping degree and the target thickness, the concave warping means that the central part of the front side of the silicon wafer is lower than the edge part, and the back sealing film layer of the second thickness generates compressive stress on the back and front sides of the silicon wafer; The execution unit 1403 is configured to, when the warping state of the silicon wafer is convex warping, execute a thin film deposition process according to a first thickness and a first thin film deposition process number to form a back sealing film that meets the target thickness; and, when the warping state of the silicon wafer is concave warping, execute a thin film deposition process according to a second thickness and a second thin film deposition process number to form a back sealing film that meets the target thickness.

[0061] In some examples, the first thickness ranges from 500 angstroms to 1500 angstroms; and the second thickness ranges from 2000 angstroms to 2500 angstroms.

[0062] In some examples, the determining unit 1402 is configured to: Selecting a plurality of first candidate groups consisting of first thickness candidate values ​​and corresponding first thin film deposition process times according to the target thickness and the interval range of the first thickness; For each first candidate group of first thickness candidate values ​​and corresponding first thin film deposition process number candidate values, obtaining a warpage elimination metric value corresponding to each first candidate group; According to the warpage measurement value and the warpage elimination measurement value corresponding to each candidate group, selecting a first candidate group with the smallest absolute value of difference from all first candidate groups; The first thickness candidate value in the first candidate group with the smallest absolute value of the difference and the corresponding first thin film deposition process number candidate value are determined as the first thickness and the first thin film deposition process number.

[0063] In some examples, the determining unit 1402 is configured to: Selecting a plurality of second candidate groups consisting of second thickness candidate values ​​and corresponding second thin film deposition process times according to the target thickness and the interval range of the second thickness; For each second thickness candidate value and the corresponding second thin film deposition process number candidate value in each second candidate group, obtaining a warpage elimination metric value corresponding to each second candidate group; According to the warpage measurement value and the warpage elimination measurement value corresponding to each second candidate group, selecting a second candidate group with the smallest absolute value of difference from all second candidate groups; The second thickness candidate value in the second candidate group with the smallest absolute value of the difference and the corresponding second thin film deposition process number candidate value are determined as the second thickness and the second thin film deposition process number.

[0064] In some examples, the acquisition unit 1401 is configured to: The front side of the silicon wafer is uniformly sampled according to polar coordinates with the center of the front side of the silicon wafer as the pole, to obtain a plurality of sampling points; Measure the height data of each sampling point; Determining, according to the height data of all sampling points, whether the warping state of the silicon wafer is the convex warping or the concave warping; When the warping state of the silicon wafer is the convex warping or the concave warping, the absolute value of the difference between the maximum height and the minimum height of the front side of the silicon wafer is determined as the measurement value of the warping degree.

[0065] In some examples, the thin film deposition process is an atmospheric pressure chemical vapor deposition (APCVD) process.

[0066] In some examples, during the APCVD process, the temperature at which the thin film deposition process is performed is 450 degrees.

[0067] In some examples, the back sealing film is made of silicon dioxide.

[0068] Please refer to Fig.15 , which shows a structural block diagram of a computing device provided by an exemplary embodiment of the present disclosure. In some examples, the computing device 150 may be at least one of a smart phone, a smart watch, a desktop computer, a laptop, a virtual reality terminal, an augmented reality terminal, a wireless terminal, and a laptop portable computer. The computing device 150 has a communication function and can access a wired network or a wireless network. The computing device 150 may generally refer to one of a plurality of terminals, and those skilled in the art may know that the number of the above terminals may be more or less. In some examples, the computing device 150 may receive data based on the wired network or wireless network to which it is connected. It can be understood that the computing device 150 undertakes the calculation and processing work of the technical solution of the present disclosure, and the present disclosure does not limit this.

[0069] like Fig.15 As shown, the computing device in the present disclosure may include one or more of the following components: a processor 1510 and a memory 1520 .

[0070] Optionally, the processor 1510 uses various interfaces and lines to connect various parts of the entire computing device, and executes various functions of the computing device and processes data by running or executing instructions, programs, code sets or instruction sets stored in the memory 1520, and calling data stored in the memory 1520. Optionally, the processor 1510 can be implemented in at least one hardware form of digital signal processing (DSP), field-programmable gate array (FPGA), and programmable logic array (PLA). The processor 1510 can integrate one or a combination of a central processing unit (CPU), a graphics processing unit (GPU), a neural network processor (NPU), and a baseband chip. Among them, the CPU mainly processes the operating system, user interface, and application programs; the GPU is responsible for rendering and drawing the content that needs to be displayed on the touch display; the NPU is used to implement artificial intelligence (AI) functions; and the baseband chip is used to process wireless communications. It is understandable that the above-mentioned baseband chip may not be integrated into the processor 1510, but may be implemented by a separate chip.

[0071] The memory 1520 may include a random access memory (RAM) or a read-only memory (ROM). Optionally, the memory 1520 includes a non-transitory computer-readable storage medium. The memory 1520 may be used to store instructions, programs, codes, code sets, or instruction sets. The memory 1520 may include a program storage area and a data storage area, wherein the program storage area may store instructions for implementing an operating system, instructions for at least one function (such as a touch function, a sound playback function, an image playback function, etc.), instructions for implementing the above various method embodiments, etc.; the data storage area may store data created according to the use of the computing device, etc.

[0072] In addition, those skilled in the art can understand that the structure of the computing device shown in the above drawings does not constitute a limitation on the computing device, and the computing device may include more or fewer components than shown in the figure, or combine certain components, or arrange the components differently. For example, the computing device also includes a display screen, a camera assembly, a microphone, a speaker, a radio frequency circuit, an input unit, a sensor (such as an acceleration sensor, an angular velocity sensor, a light sensor, etc.), an audio circuit, a WiFi module, a power supply, a Bluetooth module and other components, which will not be described in detail here.

[0073] The present disclosure also provides a computer-readable storage medium storing at least one instruction, wherein the at least one instruction is used to be executed by a processor to implement the method for improving the warpage of a silicon wafer according to each of the above embodiments.

[0074] The present disclosure also provides a computer program product, which includes computer instructions stored in a computer-readable storage medium; a processor of a computing device reads the computer instructions from the computer-readable storage medium, and the processor executes the computer instructions, so that the computing device executes to implement the method of improving silicon wafer warpage in each of the above-mentioned embodiments.

[0075] In addition, the present disclosure also provides a silicon wafer, a back side of which is formed with a back-sealing film according to the method for improving the warpage of a silicon wafer as described in any of the aforementioned embodiments, and a measurement value of the warpage of the silicon wafer is in the range of [0, 500].

[0076] Those skilled in the art should be aware that in one or more of the above examples, the functions described in the present disclosure can be implemented using hardware, software, firmware, or any combination thereof. When implemented using software, these functions can be stored in a computer-readable medium or transmitted as one or more instructions or codes on a computer-readable medium. Computer-readable media include computer storage media and communication media, wherein communication media include any media that facilitates the transmission of computer programs from one place to another. Storage media can be any available media that can be accessed by a general or special-purpose computer.

[0077] It should be noted that the technical solutions described in the present disclosure can be combined arbitrarily without conflict.

[0078] The above are only specific embodiments of the present invention, but the protection scope of the present invention is not limited thereto. Any person skilled in the art who is familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed by the present invention, which should be included in the protection scope of the present invention. Therefore, the protection scope of the present invention should be based on the protection scope of the claims.

Claims

1. A method for improving the warpage of a silicon wafer, characterized in that: The method comprises: Obtaining the warpage state of the silicon wafer and the measurement value of the warpage; When the warping state of the silicon wafer is convex warping, a first thickness and a first thin film deposition process number are determined according to the warping measurement value and the target thickness, and a thin film deposition process is performed according to the first thickness and the first thin film deposition process number to form a back sealing film that meets the target thickness; the convex warping means that the central part of the front side of the silicon wafer is higher than the edge part, and the back sealing film layer of the first thickness generates tensile stress on the back surface of the silicon wafer; When the warping state of the silicon wafer is concave warping, the second thickness and the number of second thin film deposition processes are determined according to the measured value of the warping degree and the target thickness, and the thin film deposition process is performed according to the second thickness and the second thin film deposition process number to form a back sealing film that meets the target thickness. The concave warping indicates that the central part of the front side of the silicon wafer is lower than the edge part, and the back sealing film layer of the second thickness produces compressive stress on the back surface of the silicon wafer.

2. The method according to claim 1, characterized in that The first thickness ranges from 500 angstroms to 1500 angstroms; the second thickness ranges from 2000 angstroms to 2500 angstroms.

3. The method according to claim 2, characterized in that The step of determining the first thickness and the number of first thin film deposition processes according to the warpage measurement value and the target thickness includes: Selecting a plurality of first candidate groups consisting of first thickness candidate values ​​and corresponding first thin film deposition process times according to the target thickness and the interval range of the first thickness; For each first candidate group of first thickness candidate values ​​and corresponding first thin film deposition process number candidate values, obtaining a warpage elimination metric value corresponding to each first candidate group; According to the warpage measurement value and the warpage elimination measurement value corresponding to each candidate group, selecting a first candidate group with the smallest absolute value of difference from all first candidate groups; The first thickness candidate value in the first candidate group with the smallest absolute value of the difference and the corresponding first thin film deposition process number candidate value are determined as the first thickness and the first thin film deposition process number.

4. The method according to claim 2, characterized in that: The step of determining the second thickness and the number of second thin film deposition processes according to the warpage measurement value and the target thickness includes: Selecting a plurality of second candidate groups consisting of second thickness candidate values ​​and corresponding second thin film deposition process times according to the target thickness and the interval range of the second thickness; For each second thickness candidate value and the corresponding second thin film deposition process number candidate value in each second candidate group, obtaining a warpage elimination metric value corresponding to each second candidate group; According to the warpage measurement value and the warpage elimination measurement value corresponding to each second candidate group, selecting a second candidate group with the smallest absolute value of difference from all second candidate groups; The second thickness candidate value in the second candidate group with the smallest absolute value of the difference and the corresponding second thin film deposition process number candidate value are determined as the second thickness and the second thin film deposition process number.

5. The method according to claim 1, characterized in that The obtaining of the warping state of the silicon wafer and the measurement value of the warping degree includes: In polar coordinates with the center of the front side of the silicon wafer as the pole, the reflected light from the front side and the back side of the silicon wafer is obtained respectively by using double-sided interference method; Acquiring morphological information of the front side of the silicon wafer according to the phase difference between the reflected light from the front side and the back side of the silicon wafer; Determining, according to the morphology information, that the warping state of the silicon wafer is the convex warping or the concave warping; When the warping state of the silicon wafer is the convex warping or the concave warping, the absolute value of the difference between the maximum height and the minimum height of the front side of the silicon wafer is determined as the measurement value of the warping degree.

6. The method according to claim 1, characterized in that The thin film deposition process is an atmospheric pressure chemical vapor deposition (APCVD) process.

7. The method according to claim 6, characterized in that During the APCVD process, the temperature for the thin film deposition process is 450 degrees.

8. The method according to claim 1, characterized in that: The material of the back sealing film is silicon dioxide.

9. A device for improving the warpage of a silicon wafer, characterized in that: The device comprises: an acquisition unit, a determination unit and an execution unit; wherein, The acquisition unit is configured to acquire the warping state of the silicon wafer and the measurement value of the warping degree; The determining unit is configured to determine a first thickness and a first thin film deposition process number according to a measured value of the warpage and a target thickness when the warpage state of the silicon wafer is a convex warpage, wherein the convex warpage indicates that a central portion of the front surface of the silicon wafer is higher than an edge portion, and a back sealing film layer of the first thickness generates tensile stress on a back surface of the silicon wafer; And, when the warping state of the silicon wafer is concave warping, determining a second thickness and a second thin film deposition process number according to the measured value of the warping degree and the target thickness, the concave warping means that the central part of the front side of the silicon wafer is lower than the edge part, and the back sealing film layer of the second thickness generates compressive stress on the back and front sides of the silicon wafer; The execution unit is configured to, when the warping state of the silicon wafer is convex warping, execute a thin film deposition process according to the first thickness and the first thin film deposition process number to form a back sealing film that meets the target thickness; and, when the warping state of the silicon wafer is concave warping, execute a thin film deposition process according to the second thickness and the second thin film deposition process number to form a back sealing film that meets the target thickness.

10. A computing device, characterized in that The computing device comprises a processor and a memory; the processor is used to execute instructions stored in the memory to implement the method for improving the warpage of a silicon wafer as claimed in any one of claims 1 to 8.

11. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores at least one instruction, and the at least one instruction is used to be executed by a processor to implement the method for improving the warpage of a silicon wafer as claimed in any one of claims 1 to 8.

12. A silicon wafer, characterized in that: A back sealing film is formed on the back side of the silicon wafer according to the method for improving the warpage of a silicon wafer according to any one of claims 1 to 8, and the measurement value of the warpage of the silicon wafer is in the range of [0, 500].

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