Epitaxial wafer structure, wafer manufacturing method and manufacturing device

Abstract

The invention discloses an epitaxial wafer structure, a wafer manufacturing method and a wafer manufacturing device. The wafer manufacturing method comprises the steps that a substrate structure is formed, the substrate structure comprises a scribing area and an epitaxial area, and the scribing area divides the epitaxial area into a plurality of epitaxial sub-areas; the substrate structure further comprises a substrate, a thin film layer located in the scribing area and epitaxial layers located in the epitaxial sub-areas. And injecting a first type of ions into a set region in each epitaxial layer to form a first doped region. The invention provides an epitaxial wafer structure, a wafer manufacturing method and a wafer manufacturing device. The problem of warping of a wafer in the manufacturing process can be solved.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to an epitaxial wafer structure, a wafer manufacturing method and a manufacturing device. Background Art

[0002] Metal Oxide Semiconductor Field Effect Transistor (MOSFET) is an important semiconductor device. It is composed of a metal layer, an oxide layer, and a semiconductor material, and controls the on and off of current through the electric field effect. This device has the advantages of high input resistance, low noise, low power consumption, and easy integration, and is widely used in electronic devices.

[0003] However, in the process of manufacturing MOSFET tubes, the injection of set ions into the wafer causes the wafer warping to increase dramatically. Highly warped wafers are easily stuck in some machines, resulting in the inability to pass goods or even the wafer getting stuck and broken. Summary of the invention

[0004] The present invention provides an epitaxial wafer structure, a wafer manufacturing method and a manufacturing device, which can improve the warping problem of the wafer generated during the manufacturing process.

[0005] According to one aspect of the present invention, a wafer manufacturing method is provided, the wafer manufacturing method comprising:

[0006] Forming a substrate structure, wherein the substrate structure comprises a scribe region and an epitaxial region, the scribe region divides the epitaxial region into a plurality of epitaxial sub-regions; the substrate structure further comprises a substrate, a thin film layer located in the scribe region, and an epitaxial layer located in each of the epitaxial sub-regions;

[0007] First type ions are implanted into a set region in each of the epitaxial layers to form a first doped region.

[0008] Optionally, forming a substrate structure includes:

[0009] providing a substrate;

[0010] forming a thin film transition layer on the first surface of the substrate;

[0011] Processing the thin film transition layer to form a thin film layer;

[0012] A plurality of epitaxial layers are formed on the first surface of the substrate.

[0013] Optionally, after implanting the first type of ions into a set region in each of the epitaxial layers to form a first doped region, the method further comprises:

[0014] The thin film layer in the dicing area is removed.

[0015] Optionally, the thickness of the thin film layer ranges from 100 nm to 10 μm;

[0016] The thickness of each epitaxial layer is in the range of 1 μm to 30 μm.

[0017] Optionally, the material of the substrate and the material of the epitaxial layer both include silicon carbide;

[0018] The material of the film layer includes an oxide material or a silicon nitride material.

[0019] Optionally, the first type of ions include N-type ions or P-type ions.

[0020] Optionally, a side of the substrate away from the epitaxial layer is not doped with second type ions, wherein when the first type ions are N type ions, the second type ions are P type ions, and when the first type ions are P type ions, the second type ions are N type ions.

[0021] According to another aspect of the present invention, there is provided a wafer manufacturing device, the wafer manufacturing device comprising: a substrate manufacturing module and a doping module;

[0022] The substrate manufacturing module is used to form a substrate structure, wherein the substrate structure includes a scribing area and an epitaxial area, the scribing area divides the epitaxial area into a plurality of epitaxial sub-areas; the substrate structure also includes a substrate, a thin film layer located in the scribing area, and an epitaxial layer located in each of the epitaxial sub-areas;

[0023] The doping module is used to implant first type ions into a set area in each epitaxial layer to form a first doping region.

[0024] Optionally, the substrate manufacturing module includes a substrate providing unit, a thin film transition unit, a thin film forming unit and an epitaxial layer forming unit;

[0025] The substrate providing unit is used to provide a substrate;

[0026] The thin film transition unit is used to form a thin film transition layer on the first surface of the substrate;

[0027] The thin film forming unit is used to process the thin film transition layer to form a thin film layer;

[0028] The epitaxial layer forming unit is used to form a plurality of epitaxial layers on the first surface of the substrate.

[0029] According to another aspect of the present invention, an epitaxial wafer structure is provided. The epitaxial wafer structure is manufactured using the wafer manufacturing method provided by any embodiment of the present invention.

[0030] An embodiment of the present invention provides a wafer manufacturing method, which includes: first forming a substrate structure, the substrate structure includes a scribe area and an epitaxial area, and the scribe area divides the epitaxial area into a plurality of epitaxial sub-areas. The substrate structure also includes a substrate, a thin film layer located in the scribe area, and an epitaxial layer located in each epitaxial sub-area. Then, a first type of ion is injected into a set area in each epitaxial layer to form a first doped region. The thin film layer in this embodiment divides each epitaxial layer in the epitaxial area, so that each epitaxial layer is discontinuous, so that during the wafer manufacturing process, the first type of ions can be injected into each epitaxial layer to improve the warping problem generated during the wafer manufacturing process due to the discontinuity between the epitaxial layers.

[0031] It should be understood that the contents described in this section are not intended to identify the key or important features of the embodiments of the present invention, nor are they intended to limit the scope of the present invention. Other features of the present invention will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0033] Figure 1 is a schematic flow chart of a wafer manufacturing method provided according to an embodiment of the present invention;

[0034] Figure 2 is a structural schematic diagram of a substrate structure provided according to an embodiment of the present invention;

[0035] Figure 3 is a schematic diagram of a structure of a first type of ion implantation provided according to an embodiment of the present invention;

[0036] Figure 4 is a schematic diagram of a structure in which a thin film transition layer is formed on a first surface of a substrate according to an embodiment of the present invention;

[0037] Figure 5 is a schematic diagram of a structure including a thin film layer provided according to an embodiment of the present invention;

[0038] Figure 6 is a schematic diagram of a structure for removing a thin film layer in a dicing area provided according to an embodiment of the present invention;

[0039] Figure 7 It is a structural schematic diagram of a wafer manufacturing device provided according to an embodiment of the present invention. DETAILED DESCRIPTION

[0040] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0041] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0042] Figure 1 is a schematic diagram of a wafer manufacturing method according to an embodiment of the present invention, referring to Figure 1 The wafer manufacturing method provided in this embodiment includes the following steps:

[0043] S110, forming a substrate structure.

[0044] in, Figure 2 is a schematic diagram of a substrate structure provided according to an embodiment of the present invention, with reference to Figure 2 The substrate structure includes a slicing area 110 and an epitaxial area. The slicing area 110 divides the epitaxial area into a plurality of epitaxial sub-areas 121 . The substrate structure also includes a substrate 130 , a thin film layer 140 located in the slicing area 110 , and an epitaxial layer 150 located in each epitaxial sub-area 121 .

[0045] Specifically, the substrate 130 and the epitaxial layer 150 are both made of semiconductor materials. Exemplarily, the substrate 130 and the epitaxial layer 150 can be made of the same material or different materials.

[0046] The thin film layer 140 and the epitaxial layer 150 are both located on the same side of the substrate 130. The wafer manufactured by the wafer manufacturing method provided in this embodiment includes a plurality of MOSFET tubes. The dicing area 110 can be understood as a cutting area. After the wafer is manufactured, the manufactured wafer can be cut into a plurality of MOSFET tubes by cutting in the dicing area 110. Among them, the MOSFET tube is a P-type MOS tube or an N-type MOS tube.

[0047] The thin film layer 140 in the scribing region 110 divides the epitaxial region into a plurality of epitaxial sub-regions 121 that are spaced apart from each other, so that the epitaxial layers 150 in each epitaxial sub-region 121 are discontinuous.

[0048] S120 , implanting first type ions into a set region in each epitaxial layer to form a first doped region.

[0049] Specifically, Figure 3 is a schematic diagram of a structure of a first type of ion implantation according to an embodiment of the present invention, with reference to Figure 3 , each epitaxial layer 150 includes a first doped region. The epitaxial layers 150 in each epitaxial sub-region 121 are discontinuous, and when the first type of ions are injected into the epitaxial layer 150, the problem of severe wafer warpage caused by the first type of ion injection can be improved. The first type of ions are injected into the set area in the epitaxial layer 150, so that the first type of ions are not injected into the non-set area in the dicing area 110 and the epitaxial sub-region 121, thereby further improving the problem of severe wafer warpage caused by the first type of ion injection. The depth of the first doped region can be greater than the depth of other subsequent doped regions.

[0050] Before step S120 , a photoresist pattern layer may be formed on a side of the epitaxial layer 150 away from the substrate 130 , so that a predetermined area of ​​the photoresist pattern layer is exposed.

[0051] The size, depth and position of the set area in this embodiment can be set according to actual needs. The first type of ions can be P-type ions or N-type ions. The P-type ions can be at least one of B, Al, Ga or In, and the N-type ions can be at least one of P, As or Sb.

[0052] It should be noted that after step S120, the process also includes manufacturing other doping regions, trenches, gates, gate oxide layers, and active layers of the transistor.

[0053] The present embodiment provides a wafer manufacturing method, which includes: first forming a substrate structure, the substrate structure includes a scribe area and an epitaxial area, and the scribe area divides the epitaxial area into a plurality of epitaxial sub-areas. The substrate structure also includes a substrate, a thin film layer located in the scribe area, and an epitaxial layer located in each epitaxial sub-area. Then, the first type of ions are injected into the set area in each epitaxial layer to form a first doped region. The thin film layer in the present embodiment divides the epitaxial layers in the epitaxial area so that the epitaxial layers are discontinuous, so that during the wafer manufacturing process, the first type of ions are injected into each epitaxial layer, which will improve the warping problem caused during the wafer manufacturing process due to the discontinuity between the epitaxial layers.

[0054] Optionally, forming a substrate structure includes the following steps:

[0055] S111. Provide a substrate.

[0056] S112, forming a thin film transition layer on the first surface of the substrate.

[0057] Specifically, Figure 4 is a schematic diagram of a structure of forming a thin film transition layer on a first surface of a substrate according to an embodiment of the present invention, with reference to Figure 4 , the thin film transition layer 141 completely covers the first surface of the substrate 130. The thin film transition layer 141 may be formed by a deposition method.

[0058] S113, processing the thin film transition layer to form a thin film layer.

[0059] Specifically, Figure 5 is a schematic diagram of a structure including a thin film layer provided according to an embodiment of the present invention, with reference to Figure 5 Specifically, the thin film transition layer may be processed by using a photolithography process to remove the thin film transition layer in the epitaxial region and retain the thin film transition layer in the dicing region, thereby forming a thin film layer 140 .

[0060] S114, forming a plurality of epitaxial layers on the first surface of the substrate.

[0061] For details, please refer to Figure 2 , Figure 2 1 is a schematic diagram of a structure formed on the basis of step S113 . A plurality of epitaxial layers 150 may be formed by doping the substrate 130 with ions of a set type.

[0062] Optionally, after the first type of ions are implanted into a set area in each epitaxial layer to form a first doping area, the method further includes: removing the thin film layer in the slicing area.

[0063] Specifically, Figure 6 is a schematic diagram of a structure for removing a thin film layer in a dicing area according to an embodiment of the present invention, with reference to Figure 6 , Figure 6 The first doped region is not shown. The thin film layer can be removed by wet etching.

[0064] The thin film layer in the slicing area can be removed after forming the first doped area and before forming other structures of the MOSFET tube, that is, the step of removing the thin film layer in the slicing area is adjacent to the step of forming the first doped area. This arrangement can avoid irreversible effects on other doped areas when removing the thin film layer after the subsequent formation of other doped areas.

[0065] Optionally, the thickness of the thin film layer ranges from 100 nm to 10 μm. This configuration can avoid the thin film layer being too thick and thus increasing the manufacturing time of the thin film layer.

[0066] Optionally, the thickness of each epitaxial layer ranges from 1 μm to 30 μm. This configuration can not only improve the on-state voltage drop and breakdown voltage of the MOSFET tube, but also improve the overall performance and reliability of the MOSFET tube.

[0067] Optionally, the material of the substrate and the material of the epitaxial layer both include silicon carbide; and the material of the thin film layer includes an oxide material or a silicon nitride material.

[0068] Specifically, silicon carbide material has the characteristics of large bandgap, strong critical breakdown electric field, high thermal conductivity, high temperature resistance and excellent heat dissipation performance. The MOSFET tube in the wafer made of silicon carbide material works in a high temperature environment and does not require additional heat dissipation devices, which greatly reduces the volume and cost of the system including the depletion-mode transistor provided in this embodiment.

[0069] Oxide materials and silicon nitride materials are low in cost and easy to obtain. Using oxide materials or silicon nitride materials to make thin film layers can reduce the production cost of wafers.

[0070] Optionally, the first type of ions include N-type ions or P-type ions. It can be seen that the wafer manufactured by the wafer manufacturing method provided by this embodiment may include multiple P-type MOS tubes or multiple N-type MOS tubes.

[0071] Optionally, a side of the substrate away from the epitaxial layer is not doped with the second type ions, wherein when the first type ions are N type ions, the second type ions are P type ions, and when the first type ions are P type ions, the second type ions are N type ions.

[0072] Specifically, this embodiment improves the warpage problem generated during wafer manufacturing by setting a thin film layer in the dicing area. It is no longer necessary to improve the problem of wafer warpage by injecting a second type of ions opposite to the first type of ions on the side of the substrate away from the epitaxial layer. In the prior art, the steps of injecting the second type of ions on the side of the substrate away from the epitaxial layer are complicated and the process cost is high. It can be seen that the wafer manufacturing method provided by this embodiment has simple process steps and can also reduce the manufacturing cost.

[0073] Figure 7 is a schematic diagram of a wafer manufacturing device according to an embodiment of the present invention, with reference to Figure 7 The wafer manufacturing device provided in this embodiment includes: a substrate manufacturing module 210 and a doping module 220; the substrate manufacturing module 210 is used to form a substrate structure, wherein the substrate structure includes a slicing area and an epitaxial area, and the slicing area divides the epitaxial area into a plurality of epitaxial sub-areas; the substrate structure also includes a substrate, a thin film layer located in the slicing area, and an epitaxial layer located in each epitaxial sub-area; the doping module 220 is used to inject a first type of ions into a set area in each epitaxial layer to form a first doping region.

[0074] The present embodiment provides a wafer manufacturing device, which includes a substrate manufacturing module and a doping module: the thin film layer in the substrate structure manufactured by the substrate manufacturing module divides the epitaxial layers in the epitaxial area, so that the epitaxial layers are discontinuous, so that during the wafer manufacturing process, the doping module can inject the first type of ions into each epitaxial layer to improve the warping problem generated during the wafer manufacturing process due to the discontinuity between the epitaxial layers.

[0075] Optionally, the substrate manufacturing module includes a substrate providing unit, a thin film transition unit, a thin film forming unit and an epitaxial layer forming unit;

[0076] The substrate providing unit is used for providing a substrate;

[0077] The thin film transition unit is used to form a thin film transition layer on the first surface of the substrate;

[0078] The thin film forming unit is used to process the thin film transition layer to form a thin film layer;

[0079] The epitaxial layer forming unit is used to form a plurality of epitaxial layers on the first surface of the substrate.

[0080] The wafer manufacturing device provided in this embodiment has corresponding beneficial effects with the wafer manufacturing method provided in any embodiment of the present invention. For technical details not elaborated in this embodiment, please refer to the wafer manufacturing method provided in any embodiment of the present invention.

[0081] This embodiment also provides an epitaxial wafer structure, which is manufactured using the wafer manufacturing method provided in any embodiment of the present invention.

[0082] It should be understood that the various forms of processes shown above can be used to reorder, add or delete steps. For example, the steps described in the present invention can be executed in parallel, sequentially or in different orders, as long as the desired results of the technical solution of the present invention can be achieved, and this document does not limit this.

[0083] The above specific implementations do not constitute a limitation on the protection scope of the present invention. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modification, equivalent substitution and improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A wafer manufacturing method, characterized in that: include: Forming a substrate structure, wherein the substrate structure comprises a scribe region and an epitaxial region, the scribe region divides the epitaxial region into a plurality of epitaxial sub-regions; the substrate structure further comprises a substrate, a thin film layer located in the scribe region, and an epitaxial layer located in each of the epitaxial sub-regions; First type ions are implanted into a set region in each of the epitaxial layers to form a first doped region.

2. The wafer manufacturing method according to claim 1, characterized in that: The forming of a substrate structure comprises: providing a substrate; forming a thin film transition layer on the first surface of the substrate; Processing the thin film transition layer to form a thin film layer; A plurality of epitaxial layers are formed on the first surface of the substrate.

3. The wafer manufacturing method according to claim 1, characterized in that: After implanting the first type of ions into the set area in each of the epitaxial layers to form the first doping area, the method comprises: The thin film layer in the dicing area is removed.

4. The wafer manufacturing method according to claim 1, characterized in that: The thickness of the thin film layer ranges from 100 nm to 10 μm; The thickness of each epitaxial layer is in the range of 1 μm to 30 μm.

5. The wafer manufacturing method according to claim 1, characterized in that: The material of the substrate and the material of the epitaxial layer both include silicon carbide; The material of the film layer includes an oxide material or a silicon nitride material.

6. The wafer manufacturing method according to claim 1, characterized in that: The first type of ions include N-type ions or P-type ions.

7. The wafer manufacturing method according to claim 1, characterized in that: The side of the substrate away from the epitaxial layer is not doped with the second type ions, wherein when the first type ions are N type ions, the second type ions are P type ions, and when the first type ions are P type ions, the second type ions are N type ions.

8. A wafer manufacturing device, characterized in that: include: Substrate production module and doping module; The substrate manufacturing module is used to form a substrate structure, wherein the substrate structure includes a scribing area and an epitaxial area, the scribing area divides the epitaxial area into a plurality of epitaxial sub-areas; the substrate structure also includes a substrate, a thin film layer located in the scribing area, and an epitaxial layer located in each of the epitaxial sub-areas; The doping module is used to implant first type ions into a set area in each epitaxial layer to form a first doping region.

9. The wafer manufacturing device according to claim 8, characterized in that: The substrate manufacturing module includes a substrate providing unit, a thin film transition unit, a thin film forming unit and an epitaxial layer forming unit; The substrate providing unit is used to provide a substrate; The thin film transition unit is used to form a thin film transition layer on the first surface of the substrate; The thin film forming unit is used to process the thin film transition layer to form a thin film layer; The epitaxial layer forming unit is used to form a plurality of epitaxial layers on the first surface of the substrate.

10. An epitaxial wafer structure, characterized in that: The wafer is manufactured by the wafer manufacturing method according to any one of claims 1 to 7.

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