Groove type semiconductor power device

By forming back-to-back diode strings in the trench type semiconductor power device, the damage problem of electrostatic discharge events to the device is solved, and the effect of improving device reliability is achieved.

CN120051006APending Publication Date: 2025-05-27DIODES INC
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Patent Information

Application Number
CN202311575226.X
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2023-11-23
Publication Date
2025-05-27

AI Technical Summary

Technical Problem

Semiconductor power devices are susceptible to voltage spikes caused by electrostatic discharge events, resulting in breakdown of the gate oxide layer, causing damage or high leakage.

Method used

A trench-type semiconductor power device is designed to form a diode string formed by one or more back-to-back diodes in the trench, and the diode string is used to guide a momentary high current to avoid damage to the gate.

Benefits of technology

It effectively avoids damage to the power transistors in the trench by electrostatic discharge events, improves the reliability of the device, and reduces manufacturing costs.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention relates to a trench type semiconductor power device. The trench-type semiconductor power device includes: a substrate; the epitaxial layer is located on the substrate; the body doping region is located in the epitaxial layer; the source electrode doping region is located in the body doping region; the trench structure has a first depth in a first direction extending from the source doped region to the substrate, and includes a first semiconductor layer extending along a second direction. The first semiconductor layer comprises a first part which is adjacent to the body doping region and the source electrode doping region and is used as a gate electrode with the first conductivity type; and the second part extends along the second direction and is far away from the source doped region, and comprises a plurality of first doped regions with the first conductivity type and a plurality of second doped regions with the second conductivity type. The plurality of first doped regions and the plurality of second doped regions are arranged in a staggered manner to form a diode string with back-to-back diodes. The first end of the diode string is electrically connected to the gate electrode, and the second end of the diode string is electrically connected to the source doped region through the first connection structure.
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Description

Technical Field

[0001] The present invention relates to trench-type semiconductor power devices, and more particularly, to trench-type semiconductor power devices having an electrostatic discharge protection structure. Background Art

[0002] Semiconductor power devices are widely used in fields such as automotive electronics and switched-mode power supplies. Trench power devices grow a gate oxide layer on the sidewalls of the gate trenches and fill them with polysilicon to form gates, and they are one of the most popular power switching devices at present. Trench power devices can improve the utilization efficiency of the device area, enabling a larger device unit channel width to be obtained per unit area, thereby obtaining a greater current conduction capacity.

[0003] Semiconductor power devices are vulnerable to voltage spikes caused by electrostatic discharge (ESD) events (including human body mode or machine mode). The instantaneous large current and voltage caused by ESD events can cause the gate oxide layer of the trench power device to be broken down and damaged, or even burned out or cause high leakage. Therefore, trench-type semiconductor power devices with an electrostatic discharge protection structure are needed. Summary of the Invention

[0004] Embodiments of the present disclosure relate to a trench-type semiconductor power device. The trench-type semiconductor power device includes: a substrate having a first conductivity type; an epitaxial layer located on the substrate and having the first conductivity type; a body doping region located in the epitaxial layer and away from the substrate and having a second conductivity type; a source doping region located in the body doping region and away from the substrate and having the first conductivity type; a trench structure having a first depth in a first direction extending from the source doping region towards the substrate and including a first semiconductor layer extending in a second direction, the first direction being perpendicular to the second direction. The first semiconductor layer includes: a first portion adjacent to the body doping region and the source doping region for serving as a gate electrode having the first conductivity type; and a second portion extending in the second direction and away from the source doping region, including a plurality of first doping regions having the first conductivity type and a plurality of second doping regions having the second conductivity type, wherein the plurality of first doping regions and the plurality of second doping regions are arranged alternately to form a first diode string having one or more back-to-back diodes. A first end of the first diode string is electrically connected to the gate electrode, and a second end of the first diode string is electrically connected to the source doping region via a first connection structure. Brief Description of the Drawings

[0005] Aspects of several embodiments of the present disclosure can be best understood when reading the following detailed description in conjunction with the accompanying drawings. It should be noted that the various structures may not be drawn to scale. In fact, for the sake of clarity of discussion, the dimensions of the various structures may be arbitrarily enlarged or reduced.

[0006] Figure 1 is a circuit diagram of a trench-type semiconductor power device according to some embodiments of the present disclosure.

[0007] Figure 2 is a top view of a trench-type semiconductor power device according to some embodiments of the present disclosure.

[0008] Figure 3A and 3B are respectively Figure 2 cross-sectional views of the trench-type semiconductor power device along line A-A' and line B-B'.

[0009] Figure 4 is a top view of a trench-type semiconductor power device according to some embodiments of the present disclosure.

[0010] Figure 5A and 5B are respectively Figure 4 cross-sectional views of the trench-type semiconductor power device along line A-A' and line B-B'.

[0011] Figure 6 is a top view of a trench-type semiconductor power device according to some embodiments of the present disclosure.

[0012] Figure 7A and 7B are respectively Figure 6 cross-sectional views of the trench-type semiconductor power device along line A-A' and line B-B'.

[0013] Figure 8 is a top view of a trench-type semiconductor power device according to some embodiments of the present disclosure.

[0014] Figure 9A and 9B are respectively Figure 8 cross-sectional views of the trench-type semiconductor power device along line A-A' and line B-B'.

[0015] Figure 10 is a top view of a trench-type semiconductor power device according to some embodiments of the present disclosure.

[0016] Figure 11A and 11B are respectively Figure 10 cross-sectional views of the trench-type semiconductor power device along line A-A' and line B-B'.

[0017] Figure 12 is a top view of a trench-type semiconductor power device according to some embodiments of the present disclosure.

[0018] Figure 13Aand 13B are respectively Figure 12 Cross-sectional views of the trench-type semiconductor power device along line A-A' and line B-B'.

[0019] Figure 14 is a top view of a trench-type semiconductor power device according to some embodiments of the present disclosure.

[0020] Figure 15A and 15B are respectively Figure 14 Cross-sectional views of the trench-type semiconductor power device along line A-A' and line B-B'.

[0021] Figure 16 is a top view of a trench-type semiconductor power device according to some embodiments of the present disclosure.

[0022] Figure 17A , 17B and 17C are respectively Figure 16 Cross-sectional views of the trench-type semiconductor power device along line A-A', line B-B' and line C-C'.

[0023] Figure 18 is a top view of a trench-type semiconductor power device according to some embodiments of the present disclosure.

[0024] Figure 19A , 19B and 19C are respectively Figure 18 Cross-sectional views of the trench-type semiconductor power device along line A-A', line B-B' and line C-C'.

[0025] Figure 20 is a top view of a trench-type semiconductor power device according to some embodiments of the present disclosure.

[0026] Figure 21A , 21B and 21C are respectively Figure 20 Cross-sectional views of the trench-type semiconductor power device along line A-A', line B-B' and line C-C'.

[0027] Figure 22 is a top view of a trench-type semiconductor power device according to some embodiments of the present disclosure.

[0028] Figure 23A and 23B are respectively Figure 22 Cross-sectional views of the trench-type semiconductor power device along line A-A' and line B-B'.

[0029] Figure 24 is a top view of a trench-type semiconductor power device according to some embodiments of the present disclosure.

[0030] Figure 25A and 25B are respectively Figure 24 the cross-sectional views of the trench-type semiconductor power device along line A-A' and line B-B'.

[0031] Figure 26 is a top view of a trench-type semiconductor power device according to some embodiments of the present disclosure.

[0032] Figure 27A and 27B are respectively Figure 26 the cross-sectional views of the trench-type semiconductor power device along line A-A' and line B-B'.

[0033] Figure 28 is a top view of a trench-type semiconductor power device according to some embodiments of the present disclosure.

[0034] Figure 29A and 29B are respectively Figure 28 the cross-sectional views of the trench-type semiconductor power device along line A-A' and line B-B'.

[0035] The same or similar components are denoted by the same reference numerals in the drawings and the detailed description. From the following detailed description and in conjunction with the accompanying drawings, several embodiments of the present disclosure will be immediately understood. Detailed Description

[0036] The following disclosure provides many different embodiments or examples for implementing different features of the provided subject matter. Specific examples of components and configurations are described below. Of course, these are only examples and are not intended to be restrictive. In the present disclosure, a reference to forming a first feature above or on a second feature may include embodiments in which the first feature and the second feature are formed in direct contact, and may also include embodiments in which additional features may be formed between the first feature and the second feature such that the first feature and the second feature may not be in direct contact. Additionally, the present disclosure may repeat reference numerals and / or letters in various instances. This repetition is for simplicity and clarity and does not in itself indicate a relationship between the various embodiments and / or configurations discussed.

[0037] Embodiments of the present disclosure are discussed in detail below. However, it should be understood that the present disclosure provides many applicable concepts that can be embodied in a variety of specific environments. The specific embodiments discussed are illustrative only and do not limit the scope of the present disclosure.

[0038] The present disclosure provides a trench-type semiconductor power device. Compared with a general trench-type semiconductor power device, the trench-type semiconductor power device of the present disclosure is formed in a cell region and has a diode in the cell region that can provide electrostatic discharge (ESD) protection. The trench-type semiconductor power device has a diode string formed by one or more back-to-back diodes formed in a trench. When an ESD event occurs, a large instantaneous current will be led out of the trench-type semiconductor power device through the diode string in the trench, so that damage to the gate of the power transistor in the trench can be avoided. Compared with a power device that requires an additional ESD protection circuit, the trench-type semiconductor power device of the present disclosure can ensure that the power device is protected by the diode string in the trench, thereby increasing the reliability of the power device. In addition, the diode string formed in the trench does not affect the configuration of the gate pad, so it is flexible in circuit design and layout and can reduce the manufacturing cost.

[0039] Figure 1 FIG. 4 is a circuit diagram of a trench-type semiconductor power device 100 according to some embodiments of the present disclosure. The trench-type semiconductor power device 100 has a gate terminal G, a drain terminal D, and a source terminal S, and includes a vertical power transistor 10, a gate resistor 30, and a diode string 20. The vertical power transistor 10 can be a semiconductor power device of different types or manufactured by different technologies, and has a vertical current conduction path. The source and drain of the vertical power transistor 10 are respectively connected to the source terminal S and the drain terminal D. In Figure 1 the embodiment shown, the vertical power transistor 10 is an N-type transistor. In other embodiments, the vertical power transistor 10 can be a P-type transistor.

[0040] The gate of the vertical power transistor 10 is coupled to the gate terminal G via the gate resistor 30. The diode string 20 is coupled between the gate terminal G and the source terminal S. The diode string 20 is formed by connecting one or more back-to-back diodes 22 in series, and the number of back-to-back diodes 22 is determined by the breakdown voltage of the trench-type semiconductor power device 100 (for example, the breakdown voltage of the gate oxide layer of the vertical power transistor 10). In Figure 1 the embodiment shown, the diode string 20 includes two back-to-back diodes 22 connected in series for illustration. In other embodiments, the diode string 20 can be formed by more or fewer back-to-back diodes 22.

[0041] When an electrostatic discharge (ESD) event occurs, the gate resistor 30 can prevent the instantaneous large current from the gate terminal G from directly attacking the gate (such as the gate oxide) of the vertical power transistor 10. In addition, the instantaneous large current caused by the ESD event will flow through the diode string 20 to the source terminal S so as to be transmitted away from the vertical power transistor 10 (such as being transmitted to the ground terminal). In other words, when an ESD event occurs, the gate resistor 30 and the diode string 20 can provide ESD protection for the vertical power transistor 10.

[0042] Figure 2 is a top view (or layout view) of a trench-type semiconductor power device 100_1 according to some embodiments of the present disclosure. Figure 3A is Figure 2 a cross-sectional view of the trench-type semiconductor power device 100_1 along line A-A', and Figure 3B is Figure 2 a cross-sectional view of the trench-type semiconductor power device 100_1 along line B-B'. Line A-A' extends in the X direction, and line B-B' extends in the Y direction.

[0043] In some embodiments, the trench-type semiconductor power device 100_1 includes a semiconductor material layer 103, a trench structure 110, conductive plugs 152, 161, and 162, and metal lines (or electrodes) 210a, 210b, and 220a. The metal lines 210a, 210b, and 220a are formed in the metal layer (such as the M1 layer) closest to the semiconductor material layer 103 in an interconnect structure. In some embodiments, the metal lines 210a, 210b, and 220a extend in the X direction and are parallel to each other. In some embodiments, the width of the metal line 210a is greater than that of the metal lines 210b and 220a, and the metal lines 210b and 220a have the same width, where the width is measured in the Y direction. The materials of the metal lines 210a, 210b, and 220a may include copper (Cu), gold (Au), silver (Ag), aluminum (Al), nickel (Ni), titanium (Ti), tungsten (W), tin (Sn), or other metals or alloys.

[0044] The semiconductor material layer 103 may include, for example, single-crystalline silicon material, epitaxial silicon material, silicon carbide (SiC), germanium (Ge), silicon-germanium (SiGe), gallium nitride (GaN), gallium arsenide (GaAs), gallium arsenide phosphide (GaAsP), or other semiconductor materials, which may be N-type or P-type. In some embodiments, the semiconductor material layer 103 is an epitaxial material of N-type (the first conductivity type). For ease of explanation, the semiconductor material layer 103 is taken as an example of N-type, having a lightly doped region 104 of N-type to illustrate the N-type vertical power transistor 10, but the present disclosure is not limited thereto. The semiconductor material layer 103 of N-type (the first conductivity type) or P-type (the second conductivity type) may be adjusted according to the conductivity type of the vertical power transistor 10.

[0045] The substrate 102 is formed on the lower surface of the semiconductor material layer 103 and has the same conductivity type doping as the lightly doped region 104, such as N-type. The substrate 102 is the drain contact region of the vertical power transistor 10, coupled to the source terminal S and used to contact the drain metal layer (not shown in the drawings). In some embodiments, the substrate 102 may be disposed adjacent to the upper surface of a silicon wafer or other semiconductor material substrate. In some embodiments, the substrate 102 is part of a silicon wafer. The material of the substrate 102 may include single-crystalline silicon material, epitaxial silicon material, silicon carbide (SiC), germanium (Ge), silicon-germanium (SiGe), gallium nitride (GaN), gallium arsenide (GaAs), gallium arsenide phosphide (GaAsP), or other semiconductor materials. In some embodiments, the doping concentration of the substrate 102 is greater than that of the lightly doped region 104.

[0046] The trench structures 110 extend in the Y direction and are parallel to each other, and have a depth D1 in the semiconductor material layer 103. The trench structures 110 may have vertical sidewalls and an arc-shaped bottom surface. In some embodiments, the trench structures 110 may be circular, elliptical, rectangular, or polygonal. The trench structures 110 may be formed by defining the position and pattern through a photoresist and then through an etching process (such as a plasma dry etching process). In the embodiment of the trench-type semiconductor power device 100_1, 3 trench structures 110 are shown, and the number of trench structures 110 is only an example and is not used to limit the present disclosure.

[0047] Each trench structure 110 includes a semiconductor layer 120 extending in the Y direction and an insulating layer 115, and the semiconductor layer 120 has a width W1 in the X direction. The semiconductor layer 120 is surrounded by the insulating layer 115. The semiconductor layer 120 is formed of polysilicon and can be divided into three parts 120_1, 120_2, and 120_3 (hereinafter referred to as the first part semiconductor layer 120_1, the second part semiconductor layer 120_2, and the third part semiconductor layer 120_3, respectively). In some embodiments, the trench-type semiconductor power device 100_1 further includes an interlayer dielectric layer 116 covering the semiconductor material layer 103.

[0048] The doped region 106 is formed in the lightly doped region 104 of the semiconductor material layer 103 through an ion implantation process. The doped region 106 located between the first partial semiconductor layers 120_1 serves as the body doped region of the vertical power transistor 10 (collectively referred to as the body doped region 106 hereinafter). The body doped region 106 and the substrate 102 are respectively located on opposite sides of the lightly doped region 104 in the Z direction. The body doped region 106 has a conductivity type different from that of the lightly doped region 104, such as P-type. Electrically speaking, the coverage of the body doped region 106 will not have the characteristics of the N-type conductivity type. In other words, the body doped region 106 is located above and adjacent to the lightly doped region 104. In the Z direction, the depth (or thickness) of the body doped region 106 is less than the depth D1 of the trench structure 110. In some embodiments, the semiconductor layer 120 includes silicon carbide (SiC), gallium nitride (GaN), gallium oxide (Ga2O3), or diamond-based materials.

[0049] The doped region 108 located between the first partial semiconductor layers 120_1 serves as the source electrode of the vertical power transistor 10 (collectively referred to as the source doped region 108 hereinafter). The source doped region 108 is located in (or above) the body doped region 106 and is away from the substrate 102. The depth of the source doped region 108 is less than the depth of the body doped region 106 and has a conductivity type different from that of the body doped region 106, such as N-type. In some embodiments, the doping concentration of the source doped region 108 is greater than the doping concentration of the lightly doped region 104.

[0050] In the trench structure 110, the second partial semiconductor layer 120_2 is located between the first partial semiconductor layer 120_1 and the third partial semiconductor layer 120_3. The first partial semiconductor layer 120_1 and the second partial semiconductor layer 120_2 have the same conductivity type doping as the lightly doped region 104, such as N-type. In some embodiments, the doping concentrations of the first partial semiconductor layer 120_1 and the second partial semiconductor layer 120_2 are greater than the doping concentration of the lightly doped region 104. In addition, the first partial semiconductor layer 120_1 is the part of the semiconductor layer 120 adjacent to the source doping region 108 to serve as the gate electrode of the vertical power transistor 10. The second partial semiconductor layer 120_2 extends along the Y direction and away from the source doping region 108 and has a length L1 (for example, the distance from the source doping region 108 to the conductive plug 162 in the Y direction) to serve as the gate resistance Rg. The impedance of the gate resistance Rg is determined by the ratio of the length L1 and the width W1 of the second partial semiconductor layer 120_2. The third partial semiconductor layer 120_3 is the part of the semiconductor layer 120 located between the conductive plugs 161 and 162 to serve as the electrostatic discharge protection structure ESD_P1 for forming the diode string 20. The semiconductor layer 120 is separated from the semiconductor material layer 103 via the insulating layer 115. In addition, the electrostatic discharge protection structure ESD_P1 (i.e., the third partial semiconductor layer 120_3) is further separated from the doping region 106 via the insulating layer 115. It should be noted that the upper surface of the semiconductor layer 120 is lower than the upper surface of the source doping region 108 and the insulating layer 115 to ensure that the semiconductor layer 120 does not remain on the upper surface of the source doping region 108 after etching. If it remains, it will affect the characteristics of the source doping region 108 or cause a short circuit between the source doping region 108 and the semiconductor layer 120.

[0051] The electrostatic discharge protection structure ESD_P1 includes a plurality of doped regions 120n and a plurality of doped regions 120p. The doped regions 120n and the doped regions 120p have different conductivity types. For example, the doped regions 120n have the same conductivity type doping as the lightly doped region 104, such as N-type, and the doped regions 120p have the same conductivity type doping as the body doped region 106, such as P-type. In some embodiments, the doping concentration of the doped regions 120n is greater than the doping concentration of the lightly doped region 104. A PN junction (P-N junction) is formed at the interface between the doped regions 120n and the doped regions 120p. In addition, a back-to-back diode 22 is formed between each doped region 120p and two adjacent doped regions 120n. For example, the first PN junction and the second PN junction of the back-to-back diode 22 are respectively formed at the interfaces between each doped region 120p and two adjacent doped regions 120n. In an embodiment of the electrostatic discharge protection structure ESD_P1, the doped regions 120n and the doped regions 120p are arranged alternately to form a diode string (hereinafter collectively referred to as the diode string 20_1) having two back-to-back diodes 22 connected in series.

[0052] It should be noted that in the diode string 20_1 of the electrostatic discharge protection structure ESD_P1, the number of back-to-back diodes 22 is determined by the breakdown voltage (e.g., the breakdown voltage) of the gate oxide layer of the vertical power transistor 10. For example, when the breakdown voltage of the gate oxide layer is larger, the number of back-to-back diodes 22 in the diode string 20_1 is larger, that is, the number of doped regions 120n and the number of doped regions 120p are larger. In addition, by forming the diode string 20_1 in the trench structure 110, an additional electrostatic discharge protection circuit or structure is not required, so the manufacturing cost can be reduced.

[0053] The first part semiconductor layer 120_1 overlaps with the metal wire 210a and is completely covered by the metal wire 210a. The second part semiconductor layer 120_2 partially overlaps with the metal wire 210a. The second part semiconductor layer 120_2 and the third part semiconductor layer 120_3 partially overlap with the metal wire 220a, and the metal wire 220a is connected to the doped regions 120n of the second part semiconductor layer 120_2 and the third part semiconductor layer 120_3 via the conductive plug 162. The third part semiconductor layer 120_3 partially overlaps with the metal wire 210b, and the metal wire 210b is connected to the doped regions 120n of the third part semiconductor layer 120_3 via the conductive plug 161.

[0054] The heavily doped region 112 is located in the bulk doped region 106. The conductive plug 152 extends in the Z direction through the interlayer dielectric layer 116 to connect the metal line 210a and the source doped region 108 and the heavily doped region 112 in the semiconductor material layer 103. The heavily doped region 112 has a conductivity type different from that of the bulk doped region 106, such as N-type. In some embodiments, the doping concentration of the heavily doped region 112 is less than the doping concentration of the source doped region 108. The metal line 210a is connected to the source terminal S via an interconnect structure 215. In the embodiments of the present invention, other metal lines (not shown) and conductive plugs (not shown) that are electrically connected between the metal line 210a and the source terminal S are collectively referred to as the interconnect structure 215. For the sake of convenience of description, the metal line 210a, the conductive plug 152, and the interconnect structure 215 can be used as the source connection structure.

[0055] The heavily doped region 132 is located between the second part semiconductor layer 120_2 and the third part semiconductor layer 120_3 and surrounds one end of the conductive plug 162. The conductive plug 162 extends in the Z direction through the interlayer dielectric layer 116 and extends into the semiconductor layer to connect the metal line 220a and the semiconductor layer 120. The heavily doped region 132 has the same conductivity type as the semiconductor layer 120, such as N-type. The metal line 220a is connected to the gate terminal G via the interconnect structure 225. In the embodiments of the present invention, other metal lines (not shown) and conductive plugs (not shown) that are electrically connected between the metal line 220a and the gate terminal G are collectively referred to as the interconnect structure 225. For the sake of convenience of description, the metal line 220a, the conductive plug 162, and the interconnect structure 225 can be used as the gate connection structure.

[0056] The heavily doped region 131 is located in the doped region 120n at the outermost end of the third part semiconductor layer 120_3 and surrounds one end of the conductive plug 161. The conductive plug 161 extends in the Z direction through the interlayer dielectric layer 116 and extends into the third part semiconductor layer 120_3 to electrically connect the metal line 210b and the outermost doped region 120n. The heavily doped region 131 has the same conductivity type as the doped region 120n, such as N-type. The metal line 210b is connected to the source terminal S and the metal line 210a via the interconnect structure 215. In the embodiments of the present invention, other metal lines (not shown) and conductive plugs (not shown) that are electrically connected between the metal line 210b and the source terminal S are collectively referred to as the interconnect structure 215. In some embodiments, the metal line 210b is connected to the metal line 210a through the upper interconnect structure 215 (such as the M2 metal line and the corresponding conductive plug). In some embodiments, the metal line 210b is connected to the metal line 210a through the same layer interconnect structure 215 (such as the M1 metal line).

[0057] In the X direction, the doped regions 120p and 120n have a width W1. In the Y direction, the length L2 of the doped region 120p is greater than the length L3 of the doped region 120n. In some embodiments, the length L2 is about 3 - 4 micrometers (μm), while the length L3 is about 2 micrometers. Additionally, the distances from the heavily doped regions 131 and 132 to the doped region 120p are lengths L4, respectively. In some embodiments, the length L4 is less than or equal to the length L3. The lengths L2, L3, and L4 are determined according to the process parameters of the vertical power transistor 10.

[0058] In a trench-type semiconductor power device, the configuration of each conductive plug may vary according to process or electrical requirements. The material of the conductive plug may include gold (Au), silver (Ag), copper (Cu), platinum (Pt), palladium (Pd), tungsten (W), titanium (Ti), tantalum (Ta), molybdenum (Mo), or other metals or alloys. In some embodiments, the conductive plugs 161, 162 have a columnar configuration. In some embodiments, the conductive plugs 161 or 162 have approximately the same depth along the Z direction. In some embodiments, the conductive plug 152 has a configuration with a wider top and a narrower bottom.

[0059] In each electrostatic discharge protection structure ESD_P1, the first end of the diode string 20_1 (i.e., the doped region 120n adjacent to the second part semiconductor layer 120_2, or the doped region 120n provided with the heavily doped region 132) is electrically connected to the gate of the vertical power transistor 10 via the gate resistor Rg, and the second end of the diode string 20_1 (i.e., the doped region 120n far from the second part semiconductor layer 120_2, or the doped region 120n provided with the heavily doped region 131) is electrically connected to the source doped region 108 via a source connection structure (such as the interconnect structure 215, etc.). In an embodiment of the trench-type semiconductor power device 100_1, Figure 1 the gate resistor 30 is formed by the parallel connection of the gate resistors Rg in all the trench structures 110, for example, formed by the parallel connection of three gate resistors Rg. Figure 1The diode string 20 is formed by paralleling the diode strings 20_1 of all the electrostatic discharge protection structures ESD_P1, for example, formed by paralleling three diode strings 20_1. In the trench-type semiconductor power device 100_1, when the number of trench structures 110 increases, the number of electrostatic discharge protection structures ESD_P1 also increases. Thus, more electrostatic discharge paths can be provided for the vertical power transistor 10, and accordingly, the electrostatic discharge protection ability can be enhanced. In traditional semiconductor power devices that require additional area to form electrostatic discharge protection structures, when the size of the power transistor increases, additional design and layout are needed to correspondingly adjust the size of the electrostatic discharge protection structure. Therefore, compared with the traditional method that requires additional area to form electrostatic discharge protection structures, the electrostatic discharge protection structure of the embodiments of the present disclosure is arranged together with the gate structure, which can achieve the effects of reducing area and product size. Moreover, when the size of the power transistor 10 increases, the electrostatic discharge protection is also improved accordingly, without the need for additional design and layout. In addition, compared with traditional trench-type semiconductor power devices having a single trench resistance, the parallel gate resistors Rg can reduce the impedance of the trench resistance. Therefore, the switching speed of the vertical power transistor 10 will not be reduced, and better operating efficiency is achieved.

[0060] Figure 4 is a top view of a trench-type semiconductor power device 100_1A according to some embodiments of the present disclosure. Figure 5A is Figure 4 a cross-sectional view of the trench-type semiconductor power device 100_1A along line A - A', and Figure 5B is Figure 4 a cross-sectional view of the trench-type semiconductor power device 100_1A along line B - B'. Figure 4 The structural configuration of the trench-type semiconductor power device 100_1A is similar to Figure 2 that of the trench-type semiconductor power device 100_1. The difference between the two power devices is that the trench-type semiconductor power device 100_1A further includes an electrostatic discharge protection structure ESD_P2. For the sake of simplicity in description, only the differences between different embodiments are described below, and the descriptions of the same or similar structures or process methods as those in the foregoing embodiments are omitted.

[0061] The electrostatic discharge protection structure ESD_P2 includes a semiconductor layer 310 formed of plate-shaped polysilicon. The semiconductor layer 310 includes a plurality of doped regions 310n and a plurality of doped regions 310p, and the doped regions 310n and the doped regions 310p have different conductivity types. For example, the doped region 310n has the same conductivity type doping as the doped region 120n, such as N-type, and the doped region 310p has the same conductivity type doping as the doped region 120p, such as P-type. In the electrostatic discharge protection structure ESD_P2, the doped regions 310n and the doped regions 310p are arranged alternately to form a diode string (collectively referred to as diode string 20_2 hereinafter) having two back-to-back diodes 22 connected in series. In addition, the number of back-to-back diodes 22 in the diode string 20_2 is the same as the number of back-to-back diodes 22 in the diode string 20_1. In some embodiments, in the X direction, the widths of the doped regions 310p and 310n are greater than the width W1 of the doped regions 120p and 120n. In the Y direction, the doped regions 120p and 310p have the same length L2, and the doped regions 120n and 310n have the same length L3.

[0062] The heavily doped region 141 is located adjacent to the doped region 310n of the electrostatic discharge protection structure ESD_P1 and surrounds one end of the conductive plug 171. The conductive plug 171 extends in the Z direction through the interlayer dielectric layer 116 and extends into the semiconductor layer 310 to connect to the metal wire 210b. The heavily doped region 142 is located away from the doped region 310n of the electrostatic discharge protection structure ESD_P1 and surrounds one end of the conductive plug 172. The conductive plug 172 extends in the Z direction through the interlayer dielectric layer 116 to connect to the metal wire 220b. The metal wire 220b is connected to the gate terminal G and the metal wire 220a via the interconnect structure 225. The heavily doped regions 141 and 142 have the same conductivity type as the semiconductor layer 120, such as N-type. For the sake of convenience of description, the metal wire and the conductive plug connected to the interconnect structure 215 can be used as the source connection structure, and the metal wire and the conductive plug connected to the interconnect structure 225 can be used as the gate connection structure.

[0063] In the trench-type semiconductor power device 100_1A, the electrostatic discharge protection structure ESD_P2 is separated from the electrostatic discharge protection structure ESD_P1 and is surrounded by the interlayer dielectric layer 116. In addition, the semiconductor layer 310 of the electrostatic discharge protection structure ESD_P2 is formed above the semiconductor layer 120 and overlaps the body doping region 106. Therefore, the depths of the conductive plugs 171 and 172 in the Z direction are less than the depths of the conductive plugs 161 and 162.

[0064] In the electrostatic discharge protection structure ESD_P2, the first end of the diode string 20_2 (i.e., the doped region 120n far from the doped region of the electrostatic discharge protection structure ESD_P1, or the doped region 310n provided with the heavily doped region 142) is electrically connected to the gate resistor Rg via a gate connection structure (such as a metal wire 220b, an interconnect structure 225, etc.), and the second end of the diode string 20_2 (i.e., the doped region 120n adjacent to the electrostatic discharge protection structure ESD_P1, or the doped region 310n provided with the heavily doped region 141) is electrically connected to the source doped region 108 via a source connection structure (such as a metal wire 210b, an interconnect structure 215, etc.). In an embodiment of the trench-type semiconductor power device 100_1A, Figure 1 the diode string 20 is formed by paralleling the diode string 20_1 of all the electrostatic discharge protection structures ESD_P1 and the diode string 20_2 of the electrostatic discharge protection structure ESD_P2, for example, formed by paralleling three diode strings 20_1 and the diode string 20_2. In the trench-type semiconductor power device 100_1A, by using an additional electrostatic discharge protection structure ESD_P2, more electrostatic discharge paths can be provided for the vertical power transistor 10, thus increasing the electrostatic discharge protection ability.

[0065] Figure 6 is a top view of a trench-type semiconductor power device 100_1B according to some embodiments of the present disclosure. Figure 7A is Figure 6 a cross-sectional view of the trench-type semiconductor power device 100_1B along line A-A', and Figure 7B is Figure 6 a cross-sectional view of the trench-type semiconductor power device 100_1B along line B-B'. Figure 6 The structural configuration of the trench-type semiconductor power device 100_1B is similar to Figure 4 that of the trench-type semiconductor power device 100_1A. The difference between the two power devices is that the semiconductor layer 310 of the trench-type semiconductor power device 100_1B extends towards the semiconductor layer 120 and is connected to the semiconductor layer 120. In other words, the two electrostatic discharge protection structures ESD_P1 and ESD_P2 of the trench-type semiconductor power device 100_1B are merged together through the extended semiconductor layer 310.

[0066] Figure 7A The cross-sectional view of the trench-type semiconductor power device 100_1B shown is similar to FIG. 3, Figure 6 and will not be repeated here. As Figure 7BAs shown by the trench-type semiconductor power device 100_1B, the semiconductor layer 310 forming the electrostatic discharge protection structure ESD_P2 extends in the Y direction towards the electrostatic discharge protection structure ESD_P1 so as to be connected to the doped region 120n at the very end of the third partial semiconductor layer 120_3 extending in the Z direction, that is, the semiconductor layer 310 abuts on the semiconductor layer 120. Therefore, the conductive plug connecting the second end of the electrostatic discharge protection structure ESD_P1 of the trench-type semiconductor power device 100_1B does not need to penetrate deep into the semiconductor layer 120. In addition, the combined semiconductor layer 310 and the semiconductor layer 120 share the same gate material (such as polysilicon). Therefore, compared with the trench-type semiconductor power device 100_1A which needs to etch all the gate material on the surface first and then re-form the semiconductor layer 310 after forming the semiconductor layer 120, the trench-type semiconductor power device 100_1B can simplify the manufacturing process steps and reduce costs. The second end of the diode string 20_1 in the electrostatic discharge protection structure ESD_P1 is electrically connected to the metal wire 210b via the heavily doped region 143 and the conductive plug 173. The conductivity type of the heavily doped region 143 is the same as that of the heavily doped regions 141 and 142. The conductive plugs 171-173 have the same depth in the Z direction. In some embodiments, the second end of the electrostatic discharge protection structure ESD_P1 and the first end of the electrostatic discharge protection structure ESD_P2 share the same conductive plug 171 or 173. For example, according to the design requirements, only one of the conductive plugs 171 and 173 can be used. In some embodiments, the second end of the electrostatic discharge protection structure ESD_P1 is connected to the first end of the electrostatic discharge protection structure ESD_P2.

[0067] Figure 8 is a top view of a trench-type semiconductor power device 100_1C according to some embodiments of the present disclosure. Figure 9A is Figure 8 a cross-sectional view of the trench-type semiconductor power device 100_1C along line A-A', and Figure 9B is Figure 8 a cross-sectional view of the trench-type semiconductor power device 100_1C along line B-B'. Figure 8 The structural configuration of the trench-type semiconductor power device 100_1C is similar to Figure 4 that of the trench-type semiconductor power device 100_1A. The difference between the two power devices is that the electrostatic discharge protection structures ESD_P1 and ESD_P2 of the trench-type semiconductor power device 100_1C are formed on the same horizontal plane and are arranged in different trenches separated from each other.

[0068] In some embodiments of the trench-type semiconductor power device 100_1C, the semiconductor layer 310 of the electrostatic discharge protection structure ESD_P2 has the same depth as the semiconductor layer 120 of the electrostatic discharge protection structure ESD_P1 in the Z direction. The trench of the electrostatic discharge protection structure ESD_P2 can be formed simultaneously with the trench structure 110, and the insulating layer 115 will be simultaneously deposited in the trench of the electrostatic discharge protection structure ESD_P2. The semiconductor layer 310 can be formed in the same step as the semiconductor layer 120 and is surrounded by the insulating layer 115. The first end of the diode string 20_2 in the electrostatic discharge protection structure ESD_P2 is electrically connected to the metal line 220b via the heavily doped region 134 and the conductive plug 164, and the second end of the diode string 20_2 is electrically connected to the metal line 210b via the heavily doped region 133 and the conductive plug 163. The conductivity type of the heavily doped regions 133 and 134 is the same as that of the heavily doped regions 131 and 132. The heavily doped regions 133 and 134 can be formed in the same step as the heavily doped regions 131 and 132, and thus have the same or similar configurations, and the positions in the semiconductor layer 310 also correspond to the positions of the heavily doped regions 131 and 132 in the semiconductor layer 120. The conductive plugs 161 - 164 have the same depth in the Z direction. In this embodiment, the same or similar manufacturing steps can be used to complete the electrostatic discharge protection structures ESD_P1 and ESD_P2, thus reducing the manufacturing cost.

[0069] Figure 10 is a top view of the trench-type semiconductor power device 100_2 according to some embodiments of the present disclosure. Figure 11A is Figure 10 a cross-sectional view of the trench-type semiconductor power device 100_2 along line A - A', and Figure 11B is Figure 10 a cross-sectional view of the trench-type semiconductor power device 100_2 along line B - B'. The trench-type semiconductor power device 100_2 is a double-trench-type semiconductor power device. Compared with Figure 2 the trench-type semiconductor power device 100_1, the trench-type semiconductor power device 100_2 further includes a shielding structure 111 surrounding the trench structure 110. The widths of the metal lines 210a and 210b in the Y direction are greater than that of the metal line 220a.

[0070] The shielding structure 111 is a comb-shaped trench structure, which is composed of a plurality of trench structures extending in the Y direction (hereinafter referred to as the first sub-shielding structure 111a) and a trench structure extending in the X direction (hereinafter referred to as the second sub-shielding structure 111b). Each trench structure 110 is disposed between two adjacent first sub-shielding structures 111a, and the second sub-shielding structure 111b is disposed in the electrostatic discharge protection structure ESD_P1 close to the trench structure 110, that is, the second sub-shielding structure 111b is away from the source doping region 108. The shielding structure 111 has a depth D2 in the semiconductor material layer 103, and the depth D2 of the shielding structure 111 is greater than the depth D1 of the trench structure 110. The shielding structure 111 includes a semiconductor layer 122. The semiconductor layer 122 has a width W2 in the X direction and the width W2 is greater than the width W1. The semiconductor layer 122 has the same conductivity type doping as the lightly doped region 104, for example, N-type. In addition, in the shielding structure 111, the semiconductor layer 122 is surrounded by an insulating layer 115.

[0071] In the trench-type semiconductor power device 100_2, similar to the trench-type semiconductor power device 100_1, each trench structure 110 includes an electrostatic discharge protection structure ESD_P1. The electrostatic discharge protection structure ESD_P1 is separated from the shielding structure 111 via the lightly doped region 104 and the body doping region 106. In some embodiments, the source doping region 108 of the trench-type semiconductor power device 100_2 is formed in the trench-type semiconductor power device 100_2 and only on one side of the conductive plug 152 adjacent to the trench structure 110. The heavily doped regions 135 and 137 are located in the semiconductor layer 122 and have the same conductivity type doping as the lightly doped region 104, for example, N-type. The conductive plugs 165 and 167 extend in the Z direction through the interlayer dielectric layer 116 to electrically connect the semiconductor layer 122 to the metal lines 210a and 210b. As previously described, the metal line 210b is connected to the source terminal S via the interconnect structure 215 and the metal line 210a. For the sake of convenience of description, the conductive plugs 165 and 167 can be used as source connection structures.

[0072] In an embodiment of the trench-type semiconductor power device 100_2, Figure 1 the gate resistance 30 is formed by the parallel connection of the gate resistances Rg in all the trench structures 110. Figure 1 The diode string 20 is formed by the parallel connection of the diode strings 20_1 of all the electrostatic discharge protection structures ESD_P1. In the trench-type semiconductor power device 100_2, when the number of trench structures 110 increases, the number of electrostatic discharge protection structures ESD_P1 also increases, so that more electrostatic discharge paths can be provided for the vertical power transistor 10, and thus the electrostatic discharge protection ability can be increased.

[0073] Figure 12is a top view of a trench-type semiconductor power device 100_2A according to some embodiments of the present disclosure. Figure 13A is Figure 12 a cross-sectional view of the trench-type semiconductor power device 100_2A along line A-A', and Figure 13B is Figure 12 a cross-sectional view of the trench-type semiconductor power device 100_2A along line B-B'. The trench-type semiconductor power device 100_2A is a double-trench-type semiconductor power device. Figure 12 The structural configuration of the trench-type semiconductor power device 100_2A is similar to Figure 10 that of the trench-type semiconductor power device 100_2. The difference between the two power devices is that the trench-type semiconductor power device 100_2A further includes an electrostatic discharge protection structure ESD_P2.

[0074] The electrostatic discharge protection structure ESD_P2 includes a semiconductor layer 310 having a plurality of doped regions 310n and a plurality of doped regions 310p. In the trench-type semiconductor power device 100_2A, the electrostatic discharge protection structure ESD_P2 is separated from the electrostatic discharge protection structure ESD_P1 and is surrounded by an interlayer dielectric layer 116. A shielding structure 111 is disposed between the electrostatic discharge protection structure ESD_P2 and the electrostatic discharge protection structure ESD_P1. In addition, the semiconductor layer 310 of the electrostatic discharge protection structure ESD_P2 is formed above the semiconductor layer 120 and overlaps the body doping region 106. Therefore, the depth of the conductive plugs 171 and 172 in the Z direction is less than that of the conductive plugs 161 and 162.

[0075] In the electrostatic discharge protection structure ESD_P2, the first end of the diode string 20_2 (i.e., the doped region 120n far from the electrostatic discharge protection structure ESD_P1, or the doped region 310n provided with the heavily doped region 142) is electrically connected to the gate terminal G via a gate connection structure (such as a metal wire 220b, an interconnect structure 225, etc.), and the second end of the diode string 20_2 (i.e., the doped region 120n adjacent to the electrostatic discharge protection structure ESD_P1, or the doped region 310n provided with the heavily doped region 141) is electrically connected to the source terminal S via a source connection structure (such as a metal wire 210b, an interconnect structure 215, etc.) and the interconnect structure 215. In an embodiment of the trench-type semiconductor power device 100_2A, Figure 1The diode string 20 is formed by paralleling the diode string 20_1 of all the electrostatic discharge protection structures ESD_P1 and the diode string 20_2 of the electrostatic discharge protection structure ESD_P2. In the trench-type semiconductor power device 100_2A, by using an additional electrostatic discharge protection structure ESD_P2, more electrostatic discharge paths can be provided for the vertical power transistor 10, thereby increasing the electrostatic discharge protection ability. The electrostatic discharge protection structure ESD_P2 of the trench-type semiconductor power device 100_2A is similar to the electrostatic discharge protection structure ESD_P2 of the trench-type semiconductor power device 100_1A, except that the electrostatic discharge protection structure ESD_P2 of the trench-type semiconductor power device 100_2A is applied to the double trench-type semiconductor power device 100_2. Therefore, the detailed structure can be referred to the paragraph description of the trench-type semiconductor power device 100_1A and will not be repeated here.

[0076] In other embodiments, the electrostatic discharge protection structure ESD_P2 of the trench-type semiconductor power device 100_2A is formed on the same horizontal plane as the electrostatic discharge protection structure ESD_P1 in the Z direction and is disposed in different trenches separated from each other, as Figure 9B shown by the electrostatic discharge protection structures ESD_P1 and ESD_P2.

[0077] Figure 14 is a top view of the trench-type semiconductor power device 100_2B according to some embodiments of the present disclosure. Figure 15A is Figure 14 a cross-sectional view of the trench-type semiconductor power device 100_2B along line A-A', and Figure 15B is Figure 14 a cross-sectional view of the trench-type semiconductor power device 100_2B along line B-B'. The trench-type semiconductor power device 100_2B is a double trench-type semiconductor power device. Figure 14 The structural configuration of the trench-type semiconductor power device 100_2B is similar to Figure 12 that of the trench-type semiconductor power device 100_2A. The difference between the two power devices is that the electrostatic discharge protection structure ESD_P2 and the shielding structure 111 of the trench-type semiconductor power device 100_2B are combined together through an extended semiconductor layer 310.

[0078] In the trench-type semiconductor power device 100_2B, the semiconductor layer 310 forming the electrostatic discharge protection structure ESD_P2 extends along the Y direction towards the shielding structure 111 so as to be connected to the semiconductor layer 122 of the second sub-shielding structure 111b extending along the Z direction, that is, the semiconductor layer 310 will be adjacent to the semiconductor layer 122. The semiconductor layer 122 is electrically connected to the metal wire 210b via a heavily doped region 141 and a conductive plug 171.

[0079] The electrostatic discharge protection structure of the present disclosure can be integrated with the gate structure to achieve the effects of reducing manufacturing cost and product area. In other embodiments, the electrostatic discharge protection structure of the present disclosure can be further integrated with the shielding electrode to enhance the electrostatic discharge protection effect. Multiple exemplary embodiments of integrating the electrostatic discharge protection structure into the shielding electrode are provided below, but the present disclosure is not limited thereto.

[0080] Figure 16 is a top view of a trench-type semiconductor power device 100_2C according to some embodiments of the present disclosure. Figure 17A is Figure 16 a cross-sectional view of the trench-type semiconductor power device 100_2C along line A-A', Figure 17B is Figure 16 a cross-sectional view of the trench-type semiconductor power device 100_2C along line B-B', and Figure 17C is Figure 16 a cross-sectional view of the trench-type semiconductor power device 100_2C along line C-C'. The trench-type semiconductor power device 100_2C is a double-trench-type semiconductor power device. Figure 16 The structural configuration of the trench-type semiconductor power device 100_2C is similar to Figure 10 that of the trench-type semiconductor power device 100_2. The difference between the two power devices is that the shielding structure 111 of the trench-type semiconductor power device 100_2C further includes a plurality of electrostatic discharge protection structures ESD_P3.

[0081] In the electrostatic discharge protection structure ESD_P3, the semiconductor layer 122 of the first sub-shielding structure 111a is divided into a first part semiconductor layer 122 away from the second sub-shielding structure 111b and a second part semiconductor layer 122 close to the second sub-shielding structure 111b. In other words, the first part semiconductor layer 122 is close to the source doping region 108, while the second sub-shielding structure 111b is away from the source doping region 108. The first part semiconductor layer 122 is completely covered by the metal line 210a and is electrically connected to the metal line 210a via the conductive plug 165. The first part semiconductor layer 122 has the same conductive-type doping as the lightly doped region 104, such as N-type. The second part semiconductor layer 122 includes a plurality of doping regions 122n and a plurality of doping regions 122p. The doping regions 122n and the doping regions 122p have different conductive types. For example, the doping regions 122n have the same conductive-type doping as the doping regions 120n, such as N-type, and the doping regions 122p have the same conductive-type doping as the doping regions 120p, such as P-type. A PN junction is formed at the interface between the doping regions 122n and the doping regions 122p. In addition, each doping region 122p and two adjacent doping regions 122n form a back-to-back diode (i.e., Figure 1Back-to-back diodes 22). In the electrostatic discharge protection structure ESD_P3, the doped regions 122n and 122p are staggered to form a diode string having two back-to-back diodes 22 connected in series (collectively referred to as diode string 20_3 hereinafter). In addition, the number of back-to-back diodes 22 in the diode string 20_3 is the same as the number of back-to-back diodes 22 in the diode string 20_1. The semiconductor layer 122 of each first sub-shielding structure 111a may include one or more electrostatic discharge protection structures ESD_P3.

[0082] In an embodiment of the trench-type semiconductor power device 100_2C, the first sub-shielding structure 111a of the shielding structure 111 (i.e., the trench structure extending in the Y direction) includes two electrostatic discharge protection structures ESD_P3, such as the electrostatic discharge protection structure ESD_P3 (collectively referred to as electrostatic discharge protection structure ESD_P3a hereinafter) disposed between the metal lines 210b and 220a and the electrostatic discharge protection structure ESD_P3 (collectively referred to as electrostatic discharge protection structure ESD_P3b hereinafter) disposed between the metal lines 210a and 220a. In some embodiments, the electrostatic discharge protection structure ESD_P1 is disposed between the two electrostatic discharge protection structures ESD_P3a, and the gate resistor Rg is disposed between the two electrostatic discharge protection structures ESD_P3b. In some embodiments, the first sub-shielding structure 111a of the shielding structure 111 includes only one electrostatic discharge protection structure ESD_P3, such as the electrostatic discharge protection structure ESD_P3a or ESD_P3b.

[0083] In the electrostatic discharge protection structure ESD_P3a, the first end of the diode string 20_3 (i.e., the doped region 120n adjacent to the first partial semiconductor layer 122, or the doped region 122n provided with the heavily doped region 136) is electrically connected to the gate terminal G via a gate connection structure (such as a conductive plug 166, a metal wire 220a, an interconnect structure 225, etc.), and the second end of the diode string 20_3 (i.e., the doped region 120n far from the first partial semiconductor layer 122, or the doped region 122n provided with the heavily doped region 137a) is electrically connected to the source terminal S via a source connection structure (such as a conductive plug 167a, a metal wire 210b, an interconnect structure 215, etc.). In the electrostatic discharge protection structure ESD_P3b, the first end of the diode string 20_3 (i.e., the doped region 120n far from the first partial semiconductor layer 122, or the doped region 122n provided with the heavily doped region 136) is electrically connected to the gate terminal G via a gate connection structure (such as a conductive plug 166, a metal wire 220a, an interconnect structure 225, etc.), and the second end of the diode string 20_3 (i.e., the doped region 120n adjacent to the first partial semiconductor layer 122, or the doped region 122n provided with the heavily doped region 135a) is electrically connected to the source terminal S via a source connection structure (such as a conductive plug 165a, a metal wire 210a, an interconnect structure 215, etc.). In an embodiment of the trench-type semiconductor power device 100_2C, Figure 1 the diode string 20 is formed by paralleling the diode string 20_1 of all the electrostatic discharge protection structures ESD_P1 and the diode string 20_3 of all the electrostatic discharge protection structures ESD_P3, for example, formed by paralleling two diode strings 20_1 and six diode strings 20_3. In the trench-type semiconductor power device 100_2C, when the number of the electrostatic discharge protection structures ESD_P3 increases, more electrostatic discharge paths can be provided for the vertical power transistor 10, thereby increasing the electrostatic discharge protection ability.

[0084] Figure 18 is a top view of a trench-type semiconductor power device 100_2D according to some embodiments of the present disclosure. Figure 19A is Figure 18 a cross-sectional view of the trench-type semiconductor power device 100_2D along line A-A', Figure 19B is Figure 18 a cross-sectional view of the trench-type semiconductor power device 100_2D along line B-B', and Figure 19C is Figure 18 a cross-sectional view of the trench-type semiconductor power device 100_2D along line C-C'. The trench-type semiconductor power device 100_2D is a double-trench-type semiconductor power device. Figure 18 The structural configuration of the trench-type semiconductor power device 100_2D is similar to Figure 16The trench-type semiconductor power device 100_2C. The difference between the two power devices is that the trench-type semiconductor power device 100_2D further includes an electrostatic discharge protection structure ESD_P2.

[0085] In the trench-type semiconductor power device 100_2D, the electrostatic discharge protection structure ESD_P2 is separated from the electrostatic discharge protection structures ESD_P1 and ESD_P3 and is surrounded by the interlayer dielectric layer 116. In addition, the second sub-shielding structure 111b of the shielding structure 111 (i.e., the trench structure extending in the X direction) is disposed between the electrostatic discharge protection structure ESD_P2 and the electrostatic discharge protection structure ESD_P1 (or the electrostatic discharge protection structure ESD_P3a). The semiconductor layer 310 of the electrostatic discharge protection structure ESD_P2 is formed above the semiconductor layer 120 and overlaps the body doping region 106. Therefore, the depths of the conductive plugs 171 and 172 in the Z direction are less than those of the conductive plugs 161, 162, 165a, 166, 167, and 167a.

[0086] In the electrostatic discharge protection structure ESD_P2, the first end of the diode string 20_2 (i.e., the doping region 120n away from the electrostatic discharge protection structure ESD_P1, or the doping region 310n provided with the heavily doped region 142) is electrically connected to the gate terminal G via a gate connection structure (such as the metal wire 220b, the interconnect structure 225, etc.), and the second end of the diode string 20_2 (i.e., the doping region 120n adjacent to the electrostatic discharge protection structure ESD_P1, or the doping region 310n provided with the heavily doped region 141) is electrically connected to the source terminal S via a source connection structure (such as the metal wire 210b, the interconnect structure 215, etc.). In an embodiment of the trench-type semiconductor power device 100_2D, Figure 1 the diode string 20 is formed by paralleling the diode string 20_1 of all the electrostatic discharge protection structures ESD_P1, the diode string 20_3 of all the electrostatic discharge protection structures ESD_P3, and the diode string 20_2 of the electrostatic discharge protection structure ESD_P2. In the trench-type semiconductor power device 100_2D, by using the additional electrostatic discharge protection structure ESD_P2, more electrostatic discharge paths can be provided for the vertical power transistor 10, thus increasing the electrostatic discharge protection ability.

[0087] In some embodiments, the electrostatic discharge protection structure ESD_P2 of the trench-type semiconductor power device 100_2D is formed in the same horizontal plane as the electrostatic discharge protection structure ESD_P1 in the Z direction and is disposed in different trenches separated from each other. In some embodiments, the electrostatic discharge protection structure ESD_P2 of the trench-type semiconductor power device 100_2D is formed in the same horizontal plane as the electrostatic discharge protection structure ESD_P3 in the Z direction and is disposed in different trenches separated from each other.

[0088] Figure 20 is a top view of a trench-type semiconductor power device 100_2E according to some embodiments of the present disclosure. Figure 21A is Figure 20 a cross-sectional view of the trench-type semiconductor power device 100_2E along line A-A', Figure 21B is Figure 20 a cross-sectional view of the trench-type semiconductor power device 100_2E along line B-B', and Figure 21C is Figure 20 a cross-sectional view of the trench-type semiconductor power device 100_2E along line C-C'. The trench-type semiconductor power device 100_2E is a double-trench-type semiconductor power device. Figure 20 The structural configuration of the trench-type semiconductor power device 100_2E is similar to Figure 18 that of the trench-type semiconductor power device 100_2D. The difference between the two power devices is that the electrostatic discharge protection structure ESD_P2 and the shielding structure 111 of the trench-type semiconductor power device 100_2B are combined through an extended semiconductor layer 310.

[0089] In the trench-type semiconductor power device 100_2E, the semiconductor layer 310 forming the electrostatic discharge protection structure ESD_P2 extends along the Y direction towards the shielding structure 111 so as to be connected to the semiconductor layer 122 extending along the Z direction in the second sub-shielding structure 111b, that is, the semiconductor layer 310 is adjacent to the semiconductor layer 122. The semiconductor layer 122 of the second sub-shielding structure 111b is electrically connected to the metal line 210b via a heavily doped region 141 and a conductive plug 171.

[0090] Multiple embodiments of the integration of the electrostatic discharge protection structure with the gate structure and / or the shielding electrode structure are provided above, demonstrating that the present disclosure can be widely applied to various types of trench-type semiconductor power devices. Further embodiments of integrating the electrostatic discharge protection structure of the present disclosure into the gate structure and / or the shielding electrode structure of a split-gate semiconductor device will be provided below for exemplary illustration, but the present disclosure is not limited thereto.

[0091] Figure 22 is a top view of a trench-type semiconductor power device 100_3 according to some embodiments of the present disclosure. Figure 23A is Figure 22 a cross-sectional view of the trench-type semiconductor power device 100_3 along line A-A', and Figure 23B is Figure 22 a cross-sectional view of the trench-type semiconductor power device 100_3 along line B-B'. The trench-type semiconductor power device 100_3 is a trench-type split gate (SGT) semiconductor device. Compared with Figure 2The trench structure 110 of the trench-type semiconductor power device 100_1, and the trench structure 110a of the trench-type semiconductor power device 100_3 further includes a semiconductor layer 124. In addition, compared with Figure 2 the trench-type semiconductor power device 100_1, the trench-type semiconductor power device 100_3 further includes a shielding structure 113. The widths of the metal lines 210a and 210b in the Y direction are greater than that of the metal line 220a, and the metal line 210b has the maximum width.

[0092] In an embodiment of the trench-type semiconductor power device 100_3, the shielding structure 110a has a depth D3 in the semiconductor material layer 103, and the shielding structure 110a extends in the Y direction. In some embodiments, the depth D3 of the shielding structure 110a is greater than the depth D1 of the shielding structure 110. In addition, the shielding structure 113 has a depth D4 in the semiconductor material layer 103, and the shielding structure 113 extends in the X direction. In some embodiments, the depth D3 is the same as the depth D4. In some embodiments, the depth D3 is different from the depth D4. The shielding structure 113 includes a semiconductor layer 126. The semiconductor layer 126 has the same conductivity type doping as the lightly doped region 104, such as N-type. In some embodiments, the doping concentration of the semiconductor layer 126 is greater than the doping concentration of the lightly doped region 104. In addition, in the shielding structure 113, the semiconductor layer 126 is surrounded by an insulating layer 115. The shielding structure 113 is separated from the trench structure 110a through the lightly doped region 104 and the body doping region 106.

[0093] In the trench structure 110a, the semiconductor layer 124 is separated from the semiconductor layer 120 and is surrounded by an insulating layer 115. The semiconductor layer 124 has the same conductivity type doping as the lightly doped region 104, such as N-type. In some embodiments, the doping concentration of the semiconductor layer 124 is greater than the doping concentration of the lightly doped region 104. The semiconductor layer 124 can be divided into two parts 124_1 and 124_2 (hereinafter referred to as the first part semiconductor layer 124_1 and the second part semiconductor layer 124_2 respectively). The first part semiconductor layer 124_1 extends in the Y direction and is disposed between the semiconductor layer 120 and the lightly doped region 104. The second part semiconductor layer 124_2 extends in the Z direction and is disposed between the electrostatic discharge protection structure ESD_P1 and the body doping region 106 (or the shielding structure 113). In the Z direction, the first part semiconductor layer 124_1 overlaps the semiconductor layer 120, while the second part semiconductor layer 124_2 does not overlap the semiconductor layer 120. In addition, in the Z direction, the thickness of the first part semiconductor layer 124_1 and the thickness of the semiconductor layer 120 are less than the depth D3.

[0094] The heavily doped region 151 is located in the second part semiconductor layer 124_2 and surrounds one end of the conductive plug 181. The conductive plug 181 extends in the Z direction through the interlayer dielectric layer 116 to connect the metal wire 210b and the second part semiconductor layer 124_2. The heavily doped region 139 is located in the semiconductor layer 126 and surrounds one end of the conductive plug 169. The conductive plug 169 extends in the Z direction through the interlayer dielectric layer 116 to connect the metal wire 210b and the semiconductor layer 126. The heavily doped regions 151 and 139 have the same conductivity type as the lightly doped region 104, for example, N-type. In the trench-type semiconductor power device 100_3, the semiconductor layer 124 and the semiconductor layer 126 are connected to the source terminal S via a source connection structure (such as the metal wire 210b, the interconnect structure 215, etc.).

[0095] Figure 24 is a top view of a trench-type semiconductor power device 100_3A according to some embodiments of the present disclosure. Figure 25A is Figure 24 a cross-sectional view of the trench-type semiconductor power device 100_3A along line A-A', and Figure 13B is Figure 12 a cross-sectional view of the trench-type semiconductor power device 100_3A along line B-B'. The trench-type semiconductor power device 100_3A is a trench-type split-gate semiconductor power device. Figure 24 The structural configuration of the trench-type semiconductor power device 100_3A of Figure 22 is similar to that of the trench-type semiconductor power device 100_3. The difference between the two power devices is that the trench-type semiconductor power device 100_3A further includes an electrostatic discharge protection structure ESD_P4.

[0096] The electrostatic discharge protection structure ESD_P4 is formed in the second part semiconductor layer 124_2 of each trench structure 110a. Each electrostatic discharge protection structure ESD_P4 includes a plurality of doped regions 124n and a plurality of doped regions 124p. The doped regions 124n and the doped regions 124p have different conductivity types. For example, the doped region 124n has the same conductivity type doping as the doped region 120n, for example, N-type, and the doped region 124p has the same conductivity type doping as the doped region 120p, for example, P-type. A PN junction is formed at the interface between the doped region 124n and the doped region 124p. In addition, each doped region 124p and two adjacent doped regions 124n form a back-to-back diode 22. In the electrostatic discharge protection structure ESD_P4, the doped regions 124n and the doped regions 124p are arranged alternately to form a diode string (collectively referred to as the diode string 20_4 hereinafter) having two back-to-back diodes 22 connected in series. In addition, the number of back-to-back diodes 22 in the diode string 20_4 is the same as the number of back-to-back diodes 22 in the diode string 20_1.

[0097] In some embodiments, the doped regions 124n and 120n have the same length L3 in the Y direction, while the doped regions 124p and 120p have the same length L2 in the Y direction. In addition, in the Z direction, the depths of the doped regions 124n and 124p are greater than the depths of the doped regions 120n and 120p.

[0098] The heavily doped region 151 is located in the doped region 124n at the forefront of the second part semiconductor layer 124_2 (e.g., adjacent to the first part semiconductor layer 124_1), and surrounds one end of the conductive plug 181. The conductive plug 181 extends in the Z direction through the interlayer dielectric layer 116 to connect the metal wire 210b and the forefront doped region 124n. The heavily doped region 154 is located in the doped region 124n at the end of the second part semiconductor layer 124_2 (e.g., away from the first part semiconductor layer 124_1), and surrounds one end of the conductive plug 182. The conductive plug 182 extends in the Z direction through the interlayer dielectric layer 116 to connect the metal wire 220b and the end doped region 124n. The heavily doped regions 151 and 154 have the same conductivity type as the doped region 120n, e.g., N-type. The metal wire 210b is connected to the source terminal S and the metal wire 210a via the interconnect structure 215.

[0099] In the electrostatic discharge protection structure ESD_P4, the first end of the diode string 20_4 (i.e., the doped region 124n away from the electrostatic discharge protection structure ESD_P1, or the doped region 124n provided with the heavily doped region 154) is electrically connected to the gate terminal G via a gate connection structure (such as the metal wire 220b, the interconnect structure 225, etc.), and the second end of the diode string 20_4 (i.e., the doped region 124n adjacent to the electrostatic discharge protection structure ESD_P1, or the doped region 124n provided with the heavily doped region 151) is electrically connected to the source terminal S via a source connection structure (such as the metal wire 210b, the interconnect structure 215, etc.). The electrostatic discharge protection structures ESD_P1 and ESD_P4 partially overlap with the metal wire 210b. The metal wire 210b is connected to the doped region 120n of the electrostatic discharge protection structure ESD_P1 via the conductive plug 161 and to the doped region 124n of the electrostatic discharge protection structure ESD_P4 via the conductive plug 181. In each shielding structure 110a, the electrostatic discharge protection structure ESD_P1 can be connected in parallel with the electrostatic discharge protection structure ESD_P4 through the source connection structure (such as the relevant metal wires and conductive plugs connected to the interconnect structure 215) and the gate connection structure (such as the relevant metal wires and conductive plugs connected to the interconnect structure 225). In other words, in the embodiment of the trench-type semiconductor power device 100_3A, Figure 1The diode string 20 is formed by paralleling the diode string 20_1 of all the electrostatic discharge protection structures ESD_P1 and the diode string 20_4 of all the electrostatic discharge protection structures ESD_P4. In some embodiments, the number of the electrostatic discharge protection structures ESD_P1 is the same as the number of the electrostatic discharge protection structures ESD_P4. In the trench-type semiconductor power device 100_3A, by using an additional electrostatic discharge protection structure ESD_P4, more electrostatic discharge paths can be provided for the vertical power transistor 10, thereby increasing the electrostatic discharge protection ability.

[0100] Figure 26 is a top view of a trench-type semiconductor power device 100_3B according to some embodiments of the present disclosure. Figure 27A is Figure 26 a cross-sectional view of the trench-type semiconductor power device 100_30 along line A-A', and Figure 27B is Figure 26 a cross-sectional view of the trench-type semiconductor power device 100_3B along line B-B'. The trench-type semiconductor power device 100_3B is a trench-type split-gate semiconductor power device. Figure 26 The structural configuration of the trench-type semiconductor power device 100_3B is similar to Figure 24 that of the trench-type semiconductor power device 100_3A. The difference between the two power devices is that the trench-type semiconductor power device 100_3B further includes an electrostatic discharge protection structure ESD_P2.

[0101] In the trench-type semiconductor power device 100_3B, the electrostatic discharge protection structure ESD_P2 is separated from the electrostatic discharge protection structures ESD_P1 and ESD_P4 and is surrounded by the interlayer dielectric layer 116. The shielding structure 113 is disposed between the electrostatic discharge protection structure ESD_P2 and the electrostatic discharge protection structure ESD_P4. In addition, the electrostatic discharge protection structure ESD_P2 is formed above the semiconductor layer 120 and overlaps the body doping region 106.

[0102] In the electrostatic discharge protection structure ESD_P2, the first end of the diode string 20_2 (i.e., the doping region 120n adjacent to the electrostatic discharge protection structure ESD_P1, or the doping region 310n provided with the heavily doped region 141) is electrically connected to the gate terminal G via a gate connection structure (such as a conductive plug 171, a metal wire 220b, an interconnect structure 225, etc.), and the second end of the diode string 20_2 (i.e., the doping region 120n far from the electrostatic discharge protection structure ESD_P1, or the doping region 310n provided with the heavily doped region 142) is electrically connected to the source terminal S via a source connection structure (such as a conductive plug 172, a metal wire 210c, an interconnect structure 215, etc.). In the embodiment of the trench-type semiconductor power device 100_3A, Figure 1The diode string 20 is formed by paralleling the diode string 20_1 of all the electrostatic discharge protection structures ESD_P1, the diode string 20_4 of all the electrostatic discharge protection structures ESD_P4, and the diode string 20_2 of the electrostatic discharge protection structure ESD_P2. In the trench-type semiconductor power device 100_3B, by using the additional electrostatic discharge protection structure ESD_P2, more electrostatic discharge paths can be provided for the vertical power transistor 10, thereby increasing the electrostatic discharge protection ability.

[0103] In some embodiments, the electrostatic discharge protection structure ESD_P2 of the trench-type semiconductor power device 100_3B forms on the same horizontal plane in the Z direction with the electrostatic discharge protection structure ESD_P1 or the electrostatic discharge protection structure ESD_P4 and is disposed in different trenches separated from each other.

[0104] Figure 28 It is a top view of the trench-type semiconductor power device 100_3C according to some embodiments of the present disclosure. Figure 29A It is Figure 28 The cross-sectional view of the trench-type semiconductor power device 100_3C along line A-A', and Figure 29B It is Figure 28 The cross-sectional view of the trench-type semiconductor power device 100_3C along line B-B'. The trench-type semiconductor power device 100_3C is a trench-type split-gate semiconductor power device. Figure 28 The structural configuration of the trench-type semiconductor power device 100_3C is similar to Figure 26 The trench-type semiconductor power device 100_3B. The difference between the two power devices is that the electrostatic discharge protection structure ESD_P2 and the shielding structure 113 of the trench-type semiconductor power device 100_3C are merged together through the extended semiconductor layer 310.

[0105] In the trench-type semiconductor power device 100_3C, the semiconductor layer 310 forming the electrostatic discharge protection structure ESD_P2 extends along the Y direction towards the shielding structure 113 so as to be connected to the semiconductor layer 126 extending along the Z direction, that is, the semiconductor layer 310 is adjacent to the semiconductor layer 126. The semiconductor layer 126 is electrically connected to the metal wire 220b via the heavily doped region 141 and the conductive plug 171.

[0106] In this document, spatial relative terms such as "below", "beneath", "lower", "above", "upper", "left", "right", etc. may be used for convenience in description to describe the relationship of one component or feature to another or other components or features as shown in the drawings. In addition to the orientation depicted in the drawings, the spatial relative terms are also intended to cover different orientations of the device during use or operation. The device may be oriented in other ways (rotated 90 degrees or in other orientations), and the spatial relative descriptive terms used herein may be interpreted accordingly. It should be understood that when a component is referred to as "connected to" or "coupled to" another component, it may be directly connected to or coupled to the other component, or there may be intermediate components.

[0107] As used herein, the terms "about", "substantially", "essentially" and "approximately" are used to describe and account for small variations. When used in conjunction with an event or circumstance, the terms may refer to instances where the event or circumstance occurs precisely as well as instances where the event or circumstance occurs nearly. As used herein with respect to a given value or range, the term "about" generally means within ±10%, ±5%, ±1% or ±0.5% of the given value or range. Ranges may be expressed herein as from one endpoint to another endpoint or between two endpoints. All ranges disclosed herein include the endpoints unless otherwise specified. The term "substantially coplanar" may refer to a positional difference between two surfaces positioned along the same plane within a few micrometers (μm), such as within 10 μm, 5 μm, 1 μm or 0.5 μm of being positioned along the same plane. When a numerical value or characteristic is referred to as being "substantially" the same, the term may refer to a value within ±10%, ±5%, ±1% or ±0.5% of the average value of the said value.

[0108] The foregoing outlines the features of several embodiments and the detailed aspects of the present disclosure. The embodiments described in the present disclosure can be readily used as a basis for designing or modifying other processes and structures in order to facilitate the implementation of the same or similar purposes and / or achieve the same or similar advantages of the embodiments introduced herein. Such equivalent constructions do not depart from the spirit and scope of the present disclosure, and various changes, substitutions and alterations can be made without departing from the spirit and scope of the present disclosure.

Claims

1. A trench-type semiconductor power device, characterized in that, it comprises: a substrate having a first conductivity type; a lightly doped region located on the substrate and having the first conductivity type; a body doping region located in the lightly doped region and away from the substrate, having a second conductivity type; a source doping region located in the body doping region and away from the substrate, having the first conductivity type; a trench structure having a first depth in a first direction extending from the source doping region towards the substrate and including a first semiconductor layer extending in a second direction, the first direction being perpendicular to the second direction, wherein the first semiconductor layer comprises: a first portion adjacent to the body doping region and the source doping region for serving as a gate electrode having the first conductivity type; and a second portion extending in the second direction and away from the source doping region, including a plurality of first doping regions having the first conductivity type and a plurality of second doping regions having the second conductivity type, wherein the plurality of first doping regions and the plurality of second doping regions are arranged alternately to form a first diode string having one or more back-to-back diodes, wherein a first end of the first diode string is electrically connected to the gate electrode, and a second end of the first diode string is electrically connected to the source doping region via a first connection structure.

2. The trench-type semiconductor power device according to claim 1, wherein an interface between each of the second doping regions and two adjacent first doping regions respectively forms a first PN junction and a second PN junction of each of the back-to-back diodes.

3. The trench-type semiconductor power device according to claim 1, wherein the first semiconductor layer further comprises: a third portion extending in the second direction and away from the source doping region and disposed between the first portion and the second portion, having the first conductivity type, wherein the first end of the first diode string is electrically connected to a second connection structure, and the third portion of the first semiconductor layer forms a gate resistance.

4. The trench-type semiconductor power device according to claim 1, wherein the first semiconductor layer comprises polysilicon, silicon carbide, gallium nitride, gallium oxide or diamond-based material.

5. The trench-type semiconductor power device according to claim 1, wherein the trench structure further comprises: an insulating layer surrounding the first semiconductor layer to separate the first semiconductor layer from the lightly doped region, the body doping region and the source doping region.

6. The trench-type semiconductor power device according to claim 1, which further comprises: an electrostatic discharge protection structure located above or on the same horizontal plane as the first semiconductor layer, comprising: a second semiconductor layer including a plurality of third doping regions having the first conductivity type and a plurality of fourth doping regions having the second conductivity type, wherein the plurality of third doping regions and the plurality of fourth doping regions are arranged alternately to form a second diode string having one or more back-to-back diodes, The first end of the second diode string is electrically connected to the source doping region via the first connection structure, and the second end of the second diode string is electrically connected to the first end of the first diode string via a second connection structure.

7. The trench-type semiconductor power device according to claim 6, wherein the first semiconductor layer is separated from the electrostatic discharge protection structure.

8. The trench-type semiconductor power device according to claim 6, wherein the electrostatic discharge protection structure is located above the first semiconductor layer, and the second portion of the first semiconductor layer is adjacent to the second semiconductor layer of the electrostatic discharge protection structure.

9. The trench-type semiconductor power device according to claim 1, further comprising: A shielding structure surrounding the trench structure and separated from the first diode string through the lightly doped region and the body doping region, including a second semiconductor layer, wherein the second semiconductor layer includes: A fourth portion having the first conductivity type and connected to the source doping region via the first connection structure, wherein in the first direction, the depth of the shielding structure is greater than the first depth.

10. The trench-type semiconductor power device according to claim 9, wherein the second semiconductor layer further includes: A fifth portion away from the source doping region, including a plurality of third doping regions having the first conductivity type and a plurality of fourth doping regions having the second conductivity type, wherein the plurality of third doping regions and the plurality of fourth doping regions are arranged alternately to form one or more second diode strings, wherein each of the second diode strings includes one or more back-to-back diodes, and the first end of each of the second diode strings is connected to the first end of the first diode string via a second connection structure and the second end is connected to the source doping region via the first connection structure.

11. The trench-type semiconductor power device according to claim 9 or 10, further comprising: An electrostatic discharge protection structure located above or on the same horizontal plane as the first semiconductor layer, including: A third semiconductor layer including a plurality of fifth doping regions having the first conductivity type and a plurality of sixth doping regions having the second conductivity type, wherein the plurality of fifth doping regions and the plurality of sixth doping regions are arranged alternately to form a third diode string having one or more back-to-back diodes, wherein the first end of the third diode string is electrically connected to the first end of the first diode string and the second end is electrically connected to the source doping region.

12. The trench-type semiconductor power device according to claim 11, wherein the shielding structure is disposed between the electrostatic discharge protection structure and the first diode string and separated from the electrostatic discharge protection structure.

13. The trench-type semiconductor power device according to claim 11, wherein the shielding structure is disposed between the electrostatic discharge protection structure and the first diode string, and the second semiconductor layer of the shielding structure is adjacent to the third semiconductor layer of the electrostatic discharge protection structure.

14. The trench-type semiconductor power device according to claim 1, further comprising: a shielding structure including a second semiconductor layer of the first conductivity type, wherein the trench structure further includes: a third semiconductor layer located between the first semiconductor layer and the lightly doped region, wherein the third semiconductor layer includes: a fourth portion of the first conductivity type, overlapping the first semiconductor layer in the first direction; and a fifth portion adjacent to the first diode string and not overlapping the first semiconductor layer in the first direction, wherein the first semiconductor layer is separated from the third semiconductor layer by an insulating layer, wherein the shielding structure is adjacent to the fifth portion of the third semiconductor layer and is separated from the trench structure by the lightly doped region and the body doping region.

15. The trench-type semiconductor power device according to claim 14, wherein in the first direction, the thickness of the fourth portion of the third semiconductor layer and the thickness of the first semiconductor layer are less than the first depth.

16. The trench-type semiconductor power device according to claim 14, wherein the fifth portion of the third semiconductor layer has the first conductivity type, and the third semiconductor layer and the second semiconductor layer are electrically connected to the source doping region via the first connection structure.

17. The trench-type semiconductor power device according to claim 14, wherein the fifth portion of the third semiconductor layer includes a plurality of third doping regions of the first conductivity type and a plurality of fourth doping regions of the second conductivity type, wherein the plurality of third doping regions and the plurality of fourth doping regions are arranged alternately to form a second diode string having one or more back-to-back diodes, wherein a first end of the second diode string is connected to a first end of the first diode string via a second connection structure, and a second end of the second diode string is connected to the source doping region via the first connection structure.

18. The trench-type semiconductor power device according to claim 17, further comprising: an electrostatic discharge protection structure located above or on the same horizontal plane as the first semiconductor layer, including: a fourth semiconductor layer including a plurality of fifth doping regions of the first conductivity type and a plurality of sixth doping regions of the second conductivity type, wherein the plurality of fifth doping regions and the plurality of sixth doping regions are arranged alternately to form a third diode string having one or more back-to-back diodes, wherein a first end of the third diode string is connected to a first end of the first diode string via the second connection structure and a second end is connected to the source doping region via the first connection structure.

19. The trench-type semiconductor power device according to claim 18, wherein the shielding structure is disposed between the electrostatic discharge protection structure and the trench structure and is separated from the electrostatic discharge protection structure.

20. The trench-type semiconductor power device according to claim 18, wherein the shielding structure is disposed between the electrostatic discharge protection structure and the trench structure, and the second semiconductor layer of the shielding structure is adjacent to the fourth semiconductor layer of the electrostatic discharge protection structure.