Ball Grid Array Simulation Analysis Method, Device, Electronic Device and Storage Medium

By creating the initial ball grid array model and obtaining impedance test results, adding the pad model to form the target ball grid array model, the difficulty of performance evaluation of BGA in liquid-cooled environment is solved, and the performance requirements are met and structural optimization is achieved.

CN120068796BActive Publication Date: 2025-07-29FEITENG TECH (CHANGSHA) CO LTD +1
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Patent Information

Application Number
CN202510495950.4
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-04-21
Publication Date
2025-07-29
Estimated Expiration
2045-04-21

AI Technical Summary

Technical Problem

The prior art is difficult to effectively evaluate the impact of ball grid arrays (BGAs) operating in liquid-cooled environments on server system signal integrity, making it difficult to ensure its performance requirements in liquid-cooled environments.

Method used

By creating an initial ball grid array model, applying test signals and obtaining impedance test results, adding pad models to form target ball grid array models, and correcting the model to meet the performance requirements in liquid-cooled environments.

Benefits of technology

The simulation analysis of the operating performance of BGA in liquid-cooled environment is realized, ensuring its performance requirements in liquid-cooled environment, and providing a reference for pad structure adjustment.

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Patent Text Reader

Abstract

The present application provides a ball grid array simulation analysis method, device, electronic device and storage medium, which are applied to the field of computer technology. After creating an initial ball grid array model including a solder ball model, a via model and a signal return plane, a test signal is applied to the initial ball grid array model, and a first impedance test result of the initial ball grid array model in a target liquid cooling environment is obtained. A pad model is created and connected to the initial ball grid array model to obtain a target ball grid array model. A test signal is applied to the target ball grid array model, and a second impedance test result of the target ball grid array model in the target liquid cooling environment is obtained. The target ball grid array model is corrected according to the first impedance test result and the second impedance test result. This method can simulate and analyze the operating performance of the ball grid array in a liquid cooling environment, and correct the ball grid array model through the simulation analysis result to ensure that the BGA can meet the performance requirements in the liquid cooling operating environment.
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Description

Technical Field

[0001] The present application relates to the field of computer technology, and particularly to a method, device, electronic device, and storage medium for ball grid array simulation analysis. Background Art

[0002] With the continuous development of computer technology, a new generation of high-performance servers has been widely used. While providing users with better computing power services, high-performance servers also pose severe challenges to the thermal design cost of the servers.

[0003] The prior art uses the method of immersion liquid cooling to solve the heat dissipation problem of high-performance servers, which can better balance server performance and thermal design cost. However, the prior art often focuses on improving the thermal efficiency of immersion liquid cooling, and there is a lack of research on the operating performance analysis of the ball grid array (BGA) directly exposed to the liquid cooling environment in the server. It is difficult to effectively evaluate the impact of the operation of the BGA in the liquid cooling environment on the signal integrity of the server system. Therefore, how to perform simulation analysis on the operating performance of the BGA in the liquid cooling environment has become one of the problems that need to be solved urgently by those skilled in the art. Summary of the Invention

[0004] In view of this, the present application is committed to providing a method, device, electronic device, and storage medium for ball grid array simulation analysis, performing simulation analysis on the BGA and correcting the BGA according to the analysis results to ensure that the BGA can meet the performance requirements in the liquid cooling operating environment.

[0005] In a first aspect, the present application provides a method for ball grid array simulation analysis, including:

[0006] Creating an initial ball grid array model, where the initial ball grid array model includes a solder ball model and a via model and a signal return plane respectively connected to the solder ball model;

[0007] Applying a test signal to the initial ball grid array model and obtaining a first impedance test result of the initial ball grid array model in a target liquid cooling environment;

[0008] Creating a pad model and connecting the pad model to the initial ball grid array model to obtain a target ball grid array model;

[0009] Applying the test signal to the target ball grid array model and obtaining a second impedance test result of the target ball grid array model in the target liquid cooling environment;

[0010] Correcting the target ball grid array model according to the first impedance test result and the second impedance test result.

[0011] In an alternative embodiment, modifying the target ball grid array model according to the first impedance test result and the second impedance test result includes:

[0012] Determining the impedance deviation ranges of the first impedance test result and the second impedance test result relative to a preset target impedance respectively;

[0013] Modifying the target ball grid array model based on each of the impedance deviation ranges.

[0014] In an alternative embodiment, the impedance deviation range includes a first impedance deviation range corresponding to the first impedance test result and a second impedance deviation range corresponding to the second impedance test result;

[0015] Modifying the target ball grid array model based on each of the impedance deviation ranges includes:

[0016] If the first impedance deviation range is within the preset impedance deviation range and the second impedance deviation range is within the first impedance deviation range, determining that the ball grid array corresponding to the target ball grid array model is allowed to operate in the target liquid cooling environment;

[0017] If the first impedance deviation range is not within the preset impedance deviation range, or the second impedance deviation range is not within the first impedance deviation range, adjusting the structure of at least one of the solder ball model and the pad model.

[0018] In an alternative embodiment, the pad model includes a signal pad and a reflow pad;

[0019] Adjusting the structure of the pad model includes:

[0020] Creating an insulating layer adjacent to the signal pad model according to the layout information of the target ball grid array;

[0021] Providing a cutout area in the insulating layer.

[0022] In an alternative embodiment, creating the initial ball grid array model includes:

[0023] Creating a signal solder ball model, a reflow solder ball model, and a via model according to the layout information of the target ball grid array;

[0024] Connecting a first contact surface of the signal solder ball model to the via model;

[0025] Creating a signal return plane and connecting the signal return plane to the reflow solder ball model.

[0026] In an alternative embodiment, the method provided in the first aspect of the present application further includes:

[0027] Create a coaxial body and adjust the equivalent dielectric constant of the coaxial body to match the impedance of the test signal with the target impedance;

[0028] Connect the coaxial body to the signal solder ball model according to a preset contact area.

[0029] In an alternative embodiment, the method provided in the first aspect of the present application further includes: creating a simulation signal source;

[0030] Applying the test signal to the target ball grid array model includes:

[0031] Controlling the simulation signal source to apply the test signal to the target ball grid array model.

[0032] In a second aspect, the present application provides a ball grid array simulation analysis device, including:

[0033] A first modeling unit for creating an initial ball grid array model, where the initial ball grid array model includes a solder ball model and a via model and a signal return plane respectively connected to the solder ball model;

[0034] A first testing unit for applying a test signal to the initial ball grid array model and obtaining a first impedance test result of the initial ball grid array model in a target liquid cooling environment;

[0035] A second modeling unit for creating a pad model and connecting the pad model to the initial ball grid array model to obtain a target ball grid array model;

[0036] A second testing unit for applying the test signal to the target ball grid array model and obtaining a second impedance test result of the target ball grid array model in the target liquid cooling environment;

[0037] A correction unit for correcting the target ball grid array model according to the first impedance test result and the second impedance test result.

[0038] In a third aspect, the present application provides an electronic device, including a memory, a processor, and a computer program stored on the memory and executed by the processor. When the processor executes the computer program, the steps of the ball grid array simulation analysis method as described in any one of the first aspects of the present application are implemented.

[0039] In a fourth aspect, the present application provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the steps of the ball grid array simulation analysis method as described in any one of the first aspects of the present application are implemented.

[0040] Based on the above, in the ball grid array simulation analysis method provided by this application, after creating an initial ball grid array model including a solder ball model, a via model, and a signal return plane, a test signal is applied to the initial ball grid array model, and the first impedance test result of the initial ball grid array model in the target liquid cooling environment is obtained. Then, a pad model is created and connected to the initial ball grid array model to obtain a target ball grid array model. A test signal is applied to the target ball grid array model, and the second impedance test result of the target ball grid array model in the target liquid cooling environment is obtained. Finally, the target ball grid array model is corrected according to the first impedance test result and the second impedance test result. Through this method, the operating performance of the ball grid array in the liquid cooling environment can be simulated and analyzed, and the ball grid array model can be corrected through the simulation analysis result, so as to ensure that the BGA can meet the performance requirements in the liquid cooling operating environment.

[0041] Furthermore, the initial ball grid array model provided by this method only includes solder balls and vias. Through the simulation analysis of the initial ball grid array model, the impedance information of the ideal ball grid array in the target liquid cooling environment can be obtained. Correspondingly, compared with the initial ball grid array, the target ball grid array model created by this method adds a pad model to restore the actual BGA structure. Through the analysis of the test results of the two models, the influence of the pad structure on the operating performance of the BGA can be intuitively determined, providing a reference basis for adjusting the pad structure. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings required for the description of the embodiments or the prior art. Obviously, the drawings in the following description are some embodiments of the present invention. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0043] Figure 1 is a schematic flowchart of a ball grid array simulation analysis method provided by this application.

[0044] Figure 2 is a schematic structural diagram of the initial ball grid array model provided by this application.

[0045] Figure 3 is a schematic structural diagram of the target ball grid array model provided by this application.

[0046] Figure 4 is a schematic diagram of the effect of correcting the pad model according to the ball grid array simulation analysis method provided by this application.

[0047] Figure 5This is a structural diagram of a ball grid array model simulation and analysis device provided by this application.

[0048] Figure 6 This is a structural diagram of an electronic device provided by this application. DETAILED DESCRIPTION

[0049] The following will be combined with the drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0050] As previously mentioned, existing technology focuses on improving the thermal efficiency of immersion liquid cooling. However, analysis of the operational performance of BGAs directly exposed to liquid cooling environments in servers is lacking, making it difficult to effectively assess the impact of BGA operation in liquid cooling environments on server system signal integrity. Therefore, simulating and analyzing the operational performance of BGAs in liquid cooling environments has become a pressing issue for those skilled in the art.

[0051] To solve the above technical problems, the present application provides a ball grid array simulation and analysis method, which creates an initial ball grid array model and obtains a first impedance test result of the initial ball grid array model under a target liquid cooling environment, and creates a target ball grid array model and obtains a second impedance test result of the target ball grid array model under the target liquid cooling environment. The target ball grid array model is corrected according to the first impedance test result and the second impedance test result, thereby realizing simulation analysis of the operating performance of the ball grid array under the liquid cooling environment, and correcting the ball grid array model based on the simulation analysis results, thereby ensuring that the BGA can meet the performance requirements in the liquid cooling operating environment.

[0052] The ball grid array simulation and analysis method provided in this application is applied to electronic devices, which can be a local server, a laptop computer, a PC (personal computer), or other electronic devices that can run software programs and thus execute the solder ball simulation and analysis method provided in this application. Of course, in some cases, it can also be a server on the network side.

[0053] See also Figure 1 The ball grid array simulation analysis method provided in this application includes the following steps:

[0054] S100. Create an initial ball grid array model.

[0055] In practical applications, a BGA includes solder pads, vias, and metal lines for connecting the solder pads and vias. In addition, the structure directly related to the operating performance of the BGA also includes solder balls. According to different specific functions, the solder balls can be further divided into signal solder balls and reflow solder balls, which cooperate to provide a complete reflow path for the signals transmitted by the chip. Correspondingly, based on the classification of the solder balls, the solder pads can be further divided into signal solder pads and reflow solder pads. Among them, the solder pad connected to the signal solder ball is the signal solder pad, and the solder pad connected to the reflow solder ball is the reflow solder pad. Of course, other related structures may also be included in the BGA, which can be specifically implemented according to relevant technologies and will not be elaborated here one by one.

[0056] Considering that the BGA structure is relatively complex, the simulation analysis method provided in this application splits the complete BGA, creates an initial ball grid array model containing only part of the structure and a target ball grid array model containing the complete structure, and simulates the two models respectively to obtain the corresponding impedance test results. Finally, the ball grid array is corrected based on the obtained impedance test results.

[0057] Based on the above core idea, this step first creates an initial ball grid array model containing part of the structure. Specifically, the initial ball grid array model provided in this embodiment includes a solder ball model, a via model, and a signal reflow plane respectively connected to the solder ball model. Based on the foregoing content, it can be known that the initial ball grid array model provided in this application mainly excludes the solder pad structure, aiming to analyze the performance parameters of the ball grid array in an ideal situation without setting the solder pad structure.

[0058] In an alternative embodiment, the BGA is designed based on the BGA layout information in the chip design process. The BGA layout information includes the design information of each component structure of the BGA, such as the outer dimension, layout position, and connection relationship. Based on this, a signal solder ball model, a reflow solder ball model, and a via model can be created according to the BGA layout information.

[0059] Specifically, as mentioned above, the signal solder ball and the reflow solder ball only have differences in specific functions and do not have obvious differences in the outer shape structure. Therefore, a signal solder ball model and a reflow solder ball model can be created based on the design information related to the solder balls recorded in the BGA layout information. In practical applications, the design information related to the solder balls includes the maximum center distance of the solder balls and the height after soldering. Of course, other information related to creating the solder ball model may also be included, which will not be elaborated here one by one. Without exceeding the core idea of this application, it also belongs to the scope protected by this application. As for the creation of the via model, it can also be completed according to the relevant information recorded in the BGA layout information and will not be elaborated here.

[0060] After the creation of the solder ball model and the via model is completed, the first contact surface of the signal solder ball model can be connected to the via model according to the BGA layout information and the actual connection relationship of the BGA in the chip.

[0061] It should be noted that in the related art, when performing simulation analysis on the BGA, the simulation signal port for outputting the test signal is usually directly connected to the signal solder ball model. This simulation method is likely to introduce interference between the solder ball model and the simulation signal port, thereby affecting the accuracy of the simulation results. To solve this problem, the present application provides a preferred implementation manner, that is, creating a coaxial body, connecting the simulation signal port and the signal solder ball model through the coaxial body, that is, one end of the coaxial body is connected to the simulation signal port, and the other end is connected to the signal solder ball model. It should be emphasized that the coaxial body provided by the present application is used to realize the signal transmission between the simulation signal port and the signal solder ball model, and the equivalent dielectric constant of the coaxial body is adjustable to meet the transmission requirements of different test signals.

[0062] It can be understood that in the actual structure of the BGA, there is no coaxial body. As mentioned above, the purpose of setting the coaxial body in the present application is to eliminate the interference signal that may be introduced by directly connecting the simulation signal port and the signal solder ball model. Therefore, it is necessary to further configure the coaxial body to achieve the above purpose. Before performing the simulation analysis, the test signal to be used has been determined. Based on this, the signal transmission rate and the preset target impedance corresponding to the test signal can be determined. For example, for the PCIe5.0 signal, its signal transmission rate is 32 Gbps, and the preset target impedance is 85 Ω. By configuring the equivalent dielectric constant of the coaxial body, the impedance of the coaxial body can be changed until the impedance of the coaxial body matches the target impedance of the test signal, that is, the deviation from the target impedance of the test signal is within the preset impedance deviation range (the ideal situation is that the two are the same). The coaxial body provided by the present application is also an ideal conductor. By configuring the preset contact area and adjusting the equivalent dielectric constant, the energy loss generated during the transmission of the test signal on the coaxial body can be excluded, and the influence of the introduction of the coaxial body on the simulation results of the solder ball model can be avoided.

[0063] As can be seen from the subsequent content, in this application, it may be necessary to correct the size of the solder ball model according to the simulation analysis results. To ensure the accuracy of the analysis results, it is required that the size of the contact surface between the coaxial body and the signal solder ball model remains unchanged. Therefore, before connecting the coaxial body to the signal solder ball model, a preset contact area between the coaxial body and the signal solder ball model is configured, and the second contact surface of the coaxial body and the signal solder ball model is connected according to the preset contact area. It can be understood that the area of the second contact surface is the aforementioned preset contact area. Correspondingly, when adjusting the size of the signal solder ball model subsequently, the preset contact area remains unchanged. The specific value of the preset contact area can be determined by combining factors such as the impedance requirements of the test signal, the adjustment range of the equivalent node constant of the coaxial body, and the design dimensions of the signal solder ball model and the coaxial body. Any value that can meet the test requirements is optional and, without exceeding the core idea of this application, also falls within the scope of protection of this application. As for the length of the coaxial body, it can be determined according to the wavelength of the test signal and other factors, such as the distance between differential signal lines, which will not be elaborated here.

[0064] In the simulation analysis method provided by this application, the signal return plane is mainly used to cooperate with the signal simulation port to provide a complete signal transmission path for the test signal. Similar to the aforementioned coaxial body, the signal return plane provided by this application is an ideal conductor, and no loss will occur when the test signal is transmitted in it, and the signal return plane will not introduce any impurity signals.

[0065] The composition structure of the BGA also includes reflow solder balls. It can be understood that any signal corresponds to a reference ground, and a corresponding signal transmission loop is required to complete the transmission. This is exactly the role of the reflow solder balls, that is, to provide a reference ground and cooperate with the signal solder balls to form a signal transmission loop.

[0066] According to the above content, the signal return plane can be created based on the reflow solder ball model, that is, the signal return plane is connected to the reflow solder ball model, so as to realize the functions of providing a reference ground and a signal return path through the reflow solder ball model.

[0067] Based on the layout information of the BGA, it can be seen that there is no fixed rule for the layout of the reflow solder balls and the signal solder balls. Therefore, for any signal solder ball, it may be necessary to cooperate with a reflow solder ball at a relatively far distance to complete signal transmission. If a signal return plane is created according to the actual layout of the signal solder balls and the reflow solder balls, it may lead to an overly complex model structure and have no positive impact on the simulation results. Based on this, in the simulation analysis method provided in this application, when creating any of the aforementioned signal return planes, first, according to the layout information of the BGA structure, it is determined whether there are reflow solder balls within a preset range centered on the signal solder ball. If there are reflow solder balls within the preset range, a reflow solder ball model corresponding to the reflow solder balls is created according to the BGA layout information, and a signal return plane is created based on the reflow solder ball model. On the contrary, if there are no reflow solder balls within the preset range, in order to avoid creating a signal return plane with an overly complex structure and a too long path, a reflow solder ball model is first created within the preset range, and a signal return plane is created based on the newly created reflow solder ball model, so as to better achieve the test signal transmission. As for the size of the preset range, factors such as the layout information of the BGA and the complexity of the model can be considered. This application does not limit the specific setting of the preset range.

[0068] So far, all the creation work of the initial ball grid array model has been completed. The obtained initial ball grid array model can be seen in Figure 2 As shown, the coaxial body is connected to the second contact surface of the signal solder ball model. The first contact surface of the signal solder ball model is connected to the via hole, and the other end of the via hole is connected to the relevant metal wire in the BGA. In addition, the initial ball grid array model also includes a reflow solder ball model and corresponding via holes, and the aforementioned signal return plane is not shown.

[0069] S110: Apply a test signal to the initial ball grid array model and obtain the first impedance test result of the initial ball grid array model in the target liquid cooling environment.

[0070] After the creation of the initial ball grid array model is completed, a test signal can be applied to the initial ball grid array to perform passive simulation on the initial ball grid array model, and the impedance test result of the initial ball grid array model in the target liquid cooling environment can be obtained to get the first impedance test result.

[0071] In an alternative embodiment, a simulation signal port may be created or called, and the simulation signal port is connected to the coaxial body and the signal return plane to obtain a complete signal transmission path. A test signal is applied to the initial ball grid array model through the simulation signal port to obtain the first impedance test result of the initial ball grid array model in the target liquid cooling environment. During the actual test process, the simulation of different operating environments can be changed by configuring the parameters of the test scenario. In this step, the target liquid cooling operating environment is simulated according to the parameters of the target liquid cooling. The specific process of simulating the target liquid cooling environment can be implemented with reference to the related technology and will not be elaborated here.

[0072] In an alternative embodiment, the first impedance test result can be characterized by a first curve, which records the process of the test impedance of the initial ball grid array model changing with time during the test. For example, the abscissa of the first curve records the test time, and the ordinate represents the test impedance corresponding to each test time. It can be understood that through the first curve, the trend of the test impedance of the initial ball grid array model changing with the test time can be seen. At the same time, the maximum and minimum values of the test impedance of the initial ball grid array model during the entire test cycle can also be obtained.

[0073] S120. Create a pad model and connect the pad model to the initial ball grid array model to obtain a target ball grid array model.

[0074] As mentioned above, the complete BGA structure includes pads. Based on the connection relationship between the pads and the solder balls and the functions of the pads, the pads can be divided into signal pads and return pads. Based on this, in this step, a signal pad model and a return pad model need to be created respectively.

[0075] Furthermore, based on the connection relationship between the pads and the solder balls recorded in the BGA layout information, the obtained signal pad model and return pad model are respectively connected to the initial ball grid array model to obtain a target ball grid array model that is consistent with the actual BGA structure.

[0076] See Figure 3 As shown, compared with Figure 2 the provided initial ball grid array model, Figure 3 the target ball grid array model shown also includes the newly added signal pad model and return pad model.

[0077] S130. Apply a test signal to the target ball grid array model and obtain the second impedance test result of the target ball grid array model in the target liquid cooling environment.

[0078] Referring to the process of obtaining the foregoing first impedance test result, apply a test signal to the target ball grid array model, perform a passive test on the target ball grid array model, and obtain the impedance test result of the target ball grid array model in the target liquid cooling environment as the second impedance test result.

[0079] Referring to the foregoing first impedance test result, the second impedance test result obtained in this step can be characterized by a second curve, which records the process of the test impedance of the target ball grid array model changing with time during the test. For example, the abscissa of the second curve records the test time, and the ordinate represents the test impedance corresponding to each test time. It can be understood that through the second curve, the trend of the test impedance of the target ball grid array model changing with the test time can be seen. At the same time, the maximum and minimum values of the test impedance of the target ball grid array model during the entire test period can also be obtained.

[0080] S140. Modify the target ball grid array model according to the first impedance test result and the second impedance test result.

[0081] When determining the test signal, the target impedance of the test signal can be determined. Therefore, the target impedance corresponding to the test signal can be used as the preset target impedance. After determining the first impedance test result and the second impedance test result, the impedance deviation ranges of the first impedance test result and the second impedance test result relative to the preset target impedance can be determined respectively.

[0082] Taking the first impedance test result as an example, it records the maximum and minimum values of the test impedance of the initial ball grid array model in the target liquid cooling environment. Based on the obtained maximum and minimum values and the preset target impedance, the impedance deviation range of the initial ball grid array model in the target liquid cooling environment compared with the preset target impedance can be determined as the first impedance deviation range. Correspondingly, the impedance deviation range of the target ball grid array model in the target liquid cooling environment compared with the preset target impedance can also be obtained as the second impedance deviation range.

[0083] Furthermore, the target ball grid array model can be modified based on the first impedance deviation range and the second impedance deviation range.

[0084] Specifically, if the first impedance deviation range is within the preset impedance deviation range and the second impedance deviation range is within the first impedance deviation range, it indicates that the influence of the solder pad on the ball grid array is small. Even after adding the solder pad, the impedance performance of the ball grid array in the target liquid cooling environment can be optimized. Based on this, it can be determined that the ball grid array corresponding to the target ball grid array model is allowed to operate in the target liquid cooling environment, and there is no need to optimize the structure of the ball grid array anymore.

[0085] On the contrary, if the first impedance deviation range is not within the preset impedance deviation range, it indicates that even in the ideal case where no pads are set, the ball grid array is difficult to meet the performance requirements for operation in the target liquid cooling environment. Or, if the second impedance deviation range is not within the first impedance deviation range (regardless of whether the first impedance deviation range is within the preset impedance deviation range), it indicates that the pads have a significant impact on the operation of the ball grid array in the target liquid cooling environment, and in the case of setting pads, the ball grid array cannot meet the performance requirements for operation in the target liquid cooling environment. At this time, it is necessary to optimize the BGA structure.

[0086] As can be seen from the foregoing analysis process, whether the first impedance deviation range is within the preset impedance deviation range has a great impact on the subsequent analysis process. Therefore, as a preferred implementation, it is first necessary to determine whether the first impedance deviation range is within the preset impedance deviation range. If the first impedance deviation range is within the preset impedance deviation range, the subsequent judgment of the relationship between the second impedance deviation range and the first impedance deviation range can be carried out. If the first impedance deviation range is not within the preset impedance deviation range, the judgment of the relationship between the second impedance deviation range and the first impedance deviation range can be omitted, and the target ball grid array model can be directly optimized and adjusted.

[0087] As for the specific setting of the foregoing preset impedance deviation range, it can be determined in combination with the specific requirements for BGA performance and the impedance parameter requirements of the test signal during transmission. This application does not make specific limitations on this.

[0088] When optimizing the structure of the target ball grid array model, the structure of at least one of the solder ball model and the pad model can be adjusted. In some application scenarios, it is required that the size of the solder ball remains unchanged. In this case, since the solder ball model cannot be adjusted, only the pad model can be optimized.

[0089] Specifically, when adjusting the solder ball model, mainly the external dimensions of the solder ball model are adjusted, such as the diameter, the height after soldering, etc. Of course, other aspects such as the layout position can also be adjusted according to actual needs, which will not be elaborated here one by one. As for the optimization of the pad model, it is mainly based on impedance compensation, and directly changing the pad structure is avoided. In actual applications, compared with air, the equivalent dielectric constant of the cold liquid is larger, resulting in a decrease in the equivalent impedance when the signal flows through the pad in the target liquid cooling environment. Therefore, impedance compensation can be carried out by hollowing out the insulating layer under the signal pad and adjacent to the signal pad. Based on this, combined with Figure 4 as shown, an insulating layer adjacent to the signal pad model can be created according to the layout information of the target ball grid array, and a hollowed-out area can be set in the insulating layer. Specifically, with the center of the signal pad model as the origin, the insulating layer is hollowed out according to a preset radius. By adjusting the size of the preset radius, different hollowed-out areas can be created, thereby achieving different degrees of impedance compensation.

[0090] It can be understood that after optimizing the target ball grid array model, the foregoing simulation test process can be executed again, which will not be repeated here.

[0091] In summary, this method creates an initial ball grid array model and obtains the first impedance test result of the initial ball grid array model in the target liquid cooling environment, and creates a target ball grid array model, and obtains the second impedance test result of the target ball grid array model in the target liquid cooling environment. The target ball grid array model is corrected according to the first impedance test result and the second impedance test result, so as to realize the simulation analysis of the operating performance of the ball grid array in the liquid cooling environment, and correct the ball grid array model through the simulation analysis result, so as to ensure that the BGA can meet the performance requirements in the liquid cooling operating environment.

[0092] Furthermore, the initial ball grid array model provided by this method only includes solder balls and vias. Through the simulation analysis of the initial ball grid array model, the impedance information of the ideal ball grid array in the target liquid cooling environment can be obtained. Correspondingly, compared with the initial ball grid array, the target ball grid array model created by this method adds a pad model to restore the actual BGA structure. By analyzing the test results of the two models, the influence of the pad structure on the operating performance of the BGA can be intuitively determined, so as to provide a reference basis for adjusting the pad structure.

[0093] It can be understood that the simulation analysis method provided in the foregoing embodiment mainly performs passive simulation analysis on the ball grid array. In order to obtain more and more accurate test results, active simulation analysis can also be performed.

[0094] As an alternative implementation, after creating the initial ball grid array model, a simulation signal source can be created, and the simulation signal source can be controlled to provide a test signal. The simulation analysis method provided in this embodiment aims to perform active simulation on the simulation model constructed in the foregoing embodiment. Therefore, a simulation signal source is created in this step, and the simulation signal source can output a test signal. After creating the simulation signal source, the obtained simulation signal source is connected to the simulation signal port. As for the specific creation process of the simulation signal source, it can be realized based on related technologies, and this application does not make specific limitations.

[0095] Furthermore, it can be in accordance with Figure 1 the relevant steps of the embodiment shown, first apply a test signal to the initial ball grid array model to obtain the corresponding first impedance test result. Further, apply a test signal to the target ball grid array model and obtain the corresponding second impedance test result. After obtaining the first impedance test result and the second impedance test result, the target ball grid array model can be corrected according to Figure 1 the relevant content of the embodiment shown, which will not be repeated here.

[0096] In summary, the ball grid array simulation analysis method provided in this embodiment can perform active analysis on the ball grid array model. Compared with the passive analysis performed in the foregoing embodiments, the obtained analysis results are more accurate, and various parameters can be tested, so as to more comprehensively analyze the performance of the ball grid array in different operating environments, and can provide a more reliable reference basis for the correction of the ball grid array.

[0097] Next, the ball grid array simulation analysis device provided by the present invention will be introduced. The ball grid array simulation analysis device provided by the present invention belongs to the same inventive concept as the ball grid array simulation analysis method provided in the embodiments of the present application, and can execute the ball grid array simulation analysis method provided in any embodiment of the present application, and has corresponding functional modules and beneficial effects for executing the ball grid array simulation analysis method. For technical details not described in detail in this embodiment, reference can be made to the ball grid array simulation analysis method provided in the embodiments of the present application, which will not be elaborated here.

[0098] See Figure 5 , the ball grid array analysis device provided by the present application includes the following units:

[0099] The first modeling unit 10 is used to create a ball grid array model, and the ball grid array model includes a solder ball model and a via model and a signal return plane respectively connected to the solder ball model;

[0100] The first testing unit 20 is used to apply a test signal to the ball grid array model and obtain the first impedance test result of the ball grid array model in the target liquid cooling environment;

[0101] The second modeling unit 30 is used to create a pad model and connect the pad model to the ball grid array model to obtain a target ball grid array model;

[0102] The second testing unit 40 is used to apply the test signal to the target ball grid array model and obtain the second impedance test result of the target ball grid array model in the target liquid cooling environment;

[0103] The correction unit 50 is used to correct the target ball grid array model according to the first impedance test result and the second impedance test result.

[0104] Next, with reference to Figure 6 to describe the electronic device provided by the embodiments of the present invention. The electronic device provided in this embodiment may include: at least one processor 100, at least one communication interface 200, at least one memory 300, and at least one communication bus 400;

[0105] In an embodiment of the present invention, the number of the processor 100, the communication interface 200, the memory 300, and the communication bus 400 is at least one, and the processor 100, the communication interface 200, and the memory 300 complete communication with each other through the communication bus 400; obviously, Figure 6 The communication connection diagram of the processor 100, the communication interface 200, the memory 300, and the communication bus 400 shown is only optional;

[0106] Optionally, the communication interface 200 may be an interface of a communication module, such as an interface of a GSM module; the processor 100 may be a central processing unit CPU, or a specific integrated circuit ASIC (Application Specific Integrated Circuit), or one or more integrated circuits configured to implement the embodiments of the present invention.

[0107] The memory 300 may include a high-speed RAM memory, and may also include a non-volatile memory, such as at least one disk memory.

[0108] Among them, the processor 100 is specifically configured to execute an application program in the memory to implement the steps of the ball grid array simulation analysis method described above.

[0109] In some embodiments, the present embodiment further provides a computer-readable storage medium, such as a floppy disk, an optical disk, a hard disk, a flash memory, a USB flash drive, an SD (Secure Digital Memory Card) card, an MMC (Multimedia Card) card, etc. One or more instructions for implementing the above steps are stored in the computer-readable storage medium. When the one or more instructions are executed by one or more processors, the processor executes the ball grid array simulation analysis method described above. For the relevant specific implementation, please refer to the foregoing description and will not be elaborated here.

[0110] In addition to the above methods and devices, an embodiment of the present application may also be a computer program product, which includes computer program instructions that cause the processor to execute the steps in the ball grid array simulation analysis method according to various embodiments of the present application described in the above content of this specification when the computer program instructions are run by the processor.

[0111] A computer program product may be written in any combination of one or more programming languages to write program code for performing the operations of the embodiments of the present application. The programming languages include object-oriented programming languages such as Java, C++, etc., and also include conventional procedural programming languages such as the "C" language or similar programming languages. The program code may be executed entirely on the user's computing device, partially on the user's device, executed as a stand-alone software package, partially on the user's computing device and partially on a remote computing device, or entirely on a remote computing device or server.

[0112] Those skilled in the art can understand that the content disclosed in the present disclosure can have various variations and improvements. For example, the various devices or components described above can be implemented by hardware, or can be implemented by software, firmware, or some or all of the combinations of the three.

[0113] In addition, although the present disclosure makes various references to certain units in the systems according to the embodiments of the present disclosure, however, any number of different units can be used and run on the client and / or server. The units are only illustrative, and different aspects of the system and method can use different units.

[0114] Flowcharts are used in the present disclosure to illustrate the steps of the methods according to the embodiments of the present disclosure. It should be understood that the preceding or following steps do not necessarily need to be carried out precisely in sequence. On the contrary, they can be carried out in reverse order or various steps can be processed simultaneously. At the same time, other operations can also be added to these processes.

[0115] Those of ordinary skill in the art can understand that all or part of the steps in the above methods can be completed by instructing relevant hardware through a computer program, and the program can be stored in a computer-readable storage medium such as a read-only memory, etc. Optionally, all or part of the steps of the above embodiments can also be implemented using one or more integrated circuits. Accordingly, the various modules / units in the above embodiments can be implemented in the form of hardware or in the form of software function modules. The present disclosure is not limited to any specific form of combination of hardware and software.

[0116] Unless otherwise defined, all terms used herein have the same meaning as commonly understood by those of ordinary skill in the art to which the present disclosure belongs. It should also be understood that terms such as those defined in a general dictionary should be interpreted as having a meaning consistent with their meaning in the context of the relevant art, and should not be interpreted in an idealized or overly formal sense unless explicitly defined as such herein.

[0117] The foregoing is a description of the present disclosure and should not be construed as limiting thereof. Although several exemplary embodiments of the present disclosure have been described, those skilled in the art will readily appreciate that many modifications can be made to the exemplary embodiments without departing from the novel teachings and advantages of the present disclosure. Accordingly, all such modifications are intended to be included within the scope of the present disclosure as defined by the claims. It should be understood that the foregoing is a description of the present disclosure and should not be considered limited to the specific embodiments disclosed, and modifications to the disclosed embodiments as well as other embodiments are intended to be included within the scope of the appended claims. The present disclosure is defined by the claims and their equivalents.

Claims

1. A ball grid array simulation analysis method, characterized in that Including: Create an initial ball grid array model, where the initial ball grid array model includes solder ball models and via models and signal return planes respectively connected to the solder ball models, and does not include pad structures; Apply a test signal to the initial ball grid array model, and obtain a first impedance test result of the initial ball grid array model in a target liquid cooling environment; Create a pad model, and connect the pad model to the initial ball grid array model to obtain a target ball grid array model; Apply the test signal to the target ball grid array model, and obtain a second impedance test result of the target ball grid array model in the target liquid cooling environment; Modify the target ball grid array model according to the first impedance test result and the second impedance test result.

2. The method according to claim 1, wherein Modifying the target ball grid array model according to the first impedance test result and the second impedance test result includes: Determine impedance deviation ranges of the first impedance test result and the second impedance test result relative to a preset target impedance respectively; Modify the target ball grid array model based on each of the impedance deviation ranges.

3. The method according to claim 2, wherein The impedance deviation ranges include a first impedance deviation range corresponding to the first impedance test result and a second impedance deviation range corresponding to the second impedance test result; Modifying the target ball grid array model based on each of the impedance deviation ranges includes: If the first impedance deviation range is within a preset impedance deviation range and the second impedance deviation range is within the first impedance deviation range, determine that the ball grid array corresponding to the target ball grid array model is allowed to operate in the target liquid cooling environment; If the first impedance deviation range is not within the preset impedance deviation range, or the second impedance deviation range is not within the first impedance deviation range, adjust the structure of at least one of the solder ball model and the pad model.

4. The method according to claim 3, characterized in that, The pad model includes a signal pad and a return pad; Adjusting the structure of the pad model includes: Create an insulating layer adjacent to the signal pad according to the layout information of the target ball grid array; Set a hollow area in the insulating layer.

5. The method according to claim 1, wherein The creating the initial ball grid array model includes: Create a signal solder ball model, a return solder ball model, and a via model according to the layout information of the target ball grid array; Connect a first contact surface of the signal solder ball model to the via model; Create a signal return plane and connect the signal return plane to the return solder ball model.

6. The method according to claim 5, characterized in that, The method further includes: Create a coaxial body and adjust the equivalent dielectric constant of the coaxial body so that the impedance of the coaxial body matches the target impedance of the test signal; Connect the coaxial body to the signal solder ball model according to a preset contact area.

7. The method according to any one of claims 1 to 6, characterized in that, Further including: Create a simulation signal source; Applying the test signal to the target ball grid array model includes: Controlling the simulation signal source to apply the test signal to the target ball grid array model.

8. A ball grid array simulation analysis device, characterized in that, Including: A first modeling unit for creating an initial ball grid array model, where the initial ball grid array model includes solder ball models and via models and signal return planes respectively connected to the solder ball models, and does not include pad structures; A first testing unit, configured to apply a test signal to the initial ball grid array model and obtain a first impedance test result of the initial ball grid array model in a target liquid cooling environment; A second modeling unit, configured to create a pad model and connect the pad model to the initial ball grid array model to obtain a target ball grid array model; A second testing unit, configured to apply the test signal to the target ball grid array model and obtain a second impedance test result of the target ball grid array model in the target liquid cooling environment; A correction unit, configured to correct the target ball grid array model according to the first impedance test result and the second impedance test result.

9. An electronic device, comprising a memory, a processor, and a computer program stored on the memory and executed by the processor, wherein, When the processor executes the computer program, the steps of the ball grid array simulation analysis method according to any one of claims 1 to 7 are implemented.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, the steps of the ball grid array simulation analysis method according to any one of claims 1 to 7 are implemented.

Citation Information

Patent Citations

  • Thermal stress simulation method for ball grid array packaging chip

    CN117313645A

  • Chip carrier having variably-sized pads

    US20170170108A1