Shallow trench isolation filling method

Abstract

The invention provides a filling method for shallow trench isolation, and the method comprises the steps: adding an etching technology between two times of HDP-CVD filling of a shallow trench, and reasonably setting the plasma bombardment power of the two times of filling to reduce the height-width ratio of the shallow trench, thereby reducing the probability that a gap is generated in a sealing opening due to the too fast filling of a side wall in the filling process of the shallow trench, and improving the sealing performance of the shallow trench. The process cost is reduced while the leakage current is reduced, and the performance and the yield of the device are improved while the buffer oxide layer is arranged to protect the substrate from being damaged by the high-energy plasma.

Description

Technical Field

[0001] The present invention relates to semiconductor manufacturing processes, and more particularly to a method for filling shallow trench isolation. Background Art

[0002] Shallow trench isolation (STI) is used for isolation between CMOS devices, that is, a trench with a very large aspect ratio is formed between different device active areas (AAs) and filled to form a SiO 2 insulating layer for isolation. The difficulty of this process lies in having both complete filling and a perfect SiO 2 / Si interface. A liner oxide layer with a thickness of about 50 - 100 Å can be grown on the Si surface by thermal oxidation or ISSG before SiO 2 filling to obtain a relatively good SiO 2 / Si interface. However, as the thickness of the liner oxide layer increases and as the process nodes progress downward, the process window for SiO 2 filling becomes smaller and smaller.

[0003] When the process nodes reach 180 nm, traditional CVD filling cannot meet the filling capacity, and HDP (high density plasma) is used to improve the filling capacity, that is, high-energy plasma is used for bombardment during deposition, which can avoid premature sealing of the trench and thus improve the filling capacity. When the process nodes continue to develop to 55 nm, the aspect ratio continues to increase, and traditional HDP processes can no longer meet the requirements, and high aspect ratio processes (HARP) are widely used to meet the filling requirements. However, due to the relatively high aspect ratio, the HARP process has very strict requirements for the filling side profile. If the side profile is not good, voids in the thin film filling are almost inevitable in some special structures, which will seriously restrict the performance of the final device.

[0004] The bottleneck of HDP filling is that on the one hand, to achieve relatively complete and dense filling, the energy of the plasma needs to be continuously increased; on the other hand, increasing the plasma energy will damage the Si / SiO2 interface, resulting in an exponential increase in the leakage current of the active area. Therefore, there is an urgent need for a method that can reduce the leakage current and uses HDP-CVD to fill shallow trenches. Summary of the Invention

[0005] Based on the above considerations, the present invention optimizes the HDP-CVD process to achieve shallow trench isolation filling with high density and a relatively small leakage current in the active area at a critical dimension of 55 nm, reducing the process cost and also reducing the generation of defects.

[0006] The method for optimizing the HDP-CVD filling of shallow trench isolation specifically includes the following steps: S1: Etch a shallow trench on the substrate; S2: Form a first liner layer on the shallow trench, and deposit a first buffer layer on the first liner layer to protect the substrate; S3: Use high-density plasma enhanced chemical vapor deposition (HDP-CVD) to deposit a first filling layer on the first buffer layer at a first power until the trench is partially filled; S4: Etch the trench to expand the opening of the trench; S5: Use the high-density plasma enhanced chemical vapor deposition method to continue depositing in the opening at a second power until the shallow trench is completely filled; the second power is at least 30% higher than the first power.

[0007] Furthermore, the first liner layer and / or the first buffer layer are formed by using the low-pressure radical oxidation (LPRO) method.

[0008] Furthermore, the thickness of the first liner layer is 50 - 150 Å.

[0009] Furthermore, the thickness of the first buffer layer is 200 - 300 Å Furthermore, the substrate is SiO 2 / Si.

[0010] Furthermore, the range of the first power is 2000 - 3000 W, and the range of the second power is 3000 - 4500 W.

[0011] Furthermore, the opening in step S4 presents a shape that is wider at the top and narrower at the bottom.

[0012] Furthermore, the material of the first liner layer is LPRO SiO 2 , where the reaction source is the substrate Si and O 2 / H 2 reaction gas, the reaction temperature is 800 - 1000 °C, and the H 2 flow ratio is 10 - 30%.

[0013] Furthermore, the material of the first buffer layer is silicon-rich oxide (SiliconRichOxide, SRO), and the same reaction source as the subsequent filling process is used: SiH 4 / O 2 / H 2A mixed gas, wherein the total flow rate of the reaction gas is reduced from 200% of the filling gas flow rate to the same as the filling gas within 3 - 5 s, so as to rapidly grow a buffer oxide layer on the surface of the liner layer, thereby improving the density of the buffer layer growth.

[0014] The filling method for shallow trench isolation provided by the present invention has the following beneficial effects: by adding an etching process between two HDP-CVDs of the shallow trench and reasonably setting the power of the two HDP-CVDs, setting the power of the second HDP-CVD to be at least 30% higher than the first one to reduce its aspect ratio, thereby reducing the probability of voids generated due to too fast sidewall filling and sealing in the subsequent filling process, improving the filling density while reducing the cost; and a buffer layer is provided above the liner layer to avoid damage to the substrate by high-energy plasma in the process, improving the performance and yield of the device. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Other features, objects, and advantages of the present invention will become more apparent by reading the following detailed description of non-limiting embodiments with reference to the accompanying drawings.

[0016] Figure 1 Shown as a SEM comparison diagram of the filling effects of the prior art and the present invention; Figure 2 Shown as a comparison diagram of the active region leakage current data of the devices prepared by the prior art and the present invention; Figure 3 Shown as the process flow chart of the embodiment of the present invention; EMBODIMENTS

[0017] Many specific details are set forth in the following description in order to provide a thorough understanding of the present invention. However, the present invention can be implemented in many other ways different from those described herein, and those skilled in the art can make similar generalizations without departing from the spirit of the present invention. Therefore, the present invention is not limited by the specific embodiments disclosed below.

[0018] Secondly, the present invention is described in detail using schematic diagrams. When detailing the embodiments of the present invention, for the sake of illustration, the schematic diagrams are only examples and should not limit the scope of protection of the present invention here. EXAMPLE

[0019] As Figure 3 shown, a pre-prepared substrate stack (pre-filmstack) is provided, and a liner oxide layer (LinerOX) is formed on the active region (AA) having a shallow trench. The liner oxide layer covers the bottom and sidewalls of the trench. The liner layer is silicon oxide and is prepared by a low-pressure radical oxidation (LPRO) process, wherein the reaction source of the LPRO process is the substrate Si and O 2 / H2 , reactive gas, reaction temperature 800 - 1000 °C, H 2 flow ratio 10 - 30%. The thickness of the liner oxide layer is 50 Å.

[0020] Then continue to use the LPRO process to form a buffer oxide layer (BufferOX) on the active region, the bottom, and the sidewalls of the trench. The buffer oxide layer can protect the substrate from being damaged by high-energy plasma. The material of the buffer layer is silicon-rich oxide (SRO), using the same mixed gas as the filling gas: SiH 4 / O 2 / H 2 as the reaction source. The total flow rate of the reaction source is reduced from 200% of the filling gas flow rate to the same as the filling gas flow rate within 3 - 5 s, so as to quickly grow a thinner oxide layer on the surface of the liner layer at the beginning of growth, and then improve the density of the buffer layer growth. The thickness of the buffer oxide layer is 150 Å.

[0021] The materials of the liner oxide layer and the buffer oxide layer can be the same or different.

[0022] Then use the HDP - CVD process to deposit the first filling layer on the surface of the active region, the bottom, and the sidewalls of the trench. The first power used for HDP is 2000 w. Before it is completely filled, stop the HDP - CVD step and use the etching process until the opening in the trench is opened. At this time, the shape of the shallow trench is generally an inverted trapezoid with a wider top and a narrower bottom, so the aspect ratio of the shallow trench filled with the remaining filler is correspondingly reduced a lot. Finally, continue to use the second HDP - CVD process for deposition until the shallow trench is completely filled. The power used for the second HDP - CVD is 3000 W. The power of the second HDP - CVD is 50% higher than that of the first HDP - CVD. Finally, use the chemical mechanical polishing process to remove the filler above the active region.

[0023] Example 2: Form a liner oxide layer (LinerOX) on the active region (AA) with shallow trenches. The liner oxide layer covers the bottom and the sidewalls of the trench. Use the low - pressure radical oxidation (LPRO) process to form this liner oxide layer. The material of the liner oxide layer is SiO 2, the thickness of the pad oxide layer is 100 Å; then continue to use the LPRO process to form a buffer oxide layer (BufferOX) on the active region, the bottom and sidewalls of the trench, and the thickness of the buffer oxide layer is 300 Å. The buffer oxide layer can protect the substrate from being damaged by high-energy plasma; then use the first HDP-CVD process to deposit the first filling layer on the surface of the active region, the bottom and sidewalls of the trench. The first power used in HDP is 3000w. When the filling is not yet complete, stop the first HDP-CVD step and use the etching process until the opening in the trench is opened. At this time, the shape of the shallow trench is generally an inverted trapezoid with a wider top and a narrower bottom, so the aspect ratio of the shallow trench filled with the remaining filler is correspondingly reduced a lot. Finally, continue to use the second HDP-CVD process for deposition until the shallow trench is completely filled, and the power used in the second HDP-CVD is 3900W. The power of the second HDP-CVD is 30% higher than that of the first HDP-CVD. Finally, use the chemical mechanical polishing process to remove the filler above the active region.

[0024] As Figure 1 and Figure 2 shown, the leakage current of the device prepared by using the filling method of the present invention is much lower than that of the device prepared by using the existing technology of etching plus HDP-CVD; it can be seen from the comparison SEM images that the trenches prepared by using the present invention do not have the shallow trench void defect (VoidDefect) in the prior art.

[0025] In summary, since the present invention proposes a method for filling shallow trench isolation, by adding an etching process between the two fillings of the STI and reasonably setting the plasma bombardment power of the two fillings to reduce its aspect ratio, thereby reducing the probability of voids generated due to the too-fast filling of the sidewalls during the STI filling process, reducing the leakage current while reducing the process cost, protecting the substrate from being damaged by high-energy plasma while improving the performance and yield of the device.

[0026] The specific embodiments of the present invention have been described in detail above, but they are only examples, and the present invention is not limited to the specific embodiments described above. For those skilled in the art, any equivalent modifications and substitutions to the present invention are also within the scope of the present invention. Therefore, all equivalent transformations and modifications made without departing from the spirit and scope of the present invention should be covered within the scope of the present invention.

Claims

1. A method for filling shallow trench isolation, characterized in that, it includes the following steps: S1: Etch a shallow trench on a substrate; S2: Form a first liner layer on the shallow trench, and deposit a first buffer layer on the first liner layer to protect the substrate; S3: Use high density plasma enhanced chemical vapor deposition (HDP-CVD) to deposit a first filling layer on the first buffer layer at a first power until the trench is partially filled; S4: Etch the trench to expand the opening of the trench; S5: Use the high density plasma enhanced chemical vapor deposition method to continue depositing in the opening at a second power until the shallow trench is completely filled; wherein the second power is at least 30% higher than the first power.

2. The method according to claim 1, characterized in that, the first liner layer and / or the first buffer layer is formed by low pressure radical oxidation (LPRO) method.

3. The method according to claim 1, characterized in that, the thickness of the first liner layer is 50 - 150 Å.

4. The method according to claim 1, characterized in that, the thickness of the first buffer layer is 200 - 300 Å.

5. The method according to claim 1, characterized in that, The substrate is SiO 2 / Si.

6. The method according to claim 1, characterized in that, the range of the first power is 2000 - 3000 W, and the range of the second power is 3000 - 4500 W.

7. The method according to claim 1, characterized in that, the opening in step S4 presents a shape that is wider at the top and narrower at the bottom.

8. The method according to claim 1, characterized in that, The material of the first cushion layer is SiO 2 , where the reaction sources are the substrate Si and the reaction gas O 2 / H 2 , the reaction temperature is 800 - 1000 °C, and the flow ratio of H 2 in the mixed gas is 10 - 30%.

9. The method according to claim 1, wherein the material of the first buffer layer is silicon-rich oxide, and the same reaction source as the filling gas is used: SiH 4 / O 2 / H 2 mixed gas, wherein the total flow rate of the reaction gas is reduced from 200% of the filling gas flow rate to the same as the filling gas within 3 to 5 s, so as to rapidly grow an oxide layer on the surface of the buffer layer, thereby improving the density of the growth of the first buffer layer.

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