Self-diagnosis method and system of passive equalization circuit

Abstract

The invention discloses a self-diagnosis method and system for a passive equalization circuit, and belongs to the technical field of circuit diagnosis. The self-diagnosis circuit is constructed by connecting the equalization state diagnosis resistor between the equalization resistor and the voltage acquisition input end in series. The short-circuit fault of the passive equalization circuit is converted into visual voltage data change, so that the diagnosis process gets rid of a traditional complex detection means, and the short-circuit fault can be quickly and accurately positioned according to a preset voltage proportional relation only by comparing the voltage of a single cell after each equalization is started and disconnected with the voltage before the previous equalization is started. And the diagnosis efficiency and accuracy are greatly improved. The self-diagnosis circuit can collect the voltage of the battery core when the passive equalization circuit does not start equalization, and can collect the voltage after each equalization is started and disconnected, thereby covering different operation states of the circuit, achieving the full-period real-time monitoring of the passive equalization circuit, effectively avoiding and preventing safety accidents, and improving the safety of the passive equalization circuit. The method can be applied to various BMS adopting a passive equalization scheme.

Description

Technical Field

[0001] The present invention belongs to the technical field of circuit diagnosis, and in particular relates to a self-diagnosis method and system for a passive equalization circuit. Background Art

[0002] It has become a major trend for lithium batteries to replace lead-acid batteries as backup power for communication base stations. Compared with lead-acid batteries, lithium batteries have obvious advantages such as high energy density, large discharge and charge rate, and the ability to operate at relatively high temperatures. With the widespread popularization of lithium batteries in recent years, actual battery modules are high-voltage and large-capacity systems composed of single cells connected in parallel and in series. In order to solve the consistency problem between different strings during long-term use, BMS products on the market usually use passive balancing solutions.

[0003] In a lithium-ion battery management system (BMS), inconsistencies between battery cells can affect battery performance and cycle life. However, existing technologies using passive balancing have numerous drawbacks. For one thing, existing passive balancing methods lack diagnostics for the balancing transistor status. If a balancing transistor short-circuit occurs, the BMS cannot detect and issue a timely warning. This can cause the balancing circuit to remain open, leading to long-term over-discharge of the battery cells and irreversible damage, resulting in economic losses and even safety incidents.

[0004] On the other hand, existing solutions for diagnosing the status of balanced transistors, such as the method of implementing detection by adding optocouplers, require an optocoupler to be added to each battery cell, and the receiving end also needs to be configured with a separate IO port, which not only makes the circuit complex but also increases the device cost. Summary of the Invention

[0005] In view of the above problems, the present invention discloses a self-diagnosis method for a passive balancing circuit, comprising: A self-diagnostic circuit is formed by connecting a balancing state diagnostic resistor in series between the balancing resistor of the passive balancing circuit and the voltage acquisition input terminal connected to the positive and negative electrodes of the single battery cell; Use the voltage acquisition input terminal in the self-diagnosis circuit to collect the voltage of each single cell when the passive balancing circuit is not turned on for balancing, and collect the voltage VT1 of the single cell each time the balancing is turned on and off; The current single cell voltage VT1 is compared with the single cell voltage VT0 collected before the last balancing operation. When VT1 and VT0 meet the preset voltage ratio, a short circuit fault is diagnosed in the passive balancing circuit.

[0006] Furthermore, the resistance of the equilibrium state diagnosis resistor is the same as the resistance of the acquisition input current limiting resistor in the passive balancing circuit.

[0007] Furthermore, the preset voltage ratio relationship includes: 0.4×the previous single cell voltage VT0≤this single cell voltage VT1≤0.6×the previous single cell voltage VT0.

[0008] Furthermore, the self-diagnosis method further includes setting a verification mechanism, wherein the verification mechanism is to perform multi-cycle replay verification when diagnosing a short-circuit fault in the passive balancing circuit.

[0009] Furthermore, the method further includes setting an alarm mechanism, wherein when the diagnosis result indicates that a short circuit fault occurs in the equalization circuit, an alarm is triggered and maintenance personnel are notified.

[0010] In another aspect, the present invention provides a self-diagnosis system for a passive balancing circuit, comprising: A self-diagnostic circuit, the self-diagnostic circuit comprising a balancing resistor of a passive balancing circuit and a voltage acquisition input terminal connected to the positive and negative electrodes of a single cell, and a balancing state diagnostic resistor connected in series between the balancing resistor and the voltage acquisition input terminal; The acquisition chip is used to use the voltage acquisition input terminal in the acquisition self-diagnosis circuit to acquire the voltage VT0 of each single cell when the passive balancing circuit is not turned on for balancing, and the single cell voltage VT1 collected each time after balancing is turned on and off; The control diagnosis unit is used to compare the current single cell voltage VT1 with the single cell voltage VT0 collected before the last balancing is started. When VT1 and VT0 meet the preset voltage ratio relationship, it is diagnosed that a short circuit fault has occurred in the passive balancing circuit.

[0011] Furthermore, the voltage collection input end includes a positive voltage collection input end connected to the positive pole of the single cell, and a negative voltage collection input end connected to the negative pole of the single cell. The equilibrium state diagnostic resistor is connected in series between the equilibrium diagnostic resistor and the positive voltage collection input end, and the other end of the equilibrium resistor is connected to the positive pole of the cell.

[0012] Furthermore, the self-diagnosis circuit further includes a core balancing circuit and a voltage divider network; The core balancing circuit is composed of a balancing resistor and a balancing transistor connected in series, one end of the balancing resistor is connected to the positive electrode of the single cell, and the other end is connected to the collector of the balancing transistor; The voltage divider network includes a positive electrode collection input current limiting resistor, a negative electrode collection input current limiting resistor, a balanced drive current limiting resistor, and an input filter capacitor: The positive electrode collection input current limiting resistor is connected in series between the positive electrode of the single cell and the corresponding positive electrode voltage collection input terminal; The negative electrode collection input current limiting resistor is connected in series between the negative electrode of the single cell and the corresponding negative electrode voltage collection input terminal; One end of the balancing drive current limiting resistor is connected to the base of the balancing transistor, and the other end is connected to the negative voltage collection input terminal; The input filter capacitor is connected in parallel between the positive voltage collection input terminal and the negative voltage collection input terminal.

[0013] Furthermore, the resistance value of the equilibrium state diagnosis resistor in the self-diagnosis circuit is the same as the resistance value of the positive electrode collection input current limiting resistor and the negative electrode collection input current limiting resistor.

[0014] Furthermore, the control diagnosis unit has a built-in verification mechanism: when the fault diagnosis module diagnoses that a short circuit fault occurs in the passive balancing circuit, the fault diagnosis module is activated to perform multi-cycle replay verification.

[0015] Furthermore, the balancing transistor includes an NPN transistor, a PNP transistor, an N-type metal-oxide-semiconductor transistor NMOS, or a P-type metal-oxide-semiconductor transistor PMOS.

[0016] Beneficial effects of the present invention: The present invention constructs a unique self-diagnostic circuit by connecting a balancing state diagnostic resistor in series between the balancing resistor and the voltage acquisition input terminal. This converts short-circuit faults in the passive balancing circuit into intuitive voltage data changes, freeing the diagnostic process from traditional complex detection methods. By simply comparing the voltage of the individual cells after each balancing operation is turned on and off with the voltage before the last balancing operation, the short-circuit fault can be quickly and accurately located based on a preset voltage ratio, significantly improving diagnostic efficiency and accuracy. The self-diagnostic circuit can collect cell voltages when the passive balancing circuit is not turned on, and also collect voltages after each balancing operation is turned on and off, covering different circuit operation states and achieving full-cycle real-time monitoring of the passive balancing circuit. Compared to detecting only under specific operating conditions, this continuous monitoring mechanism can promptly capture early signs of faults, provide early warning of potential short-circuit risks, and provide a solid guarantee for the safe operation of the circuit. The present invention can achieve timely diagnosis and early warning of balancing circuit short-circuit faults, identify abnormal battery modules and BMS, avoid the problem of battery module consistency continuing to deteriorate and ultimately becoming unusable, reduce losses, and avoid direct economic losses caused by over-discharging of batteries. At the same time, early warning and intervention can prevent safety accidents caused by long-term lack of maintenance of battery cells due to over-discharge, and ensure the safe and stable operation of lithium batteries.

[0017] Other features and advantages of the present invention will be described in the following description, and in part will become apparent from the description, or will be understood by practicing the present invention. The purpose and other advantages of the present invention can be realized and obtained by the structures pointed out in the description, claims and drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following is a brief introduction to the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0019] Figure 1 FIG2 shows a schematic diagram of a passive equalization circuit according to an embodiment of the present invention; Figure 2 A schematic diagram of a circuit for adding an optocoupler to a passive balancing circuit for circuit diagnosis according to an embodiment of the present invention is shown; Figure 3 A flow chart of a self-diagnosis method for a passive balancing circuit proposed in an embodiment of the present invention is shown; Figure 4 A circuit diagram showing an embodiment of the present invention in which a balanced state diagnostic resistor is added to a passive balanced circuit to perform circuit diagnosis is shown; Figure 5 FIG2 shows a schematic diagram of a passive balancing circuit when the switch tube in the passive balancing circuit is a MOS in an embodiment of the present invention; Figure 6 A schematic diagram of a passive balancing circuit is shown when the switch tube in the passive balancing circuit is a PNP transistor in an embodiment of the present invention. DETAILED DESCRIPTION

[0020] To make the objectives, technical solutions, and advantages of the embodiments of the present invention more clear, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts shall fall within the scope of protection of the present invention.

[0021] by Figure 1 The passive balancing circuit shown in the figure is explained, including the battery cell, resistors, capacitors, transistors and voltage sampling input terminal. The figure takes the first battery cell as an example, with the positive electrode of the battery cell being B1 and the negative electrode being B0.

[0022] The voltage acquisition input terminal includes a VC1 acquisition input terminal (VC1) and a VC0 acquisition input terminal (VC0), which are used to acquire the voltages of B1 and B0.

[0023] The resistors include the acquisition input current limiting resistor, the balancing resistor, and the balancing drive current limiting resistor, specifically including: B1 acquisition input current limiting resistor (RA1): One end of RA1 is connected to B1 and the other end is connected to VC1, which is used to limit the current flowing into VC1.

[0024] Balancing resistor (RB1): One end of RB1 is connected to B1, and the other end is connected to the collector of the balancing transistor (Q1), which acts as a balancing circuit.

[0025] Balanced drive current limiting resistor (RD1): One end of RD1 is connected to the base of Q1, and the other end is connected to the VC1 input filter capacitor (CA1).

[0026] B0 sampling input current limiting resistor (RA0): One end of RA0 is connected to B0 and the other end is connected to VC0 to limit the current flowing into VC0.

[0027] VC1 input filter capacitor (CA1), one end of which is connected to VC0 and the other end is connected to VC1, is used to filter out noise in the VC1 input signal.

[0028] The transistor (Q1) has its collector connected to RB1, its emitter connected to B0, and its base electrode connected to RD1. The base current controls the conduction and cutoff between the collector and emitter to achieve functions such as circuit balance control.

[0029] When the voltage of the first cell reaches a high enough level to initiate balancing, the data acquisition IC activates balancing for the first cell. The voltage of VC0 increases relative to B0, turning on Q1. At this point, RB1 is connected to the circuit and, through Q1's conduction, is connected to the terminals B0 and B1 of the first cell. The current flowing through RB1 consumes the charge of the first cell, reducing its voltage and capacity, achieving balancing. If Q1 disconnects, the connection between RB1 and the cell is severed, and the balancing process ceases. To implement diagnostics, further circuit expansion and control logic design are required.

[0030] The above circuit design only needs to set diagnostic resistors in each battery cell, without setting optocouplers, saving the need for separate IO port detection, with a simple layout and no occupancy of MCU hardware resources. For example, if the diagnosis of the passive balancing circuit is realized by adding an optocoupler (U18), the circuit design is as follows: Figure 2 As shown, based on the existing circuit, U18 is added. U18's inputs (pins 1 and 2) have pin 1 connected to B1 via RA1, and pin 2 connected to the collector of QB1. U18's outputs (pins 3 and 4) have pin 3 connected to ground, and pin 4 outputs an electrical signal (e.g., 3.3V) to the AD port, which is subsequently connected to a processing unit (not shown). In addition, there are auxiliary components such as resistors R1 and R2. One end of R2 is connected between the U18 output and the AD port, and the other end is grounded. One end of R1 is connected to the U18 input, and the other end is connected to the junction of RA1 and VC1.

[0031] The impact of turning components on and off on the circuit: Under normal circumstances, when Q1 is on, current flows through the input of U18, the optocoupler conducts, and the AD port receives a 3.3V electrical signal. If Q1 shorts, U18 remains on, and the AD port continuously outputs a 3.3V electrical signal. This electrical signal can be converted into visual signals such as sound and light, providing an early warning of a balancing circuit failure. If Q1 disconnects normally, U18 is cut off, and no 3.3V electrical signal is input to the AD port (assuming there is no other interference). However, this approach requires an optocoupler and separate IO port detection for each battery cell, which is costly and complex.

[0032] Based on the circuit design without optocoupler, this embodiment proposes a self-diagnosis method for a passive balancing circuit, by adding a balancing state diagnosis resistor in the passive balancing circuit, such as Figure 3 As shown, the following steps are included: A self-diagnostic circuit is formed by connecting a balancing state diagnostic resistor in series between the balancing resistor of the passive balancing circuit and the voltage acquisition input terminal connected to the positive and negative poles of the single battery cell. Specifically, the balancing state diagnostic resistor is used to divide the voltage input from the single battery cell. By monitoring the voltage change across the balancing state diagnostic resistor and combining the different states when balancing is turned on and off, it is determined whether the passive balancing circuit is operating normally. The voltage acquisition input terminal in the self-diagnosis circuit is used to collect the voltage of each single cell when the passive balancing circuit is not turned on for balancing, and the single cell voltage VT1 is collected each time the balancing is turned on and off; and the collected voltage signal is input into the acquisition chip; Compare the current cell voltage VT1 with the cell voltage VT0 collected before the last balancing operation. If VT1 and VT0 meet a preset voltage ratio, a short circuit fault in the passive balancing circuit is diagnosed. The preset voltage ratio includes: current cell voltage VT1 = (0.8-1.2) times 1 / 2 of the previous cell voltage VT0, that is, 0.4 × previous cell voltage VT0 ≤ current cell voltage VT1 ≤ 0.6 × previous cell voltage VT0.

[0033] The self-diagnosis method also includes setting up a verification mechanism and an alarm mechanism. The verification mechanism is to perform multi-cycle re-verification when diagnosing a short-circuit fault in the passive balancing circuit; the alarm mechanism is to trigger an alarm and notify maintenance personnel when the diagnosis result is that a short-circuit fault has occurred in the passive balancing circuit.

[0034] Based on the same inventive concept of the above self-diagnosis method, this embodiment provides a passive balancing self-diagnosis system, including: A self-diagnostic circuit, the self-diagnostic circuit comprising a balancing resistor of a passive balancing circuit and a voltage acquisition input terminal connected to the positive and negative electrodes of a single cell, and a balancing state diagnostic resistor connected in series between the balancing resistor and the voltage acquisition input terminal; The acquisition chip is used to use the voltage acquisition input terminal in the acquisition self-diagnosis circuit to acquire the voltage VT0 of each single cell when the passive balancing circuit is not turned on for balancing, and the single cell voltage VT1 collected each time after balancing is turned on and off; The control diagnosis unit is used to compare the current single cell voltage VT1 with the single cell voltage VT0 collected before the last balancing is started. When VT1 and VT0 meet a preset voltage ratio relationship, it is diagnosed that a short circuit fault has occurred in the passive balancing circuit. The preset voltage ratio relationship includes: The current single cell voltage = (0.8~1.2) times 1 / 2 of the previous single cell voltage VT0.

[0035] Specifically, the control diagnosis unit has a built-in verification mechanism: when the fault diagnosis module diagnoses that a short circuit fault occurs in the passive balancing circuit, the fault diagnosis module is activated to perform multi-cycle replay verification.

[0036] The self-diagnostic system also includes a monitoring terminal for receiving diagnostic results from the control diagnostic unit and monitoring the short-circuit fault status of the passive balancing circuit, forming a complete monitoring and control loop. An alarm mechanism is also provided. Specifically, when the fault diagnosis module diagnoses a short-circuit fault in the passive balancing circuit, the alarm module triggers an alarm and notifies maintenance personnel. Specifically, when a short-circuit fault in the balancing circuit is diagnosed, a combination of an audible and visual alarm system or a dedicated protocol alarm is used to notify maintenance personnel to intervene.

[0037] The self-diagnosis circuit also includes a core balancing circuit and a voltage divider network; The core balancing circuit is composed of a balancing resistor and a balancing transistor connected in series, one end of the balancing resistor is connected to the positive electrode of the single cell, and the other end is connected to the collector of the balancing transistor; The voltage divider network includes a positive electrode collection input current limiting resistor, a negative electrode collection input current limiting resistor, a balanced drive current limiting resistor, and an input filter capacitor: The positive electrode collection input current limiting resistor is connected in series between the positive electrode of the single cell and the corresponding positive electrode voltage collection input terminal; The negative electrode collection input current limiting resistor is connected in series between the negative electrode of the single cell and the corresponding negative electrode voltage collection input terminal; One end of the balancing drive current limiting resistor is connected to the base of the balancing transistor, and the other end is connected to the negative voltage collection input terminal; The input filter capacitor is connected in parallel between the positive voltage collection input terminal and the negative voltage collection input terminal.

[0038] In one exemplary embodiment of the present invention, the self-diagnostic circuit is as follows Figure 4As shown, the self-diagnostic circuit includes a passive balancing resistor (RB1) and a voltage acquisition input terminal (VC1) connected to the positive electrode B1 of a single cell. A balancing state diagnostic resistor (RC1) is connected in series between RB1 and VC1. The positive electrode of the single cell is B1, and the negative electrode is B0. The core balancing circuit consists of a balancing resistor (RB1) and a balancing transistor (Q1) connected in series. One end of RB1 is connected to B1, and the other end is connected to B0 through Q1. When Q1 is turned on, RB1 is connected to the circuit, consuming the power of B1 and reducing its voltage, achieving balancing. Q1's collector is connected to RB1, its emitter is connected to B0, and its base is connected to RD1. The base current controls the conduction and cutoff between the collector and emitter, achieving circuit balancing control and other functions.

[0039] The voltage acquisition input terminal includes a VC1 acquisition input terminal (VC1) and a VC0 acquisition input terminal (VC0), VC1 is connected to B1, and VC0 is connected to B0, for acquiring the voltage of B1.

[0040] The voltage divider network includes a collection input current-limiting resistor (RA1), a collection input current-limiting resistor (RA0), a balanced drive current-limiting resistor (RD1), and a VC1 input filter capacitor (CA1). RC1 is connected in series between RB1 and VC1, with a resistance equal to that of RA0 and RA1. RA1 has one end connected to B1 and the other to VC1, limiting the current flowing into VC1. RB1 has one end connected to B1 and the other to the collector of Q1, acting as a balancing circuit. RD1 has one end connected to the base of Q1 and the other to the VC1 input filter capacitor (CA1). RA0 has one end connected to B0 and the other to VC0, limiting the current flowing into VC0. RA0 has one end connected to B0 and the other to VC0, limiting the current flowing into VC0. The VC1 input filter capacitor (CA1) is connected in parallel with VC1, with one end connected to the junction of RD1 and the emitter of Q1 and the other to the junction of RA1 and VC1, filtering out noise from the VC1 input signal.

[0041] Under normal circumstances, the voltage collected by VC1 reflects the real-time voltage VB1 of B1, and the voltage collected by VC0 reflects the real-time voltage VB0 of B0. When Q1 shorts, RC1 and RB1 divide the voltage, causing the VC1 voltage to become (B1-B0) / 2, forming a characteristic voltage difference. The base of Q1 is connected to the data acquisition chip via RD1. The voltage information obtained by the data acquisition chip is transmitted to the control and diagnostic unit for diagnosis. When the signal from the data acquisition chip is high, Q1 turns on, enabling balancing; when it is low, it turns off, stopping balancing. Q1's emitter is connected to B0, and its collector is connected to RB1. The base current controls the conduction and cutoff between the collector and emitter, achieving circuit balancing control and other functions.

[0042] When Q1 short-circuit fault occurs and cannot be disconnected, the voltage of VC1 relative to B0 is 1 / 2 (VB1-VB0), and the voltage of VC0 is the same as the voltage VB0 of B0, that is, the voltage between VC1 and VC0 is half the voltage between B1 and B0.

[0043] During normal BMS operation, when balancing is disabled, the collected voltage VT0 of each cell is backed up in real time. Each time balancing is enabled and disabled, the collected cell voltage VT1 is compared with the cell voltage VT0 collected before the last balancing operation. If VT1 is 0.8 to 1.2 times 1 / 2 VT0, a short circuit fault in the passive balancing circuit is diagnosed. To avoid misdiagnosis, multiple replays can be performed continuously, and the number of replays can be defined based on the actual scenario.

[0044] In an exemplary embodiment of the present invention, the balancing transistor Q1 is replaced by a MOS transistor (QB1). In this case, the self-diagnosis circuit of the passive balancing circuit is as follows: Figure 5 As shown, the drain (D) of QB1 is connected to one end of RB1, the source (S) is grounded, and the gate (G) is connected to the control signal (such as CAL) through RD1. The connection relationship of other components remains unchanged, such as RC1, RA1, RA0, CA1, etc. Figure 3 same.

[0045] The impact of turning on and off components on the circuit: When the control signal turns on the MOS tube, RB1 is connected to the circuit, and the current forms a loop from the battery cell through RB1 and the DS pole of QB1, consuming the battery cell power to achieve balance. Because the loop voltage drop generated by QB1 on the DS pole is smaller than that of the triode, a larger balancing current can be obtained under the same conditions, improving the balancing efficiency. When QB1 is disconnected, the balancing process stops. If QB1 has a short circuit fault, the circuit voltage characteristics are similar to Figure 4 It is similar when the middle transistor is short-circuited, that is, the voltage relationship between VC1 and VC0 will change.

[0046] Diagnosis implementation method: The diagnosis method is also related to Figure 4 The process is essentially the same: the acquisition chip and the balancing control diagnostic unit collect voltage data from VC0 and VC1. Software logic determines whether the MOS transistor is short-circuited based on a preset voltage relationship. Because the software control and diagnostic logic remain unchanged, diagnosis is still achieved by monitoring voltage differences and combining multi-cycle replay.

[0047] In an exemplary embodiment of the present invention, a PNP transistor and a P-type metal-oxide-semiconductor (PMOS) are used as an alternative. In this case, the self-diagnosis circuit of the passive balancing circuit is as follows: Figure 6As shown, the emitter of a PNP transistor (QB1) is connected to the cell, the base is connected to a control signal (such as CAL) through RD1, and the collector is connected to one end of RB1. RC1 is connected between RB1 and another relevant node (such as VC0). If a PMOS transistor is used instead of QB1, the source of the PMOS transistor is connected to the cell, the drain is connected to RB1, and the gate is connected to the control signal.

[0048] The impact of turning on and off components on the circuit: When the control signal turns on QB1, current flows from the cells through QB1 and RB1, consuming the cells for balancing. If QB1 turns off, balancing stops. If QB1 shorts, it also affects the voltages of related nodes in the circuit, changing the voltage relationship between VC1 and VC0 (assuming corresponding sampling points). When using a PMOS transistor as a replacement, the operating principle is similar, except that the conduction characteristics of the PMOS transistor differ from those of the PNP transistor. However, the impact on the circuit voltage remains consistent, based on the diagnostic principle.

[0049] Diagnosis implementation: Figure 4 、 Figure 5 The diagnostic method is similar to that of the VC0 and VC1 acquisition points. The voltages of relevant nodes (such as VC0 and VC1) are collected and compared with the preset short-circuit fault voltage relationship using software logic to make a judgment. The software control and diagnostic logic remain unchanged, and multi-cycle replay is still used to improve diagnostic accuracy.

[0050] Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A self-diagnosis method for a passive equalization circuit, characterized in that: include: A self-diagnostic circuit is formed by connecting a balancing state diagnostic resistor in series between the balancing resistor of the passive balancing circuit and the voltage acquisition input terminal connected to the positive and negative electrodes of the single battery cell; Use the voltage acquisition input terminal in the self-diagnosis circuit to collect the voltage of each single cell when the passive balancing circuit is not turned on for balancing, and collect the voltage VT1 of the single cell each time the balancing is turned on and off; The current single cell voltage VT1 is compared with the single cell voltage VT0 collected before the last balancing operation. When VT1 and VT0 meet the preset voltage ratio, a short circuit fault is diagnosed in the passive balancing circuit.

2. The self-diagnosis method of a passive equalization circuit according to claim 1, characterized in that: The resistance value of the equilibrium state diagnosis resistor is the same as the resistance value of the acquisition input current limiting resistor in the passive balancing circuit.

3. The self-diagnosis method of a passive equalization circuit according to claim 1, wherein: The preset voltage ratio relationship includes: 0.4×the previous single cell voltage VT0≤this single cell voltage VT1≤0.6×the previous single cell voltage VT0.

4. The self-diagnosis method for a passive equalization circuit according to any one of claims 1 to 3, characterized in that: The self-diagnosis method further includes setting a verification mechanism, wherein the verification mechanism is to perform multi-cycle replay verification when diagnosing a short circuit fault in the passive balancing circuit.

5. The self-diagnosis method for a passive equalization circuit according to any one of claims 1 to 3, characterized in that: The method further includes setting an alarm mechanism, wherein when a short circuit fault occurs in the equalization circuit as a result of the diagnosis, an alarm is triggered and maintenance personnel are notified.

6. A self-diagnosis system for a passive equalization circuit, characterized in that: include: A self-diagnostic circuit, the self-diagnostic circuit comprising a balancing resistor of a passive balancing circuit and a voltage acquisition input terminal connected to the positive and negative electrodes of a single cell, and a balancing state diagnostic resistor connected in series between the balancing resistor and the voltage acquisition input terminal; The acquisition chip is used to use the voltage acquisition input terminal in the acquisition self-diagnosis circuit to acquire the voltage VT0 of each single cell when the passive balancing circuit is not turned on for balancing, and the single cell voltage VT1 collected each time after balancing is turned on and off; The control diagnosis unit is used to compare the current single cell voltage VT1 with the single cell voltage VT0 collected before the last balancing is started. When VT1 and VT0 meet the preset voltage ratio relationship, it is diagnosed that a short circuit fault has occurred in the passive balancing circuit.

7. The self-diagnosis system for a passive equalization circuit according to claim 6, characterized in that: The voltage collection input end includes a positive electrode voltage collection input end connected to the positive electrode of the single battery cell, and a negative electrode voltage collection input end connected to the negative electrode of the single battery cell. The balanced state diagnostic resistor is connected in series between the balanced diagnostic resistor and the positive electrode voltage collection input end, and the other end of the balanced resistor is connected to the positive electrode of the battery cell.

8. The self-diagnosis system for a passive equalization circuit according to claim 7, characterized in that: The self-diagnosis circuit also includes a core balancing circuit and a voltage divider network; The core balancing circuit is composed of a balancing resistor and a balancing transistor connected in series, one end of the balancing resistor is connected to the positive electrode of the single cell, and the other end is connected to the collector of the balancing transistor; The voltage divider network includes a positive electrode collection input current limiting resistor, a negative electrode collection input current limiting resistor, a balanced drive current limiting resistor, and an input filter capacitor: The positive electrode collection input current limiting resistor is connected in series between the positive electrode of the single cell and the corresponding positive electrode voltage collection input terminal; The negative electrode collection input current limiting resistor is connected in series between the negative electrode of the single cell and the corresponding negative electrode voltage collection input terminal; One end of the balancing drive current limiting resistor is connected to the base of the balancing transistor, and the other end is connected to the negative voltage collection input terminal; The input filter capacitor is connected in parallel between the positive voltage collection input terminal and the negative voltage collection input terminal.

9. The self-diagnosis system for a passive equalization circuit according to claim 8, characterized in that: The resistance value of the equilibrium state diagnosis resistor in the self-diagnosis circuit is the same as the resistance value of the positive electrode collection input current limiting resistor and the negative electrode collection input current limiting resistor.

10. The self-diagnosis system for a passive balancing circuit according to any one of claims 6 to 9, characterized in that: The control diagnosis unit has a built-in verification mechanism: when the fault diagnosis module diagnoses that a short circuit fault occurs in the passive balancing circuit, the fault diagnosis module is activated to perform multi-cycle replay verification.

11. The self-diagnosis system for a passive equalization circuit according to claim 8, wherein: The balancing transistor includes an NPN transistor, a PNP transistor, an N-type metal-oxide-semiconductor transistor (NMOS), or a P-type metal-oxide-semiconductor transistor (PMOS).

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