Two-level adjustable pad semi-embedded package substrate and its processing method

Abstract

This invention discloses a semi-embedded packaging substrate with adjustable pads and its processing method, comprising: a working board having inner circuit layers with circuit patterns A on both sides, and a designated area on one of the circuit patterns A as the part to be removed; a first insulating layer and a first copper layer without glass fiber are stacked on the inner circuit layers, and circuit patterns B are formed on the two first copper layers; one circuit pattern B includes pad patterns; after covering the peripheral surface of the pad patterns and the designated area of ​​the first insulating layer with a resistive film, double-sided layering and double-sided circuit fabrication are performed to obtain an intermediate board B with two outer circuit layers; a preliminary groove shape with an opening in one of the outer circuit layers and the part to be removed as the groove bottom is processed; the part to be removed is etched away, the first insulating layer located directly above the resistive film is removed by laser, and a portion of the resistive film is removed by acid etching to obtain the groove. This processing method is reasonable and simple, and the shape and size of the pad patterns in the obtained packaging substrate are flexibly adjustable, resulting in high quality.

Description

Technical Field

[0001] This invention relates to the field of advanced packaging technology, and in particular to a semi-embedded packaging substrate with adjustable pads and its processing method. Background Technology

[0002] To meet the growing demand for high-density and miniaturization in electronic devices, components are typically embedded inside the packaging substrate during manufacturing, creating an embedded / semi-embedded packaging substrate structure. This reduces both the volume of the packaging substrate and the installation space required.

[0003] In existing embedded packaging substrate structures, pads are generally designed to be recessed or raised relative to the bottom of the slot.

[0004] 1) The method for manufacturing sunken pads is as follows: First, perform the Larger window process (expanding the window area process) directly on the bottom of the groove, and then process the pads into shape on the bottom of the groove through the circuit fabrication process.

[0005] However, the size of such pads is often controlled by the thickness of the adjacent prepreg, making it impossible to flexibly adjust the pad size.

[0006] 2) The method for making raised pads is as follows: when making inner layer circuits, the pads are made in advance; then the pads are exposed through subsequent laser capping.

[0007] Although the size of the raised pads can be flexibly adjusted during processing, the pads are easily damaged by the laser opening process, and there is even a risk that the laser will burn through the next layer of insulating material, which seriously affects the quality of the packaging substrate.

[0008] In view of this, the present invention is hereby proposed. Summary of the Invention

[0009] To overcome the above-mentioned defects, the present invention provides a semi-embedded packaging substrate with adjustable pads and its processing method. The processing method is reasonable, the process flow is simple, and it is easy to operate and implement. Moreover, the shape and size of the pad pattern in the obtained semi-embedded packaging substrate are flexibly adjustable, and the quality is high, which broadens the development of packaging substrates.

[0010] The technical solution adopted by this invention to solve its technical problem is: a processing method for a semi-embedded package substrate with adjustable pads, comprising:

[0011] A work board is provided, wherein both opposite sides of the work board are inner circuit layers with circuit patterns A, and a designated area on one of the circuit patterns A is used as the part to be removed to assist in the processing of the groove.

[0012] A first insulating layer and a first copper layer without glass fiber are sequentially stacked on the two inner circuit layers respectively, and circuit patterns B are respectively fabricated on the two first copper layers; wherein the projection of one circuit pattern B toward the working board does not fall on the part to be removed, and the other circuit pattern B includes a pad pattern that is directly opposite to the part to be removed.

[0013] A resistive film is applied to the periphery of the pad pattern and the area surrounding the first insulating layer and within a defined range outside the pad pattern to serve as a protective structure that can block lasers; thus, intermediate plate A is obtained.

[0014] After performing double-sided lamination and double-sided circuit fabrication on the obtained intermediate board A, an intermediate board B with two outer circuit layers is obtained; wherein, the projection of the circuit pattern C on the outer circuit layer that is far away from the pad pattern toward the working board does not fall on the part to be removed.

[0015] On the obtained intermediate board B, a groove prototype is machined with an opening on an outer circuit layer that is far from the pad pattern, and with the part to be removed as the groove bottom;

[0016] After etching away the part to be removed, the first insulating layer located above the resistive film is removed using a laser ablation process, and then the resistive film is partially etched away using an acid etching process to obtain the groove.

[0017] The thickness of the pad pattern can be selectively adjusted.

[0018] As a further improvement of the present invention, a resistive film with a thickness of 0.2 to 0.5 μm is deposited on the peripheral surface of the pad pattern and on the first insulating layer in a region surrounding the pad pattern by a sputtering process.

[0019] As a further improvement of the present invention, the material of the resistive film is selected from any one of nickel-chromium alloy, nickel-phosphorus alloy and tantalum.

[0020] As a further improvement of the present invention, the processing parameters of the sputtering process are: working gas pressure of 0.1 to 0.5 Pa; radio frequency power density of 100 to 300 W / m². 2 The substrate temperature is ≤80℃; the target distance is 80~150mm.

[0021] As a further improvement of the present invention, before performing the sputtering process, plasma cleaning is performed on the pad pattern and the area on the first insulating layer surrounding the pad pattern within a predetermined range, so that the residual particle content on the surface of the first insulating layer is less than 50 particles / 100cm. 2The particle size is less than 1 μm; then the plasma-cleaned pad pattern and the first insulating layer are subjected to plasma modification treatment so that the surface contact angle of the first insulating layer is less than 30°.

[0022] After the sputtering process is completed, the resistive film is subjected to low-temperature annealing.

[0023] As a further improvement of the present invention, after the obtained intermediate plate B is subjected to anti-welding treatment, the groove prototype is processed on the obtained intermediate plate B using laser ablation process.

[0024] As a further improvement of the present invention, the first insulating layer is made of pure adhesive;

[0025] The groove prototype is fabricated using a CO2 laser, and the processing parameters of the CO2 laser are: laser energy of 2-6 mJ, pulse width of 4-6 μs, and number of laser shots of 1-5.

[0026] As a further improvement of the present invention, a CO2 laser is used to remove the first insulating layer located directly above the resistive film, and the processing parameters of the CO2 laser are: laser energy of 2-6 mJ, pulse width of 4-6 μs, and number of laser shots of 1-5.

[0027] The processing parameters for the acid etching process are as follows: the concentration of hydrochloric acid in the acid etching solution is 8% to 12%, and the etching temperature is 30℃ ± 2℃.

[0028] As a further improvement of the present invention, after the groove is made, a flash etching process is performed to adjust the thickness of the pad pattern;

[0029] In addition, a surface treatment layer is plated on the designated area on the circuit pattern C and on the pad pattern.

[0030] The present invention also provides a pad-adjustable semi-embedded package substrate, which is manufactured using the pad-adjustable semi-embedded package substrate processing method described in the present invention.

[0031] The beneficial effects of this invention are as follows: Compared with the prior art, the processing method of the double-level adjustable semi-embedded packaging substrate provided by this invention has the following advantages: ① Through process innovation, this invention adopts the method of "first fabricating the pad pattern and then matching it with a resistive film that can block lasers", which not only effectively achieves flexible adjustment of the shape and size of the pad pattern, broadening the development of packaging substrates and improving the flexibility of processing and production, but also effectively avoids the risk of laser damage to the pad pattern and burning through the next layer of insulating material, ensuring and significantly improving the quality of the packaging substrate. ② This invention preferably uses radio frequency magnetron sputtering technology, which can achieve thin film deposition under low temperature conditions, protecting the insulating material and reducing the thermal stress inside the resistive film, improving the quality and stability of the resistive film; furthermore, this invention also performs plasma cleaning and plasma modification treatment before the sputtering process, and performs low-temperature annealing treatment on the resistive film after the sputtering process, thereby significantly improving the adhesion of the resistive film while avoiding damage to the first insulating layer, ensuring the quality of the packaging substrate. ③ This invention also optimizes the control of insulating materials, such as ensuring that both the first and second insulating layers use pure adhesive without glass fibers. This ensures high-quality operation of the RF magnetron sputtering process and reduces the laser energy and number of laser shots during laser grooving, preventing damage to the insulating materials from high temperatures and avoiding residual adhesive due to the presence of glass fibers, thus significantly improving the grooving quality. ④ The semi-embedded packaging substrate processing method provided by this invention is reasonable, the process flow is simple, and it is easy to operate and implement. Attached Figure Description

[0032] Figure 1 This is a flowchart of the processing method for the pad-adjustable semi-embedded packaging substrate described in Embodiment 1 of the present invention;

[0033] Figure 2 This is a cross-sectional view of the work board described in Example 1;

[0034] Figure 3 This is a schematic cross-sectional view of the board obtained by sequentially stacking the first insulating layer and the first copper layer on the two inner circuit layers in Example 1.

[0035] Figure 4 This is a schematic cross-sectional view of the board A obtained after fabricating circuit patterns B on the two first copper layers in Example 1.

[0036] Figure 5 This is a schematic cross-sectional view of the intermediate plate A obtained in Example 1;

[0037] Figure 6 This is a schematic cross-sectional view of the intermediate plate B obtained in Example 1;

[0038] Figure 7 This is a schematic cross-sectional view of the intermediate plate B after the groove prototype has been machined in Example 1.

[0039] Figure 8 This is a schematic diagram of the cross-sectional structure after etching away the part to be removed on the obtained intermediate plate B and removing the first insulating layer located directly above the resistive film in Example 1.

[0040] Figure 9 This is a schematic diagram of the cross-sectional structure after the resistive film on the intermediate plate B was partially etched away to create the groove in Example 1.

[0041] Figure 10 This is a schematic cross-sectional view of the semi-embedded package substrate with adjustable pads obtained in Example 1.

[0042] Referring to the accompanying drawings, the following explanations are provided:

[0043] 1. Inner circuit layer; 10. Part to be removed; 2. First insulating layer; 3. First copper layer; 40. Pad pattern; 41. Main circuit pattern; 5. Resistor film; 6. Outer circuit layer; 70. Embedded groove prototype; 7. Embedded groove; 8. Surface treatment layer; 9. Solder resist layer; 11. Insulating intermediate layer; 12. Second insulating layer; B1. Working board; B2. Intermediate board A; B3. Intermediate board B; B4. Pad-adjustable semi-embedded packaging substrate. Detailed Implementation

[0044] The preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0045] Example 1:

[0046] Please see the appendix Figure 1 To be continued Figure 10 As shown, this embodiment 1 provides a method for processing a semi-embedded package substrate with adjustable pads, which mainly includes the following processing steps:

[0047] S1: A working board is provided, wherein both opposite sides of the working board are inner circuit layers 1 with circuit patterns A, and a set area on one of the circuit patterns A is designated as the part to be removed 10 according to the preset groove processing data of the semi-embedded packaging substrate, so as to assist in the groove processing.

[0048] Regarding the aforementioned work board, its manufacturing method and implementation structure are determined based on the design requirements of the semi-embedded packaging substrate. This application does not impose any limiting requirements. However, in order to clearly and thoroughly describe the processing method of the pad-adjustable semi-embedded packaging substrate provided in this application, this embodiment 1 is specifically illustrated as follows:

[0049] In this embodiment, the method for manufacturing the work board is designed as follows:

[0050] S11: A double-sided copper-clad substrate is provided, wherein the double-sided copper-clad substrate has an insulating intermediate layer 11 and two copper foil layers respectively fixedly attached to opposite sides of the insulating intermediate layer 11. The insulating intermediate layer 11 may be, but is not limited to, a prepreg, and the thickness of the insulating intermediate layer 11 and the copper foil layers are determined according to product design requirements; this embodiment does not impose any restrictions.

[0051] S12: Place the double-sided copper-clad substrate in an oven and bake it at a temperature of 185-195°C for 2-4 hours to eliminate stress in the double-sided copper-clad substrate, prevent warping during processing, and improve its dimensional stability.

[0052] S13: The double-sided copper-clad substrate is subjected to the following processes in sequence: drilling (i.e., drilling alignment holes and interlayer vias), copper plating and via-filling electroplating (i.e., using a combination of copper plating and via-filling electroplating to completely fill the interlayer vias with copper, so as to achieve communication between the two copper foil layers, while controlling the copper in the interlayer vias to be flush with the two copper foil layers), pre-coating treatment (i.e., roughening, cleaning and drying the two copper foil layers in sequence), and coating with photosensitive anti-etching film (i.e., coating the photosensitive anti-etching film with a vacuum laminating device). The process involves several steps: applying a photosensitive dry film to two copper foil layers, exposure (using an LDI exposure machine and according to preset exposure data to expose the photosensitive dry film), development (removing the unexposed photosensitive dry film using a developing solution), etching (etching away the areas on the two copper foil layers exposed outside the photosensitive dry film using an alkaline / or acidic etching solution), film removal (removing the photosensitive dry film using a stripping solution), cleaning, and drying. This process yields the work board B1, which has two inner circuit layers 1. (See attached document.) Figure 2 As shown, the working board B1 has an insulating intermediate layer 11 and two inner circuit layers 1 respectively disposed on opposite sides of the insulating intermediate layer 11. Each of the two inner circuit layers 1 has a preset circuit pattern A, and the circuit patterns A on the two inner circuit layers 1 are electrically connected. Furthermore, it is understood that the circuit patterns A on the two inner circuit layers 1 may be different or the same, depending on the circuit design requirements.

[0053] For further details, please refer to the appendix. Figure 2 As shown, if the thickness direction of the working board B1 is defined as the vertical direction, and according to the slotting processing data of the semi-embedded packaging substrate, in this embodiment, a set area on a circuit pattern A located below the insulating intermediate layer 11 is used as the part to be removed 10 to assist in the slotting process; correspondingly, the downward projection of another circuit pattern A located above the insulating intermediate layer 11 does not fall on the part to be removed 10, so as to facilitate the laser slotting operation in the subsequent process.

[0054] Furthermore, after the work board B1 is obtained, the circuit pattern A is subjected to AOI optical inspection to ensure the processing quality of the circuit pattern A.

[0055] Additional explanation: This embodiment 1 illustrates the fabrication of the inner circuit layer 1 using a subtractive process. However, it is understood that in actual production, depending on the processing requirements of the packaging substrate, the inner circuit layer 1 can also be fabricated using the mSAP process.

[0056] S2: First, place the first insulating layer 2 and the first copper layer 3 (without glass fiber) sequentially on the two inner circuit layers 1 of the working board B1, respectively. Then, laminate them together (preferably by electric heating lamination) to firmly connect the working board B1, the first insulating layer 2, and the first copper layer 3 into a single unit. See the appendix for details. Figure 3 As shown; next, based on the structure of the first copper layer 3, circuit patterns B are fabricated on the two first copper layers 3 using a subtractive method or mSAP process. Please refer to the appendix. Figure 4 As shown, according to the circuit pattern data and slotting processing data of the semi-embedded packaging substrate, one circuit pattern B located above the working board B1 mainly includes a circuit body pattern 41, and the projection of the circuit pattern B above the working board B1 toward the working board (i.e., the downward projection of the circuit pattern B) does not fall on the part to be removed 10, so as to facilitate the laser slotting operation in the subsequent process; another circuit pattern B located below the working board B1 mainly includes a circuit body pattern 41 and a pad pattern 40, the pad pattern 40 is directly opposite the part to be removed 10, and furthermore, the projection of the pad pattern 40 toward the part to be removed 10 falls completely on the part to be removed 10. It can be understood that, with the help of the part to be removed 10, on the one hand, the layout position of the pad pattern 40 can be limited to ensure that the pad pattern 40 can fall completely on the bottom of the slot, and on the other hand, the pad pattern 40 can be fully protected in the laser slotting operation described below. In addition, please continue to refer to the appendix. Figure 4 As shown, the two circuit patterns B (specifically, the two main circuit patterns 41) are electrically connected to the two circuit patterns A. It can also be understood that by simultaneously fabricating the pad pattern 40 and the main circuit pattern 41, this embodiment allows for flexible adjustment of the shape and size of the pad pattern 40, thus broadening the development of packaging substrates.

[0057] Furthermore, the first insulating layer 2 is preferably made of pure adhesive, and the thickness of the first insulating layer 2 can be determined according to the thickness requirements of the semi-embedded packaging substrate. This embodiment does not impose any restrictions, and it can be designed to be 25-40 μm. Understandably, this embodiment optimizes the use of pure adhesive without glass fibers in the first insulating layer 2. During the laser grooving operation in the subsequent process, the pure adhesive configuration can effectively reduce the laser energy and number of laser shots, avoiding damage to the insulating material caused by high temperature. On the other hand, it can effectively avoid residual adhesive caused by the presence of glass fibers, thus improving the grooving quality.

[0058] Furthermore, when the first copper layer 3 is a thick copper foil with a set copper thickness (e.g., 25-40 μm), this embodiment can use a subtractive process to fabricate the circuit pattern B (the specific processing details of the subtractive process can be found in S13 above); while when the first copper layer 3 is a composite copper layer composed of an ultra-thin copper layer and a carrier copper layer that is detachably connected to the ultra-thin copper layer, this embodiment can use the mSAP process to fabricate the circuit pattern B.

[0059] Supplementary explanation: When the first copper layer 3 is a composite copper layer composed of an ultra-thin copper layer and a carrier copper layer, the above-mentioned mSAP process includes drilling (i.e., drilling alignment holes and interlayer vias), board separation (i.e., removing the carrier copper layer by mechanical peeling), copper plating and via-filling plating (i.e., using a combination of copper plating and via-filling plating to completely fill the interlayer vias with copper, so as to achieve the connection between the ultra-thin copper layer and its corresponding circuit pattern A, while also controlling the copper in the interlayer vias to be flush with the ultra-thin copper layer), pre-coating treatment (i.e., roughening, cleaning and drying the ultra-thin copper layer), and photosensitive coating. The circuit pattern B is obtained through the following processes: film application (i.e., applying a photosensitive dry film to an ultrathin copper layer using a vacuum film application device), exposure (i.e., exposing the photosensitive dry film to an ultrathin copper layer using an LDI exposure machine according to preset exposure data), development (i.e., removing the unexposed photosensitive dry film using a developing solution), pattern electroplating (i.e., plating a preliminary circuit pattern onto the ultrathin copper layer and onto the area exposed outside the photosensitive dry film using pattern electroplating), film removal (i.e., removing the photosensitive dry film using a stripping solution), baking, and flash etching (i.e., etching away the ultrathin copper layer not covered by the preliminary circuit pattern using an alkaline / acidic etching solution).

[0060] Furthermore, after obtaining the circuit pattern B, AOI optical inspection is performed on the circuit pattern B to ensure the processing quality of the circuit pattern B.

[0061] In addition, for the convenience of subsequent process description, this embodiment will also define the board obtained after completing the above S2 processing as board A.

[0062] S3: First, the obtained board A is sequentially coated with a photosensitive resist dry film, exposed, and developed so that, except for the pad pattern 40 and the area on the first insulating layer 2 surrounding the pad pattern 40 which are exposed, all other areas on the obtained board A are covered and protected by the photosensitive resist dry film. Then, a resistive film 5 with a thickness of 0.2-0.5 μm is deposited on the periphery of the pad pattern 40 and the area on the first insulating layer 2 surrounding the pad pattern 40 using a sputtering process to serve as a protective structure that can block lasers. Next, the photosensitive resist dry film is removed to obtain intermediate board A B2, which can be referred to in the appendix. Figure 5 As shown.

[0063] Furthermore, to adapt to the material of the first insulating layer 2, this embodiment preferably employs radio frequency magnetron sputtering, which enables thin film deposition at low temperatures. This not only protects the insulating material of the resulting board A (specifically, the first insulating layer 2) but also reduces the thermal stress inside the resistive film 5, thereby improving the quality and stability of the resistive film 5. Specifically, the processing parameters for the radio frequency magnetron sputtering process used in this embodiment are: working gas pressure of 0.1–0.5 Pa; radio frequency power density of 100–300 W / m³. 2 The substrate temperature is ≤80℃; the target distance is 80~150mm. Understandably, the above-mentioned substrate refers to the exposed pad pattern 40 and the first insulating layer 2 on the obtained board A, and the above-mentioned target distance refers to the distance between the target material and the pad pattern 40 and the first insulating layer 2 on the obtained board A.

[0064] Furthermore, in order to improve the adhesion and other technical features of the resistive film 5, and to avoid damage to the first insulating layer 2, the following auxiliary operations are performed in S3 of this embodiment: I) Before the sputtering process, the exposed pad pattern 40 and the first insulating layer 2 are subjected to plasma cleaning and plasma modification treatments in sequence, wherein ① the plasma cleaning preferably uses the following processing parameters: plasma formed by a mixture of argon (Ar) and oxygen (O2), with a cleaning power of 50-150W, a pressure of 1-5Pa, and a cleaning time of 5-15min. By performing the above plasma cleaning on the pad pattern 40 and the first insulating layer 2, the residual particle amount on the surface of the first insulating layer 2 can be reduced to less than 50 particles / 100cm. 2The particle size is less than 1 μm; that is, the cleanliness of the first insulating layer 2 and the surface of the pad pattern 40 is very high, which is beneficial to improving the processing quality of the plasma modification process described below. ② The processing index of the plasma modification is: to form a transition layer with a thickness of 5-20 nm on the exposed surface of the pad pattern 40 and the first insulating layer 2, and the transition layer is preferably a chromium film (Cr) or a titanium film (Ti). Through the above plasma modification treatment, the surface contact angle of the first insulating layer 2 can be less than 30°, thereby significantly improving the adhesion of the resistive film 5. Note: Since the bonding between the first insulating layer 2 and the resistive film 5 is more difficult than that between the pad pattern 40, the above plasma cleaning and plasma modification treatments are based on the technical index achieved by the first insulating layer 2. Ⅱ) After completing the sputtering process, the resistive film 5 is also subjected to low-temperature annealing treatment to further improve the adhesion of the resistive film 5 while avoiding damage to the first insulating layer 2. The preferred processing parameters for the low-temperature annealing treatment are as follows: annealing atmosphere: vacuum or inert gas (N2 / Ar) protection to prevent oxidation of the resistive film 5; annealing temperature ≤100℃, and holding time 30-60 min.

[0065] Furthermore, to enable the resistive film 5 to better block lasers and to ensure a stronger bond between the resistive film 5 and the second insulating layer 12 in the subsequent process, this embodiment preferably selects the material of the resistive film 5 from any one of nickel-chromium alloy, nickel-phosphorus alloy, and tantalum. Specifically, in this embodiment, the resistive film 5 is made of nickel-chromium alloy or tantalum.

[0066] Note: The high melting point and high thermal stability of the resistive film 5 enable it to remain solid at high temperatures and not easily melted or vaporized by laser, thus enabling it to block laser light.

[0067] Furthermore, regarding the aforementioned "area on the first insulating layer 2 and within a predetermined range surrounding the pad pattern 40," this is determined based on the preset transverse cross-sectional dimensions of the groove. Generally, it is required that the downward projection of the groove falls entirely on the resistive film 5 disposed on the first insulating layer 2 and the pad pattern 40. See the appendix for details. Figure 8 As shown; therefore, this embodiment does not impose further restrictions on the above-mentioned area, as long as the resistive film 5 can achieve full protection of the pad pattern 40 during the laser grooving operation.

[0068] S4: First, the second insulating layer 12 and the second copper layer are sequentially stacked on opposite sides of the obtained intermediate board A, and then laminated (preferably by electrothermal lamination) to firmly connect the obtained intermediate board A, the second insulating layer 12, and the second copper layer into a single unit; then, based on the structure of the second copper layer, the two second copper layers are respectively fabricated into outer circuit layers 6 with circuit patterns C using a subtractive method or mSAP process, thus obtaining the intermediate board B3. Please refer to the appendix. Figure 6 As shown, in the obtained intermediate board B, the projection of the circuit pattern C on the outer circuit layer 6 that is far from the pad pattern 40 toward the working board does not fall on the part to be removed 10. That is, the downward projection of the circuit pattern C on the upper outer circuit layer 6 does not fall on the part to be removed 10, so as to facilitate the laser grooving operation in the subsequent process; and the circuit patterns C on the two outer circuit layers 6 are respectively electrically connected to the two circuit patterns B (specifically the two circuit body patterns 41).

[0069] Furthermore, the second insulating layer 12 can preferably be made of pure adhesive; and the thickness of the second insulating layer 12 can also be determined according to the thickness requirements of the semi-embedded packaging substrate, which is not limited in this embodiment.

[0070] For details regarding the subtractive processing method or mSAP process described above, please refer to S13 and S2 above. Similarly, the circuit pattern C needs to be subjected to AOI optical inspection to ensure the processing quality of the circuit pattern C.

[0071] S5: First, perform solder resist treatment on the obtained intermediate board B to cover the intermediate board B with a solder resist layer 9 at a predetermined position; then, use laser ablation process to process an opening on the obtained intermediate board B on an outer circuit layer 6 that is far away from the pad pattern 40 (i.e., the groove prototype 70 opens on the upper outer circuit layer 6), with the part to be removed 10 as the groove bottom. For details, please refer to the appendix. Figure 7 As shown. Understandably, the laser ablation operation in this step can also be referred to as a single laser grooving operation.

[0072] The aforementioned solder resist treatment can employ techniques commonly used in the circuit board manufacturing field, and therefore will not be detailed here. In this embodiment, by placing the solder resist treatment before the laser-induced grooving operation, the solder resist layer 9, in addition to its basic functions of preventing oxidation of the circuit pattern and copper surface, can also effectively prevent laser damage to the circuit pattern, thus ensuring circuit quality.

[0073] Furthermore, since both the first insulating layer 2 and the second insulating layer 12 in this embodiment are made of pure adhesive without glass fibers, the grooved prototype 70 can be processed using a "low-energy laser ablation / grooving process". Specifically, the processing parameters of the laser ablation / grooving process are: using a CO2 laser, with a laser energy of 2-6 mJ, a pulse width of 4-6 μs, and a laser firing rate of 1-5.

[0074] S6: First, use an alkaline / or acidic etching process to etch away the part 10 to be removed, and then use a laser ablation process to remove the first insulating layer 2 located above the resistive film 5 (understandably, this laser ablation operation can also be called a secondary laser ablation operation). See attached document for details. Figure 8 As shown, the resistive film 5 is then partially etched away using an acid etching process to obtain the groove 7. (See attached diagram.) Figure 9 As shown. Understandably, during the laser secondary grooving operation, the laser blocking function of the resistive film 5 can effectively prevent the pad pattern 40 from being damaged by the laser, thus ensuring the quality of the pad pattern 40.

[0075] Furthermore, regarding the amount of etching of the portion 10 to be removed, it can be completely etched away, or a small portion of the portion 10 to be removed can be retained (see Appendix). Figure 8 As shown), it is acceptable as long as it does not affect the subsequent laser secondary grooving operation. In addition, when etching the part to be removed 10, the remaining area on the obtained intermediate plate B with the groove prototype 70, except for the part to be removed 10, is covered and protected by a photosensitive dry film, and the photosensitive dry film is removed after the laser secondary grooving operation is completed.

[0076] Furthermore, regarding the aforementioned laser secondary grooving operation, the preferred processing parameters in this embodiment are: using a CO2 laser, wherein the laser energy of the CO2 laser is 2-6 mJ, the pulse width is 4-6 μs, and the number of laser shots is 1-5.

[0077] In addition, please continue to refer to the appendix. Figure 8 As shown, the inner wall of the groove obtained by the laser secondary grooving operation is flush with the inner wall of the groove prototype 70 obtained by the laser primary grooving operation.

[0078] Furthermore, regarding the etching amount of the resistive film 5, according to the design requirements, in this embodiment, both the resistive film 5 disposed on the first insulating layer 2 and the resistive film 5 disposed on the head (top) of the pad pattern 40 are etched away. See attached document for details. Figure 9As shown; however, the resistive film 5 located at the tail of the pad pattern 40 (i.e., the portion of the pad pattern 40 embedded in the second insulating layer 12) was not etched away because: when acid etching is performed, in addition to the resistive film 5 being etched away, the pad pattern 40 will also be etched away. Therefore, the resistive film 5 located at the tail of the pad pattern 40 is retained.

[0079] Additional explanation: As is known, in the field of circuit board processing, the core components of acidic etching solutions are hydrochloric acid, copper chloride, sodium chloride, etc., while the core components of alkaline etching solutions are ammonia, ammonium chloride, copper ions, etc. Therefore, both acidic and alkaline etching processes are applicable when etching copper materials; however, only the acidic etching process is applicable when etching the resistive film 5.

[0080] Furthermore, regarding the aforementioned acid etching process, the preferred processing parameters in this embodiment are: a hydrochloric acid concentration of 8%–12% in the acid etching solution and an etching temperature of 30℃ ± 2℃. It is understood that by precisely controlling the hydrochloric acid concentration and etching temperature in the acid etching solution, the resistive film 5 can be etched away in a predetermined amount while avoiding the defect of the photosensitive resist film peeling off due to high temperature, thus improving the quality of the acid etching process and increasing product yield. Note: As mentioned above, during acid etching, areas on the board that do not need to be etched away should also be protected with a photosensitive resist film; and after completing the acid etching, the photosensitive resist film should be removed.

[0081] S7: After the groove 7 is formed, a flash etching process (using the above-mentioned acidic etching solution) is performed according to the circuit design requirements of the packaging substrate to adjust the thickness of the pad pattern 40. As mentioned above, during the flash etching process, the areas on the board that do not need to be etched away are also covered with a photosensitive resist dry film for protection; and after the flash etching process is completed, the photosensitive resist dry film is removed.

[0082] S8: A surface treatment layer 8 is plated on the designated area on the circuit pattern C, the pad pattern 40, and the retained part to be removed 10, respectively. See Appendix. Figure 10 As shown.

[0083] Furthermore, the surface treatment layer 8 may be, but is not limited to, a nickel-palladium-gold layer, wherein the gold layer thickness is 0.05–0.015 μm, the nickel thickness is 3–15 μm, and the palladium thickness is 0.05–0.015 μm.

[0084] S9: After completing the surface treatment described above, conventional molding, electrical testing, and inspection processes are performed sequentially to produce the pad-adjustable semi-embedded package substrate B4. For details, please refer to the appendix. Figure 10 As shown.

[0085] As can be seen from the above, compared with the prior art, the processing method of the pad-adjustable semi-embedded packaging substrate provided in this embodiment 1 has the following advantages: ① This embodiment, through process innovation, adopts the method of "first fabricating the pad pattern 40, and then matching it with a resistive thin film 5 that can block lasers", which not only makes the shape and size of the pad pattern 40 flexibly adjustable, broadening the development of the packaging substrate and improving the flexibility of processing and production, but also effectively avoids the risk of laser damage to the pad pattern 40 and burning through the next layer of insulating material, ensuring and significantly improving the quality of the packaging substrate. ② This embodiment preferably adopts radio frequency magnetron sputtering process, which can realize thin film deposition under low temperature conditions, which protects the insulating material and reduces the thermal stress inside the resistive thin film 5, improving the quality and stability of the resistive thin film 5; furthermore, this embodiment also performs plasma cleaning and plasma modification treatment before the sputtering process, and performs low temperature annealing treatment on the resistive thin film 5 after the sputtering process, thereby significantly improving the adhesion of the resistive thin film 5 while avoiding damage to the first insulating layer 2, ensuring the quality of the packaging substrate. ③ This embodiment also optimizes the insulation material, such as by using pure adhesive without glass fibers for both the first insulating layer 2 and the second insulating layer 12. This ensures high-quality operation of the RF magnetron sputtering process and reduces the laser energy and number of laser shots during laser grooving, avoiding damage to the insulation material from high temperatures and preventing residual adhesive due to the presence of glass fibers, thus significantly improving the grooving quality. ④ The processing method for the semi-embedded packaging substrate provided in this embodiment is reasonable, the process flow is simple, and it is easy to operate and implement.

[0086] Example 2:

[0087] This embodiment 2 provides a pad-adjustable semi-embedded packaging substrate, which is manufactured using the pad-adjustable semi-embedded packaging substrate processing method described in embodiment 1 above.

[0088] For details, please refer to the appendix. Figure 10As shown, the semi-embedded packaging substrate includes a board body and a groove 7 disposed on the board body. The board body is provided with an insulating intermediate layer 11. An inner circuit layer 1, a first insulating layer 2, a circuit pattern B, a second insulating layer 12, and an outer circuit layer 6 are sequentially stacked on opposite sides of the insulating intermediate layer 11. The circuit pattern A on the inner circuit layer 1, the circuit pattern B, and the circuit pattern C on the outer circuit layer 6 are electrically connected to each other. In addition, a pad pattern 40 on one of the circuit patterns B is disposed on the bottom of the groove 7 and is exposed on the bottom of the groove 7. Moreover, the thickness of the pad pattern 40 is adjustable. A resistive film 5 is disposed on the portion of the pad pattern 40 embedded in the second insulating layer 12.

[0089] As can be seen from the above, by means of the processing method of the pad-adjustable semi-embedded packaging substrate provided in this application, the shape and size of the pad pattern 40 in the semi-embedded packaging substrate obtained in this embodiment 2 are flexibly adjustable, the packaging substrate has high quality, and well meets the packaging requirements.

[0090] Finally, the prefixes "first," "second," etc. (such as first insulating layer, second insulating layer, etc.) in the component names in this patent specification, and the suffixes "A," "B," etc. (such as intermediate plate A, intermediate plate B, etc.) in the component names are only for ease of description and are not intended to limit the scope of implementation of this patent.

[0091] Many specific details have been set forth in the foregoing description to provide a thorough understanding of the present invention. However, the above description is merely a preferred embodiment of the present invention, and the present invention can be implemented in many other ways different from those described herein. Therefore, the present invention is not limited to the specific embodiments disclosed above. Furthermore, any person skilled in the art can make many possible variations and modifications to the technical solutions of the present invention, or modify them into equivalent embodiments, using the methods and techniques disclosed above, without departing from the scope of the present invention. Any simple modifications, equivalent changes, and modifications made to the above embodiments based on the technical essence of the present invention, without departing from the content of the present invention, shall still fall within the protection scope of the present invention.

Claims

1. A method for fabricating a semi-embedded package substrate with adjustable pads, characterized in that: include: A work board is provided, wherein both opposite sides of the work board are inner circuit layers (1) with circuit patterns A, and a set area on one of the circuit patterns A is used as the part to be removed (10) to assist in the processing of the groove. A first insulating layer (2) without glass fiber and a first copper layer (3) are stacked sequentially on the two inner circuit layers (1), and circuit patterns B are made on the two first copper layers (3); the projection of one circuit pattern B toward the working board does not fall on the part to be removed (10), and the other circuit pattern B includes a pad pattern (40) that is directly opposite to the part to be removed (10). A resistive film (5) is applied to the periphery of the pad pattern (40) and the area of ​​the first insulating layer (2) within a set range surrounding the pad pattern (40) to serve as a protective structure that can block lasers; thus, an intermediate plate A is obtained. After the intermediate board A is subjected to double-sided lamination and double-sided circuit fabrication in sequence, an intermediate board B with two outer circuit layers (6) is obtained; wherein, the projection of the circuit pattern C on the outer circuit layer (6) that is far away from the pad pattern (40) toward the working board does not fall on the part to be removed (10). A groove prototype (70) is machined on the obtained intermediate board B, with an opening on an outer circuit layer (6) that is far from the pad pattern (40) and with the part to be removed (10) as the bottom of the groove. After etching away the part to be removed (10), the first insulating layer (2) located above the resistive film (5) is removed by laser ablation process, and then the resistive film (5) is partially etched away by acid etching process to obtain the groove (7). The thickness of the pad pattern (40) can be selectively adjusted.

2. The processing method of the pad-adjustable semi-embedded package substrate according to claim 1, characterized in that: A resistive film (5) with a thickness of 0.2 to 0.5 μm is deposited on the periphery of the pad pattern (40) and on the first insulating layer (2) within a set range surrounding the pad pattern (40) by a sputtering process.

3. The processing method of the pad-adjustable semi-embedded package substrate according to claim 2, characterized in that: The material of the resistive film (5) is selected from any one of nickel-chromium alloy, nickel-phosphorus alloy and tantalum.

4. The processing method of the pad-adjustable semi-embedded package substrate according to claim 2, characterized in that: The processing parameters for the sputtering process are: working gas pressure of 0.1–0.5 Pa; and radio frequency power density of 100–300 W / m³. 2 The substrate temperature is ≤80℃; the target distance is 80~150mm.

5. The processing method of the pad-adjustable semi-embedded package substrate according to claim 2, characterized in that: Before performing the sputtering process, plasma cleaning is performed on the pad pattern (40) and the area on the first insulating layer (2) surrounding the pad pattern (40) within a predetermined range, so that the residual particle amount on the surface of the first insulating layer (2) is less than 50 particles / 100cm. 2 The particle size is less than 1 μm; then the plasma-cleaned pad pattern (40) and the first insulating layer (2) are subjected to plasma modification treatment so that the surface contact angle of the first insulating layer (2) is less than 30°. After the sputtering process is completed, the resistive film (5) is subjected to low-temperature annealing.

6. The processing method of the pad-adjustable semi-embedded package substrate according to claim 1, characterized in that: After the intermediate plate B is subjected to anti-welding treatment, the groove prototype (70) is processed on the intermediate plate B using laser ablation process.

7. The processing method of the pad-adjustable semi-embedded package substrate according to claim 6, characterized in that: The first insulating layer (2) is made of pure adhesive; The groove prototype (70) is fabricated using a CO2 laser, and the processing parameters of the CO2 laser are: laser energy of 2-6 mJ, pulse width of 4-6 μs, and number of laser shots of 1-5.

8. The method for processing a semi-embedded package substrate with adjustable pads according to claim 1, characterized in that: The first insulating layer (2) located directly above the resistive film (5) is removed using a CO2 laser, and the processing parameters of the CO2 laser are: laser energy of 2-6 mJ, pulse width of 4-6 μs, and number of laser shots of 1-5. The processing parameters for the acid etching process are as follows: the concentration of hydrochloric acid in the acid etching solution is 8% to 12%, and the etching temperature is 30℃ ± 2℃.

9. The processing method of the pad-adjustable semi-embedded package substrate according to claim 1, characterized in that: After the groove (7) is made, flash etching is performed to adjust the thickness of the pad pattern (40); In addition, a surface treatment layer (8) is plated on the designated area on the circuit pattern C and on the pad pattern (40).

10. A semi-embedded packaging substrate with adjustable pads, characterized in that: It is manufactured using the processing method of any one of claims 1-9 for a semi-embedded package substrate with adjustable pads.

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