Memory fault prediction method and device, electronic equipment, chip and medium

Abstract

The invention provides a memory fault prediction method and device, electronic equipment, a chip and a medium, and relates to the technical field of fault detection.The method comprises the steps that first feature data of a first fault of a first memory module in at least one memory module within a first preset time period is obtained, the first memory module is any memory module in the at least one memory module; based on the first feature data and a fault prediction model, performing fault prediction on the first memory module to obtain a risk scoring result of a second fault of the first memory module; and based on the risk scoring result, executing a maintenance operation corresponding to the first memory module. Intelligent prediction and automatic processing of the memory fault are realized, so that the risk of service interruption caused by the memory fault is effectively reduced.

Description

Technical Field

[0001] This application relates to the field of fault detection technology, and in particular to a memory fault prediction method, device, electronic device, chip, and medium. Background Technology

[0002] Memory is one of the most critical hardware resources for data center servers, and its reliability directly determines the continuity and stability of upper-layer data services.

[0003] Currently, server maintenance is mostly reactive, only addressing memory failures after they occur. This means that memory is replaced or repaired when a substantial failure occurs, lacking effective monitoring of memory failures. This not only makes it impossible to predict memory failure risks in advance but also easily leads to server crashes, resulting in service interruptions and data corruption. Summary of the Invention

[0004] This application provides a memory fault prediction method, device, electronic device, chip, and medium to solve the problems of passive operation and maintenance, delayed fault response, and high risk of service interruption caused by the lack of intelligent prediction and automated processing of memory faults in related technologies.

[0005] The first aspect of this application proposes a memory fault prediction method, which includes: acquiring first feature data of a first memory module in at least one memory module experiencing a first fault within a first preset time period, wherein the first memory module is any one of the at least one memory modules; performing fault prediction on the first memory module based on the first feature data and a fault prediction model to obtain a risk score result of a second fault occurring in the first memory module; and performing maintenance operations corresponding to the first memory module based on the risk score result.

[0006] In some embodiments of this application, the first feature data includes at least one of the following: the number of times the first fault occurs, the frequency of the first fault, the physical address information of the first fault, the fault type of the first fault, and the environmental load data of the first fault.

[0007] In some embodiments of this application, a fault prediction is performed on the first memory module based on the first feature data and the fault prediction model to obtain a risk score result of the first memory module experiencing a second fault. Prior to this, the method includes: obtaining historical feature data of the first memory module experiencing a first fault within a second preset time period and historical risk score results of the first memory module experiencing a second fault within a second preset time period; inputting the historical feature data and historical risk score results into a preset deep learning model for training to obtain a fault prediction model.

[0008] In some embodiments of this application, performing maintenance operations corresponding to the first memory module based on the risk scoring results includes: determining the risk level of the first memory module experiencing a second failure based on the risk scoring results; and performing maintenance operations corresponding to the first memory module based on the risk level.

[0009] In some embodiments of this application, the risk level includes at least one of a first risk level, a second risk level, and a third risk level. Based on the risk level, performing maintenance operations corresponding to the first memory module includes: when the risk level is the first risk level, performing a first maintenance operation corresponding to the first memory module, the first maintenance operation including continuously monitoring the status of the first memory module; when the risk level is the second risk level, performing a second maintenance operation corresponding to the first memory module, the second maintenance operation including at least one of displaying the identification information of the first memory module on the monitoring interface, adjusting the collection frequency of the first feature data of the first memory module, and migrating the memory data of the first memory module to the second memory module; when the risk level is the third risk level, performing a third maintenance operation corresponding to the first memory module, the third maintenance operation including at least one of triggering a fault alarm, sending a secure offline request to the first server containing the first memory module, and performing a secure shutdown operation on the first server.

[0010] In some embodiments of this application, when the risk level is the third risk level, after performing the third maintenance operation corresponding to the first memory module, the method further includes: determining the identification information of the first memory module; generating a maintenance report based on the identification information, the maintenance report being used to indicate the replacement of the first memory module.

[0011] A second aspect of this application provides a memory fault prediction apparatus, the apparatus comprising: The acquisition unit acquires first characteristic data of a first fault occurring in a first memory module within a first preset time period, wherein the first memory module is any one of the at least one memory modules. The prediction unit performs fault prediction on the first memory module based on the first feature data and the fault prediction model, and obtains the risk score result of the first memory module experiencing a second fault. The execution unit performs maintenance operations corresponding to the first memory module based on the risk score results.

[0012] A third aspect of this application provides an electronic device comprising: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, the instructions being executed by the at least one processor to enable the at least one processor to perform the methods described in the first aspect of this application.

[0013] A fourth aspect of this application provides a chip including one or more interface circuits and one or more processors; the interface circuits are configured to receive signals from the memory of an electronic device and send signals to the processors, the signals including computer instructions stored in the memory, which, when executed by the processors, cause the electronic device to perform the methods described in the first aspect of this application.

[0014] A fifth aspect of this application provides a non-transitory computer-readable storage medium storing computer instructions, wherein the computer instructions are used to cause a computer to perform the methods described in the first aspect of this application.

[0015] In summary, the memory fault prediction method proposed in this application involves obtaining first characteristic data of a first memory module (any one of at least one memory modules) experiencing a first fault within a first preset time period. Based on the first characteristic data and a fault prediction model, fault prediction is performed on the first memory module to obtain a risk score for a second fault. Based on the risk score, maintenance operations corresponding to the first memory module are executed. This method achieves intelligent prediction and automated processing of memory faults, effectively reducing the risk of service interruption due to memory faults, thereby improving the overall security and reliability of the data center system.

[0016] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and do not limit this application. Attached Figure Description

[0017] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application, and do not constitute an undue limitation of this application.

[0018] Figure 1 A flowchart illustrating a memory fault prediction method provided in this application embodiment; Figure 2 A flowchart illustrating the second memory fault prediction method provided in this application embodiment; Figure 3 A flowchart illustrating the third memory fault prediction method provided in this application embodiment; Figure 4 This is a schematic diagram of the structure of a memory fault prediction device provided in an embodiment of this application; Figure 5 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application; Figure 6 This is a schematic diagram of the structure of a chip provided in an embodiment of this application. Detailed Implementation

[0019] The embodiments of this application are described in detail below. Examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and intended to explain this application, and should not be construed as limiting this application.

[0020] Memory is one of the most critical hardware resources in data center servers, and its reliability directly determines the continuity and stability of upper-layer data services. However, memory modules inevitably experience soft errors during operation, which are mainly divided into correctable and uncorrectable errors. Correctable errors (CE) can be automatically repaired at the hardware level by the memory's error correcting code (ECC) mechanism; while uncorrectable errors (UE) exceed the hardware's error correction capabilities and typically lead to system crashes, data corruption, or service interruptions, constituting a catastrophic failure. Therefore, effectively predicting and preventing UEs is a key challenge for improving the overall security and reliability of data centers.

[0021] Currently, most server maintenance models involve reactive handling after memory failures occur. That is, fault location and memory replacement are only carried out after a substantial failure such as an uncorrectable error occurs in the memory, which has already caused server crashes or data corruption.

[0022] However, the relevant technologies have significant drawbacks: on the one hand, the lack of effective monitoring of memory failures makes it impossible to optimize memory lifespan, potentially leading to excessive or untimely memory replacements, resulting in low operational efficiency. On the other hand, reactive fault handling not only consumes substantial emergency human resources, but the unplanned service interruptions it causes directly result in business losses and a decline in user experience.

[0023] To address the aforementioned issues, this application proposes a memory fault prediction method. By utilizing first characteristic data when a first memory module experiences a first fault, the method predicts the occurrence of a second fault in the first memory module. This facilitates timely maintenance of the memory module before the second fault occurs, significantly reducing service interruptions and data corruption incidents caused by the second fault of the memory module, thereby improving the overall security and reliability of the data center system.

[0024] The memory fault prediction method provided in this application will be described in detail below with reference to the accompanying drawings.

[0025] Figure 1 This is a flowchart illustrating a memory fault prediction method provided in an embodiment of this application. Figure 1As shown, the memory fault prediction method includes steps 101-103.

[0026] Step 101: Obtain first characteristic data of a first memory module in at least one memory module that has experienced a first fault within a first preset time period. The first memory module is any one of the at least one memory modules.

[0027] In the embodiments of this application, the memory module may specifically be a Dual In-line Memory Module (DIMM). The first fault is a correctable error (CE), that is, an error that can be automatically corrected by a memory error checking and correction mechanism (such as ECC) (including single-bit errors, low-order multi-bit errors, etc.). The first characteristic data refers to the current characteristic data of the first memory module when a CE occurs within a specific time period (i.e., within a first preset time period), including memory error data of the first memory module when a CE occurs, environmental and load data, etc. This application can obtain the above characteristic data through the data center operation and maintenance monitoring system and hardware interface.

[0028] Specifically, for core fault data (such as memory error data), error logs of the ECC mechanism can be read in real time through hardware interfaces provided by hardware such as the Baseboard Management Controller (BMC) of the server motherboard or the memory controller; for environmental and load data, real-time temperature data of the memory module can be read through the BMC interface via temperature sensors such as those built into the memory module or temperature acquisition units integrated into the server motherboard; the utilization rate of the Central Processing Unit (CPU) and memory can be collected in real time through the operating system kernel interface or monitoring agents (such as Prometheus Exporter); and the real-time voltage of the memory power supply circuit can be collected through the motherboard voltage monitoring module, and the difference between the maximum and minimum voltage values ​​within a preset time period can be calculated to obtain the memory voltage fluctuation value.

[0029] It should be noted that the first preset time period can be customized and adjusted through the operation and maintenance configuration interface, and is not restricted in the embodiments of this application.

[0030] Step 102: Based on the first feature data and the fault prediction model, perform fault prediction on the first memory module to obtain the risk score result of the first memory module experiencing a second fault.

[0031] In the embodiments of this application, the second fault refers to an uncorrectable error (UE), that is, a serious fault that the ECC mechanism cannot repair. The second fault is a key factor leading to service interruption.

[0032] In this application, the first characteristic data of the first fault (CE) can be used to predict the second fault (UE). The core basis is that there is a clear physical degradation causal relationship and strong statistical correlation between CE and UE. Specifically, CE is an early performance degradation signal of memory hardware due to manufacturing defects, long-term operation wear and tear, environmental load fluctuations, etc. Its multi-dimensional characteristics such as the number of occurrences, frequency, physical address distribution, and fault type can accurately characterize the degree and trend of memory module degradation. UE is not an isolated sudden fault, but the final failure manifestation after the continuous accumulation of memory hardware degradation (i.e., CE) and the breakthrough of the performance threshold. The two show a significant progressive relationship.

[0033] The fault prediction model is a deep learning model pre-trained based on historical data. This historical data includes feature data of memory modules when CE (Complete Error Detection) occurred in the past and the corresponding historical UE (User Error Detection) results (i.e., whether the memory module experienced UE after a certain point in time, usually a binary classification problem, such as yes / no). The fault prediction model is deployed locally, receiving the first feature data and outputting the risk score result as a microservice through a network interface (such as a REST API).

[0034] Specifically, the pre-trained fault prediction model is deployed as a REST API microservice. The monitoring system sends the prepared feature data of the memory module to the endpoint of the prediction microservice via a service request. Upon receiving the request, the microservice loads the fault prediction model and inputs the feature data. Based on patterns learned from historical data, the fault prediction model calculates and outputs a risk score between 0 and 1. For example, an output of 0.85 indicates that the probability of the memory module experiencing an uncorrectable error (i.e., a secondary failure) within a future prediction time window (e.g., the next 7 days) is estimated to be 85%. A higher score indicates a greater risk.

[0035] Step 103: Based on the risk score results, perform the maintenance operation corresponding to the first memory module.

[0036] In the embodiments of this application, the operation and maintenance system automatically triggers differentiated operation and maintenance actions based on the scoring results, for example: When the score is low, it means that the probability of the first memory module failing a second time is low. In this case, it is sufficient to monitor the memory module normally and record its relevant logs during operation. When the rating is in the moderate range, it indicates that the memory module has shown a trend of deterioration and there is a certain risk to the user experience (UE). The operation and maintenance system will automatically trigger multi-level preventive actions, such as: highlighting the serial number, server, and risk rating of the memory module on the monitoring dashboard to facilitate quick location by operation and maintenance personnel; increasing the frequency of characteristic data collection for the memory module to accurately track fault changes; and migrating the data of the memory module, etc. When the score is high, such as exceeding a certain threshold, it indicates that the probability of the first memory module failing a second time in the short term is extremely high. If not dealt with immediately, it will directly lead to catastrophic consequences such as server crashes and data corruption. The operation and maintenance system will automatically trigger the highest priority emergency response actions, such as triggering a high-level alarm, removing the server containing the memory module from the business load cluster, and linking with the server BMC out-of-band management interface to perform a safe shutdown operation.

[0037] In summary, the memory fault prediction method proposed in this application involves obtaining first characteristic data of a first memory module (any one of at least one memory modules) experiencing a first fault within a first preset time period. Based on the first characteristic data and a fault prediction model, fault prediction is performed on the first memory module to obtain a risk score for a second fault. Based on the risk score, maintenance operations corresponding to the first memory module are executed. This method achieves intelligent prediction and automated processing of memory faults, effectively reducing the risk of service interruption due to memory faults, thereby improving the overall security and reliability of the data center system.

[0038] In some embodiments, the first feature data includes at least: the number of times the first fault occurs, the frequency of the first fault, the physical address information of the first fault, the fault type of the first fault, and the environmental load data of the first fault occurring within a first preset time period for the first memory module.

[0039] The occurrence of the first fault refers to the cumulative absolute number of correctable errors that occur in the first memory module within a first preset time period (such as 1 hour or 24 hours), which is a basic indicator reflecting the frequency of memory faults.

[0040] The frequency of first failures (CEs) refers to the number of times a first failure occurs per unit of time (e.g., number of errors per minute, number of errors per hour). Compared to simply accumulating the number of occurrences, the frequency of first failures can more accurately capture the deterioration trend of memory failures (e.g., 10 CEs occurring in 1 hour versus 10 CEs occurring in 1 day, the former has a significantly higher risk of failure deterioration).

[0041] The physical address information of the first fault refers to the specific physical memory address (such as the row and column address of the memory cell) corresponding to the first fault in the first memory module. Some memory faults (such as partial hardware damage or row hammer attack) will show a specific address distribution pattern. This data can help identify the root cause type of the fault.

[0042] The first fault type refers to the specific error form of the first fault, which is detected and output by the memory ECC mechanism. It mainly includes single-bit errors and multi-bit errors. Among them, multi-bit errors are usually closer to the UE and are a key indicator for judging the degree of memory hardware degradation.

[0043] The environmental load data for the first failure refers to the operating environment and server load status data of the first memory module at the time of the failure, including but not limited to the real-time temperature of the memory module, CPU utilization, memory utilization, and memory voltage fluctuations. This data directly affects the stability of the memory hardware and is an important supplementary dimension for quantifying the causes of the failure. In addition, environmental load data may also include system attribute data of the memory module, such as the memory module's serial number, manufacturer, model, capacity, and speed, as well as the server model, service life, and topology.

[0044] As one possible implementation method, Figure 2 A flowchart of the second memory fault prediction method is shown. Based on the above embodiments, before predicting the fault of the first memory module using the first feature data and the fault prediction model, and obtaining a risk score result for the first memory module experiencing a second fault, the method includes the following steps: Step 201: Obtain historical feature data of the first memory module experiencing a first failure within a second preset time period and historical risk score results of the first memory module experiencing a second failure within the second preset time period.

[0045] In the embodiments of this application, the second preset time period refers to a historical backtracking period, which is generally longer than the first preset time period, and is used to collect a sufficient number of historical feature data samples. For example, server operation and maintenance logs from the past year can be backtracked. The dimensions of the historical feature data are consistent with the first feature data, including the number of historical CE occurrences, frequency, physical address, fault type, and corresponding historical environmental load data, hardware attribute data, etc.

[0046] The historical risk score result of the second failure is actually a historical failure label. For example, if the first memory module experiences a UE within a subsequent preset observation period (e.g., 7 days) corresponding to a certain feature data in the second preset time period, it is marked as a positive sample label (e.g., "1"); if no UE occurs, it is marked as a negative sample label (e.g., "0"). This label is used to clarify the target output of the model training.

[0047] The aforementioned historical data can be obtained by extracting server historical logs and monitoring system archived data (such as the Prometheus time-series database).

[0048] Step 202: Input historical feature data and historical risk score results into a preset deep learning model for training to obtain a fault prediction model.

[0049] In the embodiments of this application, the selection of the preset deep learning model can be flexibly chosen based on the scale and complexity of the historical feature data, and different artificial intelligence models or machine learning models can be selected. There are no restrictions on this in the embodiments of this application.

[0050] In one example, this application provides two optional models to adapt to different scenarios, as follows: (1) Traditional machine learning models: such as logistic regression, decision tree, random forest, gradient boosting machine (such as XGBoost, LightGBM, CatBoost), etc., are suitable for scenarios where historical feature data is structured tabular data (such as discrete features such as CE counts aggregated by hour or day, temperature statistics, hardware attribute parameters, etc.).

[0051] (2) Deep learning models: such as recurrent neural networks and long short-term memory networks, are suitable for scenarios where historical feature data is continuous time series data (such as CE counts sampled every minute or every 10 minutes, real-time voltage fluctuations, dynamic load changes, etc.). The core advantage is that it can accurately capture the trend patterns in the time dimension.

[0052] After determining the learning model based on the scale and complexity of the historical feature data, the model is trained. Specifically, during training, the model is trained using historical feature data from multiple memory modules as input and historical fault labels (i.e., historical risk score results) as the output target. The model parameters are iteratively adjusted (e.g., the decision tree depth and learning rate of a gradient booster in traditional machine learning models; the number of hidden layer neurons and the number of iterations in deep learning models) to enable the model to learn the correlation between historical feature data and the occurrence of the second fault, until the model can accurately distinguish between the data patterns of "healthy memory modules," "high-risk memory modules," and "memory modules about to fail" (specific criteria can be set as a prediction accuracy ≥ 0.9 on the validation set). After training, the fault prediction model is obtained and encapsulated as a microservice for local deployment. This microservice is then linked with monitoring and operation and maintenance systems via a network interface to achieve real-time reception of the first feature data and output of risk score results.

[0053] In summary, this application trains a pre-defined deep learning model by utilizing historical feature data of the first failure of the memory module and historical risk scores of the second failure, thereby obtaining a fault prediction model that can accurately quantify the probability of the second failure based on the first feature data collected in real time from the memory module, providing standardized and highly reliable core algorithm support for subsequent fault prediction.

[0054] As one possible implementation method, Figure 3A flowchart of the third memory fault prediction method is shown. Based on the above embodiments, and based on the risk scoring results, maintenance operations corresponding to the first memory module are performed, including the following steps: Step 301: Determine the risk level of the second failure of the first memory module based on the risk scoring results.

[0055] In the embodiments of this application, the risk score is a probability value between 0 and 1 output by the fault prediction model, used to quantify the probability of the first memory module experiencing a second fault (i.e., an uncorrectable UE error). The risk level classification in this application can specifically be three levels.

[0056] Optionally, if the risk score result falls within the first scoring range, the risk level is determined as the first risk level; if the risk score result falls within the second scoring range, the risk level is determined as the second risk level; and if the risk score result falls within the third scoring range, the risk level is determined as the third risk level.

[0057] In one example, this application predefines three non-overlapping scoring intervals, each corresponding to a risk level, and the interval thresholds can be customized through the operation and maintenance configuration interface. The specific judgment rules are as follows: when the risk score is <0.1, it is determined to be the first risk level (low risk); when 0.1 ≤ risk score <0.7, it is determined to be the second risk level (medium risk); when the risk score is ≥0.7, it is determined to be the third risk level (high risk).

[0058] It should be noted that the above scoring range can be specifically set according to actual needs or historical experience values, and is not limited in the embodiments of this application.

[0059] Step 302: Based on the risk level, perform the maintenance operation corresponding to the first memory module.

[0060] In the embodiments of this application, the maintenance operation adopts a one-to-one correspondence mechanism of "risk level and operation type". That is, different risk levels correspond to different maintenance operation types, and all operations are automatically triggered by the operation and maintenance system without human intervention, so as to ensure the timeliness and consistency of the response and avoid human operation delays or errors.

[0061] The risk levels in this application include at least one of the first risk level, the second risk level, and the third risk level. The specific maintenance operations corresponding to each risk level are as follows: In the embodiments of this application, when the risk level is the first risk level, the first maintenance operation corresponding to the first memory module is performed.

[0062] The first risk level corresponds to low risk. The first maintenance operation includes continuously monitoring and marking the status of the first memory module.

[0063] In one example, if the fault detection result of the first memory module indicates that the first memory module is at low risk (i.e., the probability of the first memory module experiencing a second fault is extremely low), then in the operation and maintenance monitoring system, the monitoring status of the first memory module can be marked as "normal" or "under observation". During this stage, no proactive repair or migration actions are triggered; only routine data collection (such as continuing to collect feature data at the original collection frequency or reducing the collection frequency) and logging are maintained. The aim is to reduce system overhead and avoid unnecessary interference.

[0064] In the embodiments of this application, when the risk level is the second risk level, the second maintenance operation corresponding to the first memory module is performed.

[0065] The second risk level corresponds to medium risk. The second maintenance operation includes at least one of the following: displaying the identification information of the first memory module on the monitoring interface, adjusting the acquisition frequency of the first characteristic data of the first memory module, and migrating the memory data of the first memory module to the second memory module.

[0066] The identification information for the first memory module may include its serial number, the server model it belongs to, and its risk score. The second memory module refers to other healthy memory modules located on the same server as the first memory module.

[0067] In one example, if the fault detection result of the first memory module indicates that the first memory module is at medium risk (i.e., indicating that the first memory module has a certain risk of a second failure), the following operation will be automatically triggered: The monitoring interface displays the identification information of the first memory module: that is, the serial number, server model and risk score of the first memory module are highlighted on the monitoring dashboard to facilitate the operation and maintenance personnel to quickly locate the target memory module. Adjust the acquisition frequency of the first characteristic data of the first memory module: that is, automatically increase the acquisition frequency of the first characteristic data of the first memory module in order to accurately capture the fault deterioration trend of the first memory module; Migrate the memory data from the first memory module to the second memory module: This involves dynamically migrating the data and applications hosted on the first memory module to a healthy memory module on the same server via the operating system's memory management interface or automated tools (such as Ansible, SaltStack, etc.), thus achieving fault isolation. Simultaneously, notify operations and maintenance personnel to schedule planned maintenance.

[0068] It should be noted that the terms "first memory module" and "second memory module" in this application are used only to distinguish any one of multiple memory modules, and are not intended to limit the number of memory modules, nor do they indicate any specific order or dependency between them. Specifically, "first memory module" in this application refers to the target memory module as the object of fault prediction and maintenance, and can refer to any memory module in a data center server cluster that needs to be monitored; "second memory module" refers only to the healthy memory module receiving data in data migration scenarios.

[0069] In practical applications, servers can be configured with multiple memory modules. This application supports risk prediction for all memory modules as "first memory modules" and can select any healthy memory module as "second memory module" to undertake data migration according to actual needs. This statement does not constitute a limitation on the number of memory modules, hardware parameters and application scenarios, but is only a distinguishing statement used to clearly illustrate the solution of this application.

[0070] Furthermore, the terms "first fault," "second fault," "first risk level," "second risk level," and "third risk level" in this application are similar and will not be repeated here.

[0071] In the embodiments of this application, when the risk level is the third risk level, the third maintenance operation corresponding to the first memory module is performed.

[0072] The third risk level corresponds to high risk. The third maintenance operation includes at least one of triggering a fault alarm, sending a secure offline request to the first server containing the first memory module, and performing a secure shutdown operation on the first server.

[0073] In one example, if the fault detection result of the first memory module indicates that the first memory module is at high risk (i.e., the probability of the first memory module experiencing a second fault is extremely high), the following operation will be automatically triggered: Trigger fault alarms: This means simultaneously triggering high-level alarms from multiple channels, including but not limited to pop-up alarms on the monitoring platform, SMS / email alarms for operations and maintenance personnel, and sound alarms in the data center, to ensure that the operations and maintenance team responds as soon as possible; Send a secure offline request to the first server containing the first memory module: that is, push a request to the load balancing system to remove the first server from the business load cluster, prevent new business requests from accessing, and avoid the spread of the fault; Perform a safe shutdown operation on the first server: that is, coordinate with the server's out-of-band management interface (such as BMC) to send an orderly shutdown command to the server, first terminate all running business processes on the server, ensure that the data is stored, and then cut off the server's power supply to avoid the risk of data loss caused by a second failure of the first memory module.

[0074] In some embodiments, when the risk level is the third risk level, after performing the third maintenance operation corresponding to the first memory module, the method further includes: determining the identification information of the first memory module; generating a maintenance report based on the identification information, wherein the maintenance report is used to indicate the replacement of the first memory module.

[0075] In the embodiments of this application, the identification information of the first memory module includes the memory module serial number, manufacturer, model, and server location. When the probability of the first memory module experiencing a second failure is extremely high, the operation and maintenance system will automatically generate a standardized maintenance report based on the identification information, clearly indicating the target memory module that needs to be replaced, and simultaneously push the maintenance report to the operation and maintenance work order system, instructing operation and maintenance personnel to quickly complete the replacement and shorten the business interruption time.

[0076] In summary, this application constructs a complete, risk-score-based hierarchical automated response closed loop by triggering different levels of responses based on risk scores. This achieves proactive prevention of memory failures, reduces operational costs through automation, effectively avoids service interruptions, and significantly improves data center operational efficiency and system reliability.

[0077] To implement the above embodiments, this application also provides a memory fault prediction device. Figure 4 This is a schematic diagram of the structure of a memory fault prediction device 400 provided in an embodiment of this application. Figure 4 As shown, the device includes: The acquisition unit 410 is used to acquire first characteristic data of a first memory module in at least one memory module that has experienced a first fault within a first preset time period, wherein the first memory module is any one of the at least one memory modules. The prediction unit 420 is used to predict the fault of the first memory module based on the first feature data and the fault prediction model, and to obtain a risk score result of the first memory module experiencing a second fault. The execution unit 430 is used to perform maintenance operations corresponding to the first memory module based on the risk scoring results.

[0078] In some embodiments of this application, the acquisition unit 410 is used to acquire at least one of the following: the number of times the first fault occurs, the frequency of the first fault, the physical address information of the first fault, the fault type of the first fault, and the environmental load data of the first fault.

[0079] In some embodiments of this application, the apparatus includes: a training unit, configured to, before performing fault prediction on the first memory module based on the first feature data and the fault prediction model to obtain a risk score result of the first memory module experiencing a second fault, acquire historical feature data of the first memory module experiencing a first fault within a second preset time period and historical risk score results of the first memory module experiencing a second fault within a second preset time period; input the historical feature data and historical risk score results into a preset deep learning model for training to obtain a fault prediction model.

[0080] In some embodiments of this application, the execution unit 430 is configured to: determine the risk level of a second failure of the first memory module based on the risk scoring result; and perform maintenance operations corresponding to the first memory module based on the risk level.

[0081] In some embodiments of this application, the execution unit 430 is configured to: perform a first maintenance operation corresponding to the first memory module when the risk level is a first risk level, the first maintenance operation including continuously monitoring the status of the first memory module; perform a second maintenance operation corresponding to the first memory module when the risk level is a second risk level, the second maintenance operation including at least one of displaying the identification information of the first memory module on the monitoring interface, adjusting the acquisition frequency of the first feature data of the first memory module, and migrating the memory data of the first memory module to a second memory module; and perform a third maintenance operation corresponding to the first memory module when the risk level is a third risk level, the third maintenance operation including at least one of triggering a fault alarm, sending a secure offline request to a first server containing the first memory module, and performing a secure shutdown operation on the first server.

[0082] In some embodiments of this application, the apparatus includes: a generation unit, configured to determine the identification information of the first memory module after performing a third maintenance operation corresponding to the first memory module when the risk level is the third risk level; and generate a maintenance report based on the identification information, wherein the maintenance report is used to instruct the replacement of the first memory module.

[0083] Since the apparatus provided in this application corresponds to the methods provided in the above-mentioned embodiments, the implementation of the methods is also applicable to the apparatus provided in this embodiment, and will not be described in detail in this embodiment.

[0084] The methods and apparatus provided in the embodiments of this application have been described above. To implement the functions of the methods provided in the embodiments of this application, the electronic device may include a hardware structure and software modules, and may implement the above functions in the form of a hardware structure, software modules, or a hardware structure plus software modules. One of the above functions may be executed in the form of a hardware structure, software modules, or a hardware structure plus software modules.

[0085] Figure 5 This is a block diagram illustrating an electronic device 500 for implementing the above-described memory fault prediction method according to an exemplary embodiment. For example, the electronic device 500 may be a mobile phone, computer, messaging device, game console, tablet device, medical device, fitness equipment, personal digital assistant, etc.

[0086] Reference Figure 5 The electronic device 500 may include one or more of the following components: processing component 502, memory 504, power supply component 505, multimedia component 505, audio component 510, input / output (I / O) interface 512, sensor component 514, and communication component 515.

[0087] Processing component 502 typically controls the overall operation of electronic device 500, such as operations associated with display, telephone calls, data communication, camera operation, and recording operations. Processing component 502 may include one or more processors 520 to execute instructions to complete all or part of the steps of the methods described above. Furthermore, processing component 502 may include one or more modules to facilitate interaction between processing component 502 and other components. For example, processing component 502 may include a multimedia module to facilitate interaction between multimedia component 505 and processing component 502.

[0088] Memory 504 is configured to store various types of data to support the operation of electronic device 500. Examples of this data include instructions for any application or method operating on electronic device 500, contact data, phonebook data, messages, pictures, videos, etc. Memory 504 can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic storage, flash memory, magnetic disk, or optical disk.

[0089] Power supply component 505 provides power to various components of electronic device 500. Power supply component 505 may include a power management system, one or more power supplies, and other components associated with generating, managing, and distributing power to electronic device 500.

[0090] Multimedia component 505 includes a screen that provides an output interface between electronic device 500 and user. In some embodiments, the screen may include a liquid crystal display (LCD) and a touch panel (TP). If the screen includes a touch panel, the screen may be implemented as a touchscreen to receive input signals from the user. The touch panel includes one or more touch sensors to sense touches, swipes, and gestures on the touch panel. The touch sensors may sense not only the boundaries of touch or swipe actions but also the duration and pressure associated with the touch or swipe operation. In some embodiments, multimedia component 505 includes a front-facing camera and / or a rear-facing camera. When electronic device 500 is in an operating mode, such as a shooting mode or video mode, the front-facing camera and / or rear-facing camera may receive external multimedia data. Each front-facing camera and rear-facing camera may be a fixed optical lens system or have focal length and optical zoom capabilities.

[0091] Audio component 510 is configured to output and / or input audio signals. For example, audio component 510 includes a microphone (MIC) configured to receive external audio signals when electronic device 500 is in an operating mode, such as call mode, recording mode, and voice recognition mode. The received audio signals may be further stored in memory 504 or transmitted via communication component 515. In some embodiments, audio component 510 also includes a speaker for outputting audio signals.

[0092] I / O interface 512 provides an interface between processing component 502 and peripheral interface modules, such as keyboards, click wheels, buttons, etc. These buttons may include, but are not limited to, home buttons, volume buttons, power buttons, and lock buttons.

[0093] Sensor assembly 514 includes one or more sensors for providing state assessments of various aspects of electronic device 500. For example, sensor assembly 514 may detect the on / off state of electronic device 500, the relative positioning of components such as the display and keypad of electronic device 500, changes in position of electronic device 500 or a component of electronic device 500, the presence or absence of user contact with electronic device 500, orientation or acceleration / deceleration of electronic device 500, and temperature changes of electronic device 500. Sensor assembly 514 may include a proximity sensor configured to detect the presence of nearby objects without any physical contact. Sensor assembly 514 may also include a light sensor, such as a CMOS or CCD image sensor, for use in imaging applications. In some embodiments, sensor assembly 514 may also include an accelerometer, gyroscope, magnetometer, pressure sensor, or temperature sensor.

[0094] Communication component 515 is configured to facilitate wired or wireless communication between electronic device 500 and other devices. Electronic device 500 can access wireless networks based on communication standards, such as WiFi, 2G or 3G, 4G LTE, 5G NR (NewRadio), or combinations thereof. In one exemplary embodiment, communication component 515 receives broadcast signals or broadcast-related information from an external broadcast management system via a broadcast channel. In one exemplary embodiment, communication component 515 also includes a near-field communication (NFC) module to facilitate short-range communication. For example, the NFC module may be implemented based on radio frequency identification (RFID) technology, Infrared Data Association (IrDA) technology, ultra-wideband (UWB) technology, Bluetooth (BT) technology, and other technologies.

[0095] In an exemplary embodiment, the electronic device 500 may be implemented by one or more application-specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field-programmable gate arrays (FPGAs), controllers, microcontrollers, microprocessors, or other electronic components to perform the methods described above.

[0096] In an exemplary embodiment, a non-transitory computer-readable storage medium including instructions is also provided, such as a memory 504 including instructions, which can be executed by a processor 520 of an electronic device 500 to perform the above-described method. For example, the non-transitory computer-readable storage medium may be a ROM, random access memory (RAM), CD-ROM, magnetic tape, floppy disk, and optical data storage device, etc.

[0097] Embodiments of this application also propose a chip, such as Figure 6 As shown, the chip includes one or more interface circuits 601 and one or more processors 602; the interface circuits are used to receive signals from the memory of the electronic device and send signals to the processors, the signals including computer instructions stored in the memory, and when the processor executes the computer instructions, it causes the electronic device to execute the memory fault prediction method described in the above embodiments of this application.

[0098] Embodiments of this application also propose a non-transitory computer-readable storage medium storing computer instructions, wherein the computer instructions are used to cause a computer to execute the memory fault prediction method described in the above embodiments of this application.

[0099] Embodiments of this application also propose a computer program product, including a computer program that is executed by a processor using the memory fault prediction method described in the above embodiments of this application.

[0100] It should be noted that the terms "first," "second," etc., used in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of this application described herein can be implemented in orders other than those illustrated or described herein. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this application. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this application as detailed in the appended claims.

[0101] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "illustrative embodiment," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with an embodiment or example is included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0102] Any process or method description in the flowchart or otherwise herein can be understood as representing a module, segment, or portion of code comprising one or more executable instructions for implementing a particular logical function or process, and the scope of the preferred embodiments of the invention includes additional implementations in which functions may be performed not in the order shown or discussed, including substantially simultaneously or in reverse order depending on the functions involved, as will be understood by those skilled in the art to which embodiments of the invention pertain.

[0103] The logic and / or steps represented in the flowchart or otherwise described herein, for example, can be considered as a sequenced list of executable instructions for implementing logical functions, and can be embodied in any computer-readable medium for use by, or in conjunction with, an instruction execution system, apparatus, or device (such as a computer-based system, a system including a processing module, or other system that can fetch and execute instructions from, an instruction execution system, apparatus, or device). For the purposes of this specification, "computer-readable medium" can be any means that can contain, store, communicate, propagate, or transmit programs for use by, or in conjunction with, an instruction execution system, apparatus, or device. More specific examples (a non-exhaustive list) of computer-readable media include: an electrical connection having one or more wires (control method), a portable computer disk drive (magnetic device), random access memory (RAM), read-only memory (ROM), erasable and editable read-only memory (EPROM or flash memory), fiber optic device, and portable optical disc read-only memory (CDROM). In addition, computer-readable media can even be paper or other suitable media on which programs can be printed, because programs can be obtained electronically, for example, by optically scanning paper or other media, followed by editing, interpreting or otherwise processing as necessary, and then stored in computer memory.

[0104] It should be understood that various parts of the embodiments of the present invention can be implemented in hardware, software, firmware, or a combination thereof. In the above embodiments, multiple steps or methods can be implemented in software or firmware stored in memory and executed by a suitable instruction execution system. For example, if implemented in hardware, as in another embodiment, it can be implemented using any one or a combination of the following techniques known in the art: discrete logic circuits having logic gates for implementing logical functions on data signals, application-specific integrated circuits (ASICs) having suitable combinational logic gates, programmable gate arrays (PGAs), field-programmable gate arrays (FPGAs), etc.

[0105] Those skilled in the art will understand that all or part of the steps of the methods described in the above embodiments can be implemented by a program instructing related hardware. The program can be stored in a computer-readable storage medium, and when executed, the program includes one or a combination of the steps of the method embodiments.

[0106] Furthermore, the functional units in the various embodiments of the present invention can be integrated into a processing module, or each unit can exist physically separately, or two or more units can be integrated into a module. The integrated module can be implemented in hardware or as a software functional module. If the integrated module is implemented as a software functional module and sold or used as an independent product, it can also be stored in a computer-readable storage medium. The storage medium mentioned above can be a read-only memory, a disk, or an optical disk, etc.

[0107] Although embodiments of the present invention have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present invention. Those skilled in the art can make changes, modifications, substitutions and variations to the above embodiments within the scope of the present invention.

Claims

1. A memory fault prediction method, characterized in that, The method includes: Acquire first characteristic data of a first memory module in at least one memory module that has a first fault within a first preset time period, wherein the first memory module is any one of the at least one memory modules; Based on the first feature data and the fault prediction model, the first memory module is fault predicted to obtain a risk score result of the first memory module experiencing a second fault. Based on the risk score, perform the maintenance operation corresponding to the first memory module.

2. The method according to claim 1, characterized in that, The first feature data includes at least one of the following: The number of times the first fault occurred, the frequency of the first fault, the physical address information of the first fault, the fault type of the first fault, and the environmental load data of the first fault.

3. The method according to claim 1, characterized in that, Before the step of predicting the fault of the first memory module based on the first feature data and the fault prediction model to obtain a risk score result for the second fault of the first memory module, the method includes: Obtain historical feature data of the first fault occurring in the first memory module within a second preset time period and historical risk score results of the second fault occurring in the first memory module within a second preset time period; The historical feature data and the historical risk score results are input into a preset deep learning model for training to obtain the fault prediction model.

4. The method according to claim 1, characterized in that, The step of performing maintenance operations corresponding to the first memory module based on the risk score result includes: Based on the risk scoring results, the risk level of the second failure of the first memory module is determined; Based on the risk level, perform the maintenance operation corresponding to the first memory module.

5. The method according to claim 4, characterized in that, The risk level includes at least one of a first risk level, a second risk level, and a third risk level. The step of performing the maintenance operation corresponding to the first memory module based on the risk level includes: When the risk level is the first risk level, the first maintenance operation corresponding to the first memory module is performed. The first maintenance operation includes continuously monitoring the status of the first memory module. When the risk level is the second risk level, a second maintenance operation corresponding to the first memory module is performed. The second maintenance operation includes at least one of the following: displaying the identification information of the first memory module on the monitoring interface, adjusting the acquisition frequency of the first feature data of the first memory module, and migrating the memory data of the first memory module to the second memory module. When the risk level is the third risk level, a third maintenance operation corresponding to the first memory module is performed. The third maintenance operation includes at least one of triggering a fault alarm, sending a secure offline request to the first server containing the first memory module, and performing a secure shutdown operation on the first server.

6. The method according to claim 5, characterized in that, When the risk level is the third risk level, after performing the third maintenance operation corresponding to the first memory module, the method further includes: Determine the identification information of the first memory module; Based on the identification information, a maintenance report is generated, which is used to indicate the replacement of the first memory module.

7. A memory fault prediction device, characterized in that, The device includes: The acquisition unit acquires first characteristic data of a first memory module in at least one memory module experiencing a first fault within a first preset time period, wherein the first memory module is any one of the at least one memory modules. The prediction unit performs fault prediction on the first memory module based on the first feature data and the fault prediction model, and obtains a risk score result of the first memory module experiencing a second fault. The execution unit performs maintenance operations corresponding to the first memory module based on the risk score result.

8. An electronic device, characterized in that, include: At least one processor; as well as A memory communicatively connected to the at least one processor; wherein, The memory stores instructions that can be executed by the at least one processor to enable the at least one processor to perform the method of any one of claims 1-6.

9. A chip, characterized in that, The device includes one or more interface circuits and one or more processors; the interface circuits are configured to receive signals from the memory of the electronic device and send the signals to the processors, the signals including computer instructions stored in the memory, which, when executed by the processors, cause the electronic device to perform the method of any one of claims 1-6.

10. A non-transitory computer-readable storage medium storing computer instructions, characterized in that, The computer instructions are used to cause the computer to perform the method according to any one of claims 1-6.

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