Feedforward capacitor using method for improving load step response

Abstract

The invention discloses a feed-forward capacitor use method for improving load step response. The feed-forward capacitor use method comprises the following steps: measuring and calculating a ride-through frequency fc0 and a gain curve slope m; calculating a K value according to the values of the feedback network resistors R1 and R2; calculating the value of a feed-forward capacitor Cf according to the parameters of K, m, fc0 and R1; load step response after the feed-forward capacitor Cf is added is measured, whether the noise increasing phenomenon exists in the output voltage steady-state ripple or not is observed, and the capacitance value of Cf is comprehensively selected to be between Cf1 and Cf2 so as to give consideration to improvement of balance phase margin PM and crossing frequency fc. The method has the advantages that an accurate mathematical model of the capacitance value of the feed-forward capacitor and the loop parameters is established, the debugging period in a typical application scene is greatly shortened, and the research and development efficiency is improved; the dynamic performance of the power supply system is obviously improved; the intelligent balance between the stability and the response speed is ensured; an adjustable capacitor array design is adopted, so that the adaptive expansion capability is high; the cost effectiveness is outstanding; and the application compatibility is wide.

Description

Technical Field

[0001] This invention belongs to the field of power system design. Specifically, this invention relates to a method for using feedforward capacitors to improve load step response, for power system optimization under dynamic load scenarios. Background Technology

[0002] In today's electronic devices, the dynamic response requirements of power supply systems are becoming increasingly stringent. When dynamic loads such as digital chips are working, the required supply current will change transiently. Such loads are particularly common in consumer electronics. These loads place even higher demands on the dynamic response of the power supply system. If the output ripple of the power supply is too large when the load experiences a step change, causing it to exceed the normal supply voltage of the load, it may lead to abnormal operation or damage of the load device, decreased reliability of the power supply system, failure of data or control signals, and other adverse consequences.

[0003] A capacitorless low-dropout regulator with fast overvoltage response (publication number CN101398694A) is provided, characterized by: a regulator having one or more discharge circuits that compensate for a small on-chip output capacitance and a long loop response time. In one embodiment, the regulator includes: an output transistor coupled to an output voltage line; an output voltage sensing device coupled to the output voltage line for generating an output feedback voltage; and an error amplifier coupled to the output feedback voltage, the output transistor, and a reference voltage for feedback control of the output transistor. A first discharge circuit is coupled to the output voltage line and the reference potential, wherein the first discharge circuit is triggered by a rapidly rising overvoltage condition. In another embodiment, a combination of fast and slow discharge circuits is used to improve the load step response—that is, to prevent the output voltage from jumping too high and quickly pull it back to a stable value, thereby protecting the load circuit. This technical solution has the following drawbacks:

[0004] The device needs to be re-calibrated for different applications, which consumes time and R&D effort. The device is too simplistic and cannot be widely used. Summary of the Invention

[0005] This invention aims to overcome the shortcomings of existing technologies and provide a method for using feedforward capacitors to improve load step response, reduce output voltage ripple during load transient changes, and maximize the dynamic response speed of the power supply system while ensuring stability. However, many variables affect the magnitude of this ripple. This invention will focus on how to reduce output voltage ripple during load jumps by modifying the loop. Increasing the crossover frequency is the most direct way to improve response speed. Without considering phase margin, increasing the crossover frequency several times will shorten the response time to a fraction of its original value. This plays a crucial role in reducing output ripple during load steps. Therefore, the key is to reasonably increase the crossover frequency. This solution will use feedforward capacitors to optimize the loop to address this issue.

[0006] To achieve the above objectives, the technical solution adopted by the present invention is as follows: a method for using a feedforward capacitor to improve the load step response, characterized by comprising the following steps:

[0007] S1: Measure the Bode plot of the initial loop to obtain the crossover frequency fc0, and observe the frequency band where the slope of the gain curve at fc0 remains basically unchanged.

[0008] S2: The slope m of the gain curve in this frequency band is calculated using the formula;

[0009] S3: Calculate the value of K based on the values ​​of the feedback network resistors R1 and R2;

[0010] S4: Calculate the recommended range of values ​​for the feedforward capacitor Cf by substituting the parameters K, m, fc0, and R1 into the corresponding formula;

[0011] S5: Measure the load step response after adding the feedforward capacitor Cf to determine whether the output voltage ripple of the power supply meets the requirements.

[0012] S6: When the output voltage ripple of the power supply meets the requirements, observe whether there is an increase in noise in the steady-state ripple of the output voltage, and whether the noise is acceptable.

[0013] S7: If the output voltage ripple of the power supply does not meet the requirements, use other solutions to improve the load step response. If the problem still cannot be solved, consider replacing it with a chip with better performance.

[0014] S8: The solution is feasible when the noise level is acceptable;

[0015] S9: When the noise is unacceptable, select the feedforward capacitor Cf as the minimum calculated value, retest the load step response and noise, and determine whether it meets the requirements.

[0016] S10: If the load step response and noise do not meet the requirements after retesting, use other solutions to improve the load step response. If the problem still cannot be solved, consider replacing the chip with one that has better performance.

[0017] S11: The solution is feasible if the load step response and noise meet the requirements after retesting.

[0018] S12: If the above steps use other solutions to improve load step response, and the problem still cannot be solved, consider replacing the chip with one that has better performance. This solution is feasible.

[0019] The slope m of the gain curve can be obtained from the formula:

[0020] m = G(f0) / (lg(fc0 / f0)) is obtained.

[0021] m represents the slope of the gain curve across the frequency range in the Bode plot, serving as an intermediate parameter for determining the value of the feedforward capacitor Cf.

[0022] The two limiting values ​​of the feedforward capacitor Cf are given by the formulas:

[0023] Cf=(k^((m-20) / (2×m))) / (2×pi×R1×fc0);

[0024] The result is obtained by Cf=(k^(1-(20 / m))) / (2×pi×R1×fc0);

[0025] The minimum value Cf1 and the maximum value Cf2 are respectively, and the value of Cf is within the range of the two extreme values.

[0026] Cf is the feedforward capacitor, used to improve the loop and reduce the output ripple during load transitions. The value of the feedforward capacitor Cf should be determined based on the actual situation, balancing PM and fc.

[0027] The value of k in the formula is obtained from the ratio of fp to fz, that is: k = fp / fz.

[0028] fz and fp represent the zeros and poles generated by the introduction of the feedforward capacitor, respectively.

[0029] fp is given by the formula:

[0030] fp = 1 / (2 × pi × (R1 / / R2) × Cf) is obtained;

[0031] fz is derived from the formula:

[0032] fz = 1 / (2×pi×R1×Cf) is obtained.

[0033] The transfer function of the voltage divider circuit of the system is H(S), where:

[0034] H(S) = Vfb / Vout; H(S) has a maximum phase when the frequency of the maximum phase is at the geometric mean of fz and fp; that is, the larger the value of k, the larger the maximum phase, and the greater the PM.

[0035] Increasing the feedforward capacitor Cf will change the crossover frequency of the voltage divider circuit. In this case, when the PM of the initial loop is very low, the minimum value of the feedforward capacitor Cf, Cf1, is selected to increase the PM.

[0036] The value of the feedforward capacitor Cf gradually increases. When fc = fp, the loop bandwidth increases to the maximum. In this case, the maximum value of the feedforward capacitor Cf, Cf2, is selected to improve the crossover frequency.

[0037] Where fc is the loop crossover frequency, defined as the frequency corresponding to a loop gain of 0dB. The magnitude of fc affects the system's response speed. The higher the fc, the higher the system bandwidth and the faster the response speed, and vice versa.

[0038] PM is the phase margin of the loop, defined as the difference between the system's phase and -180° at frequency fc. The magnitude of PM affects the stability of the system. When fc is constant, an excessively large phase margin will cause the response speed to slow down.

[0039] R1 and R2 represent the upper and lower resistances of the voltage divider resistor connected to the feedback terminal, respectively, and are used to set the output voltage value.

[0040] f0 and G(f0) represent the frequency used to calculate the value of m and the gain at that frequency, respectively.

[0041] To simplify calculations, common values ​​of m are substituted into the formula to obtain a more concise expression. During design, m can be directly approximated as 30 or 40. The value of m includes 30 and 40, but is not limited to 30 and 40; all m values ​​that can achieve this scheme are included.

[0042] The technical advantages of this invention are as follows: it establishes an accurate mathematical model of the feedforward capacitor value and loop parameters, which greatly shortens the debugging cycle in typical application scenarios and improves R&D efficiency; it significantly improves the dynamic performance of the power supply system; it ensures an intelligent balance between stability and response speed; the adjustable capacitor array design has strong adaptive expansion capability; it is cost-effective; and it has wide application compatibility. Attached Figure Description

[0043] This manual includes the following figures, which illustrate the following:

[0044] Figure 1 This is a flowchart of the system solution of the present invention;

[0045] Figure 2 This is a common feedback circuit schematic;

[0046] Figure 3 This is the initial loop gain curve.

[0047] Figure 4This is a schematic diagram of the feedforward capacitor circuit of the present invention;

[0048] Figure 5 The gain curve of H(S) after adding the feedforward capacitor Cf to this invention;

[0049] Figure 6 The maximum PM loop gain curve after adding the feedforward capacitor Cf to this invention;

[0050] Figure 7 The maximum fc loop gain curve after adding the feedforward capacitor Cf to this invention;

[0051] Figure 8 Adding a feedforward capacitor Cf to this invention does not change the gain curve fc after changing PM; Detailed Implementation

[0052] The specific embodiments of the present invention will be further described in detail below with reference to the accompanying drawings, in order to help those skilled in the art to have a more complete, accurate and in-depth understanding of the inventive concept and technical solution of the present invention, and to facilitate its implementation.

[0053] This invention employs a feedforward capacitor method to improve the load step response, reducing output voltage ripple during load transient changes and maximizing the dynamic response speed of the power supply system while ensuring stability. However, many variables affect the magnitude of this ripple. This invention focuses on how to reduce output voltage ripple during load jumps by modifying the loop. Increasing the crossover frequency is the most direct way to improve response speed. Without considering phase margin, increasing the crossover frequency several times reduces the response time to a fraction of its original value. This plays a crucial role in reducing output ripple during load steps. Therefore, the key is to reasonably increase the crossover frequency. This solution uses a feedforward capacitor to optimize the loop and address this issue.

[0054] This embodiment provides a method for using feedforward capacitors to improve load step response, such as... Figure 1 As shown, the solution includes the following steps:

[0055] S1: Measure the Bode plot of the initial loop to obtain the crossover frequency fc0, and observe the frequency band where the slope of the gain curve at fc0 remains basically unchanged.

[0056] S2: The slope m of the gain curve in this frequency band is calculated using the formula;

[0057] S3: Calculate the value of K based on the values ​​of the feedback network resistors R1 and R2;

[0058] S4: Calculate the recommended range of values ​​for the feedforward capacitor Cf by substituting the parameters K, m, fc0, and R1 into the corresponding formula;

[0059] S5: Measure the load step response after adding the feedforward capacitor Cf to determine whether the output voltage ripple of the power supply meets the requirements.

[0060] S6: When the output voltage ripple of the power supply meets the requirements, observe whether there is an increase in noise in the steady-state ripple of the output voltage, and whether the noise is acceptable.

[0061] S7: If the output voltage ripple of the power supply does not meet the requirements, use other solutions to improve the load step response. If the problem still cannot be solved, consider replacing it with a chip with better performance.

[0062] S8: The solution is feasible when the noise level is acceptable;

[0063] S9: When the noise is unacceptable, select the feedforward capacitor Cf as the minimum calculated value, retest the load step response and noise, and determine whether it meets the requirements.

[0064] S10: If the load step response and noise do not meet the requirements after retesting, use other solutions to improve the load step response. If the problem still cannot be solved, consider replacing the chip with one that has better performance.

[0065] S11: The solution is feasible if the load step response and noise meet the requirements after retesting.

[0066] S12: If the above steps use other solutions to improve load step response, and the problem still cannot be solved, consider replacing the chip with one that has better performance. This solution is feasible.

[0067] The slope m of the gain curve can be obtained from the formula:

[0068] m = G(f0) / (lg(fc0 / f0)) is obtained.

[0069] m represents the slope of the gain curve across the frequency range in the Bode plot, serving as an intermediate parameter for determining the value of the feedforward capacitor Cf.

[0070] Figure 2 This is a common output feedback circuit on the market. Figure 3 To measure using a Bode plot instrument Figure 2 The gain curve is for the entire power loop, not... Figure 2 The feedback circuit section is omitted from the discussion of the power supply circuitry, as only the effect of the feedforward capacitor is considered. Its slope near the crossover frequency fc is denoted as parameter m.

[0071] Let its slope near the crossing frequency fc be a parameter m. From the mathematical relationship, we know that:

[0072] lg(fc0 / f0)×m=G(f0);

[0073] That is, we get:

[0074] m = G(f0) / (lg(fc0 / f0));

[0075] During the design process, m can be approximated by setting m=30 or m=40. The value of m includes 30 and 40, but is not limited to 30 and 40; all m values ​​that can achieve this scheme are included.

[0076] Let fc0 be the crossover frequency before adding the feedforward capacitor Cf, and fc be the crossover frequency after adding the feedforward capacitor Cf.

[0077] The two limiting values ​​of the feedforward capacitor Cf are given by the formulas:

[0078] Cf=(k^((m-20) / (2×m))) / (2×pi×R1×fc0);

[0079] The result is obtained by Cf=(k^(1-(20 / m))) / (2×pi×R1×fc0);

[0080] The minimum value Cf1 and the maximum value Cf2 are respectively, and the value of Cf is within the range of the two extreme values.

[0081] Cf is the feedforward capacitor, used to improve the loop and reduce the output ripple during load transitions. The value of the feedforward capacitor Cf should be determined based on the actual situation, balancing PM and fc.

[0082] The value of k in the formula is obtained from the ratio of fp to fz, i.e., k = fp / fz.

[0083] fz and fp represent the zeros and poles generated by the introduction of the feedforward capacitor, respectively.

[0084] fp is given by the formula:

[0085] fp = 1 / (2 × pi × (R1 / / R2) × Cf) is obtained;

[0086] fz is derived from the formula:

[0087] fz = 1 / (2×pi×R1×Cf) is obtained.

[0088] The transfer function of the voltage divider circuit of the system is H(S), where:

[0089] H(S) = Vfb / Vout;

[0090] H(S) has a maximum phase when the frequency of the maximum phase is at the geometric mean of fz and fp; that is, the larger the value of k, the larger the maximum phase, and the greater the PM.

[0091] Increasing the feedforward capacitor Cf will change the crossover frequency of the voltage divider circuit. In this case, when the PM of the initial loop is very low, the minimum value of the feedforward capacitor Cf, Cf1, is selected to increase the PM.

[0092] The value of the feedforward capacitor Cf gradually increases. When fc = fp, the loop bandwidth increases to the maximum. In this case, the maximum value of the feedforward capacitor Cf, Cf2, is selected to improve the crossover frequency.

[0093] Where fc is the loop crossover frequency, defined as the frequency corresponding to a loop gain of 0dB. The magnitude of fc affects the system's response speed. The higher the fc, the higher the system bandwidth and the faster the response speed, and vice versa.

[0094] PM is the phase margin of the loop, defined as the difference between the system's phase and -180° at frequency fc. The magnitude of PM affects the stability of the system. When fc is constant, an excessively large phase margin will cause the response speed to slow down.

[0095] R1 and R2 represent the upper and lower resistances of the voltage divider resistor connected to the feedback terminal, respectively, and are used to set the output voltage value.

[0096] f0 and G(f0) represent the frequency used to calculate the value of m and the gain at that frequency, respectively.

[0097] To simplify calculations, common values ​​of m are substituted into the formula to obtain a more concise expression. During design, m can be directly approximated as 30 or 40. The value of m includes 30 and 40, but is not limited to 30 and 40; all m values ​​that can achieve this scheme are included.

[0098] like Figure 4 The circuit diagram with added feedforward capacitor Cf is shown. Analyze the transfer function H(S) of the voltage divider circuit and calculate the number of zeros and poles added to the system after adding feedforward capacitor Cf.

[0099] make:

[0100] H(S) = Vfb / Vout;

[0101] From the calculation, we can see that:

[0102] fz = 1 / (2×pi×R1×Cf);

[0103] fp = 1 / (2×pi×(R1 / / R2)×Cf);

[0104] make:

[0105] fp / fz=k;

[0106] but:

[0107] k = 1 + R1 / R2. In general applications, k takes values ​​from 3 to 10, but is not limited to 3 to 10.

[0108] like Figure 5 The figure shows the gain curve of H(S) after adding the feedforward capacitor Cf. For the transfer function H(S) generated by Cf, R1, and R2, the frequency of the maximum phase boost is at the geometric mean of fz and fp;

[0109] Right now:

[0110] When f = (fz × fp)^½, H(S) has the maximum phase.

[0111] Substitute:

[0112] fp / fz=k;

[0113] That is, the frequency at the maximum phase is:

[0114] f = fz × k^½.

[0115] The corresponding phase at this time is:

[0116] θ = 2 × arctan(k^½) - 90°;

[0117] It is easy to see that the larger the value of k, the larger the maximum phase. In different schemes of the feedforward capacitor Cf, such as Cf in series with a resistor, with R1 and R2 fixed, Figure 4 The circuit has the largest k value, therefore, if you want to maximize PM, Figure 4 The circuit shown is the best solution.

[0118] If we set the frequency at which the maximum phase margin for H(S) is located to fc0, it seems that the loop has achieved the maximum phase boost. However, increasing Cf changes the loop's crossover frequency, so the maximum phase boost is not achieved at the changed crossover frequency fc. The loop only achieves the maximum phase boost when the changed crossover frequency fc is at (fz×fp)^½.

[0119] Let: fc = (fz × fp)^½;

[0120] fp = k × fz;

[0121] fz = 1 / (2×pi×R1×Cf);

[0122] Depend on:

[0123] 20lg(G(fz)) / (lg(fc0)-lg(fz))=20lg(G(fz)) / (lg(fc)-lg(fz))×(m / (m-20));

[0124] get:

[0125] fc0=fz×k^((m-20) / (2×m));

[0126] Cf=(k^((m-20) / (2×m))) / (2×pi×R1×fc0);

[0127] Let the capacitance value be Cf1. The loop crossover frequency is now increased by:

[0128] fc / fc0 = k^(10 / m) times, this value corresponds to the maximum phase boost that can be achieved when using Cf, which is an improvement of:

[0129] 2×arctan(k^½)-90°. If the PM of the initial loop is very low, this is obviously the best choice.

[0130] when:

[0131] When fz > fc0, the corresponding situation is:

[0132] When Cf < 1 / (2×pi×R1×fc0), Cf has almost no effect on the loop crossing frequency, only an increase in phase;

[0133] when:

[0134] fz>10×fc0, corresponding to:

[0135] When Cf < 1 / (20×pi×R1×fc0), Cf has almost no effect on the loop. Therefore, it is not recommended to choose a value for Cf that is too small.

[0136] As the value of Cf gradually increases from Cf1, fz gradually decreases, and fc gradually increases, it is not difficult to find that when fc=fp, the loop bandwidth increases to the maximum. Continuing to increase the value of Cf will not increase the bandwidth, and the phase boost at this time is the largest compared to a larger Cf. Let's discuss the value of Cf at this time.

[0137] Depend on:

[0138] 20lg(G(fz)) / (lg(fc0)-lg(fz))=20lg(G(fz)) / (lg(fc)-lg(fz))×(m / (m-20));

[0139] Substitute:

[0140] fc = fp;

[0141] fp = k × fz;

[0142] fz = 1 / (2×pi×R1×Cf);

[0143] get:

[0144] Cf=(K^(1-(20 / m))) / (2×pi×R1×fc0);

[0145] Let the capacitance value at this time be Cf2;

[0146] At this point, the loop crossing frequency increases by: fc / fc0 = k^(20 / m) times, and fc reaches its maximum value.

[0147] At this point, PM is increased by arctan(k) - 45°. The response speed during load changes is faster, and the output voltage ripple is reduced. If the ultimate response speed is desired to minimize output ripple, PM can be appropriately reduced to accelerate the response. Fine-tuning the value of Cf to keep PM between 45° and 60° balances stability and response speed.

[0148] when:

[0149] When fc > 10 × fp, the corresponding result is obtained according to the above formula:

[0150] When Cf > ((10×K)^(1-(20 / m))) / (2×pi×R1×fc0), Cf has almost no effect on the PM of the loop. If the PM of the initial loop is insufficient, increasing Cf will not change the PM significantly, and there will be no phase boost. Therefore, it is not recommended to choose an excessively large value for Cf.

[0151] Substituting common values ​​of m into the formula yields a simpler expression. During design, m can be directly approximated by setting m=30 or m=40. The value of m includes 30 and 40, but is not limited to 30 and 40; all m values ​​that can achieve this scheme are included.

[0152] (1) When:

[0153] When m=30, Cf1 and Cf2 are approximately:

[0154] Cf1=(k^(1 / 6)) / (2×pi×R1×fc0);

[0155] Cf2=(k^(1 / 3)) / (2×pi×R1×fc0);

[0156] The recommended Cf value is between Cf1 and Cf2. If the main purpose is to improve PM, choose Cf1; if the main purpose is to improve traversal frequency, choose Cf2.

[0157] when:

[0158] Cf < 1 / (2×pi×R1×fc0), at this point Cf has almost no effect on the loop crossover frequency, and its effect on improving the load step response is not significant, so it is taken as the minimum value;

[0159] when:

[0160] Cf < 1 / (20×pi×R1×fc0), at this point Cf has almost no effect on the loop, and is the true minimum value. Cf less than this value is equivalent to no Cf.

[0161] when:

[0162] Cf > ((10×k)^(1 / 3)) / (2×pi×R1×fc0) = 10^(1 / 3)×Cf², at this point Cf has almost no effect on PM, and further increasing Cf is meaningless, so it is taken as the maximum value; the ratio of the maximum value to the minimum value within a good range is:

[0163] (10×k)^(1 / 3), in general applications k takes 3 to 10, then the maximum value is 3.1 to 4.6 times the minimum value;

[0164] (2) When:

[0165] When m=40, Cf1 and Cf2 are approximately:

[0166] Cf1=(k^(1 / 4)) / (2×pi×R1×fc0);

[0167] Cf2=(k^(1 / 2)) / (2×pi×R1×fc0);

[0168] The recommended Cf value is between Cf1 and Cf2. If the main purpose is to improve PM, choose Cf1; if the main purpose is to improve traversal frequency, choose Cf2.

[0169] when:

[0170] Cf < 1 / (2×pi×R1×fc0), at this point Cf has almost no effect on the loop crossover frequency, and its effect on improving the load step response is not significant, so it is taken as the minimum value;

[0171] when:

[0172] When Cf < 1 / (20×pi×R1×fc0), Cf has almost no effect on the loop and is the true minimum value. Cf less than this value is equivalent to no Cf.

[0173] when:

[0174] Cf > ((10×k)^(1 / 2)) / (2×pi×R1×fc0) = 10^(1 / 2)×Cf2. At this point, Cf has almost no effect on PM, and further increasing Cf is meaningless. This is considered the maximum value. The ratio of the maximum to the minimum value within a good range is:

[0175] (10×k)^(1 / 2), in general applications k takes 3 to 10, then the maximum value is 5.5 to 10 times the minimum value;

[0176] If maximum PM improvement is required, choose Cf1; if maximum bandwidth improvement and PM improvement are required, choose Cf2; if the initial loop PM value is sufficient, choose within the range mentioned above; for loops with low initial PM values, a Cf range between Cf1 and Cf2 is recommended to balance PM improvement and bandwidth improvement.

[0177] For different circuit configurations of the feedforward capacitor, the only difference lies in the different zeros fz and poles fp corresponding to these different circuit configurations, resulting in different k values. And with... Figure 4 The reason for this formal circuit analysis is that the value of k affects the upper limit of the maximum PM improvement and the upper limit of the maximum fc improvement, under the same R1 and R2 conditions. Figure 4 The circuit has the largest k value, and it is simple and cost-effective, making it the most commonly used method.

[0178] The role and effect of the embodiments

[0179] As illustrated in the above embodiments, the range of values ​​that can effectively improve the load step response is relatively narrow. Without theoretical guidance, gradually trying different values ​​with large intervals may miss the optimal Cf value. While reducing the interval can find a better Cf value, it increases development costs. This invention provides a method for using a feedforward capacitor to improve the load step response. Through theoretical design and practical testing, mathematical calculations and verification, and experimental validation, a suitable range of values ​​for the feedforward capacitor Cf has been obtained. When it is necessary to increase the PM value, the minimum value Cf1 is selected; when it is necessary to increase the crossover frequency, the maximum value Cf2 is selected; for maximum PM improvement, Cf1 is chosen; for maximum bandwidth improvement and maximizing PM improvement, Cf2 is chosen; for loops with low initial PM values, a range between Cf1 and Cf2 is recommended to balance PM improvement and bandwidth. This invention demonstrates that it establishes an accurate mathematical model of the feedforward capacitor value and loop parameters, significantly shortening the debugging cycle in typical application scenarios and improving R&D efficiency; it significantly improves the dynamic performance of the power supply system; it ensures an intelligent balance between stability and response speed; it features an adjustable capacitor array design with strong adaptive expansion capabilities; it offers outstanding cost-effectiveness; and it has wide application compatibility.

[0180] The present invention has been described above by way of example with reference to the accompanying drawings. Obviously, the specific implementation of the present invention is not limited to the above-described manner. Any non-substantial improvements made using the inventive concept and technical solution; or the direct application of the inventive concept and technical solution to other situations without modification, are all within the protection scope of the present invention.

Claims

1. A method for using a feedforward capacitor to improve load step response, characterized in that: Includes the following steps: S1: Measure the Bode plot of the initial loop to obtain the crossover frequency fc0, and observe the frequency band where the slope of the gain curve at fc0 remains basically unchanged. S2: The slope m of the gain curve in this frequency band is calculated using the formula; S3: Calculate the value of K based on the values ​​of the feedback network resistors R1 and R2; S4: Calculate the recommended range of values ​​for the feedforward capacitor Cf by substituting the parameters K, m, fc0, and R1 into the corresponding formula; S5: Measure the load step response after adding the feedforward capacitor Cf to determine whether the output voltage ripple of the power supply meets the requirements. S6: When the output voltage ripple of the power supply meets the requirements, observe whether there is an increase in noise in the steady-state ripple of the output voltage, and whether the noise is acceptable. S7: If the output voltage ripple of the power supply does not meet the requirements, use other solutions to improve the load step response. If the problem still cannot be solved, consider replacing it with a chip with better performance. S8: The solution is feasible when the noise level is acceptable; S9: When the noise is unacceptable, select the feedforward capacitor Cf as the minimum calculated value, retest the load step response and noise, and determine whether it meets the requirements. S10: If the load step response and noise do not meet the requirements after retesting, use other solutions to improve the load step response. If the problem still cannot be solved, consider replacing the chip with one that has better performance. S11: The solution is feasible if the load step response and noise meet the requirements after retesting. S12: If the above steps use other solutions to improve load step response, and the problem still cannot be solved, consider replacing the chip with one that has better performance. This solution is feasible.

2. The method for using a feedforward capacitor to improve load step response as described in claim 1, characterized in that: The slope m of the gain curve can be obtained by the formula m=G(f0) / (lg(fc0 / f0)).

3. The method for using a feedforward capacitor to improve load step response as described in claim 1, characterized in that: The two extreme values ​​of the feedforward capacitor Cf are respectively given by the formula Cf=(k^((m-20) / (2×m))) / (2×pi×R1×fc0) The values ​​obtained from Cf=(k^(1-(20 / m))) / (2×pi×R1×fc0) are the minimum value Cf1 and the maximum value Cf2, respectively, and the value of Cf is within the range of the two limits.

4. The method for using a feedforward capacitor to improve load step response as described in claim 1, characterized in that: The value of the feedforward capacitor Cf should be determined based on the actual situation, taking into account both PM and fc.

5. A method for using a feedforward capacitor to improve load step response as described in claim 3, characterized in that: In the formula, the value of k is obtained by the ratio of fp to fz, i.e., k = fp / fz; fz and fp represent the zero and pole respectively generated by the introduction of the feedforward capacitor.

6. The method for using a feedforward capacitor to improve load step response as described in claim 5, characterized in that: The fp is obtained by the formula fp=1 / (2×pi×(R1 / / R2)×Cf), and the fz is obtained by the formula fz=1 / (2×pi×R1×Cf).

7. A method for using a feedforward capacitor to improve load step response as described in claim 1, characterized in that: The transfer function of the voltage divider circuit of the system is H(S), where H(S) = Vfb / Vout; H(S) has the maximum phase when the frequency of the maximum phase of H(S) is at the geometric mean of fz and fp; that is, the larger the value of k, the larger the maximum phase, and the greater the PM.

8. A method for using a feedforward capacitor to improve load step response as described in claim 1, characterized in that: The crossover frequency of the voltage divider circuit will change after the feedforward capacitor Cf is increased. In this case, when the PM of the initial loop is very low, the minimum value of the feedforward capacitor Cf1 is selected to increase the PM.

9. A method for using a feedforward capacitor to improve load step response as described in claim 1, characterized in that: The value of the feedforward capacitor Cf gradually increases. When fc = fp, the loop bandwidth increases to the maximum. In this case, the maximum value of the feedforward capacitor Cf, Cf2, is selected to improve the crossover frequency.

10. A method for using a feedforward capacitor to improve load step response, characterized in that, The method of using the feedforward capacitor includes a method of using the feedforward capacitor to improve the load step response as described in any one of claims 1-9.

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