A method for preparing an LED epitaxial structure
By introducing a periodic stress relief layer and a multi-quantum well layer interface treatment and a current spreading layer into the GaN-based LED epitaxial structure, the internal stress problem caused by lattice mismatch and the difference in thermal expansion coefficients is solved, improving crystal quality and luminous efficiency, and enhancing device reliability and high-current operating performance.
CN122269891APending Publication Date: 2026-06-23FUJIAN PRIMA OPTOELECTRONICS CO LTD
0 Cites 0 Cited by
Patent Information
- Application Number
- CN202610378759.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-03-26
- Publication Date
- 2026-06-23
Smart Images
Figure CN122269891A_ABST
Abstract
This invention discloses a method for fabricating an LED epitaxial structure, wherein a stress relief layer is grown on an N-type semiconductor layer; the stress relief layer comprises an InGaN layer, a GaN layer, and an Al layer grown sequentially according to a first preset cycle. Y Ga1 Y N layer and B X Ga1 X N layers; growing Al Y Ga1 Y In the N-layer stage, the reaction chamber temperature is set to 700-900℃, the reaction chamber pressure to 100-500 mbar, and 25-1000 sccm of TMAl and 25-1000 sccm of TEGa are introduced into the reaction chamber to form Al. Y Ga1 Y N layers; during the growth of B X Ga1 X In the N-layer stage, the reaction chamber temperature is set to 700-950℃, the reaction chamber pressure to 100-500 mbar, and 25-1000 sccm of TEB and 25-1000 sccm of TEGa are introduced into the reaction chamber to form B. X Ga1 X N layers. This invention can improve the crystal quality of the subsequent multi-quantum-well active region, enabling the LED epitaxial structure to have better luminous efficiency and device reliability.
Need to check novelty before this filing date? Find Prior Art