Storage system and electronic equipment

Abstract

The utility model provides a storage system and electronic equipment, and the storage system comprises a main controller which is provided with a storage interface; the first conversion module is used for converting the first signal into a second signal, the first conversion module is provided with a first signal interface and a second signal interface, and the first signal interface is used for being electrically connected with the storage interface; the hot plug connector supports hot plug and is electrically connected with the second signal interface; the second conversion module is used for converting the second signal into the first signal, the second conversion module is provided with a third signal interface and a fourth signal interface, the third signal interface is electrically connected with the hot plug connector, and the fourth signal interface is used for being electrically connected with the storage device. According to the embodiment of the utility model, the hot plug of the storage device can be realized only through a hardware structure, cooperation with software is not needed, the hardware structure is simple, and the method for realizing the hot plug of the storage device is simple.

Description

Technical Field

[0001] The utility model relates to the technical field of storage, in particular to a storage system and electronic equipment. Background Art

[0002] Currently, a PCIE (Peripheral Component Interconnect Express, a high-speed serial embedded device expansion bus standard) interface on a storage device is directly connected to a CPU (Central Processing Unit, a central processing unit).

[0003] However, the above connection method does not support hot plugging, that is, it does not support inserting or unplugging storage devices when the storage system is running. If hot plugging is to be achieved, software and hardware collaboration is required, that is, the implementation method of hot plugging of storage devices with PCIE interfaces is complicated. Utility Model Content

[0004] In view of the above problems, the embodiments of the present utility model provide a storage system and an electronic device to at least solve the technical problem of the complicated implementation method of hot plugging of storage devices with PCIE interfaces in the prior art.

[0005] The present invention provides a storage system, comprising:

[0006] A main controller having a storage interface;

[0007] A first conversion module, used for converting the first signal into a second signal, the first conversion module having a first signal interface and a second signal interface, the first signal interface being used for being electrically connected to the storage interface;

[0008] A hot-plug connector supporting hot plugging, electrically connected to the second signal interface;

[0009] A second conversion module, used for converting the second signal into the first signal, the second conversion module having a third signal interface and a fourth signal interface, the third signal interface is electrically connected to the hot-swappable connector, and the fourth signal interface is used for electrically connecting to a storage device;

[0010] Among them, the first signal is a PCIE signal, the second signal is a USB signal, the storage interface, the first signal interface and the fourth signal interface are all PCIE interfaces, and the second signal interface and the third signal interface are all USB interfaces.

[0011] Optionally, the hot-swap connector includes a first USB connector and a second USB connector plugged into the first USB connector, and the first USB connector and the second USB connector are connected to the second signal interface and the third signal interface respectively.

[0012] Optionally, it also includes a storage device connector electrically connected to the fourth signal interface, the storage device connector has a PCIE socket, and the PCIE socket is used for plugging in the storage device.

[0013] Optionally, the first conversion module has two second signal interfaces, the two second signal interfaces are electrically connected to two hot-plug connectors respectively, and the two hot-plug connectors are electrically connected to two second conversion modules respectively.

[0014] Optionally, the first conversion module includes a first main control chip and a first power control chip, the first signal interface and the second signal interface are arranged on the first main control chip, and the first power control chip is electrically connected to the first USB connector.

[0015] Optionally, the first conversion module further includes a first flash memory chip electrically connected to the first main control chip, and the first flash memory chip is used to store startup configuration firmware of the first main control chip.

[0016] Optionally, the second conversion module includes a second main control chip and a second flash memory chip electrically connected to the second main control chip, the fourth signal interface and the third signal interface are set on the second main control chip, and the second flash memory chip is used to store the startup configuration firmware of the second main control chip.

[0017] Optionally, the first master control chip is connected to a first clock source circuit, and the first clock source circuit is used to provide a clock signal for the first master control chip.

[0018] Optionally, the second master control chip is connected to a second clock source circuit, and the second clock source circuit is used to provide a clock signal for the second master control chip.

[0019] The utility model also provides an electronic device, comprising any one of the storage systems described above.

[0020] The utility model embodiment includes the following advantages:

[0021] In the embodiment of the utility model, the storage interface on the main controller converts the PCIE signal into a USB signal through the first conversion module, the first conversion module is connected to the second conversion model through the hot plug connector, and the second conversion model converts the USB signal into a PCIE signal so that it can be electrically connected to the storage device with the PCIE interface; when unplugging without power failure, the hot plug connector supporting hot plug is first disconnected, and the storage device can be unplugged after disconnection, and when plugging without power failure, the storage device is first inserted, and then the hot plug connector supporting hot plug is plugged, so as to realize the hot plug of the storage device. In the embodiment of the utility model, the hot plug of the storage device can be realized only through the hardware structure, without the need for coordination with the software, and the hardware structure is simple, and the method for realizing the hot plug of the storage device is simple, which solves the technical problem of the complex implementation method of the hot plug of the storage device with the PCIE interface in the prior art. In addition, the method of converting the PCIE signal and the USB signal to each other is conducive to improving the transmission rate compared with converting to other signals. In addition, the structure of the storage system is simple, which is conducive to the high-density miniaturization of the entire storage system. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 It is a structural block diagram of a storage system provided by an embodiment of the utility model;

[0023] Figure 2 It is a structural block diagram of another storage system provided by an embodiment of the utility model;

[0024] Figure 3 It is a structural block diagram of another storage system provided by an embodiment of the utility model;

[0025] Figure 4 is a structural block diagram of a first conversion module provided in an embodiment of the utility model;

[0026] Figure 5 is a structural block diagram of a second conversion module provided by an embodiment of the utility model;

[0027] Figure 6 This is a circuit diagram of the connection between the first main control chip and the first flash memory chip provided by an embodiment of the utility model;

[0028] Figure 7 A circuit diagram of connecting a first main control chip provided by an embodiment of the utility model to a first USB connector in a hot-swap connector;

[0029] Figure 8 This is a circuit diagram of the first main control chip and the first clock source circuit provided by the embodiment of the utility model;

[0030] Fig. 9 This is a circuit diagram of the connection between the second main control chip and the second flash memory chip provided by an embodiment of the utility model;

[0031] Fig.10 is a circuit diagram of the connection between the second main control chip and the second clock source circuit in the embodiment of the utility model;

[0032] Fig.11 This is a circuit diagram of the connection between the second main control chip provided by the embodiment of the utility model and the second USB connector in the hot plug connector.

[0033] Reference numerals:

[0034] 10-first main control chip, 11-first signal interface, 12-second signal interface, 20-second main control chip, 21-third signal interface, 22-fourth signal interface, 31-PCIE socket, 41-storage interface, 50-first flash memory chip, 60-second flash memory chip, 71-first USB connector, 72-second USB connector, 81-first quartz crystal oscillator, 91-second quartz crystal oscillator. DETAILED DESCRIPTION

[0035] In order to make the above-mentioned purposes, features and advantages of the present invention more obvious and easy to understand, the present invention is further described in detail below in conjunction with the accompanying drawings and specific implementation methods.

[0036] In a storage system, in order to support hot-swappable hard disks, the PCIE interface of the CPU is usually connected to a Raid (Redundant Array of Independent Disks) card, and the PCIE bus is converted to a SATA (Serial ATA) bus through the Raid card and then connected to a hard disk with a SATA interface. However, the transmission rate of this method is limited by the fact that the data transmission rate of the SATA bus is much lower than the actual data transmission rate of a solid-state hard disk with a PCIEx4 interface that uses the NVMe (Non-Volatile Memory Express) protocol. In addition, the method of expanding the SATA interface through a Raid card connected to the PCIE interface also increases the complexity and cost of the system, and may affect the stability of the system.

[0037] In addition, although the PCIE protocol can support hot plugging through expansion cards, certain conditions are required. First, the motherboard, operating system, motherboard hot plug driver and PCIE card device driver must all support hot plugging, and the PCIE card hardware function must also support the Quiesce command, Pause command (optional), Start command and Resume command. Secondly, in order to prevent damage to the motherboard or PCIE slot when plugging and unplugging a PCIE SSD (Solid State Drive) without power failure, the PCIE Spec has designed a "No Surprise" hot plug mechanism, that is, when the user wants to plug and unplug a PCIE device, the system software must be notified to prepare first, and then the user is informed of the hot plug status through the indicator light. That is, the implementation of hot plugging requires not only hardware support, but also software collaboration. To realize the hot plug function, the operating system, motherboard hot plug driver, PCIe card device driver and PCIe card hardware function must all support hot plugging, and none of them can be missing.

[0038] Reference Figures 1 to 3 The embodiment of the utility model provides a storage system, including: a main controller, having a storage interface 41; a first conversion module, used to convert a first signal into a second signal, the first conversion module having a first signal interface 11 and a second signal interface 12, the first signal interface 11 is electrically connected to the storage interface 41; a hot-plug connector supporting hot plugging, electrically connected to the second signal interface 12; a second conversion module, used to convert the second signal into a first signal, the second conversion module having a third signal interface 21 and a fourth signal interface 22, the third signal interface 21 is electrically connected to the hot-plug connector, and the fourth signal interface 22 is used to electrically connect a storage device; the first signal is a PCIE signal, the second signal is a USB (Universal Serial Bus) signal, the storage interface 41, the first signal interface 11 and the fourth signal interface 22 are all PCIE interfaces, and the second signal interface 12 and the third signal interface 21 are all USB interfaces.

[0039] Specifically, the storage system is applied to electronic devices, which may be computers, embedded devices, etc. The main controller is responsible for data calculation and processing, and the storage device is used to store data to provide the main controller with instructions to be executed and data required to execute the instructions. The main controller reads the data stored on the storage device through the storage interface 41 thereon. The main controller may be a CPU, a bridge chip or an MCU (Micro Controller Unit) with a PCIE interface, etc. The main controller has at least one storage interface 41. The hot-swappable connector is a high-speed connector that can support at least 2 pairs of high-speed differential signals. The storage interface 41, the first signal interface 11, and the fourth signal interface 22 may all be PCIE3.0x4 interfaces, PCIE4.0x4 interfaces, PCIE5.0x4 interfaces, etc., to ensure a high transmission rate. The storage interface 41, the first signal interface 11, and the fourth signal interface 22 are preferably PCIE4.0x4 interfaces.

[0040] The second signal interface 12 and the third signal interface 21 can be USB2.0 interface, USB3.0 interface, USB3.2 interface, USB4.0 interface, etc. to ensure a high transmission rate. The second signal interface 12 and the third signal interface 21 are preferably USB3.2 interface or USB4.0 interface, the transmission rate of USB3.2 interface can reach 20Gbps, and the transmission rate of USB4.0 interface can reach 40Gbps. When the second signal interface 12 and the third signal interface 21 are USB3.2 interface or USB4.0 interface, the storage system can still maintain a high transmission rate after converting the PCIE signal, thereby enabling the storage system to have ultra-high-speed transmission performance.

[0041] Hot Swap means plugging and unplugging with power on, which means inserting or unplugging modules, boards, etc. into or out of the system without turning off the system power, without affecting the normal operation of the system, thereby improving the reliability, redundancy, rapid maintenance and timely recovery capabilities of the system from disasters. The hot-swap connector supports hot plugging, that is, the hot-swap connector itself can be plugged in and unplugged without powering off. The storage device has a PCIE interface, and the fourth signal interface 22 is electrically connected to the PCIE interface on the storage device. The storage device can be a storage device that supports the NVMe protocol, such as an NVMe solid-state drive, which has the advantages of low latency, low energy consumption, and high performance.

[0042] The second conversion module can be specifically connected to the storage device through a storage device connector, and the storage device is plugged into the storage device connector, so that the storage device can be plugged and unplugged separately. In other embodiments, the storage device and the second conversion module can be integrated together, in which case the storage device is directly connected to the second conversion module, and the storage device and the second conversion module are plugged and unplugged during plugging and unplugging.

[0043] The storage system supports hot-swapping of storage devices, which is convenient and flexible to use, so that a failed storage device can be replaced without shutting down the system, and the system software and other services can continue to run during the repair period; in addition, even shutting down and restarting the software related to the storage device will not affect the hot-swapping of the storage device.

[0044] At present, in order to realize the hot plug of PCIE expansion cards, not only the software and hardware of the entire system need to cooperate with each other, but also detailed control logic is needed to ensure its reliability and security. As a result, the implementation of hot plug is complicated and the development workload is huge.

[0045] In the embodiment of the utility model, the storage interface on the main controller converts the PCIE signal into a USB signal through the first conversion module, the first conversion module is connected to the second conversion model through the hot plug connector, and the second conversion model converts the USB signal into a PCIE signal so that it can be electrically connected to the storage device with the PCIE interface; when unplugging without power failure, the hot plug connector supporting hot plug is first disconnected, and the storage device can be unplugged after disconnection, and when plugging without power failure, the storage device is first inserted, and then the hot plug connector supporting hot plug is plugged, so as to realize the hot plug of the storage device. In the embodiment of the utility model, the hot plug of the storage device can be realized only through the hardware structure, without the need for coordination with the software, and the hardware structure is simple, and the method for realizing the hot plug of the storage device is simple, which solves the technical problem of the complex implementation method of the hot plug of the storage device with the PCIE interface in the prior art. In addition, the method of converting the PCIE signal and the USB signal to each other is conducive to improving the transmission rate compared with converting to other signals. In addition, the structure of the storage system is simple, which is conducive to the high-density miniaturization of the entire storage system.

[0046] In addition, although the design of the entire storage system adds two-stage conversion circuits, the performance of data transmission is not lost, and the overall size of the storage system is smaller than the SATA storage system in the prior art. Figure 3 The storage system can be continuously expanded according to the number of storage interfaces of the main controller to increase the storage capacity of the entire storage system.

[0047] Reference Figure 2 The hot-swap connector includes a first USB connector 71 and a second USB connector 72 plugged into the first USB connector 71 . The first USB connector 71 and the second USB connector 72 are connected to the second signal interface 12 and the third signal interface 21 , respectively.

[0048] Specifically, when the second signal interface 12 and the third signal interface 21 are USB3.2 interfaces or USB4.0 interfaces, the hot-plug connector can be a high-speed connector in the form of Type-C, which supports double-sided insertion. When the second signal interface 12 and the third signal interface 21 are USB2.0 interfaces or USB3.0 interfaces, the hot-plug connector can be a USB connector in the form of Type-A or Type-B. The first USB connector 71 has a first USB connection interface, and the second USB connector 72 has a second USB connection interface corresponding to the first USB connection interface. When the hot-plug connector is a high-speed connector in the form of Type-C, both the first USB connection interface and the second USB connection interface are USB4.0 interfaces in the form of Type-C.

[0049] The second USB connector 72 can be plugged into the first USB connector 71 and can also be unplugged from the first USB connector 71. After the storage device is connected to the second conversion module, when the second USB connector 72 is plugged into the first USB connector 71, the connection between the storage device and the main controller is turned on. After the second USB connector 72 is unplugged from the first USB connector 71, the connection between the storage device and the main controller is disconnected. At this time, the storage device can be unplugged without affecting the normal operation of the system. The hot-swappable connector itself supports hot plugging, that is, the second USB connector 72 can be unplugged from the first USB connector 71 without powering off. Therefore, the plugging and unplugging of the storage device can be achieved without powering off by hot-plugging the second USB connector 72 and the first USB connector 71.

[0050] The first USB connector 71 can be connected to the second signal interface 12 on the first conversion module via a cable, and the second USB connector 72 can be connected to the third signal interface 21 on the second conversion module via a cable to ensure the flexibility of plugging and unplugging the first USB connector 71 and the second USB connector 72.

[0051] The principle of hot-swappable connector is that the power pin used for power supply in the second USB connection interface is relatively long, and the data pin used for data transmission is relatively short. When the second USB connector is inserted into the first USB connector, the longer power pin is connected first to supply power, and the data pin can exchange data in the power-on state. When the second USB connector is unplugged, the data pin is disconnected first, thereby disconnecting the data transmission to ensure that the data will not be lost due to power failure, and then the power pin is disconnected. In this way, it can be ensured that there is no impact on the main controller, the hot-swappable connector, and the storage device during the hot-swappable process, so as to realize the hot-swappable function.

[0052] Reference Figure 2The storage system provided by the embodiment of the utility model further includes a storage device connector electrically connected to the fourth signal interface 22, and the storage device connector has a PCIE socket 31, and the PCIE socket 31 is used for plugging in the storage device.

[0053] Specifically, the storage device connector can be a high-speed connector that supports the NVMe protocol. The storage device connector can be connected to the fourth signal interface 22 through a high-speed differential PCIE signal line. The differential signal has strong anti-interference ability, high signal quality, and fast transmission speed. The PCIE interface on the storage device can be inserted into the PCIE socket 31 on the storage device connector, and the storage device can also be unplugged from the PCIE socket 31 on the storage device connector. The setting of the storage device connector facilitates the plugging and unplugging of the storage device.

[0054] Reference Figure 2 The first conversion module has two second signal interfaces 12, the two second signal interfaces 12 are electrically connected to two hot plug connectors respectively, and the two hot plug connectors are electrically connected to two second conversion modules respectively.

[0055] Specifically, the first conversion module has a first signal interface 11, and the first conversion module is connected to a storage interface 41 on the main controller. The storage interface 41 on the main controller can be connected to two storage devices through the first conversion module, two hot-swappable connectors, two second conversion modules and two storage device connectors, thereby increasing the number of storage devices that can be connected to the main controller.

[0056] Reference Figure 4 The first conversion module includes a first main control chip 10 and a first power control chip. The first signal interface 11 and the second signal interface 12 are arranged on the first main control chip 10. The first power control chip is electrically connected to the first main control chip 10 and the first USB connector 71.

[0057] Specifically, the first main control chip 10 is used to realize the function of converting PCIE signals into USB signals. The first signal interface 11 on the first main control chip 10 is an upstream interface, and the second signal interface 12 is a downstream interface. The data transmission positive and negative interfaces in the first signal interface 11 are both connected to the data receiving end of the storage interface 41 on the main controller, and the data receiving positive and negative interfaces in the first signal interface 11 are both connected to the data transmitting end of the storage interface 41 on the main controller. The storage interface 41 includes a plurality of first pins, and the first signal interface 11 includes a plurality of second pins connected to the plurality of first pins in the storage interface 41. The number of the first pins and the number of the second pins can be specified values. Exemplarily, the number of the first pins and the number of the second pins can be 19.

[0058] The connection line connecting the second signal interface 12 and the first USB connector 71 includes a pair of high-speed differential signal lines to ensure high-speed data transmission. Figure 7 The first USB connector 71 has VBUS1 pin to VBUS4 pin, which are connected to the first power control chip. The power provided by the first power control chip to the first USB connector 71 may be a +5V-+5.5V power supply. Figure 7 The second signal interface 12 includes a plurality of fifth pins, and the first USB connector 71 has a plurality of sixth pins connected to the plurality of fifth pins. The plurality of fifth pins can refer to Figure 7 Multiple pins are shown on the first main control chip 10.

[0059] The first main control chip 10 is connected to the first power control chip through two first buses, and the first bus can be an I2C bus. The first power control chip is electrically connected to the second signal interface 12, and is used to output the external power supply of the two first USB connectors. The first power control chip can supply power to the first main control chip 10 and to the first USB connector 71. The first power control chip also has powerful power management and protection functions.

[0060] Reference Figure 4 The first conversion module further includes a first flash memory chip 50 electrically connected to the first main control chip 10, and the first flash memory chip 50 is used to store the startup configuration firmware of the first main control chip 10. Specifically, the first flash memory chip 50 can be a serial Flash chip, and the first flash memory chip 50 is electrically connected to the first main control chip 10 through a third bus, and the third bus can be a SPI (Serial Peripheral Interface) bus.

[0061] Reference Figure 6 The first main control chip 10 has a SPI_CS pin, a SPI_CLK pin, a SPI_DI pin, a SPI_DO pin, and a SPI_WP# pin. The first flash memory chip 50 has a CS# pin connected to the SPI_CS pin, a DO / IO1 pin connected to the SPI_DI pin, a WP# pin connected to the SPI_WP# pin, a CLK pin connected to the SPI_CLK pin, and a DO / IO0 pin connected to the SPI_DO pin. The DO / IO1 pin is also connected to a power supply, which can be 3.3V. The first flash memory chip 50 also has a GND pin, a VCC pin, and a HOLD# pin. The GND pin is grounded, and the VCC pin and the HOLD# pin are both connected to a power supply, which can be a 3.3V power supply.

[0062] Reference Figure 5The second conversion module includes a second main control chip 20 and a second flash memory chip 60 electrically connected to the second main control chip 20, the fourth signal interface 22 and the third signal interface 21 are set on the second main control chip 20, and the second flash memory chip 60 is used to store the startup configuration firmware of the second main control chip 20.

[0063] Specifically, the second main control chip 20 is used to realize the function of converting USB signals into PCIE signals. The third signal interface 21 on the second main control chip 20 is an upstream interface, and the data transmission positive and negative interfaces in the third signal interface 21 are both connected to the data receiving end of the second USB connector 72 in the hot plug connector, and the data receiving positive and negative interfaces in the third signal interface 21 are both connected to the data transmitting end of the second USB connector 72 in the hot plug connector, and the fourth signal interface 22 is a downstream interface. The connection line connecting the third signal interface 21 and the second USB connector 72 includes a pair of high-speed differential signal lines to ensure high-speed data transmission. The storage device connector is specifically connected to the fourth signal interface 22 through a preset number of high-speed differential PCIE signal lines, and the preset number can be 8. The storage device connector has a plurality of third pins, and the fourth signal interface 22 includes a plurality of fourth pins connected to the plurality of third pins. The number of the third pins and the number of the fourth pins can be specified values. Exemplarily, the number of the third pins and the number of the fourth pins can be 18.

[0064] The second flash memory chip 60 may be a serial Flash chip. The second flash memory chip 60 is electrically connected to the second main control chip 20 via a fourth bus. The fourth bus may be an SPI bus. Fig. 9 The second main control chip 20 has a SPI_CS# pin, a SPI_CLK pin, a SPI_DI pin, and a SPI_DO pin. The second flash memory chip 60 has a CS# pin connected to the SPI_CS# pin, a DO / IO1 pin connected to the SPI_DI pin, a CLK pin connected to the SPI_CLK pin, and a DO / IO0 pin connected to the SPI_DO pin. The second flash memory chip 60 also has a WP# pin, a GND pin, a VCC pin, and a HOLD# pin. The GND pin is grounded, and the WP# pin, the VCC pin, and the HOLD# pin are all connected to a power source.

[0065] The second main control chip 20 is also connected to a second power control chip, which is electrically connected to the second main control chip 20 and the second USB connector 72. The second main control chip 20 is connected to the second power control chip via two second buses, which may be I2C buses, and the second power control chip is used to output the external power supply of the second USB connector. The second power control chip can supply power to both the second main control chip 20 and the second USB connector 72.

[0066] Reference Fig.11 The second USB connector 72 has VBUS1 pin to VBUS4 pin, which are connected to the second power control chip. The power provided by the second power control chip to the second USB connector 72 can be +5V-+5.5V power. Fig.11 The third signal interface 21 includes a plurality of seventh pins, and the second USB connector 72 has a plurality of eighth pins connected to the plurality of seventh pins. The plurality of seventh pins can refer to Fig.11 Multiple pins are shown on the second main control chip 20.

[0067] Reference Figure 4 and Figure 5 The first master control chip 10 is connected to a first clock source circuit, and the first clock source circuit is used to provide a clock signal for the first master control chip 10. The second master control chip 20 is connected to a second clock source circuit, and the second clock source circuit is used to provide a clock signal for the second master control chip 20.

[0068] Specifically, the first clock source circuit includes a first quartz crystal oscillator 81 having a first preset frequency. The first quartz crystal oscillator 81 is used to provide a clock signal for the first main control chip 10. The first preset frequency may be 25 MHz. Figure 8 The first main control chip 10 has an X1 pin and an XO pin, the first quartz crystal oscillator 81 has an OUT pin connected to the X1 pin and an INPUT pin connected to the XO pin, and the first quartz crystal oscillator 81 also has a grounded GND0 pin and a grounded GND1 pin. The X1 pin on the first main control chip 10 is also grounded through a capacitor C936, and the XO pin is also grounded through a capacitor C935.

[0069] The second clock source circuit includes a second quartz crystal oscillator 91 having a second preset frequency. The second quartz crystal oscillator 91 is used to provide a clock signal for the second main control chip 20. The second preset frequency may be 25 MHz. Fig.10 The second main control chip 20 has an X1 pin and an XO pin, the second quartz crystal oscillator 91 has an OUT pin connected to the X1 pin and an INPUT pin connected to the XO pin, and the second quartz crystal oscillator 91 also has a grounded GND0 pin and a grounded GND1 pin. The X1 pin on the second main control chip 20 is also grounded through a capacitor C981, and the XO pin is also grounded through a capacitor C982.

[0070] The embodiment of the utility model further provides an electronic device, which includes the storage system provided above. Since the electronic device includes the storage system above, it also has the beneficial effects of the storage system above, which will not be described in detail here.

[0071] The above is a detailed introduction to a storage system and electronic device provided by the utility model. This article uses specific examples to illustrate the principles and implementation methods of the utility model. The description of the above embodiments is only used to help understand the method and core idea of ​​the utility model; the protection scope of the utility model is not limited to this. Any technician familiar with the technical field can easily think of changes or replacements within the technical scope disclosed by the utility model, which should be covered within the protection scope of the utility model. Therefore, the protection scope of the utility model shall be based on the protection scope of the claims. It should be pointed out that for ordinary technicians in this technical field, without departing from the principles described in the utility model, several improvements and modifications can be made, and these improvements and modifications should also be regarded as the protection scope of the utility model.

[0072] Finally, it should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or terminal device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or terminal device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or terminal device including the elements.

[0073] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims

1. A storage system, It is characterized in that include: A main controller having a storage interface; A first conversion module, used for converting the first signal into a second signal, the first conversion module having a first signal interface and a second signal interface, the first signal interface being electrically connected to the storage interface; A hot-plug connector supporting hot plugging, electrically connected to the second signal interface; A second conversion module, used for converting the second signal into the first signal, the second conversion module having a third signal interface and a fourth signal interface, the third signal interface is electrically connected to the hot-swappable connector, and the fourth signal interface is used for electrically connecting to a storage device; Among them, the first signal is a PCIE signal, the second signal is a USB signal, the storage interface, the first signal interface and the fourth signal interface are all PCIE interfaces, and the second signal interface and the third signal interface are all USB interfaces.

2. The storage system according to claim 1, It is characterized in that The hot-plug connector includes a first USB connector and a second USB connector plugged into the first USB connector, and the first USB connector and the second USB connector are connected to the second signal interface and the third signal interface respectively.

3. The storage system according to claim 1, It is characterized in that It also includes a storage device connector electrically connected to the fourth signal interface, wherein the storage device connector has a PCIE socket, and the PCIE socket is used for plugging in the storage device.

4. The storage system according to claim 1, It is characterized in that The first conversion module has two second signal interfaces, the two second signal interfaces are electrically connected to the two hot plug connectors respectively, and the two hot plug connectors are electrically connected to the two second conversion modules respectively.

5. The storage system according to claim 2, It is characterized in that The first conversion module includes a first main control chip and a first power control chip. The first signal interface and the second signal interface are arranged on the first main control chip. The first power control chip is electrically connected to the first main control chip and the first USB connector.

6. The storage system according to claim 5, It is characterized in that The first conversion module also includes a first flash memory chip electrically connected to the first main control chip, and the first flash memory chip is used to store the startup configuration firmware of the first main control chip.

7. The storage system according to any one of claims 1 to 6, It is characterized in that The second conversion module includes a second main control chip and a second flash memory chip electrically connected to the second main control chip. The fourth signal interface and the third signal interface are set on the second main control chip. The second flash memory chip is used to store the startup configuration firmware of the second main control chip.

8. The storage system according to claim 5, It is characterized in that The first master control chip is connected to a first clock source circuit, and the first clock source circuit is used to provide a clock signal for the first master control chip.

9. The storage system according to claim 7, It is characterized in that The second master control chip is connected to a second clock source circuit, and the second clock source circuit is used to provide a clock signal for the second master control chip.

10. An electronic device, It is characterized in that A storage system comprising any one of claims 1 to 9.

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