Semiconductor integrated circuit testing device
By introducing clamping, impact and buffering mechanisms into the semiconductor integrated circuit test device, automated testing and impact force buffering are achieved, solving the problems of low automation and excessive impact force in the existing technology, and improving detection efficiency and product qualifications Rate.
Patent Information
- Application Number
- CN202420617086.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-03-28
- Publication Date
- 2024-12-13
- Estimated Expiration
- 2034-03-28
AI Technical Summary
The existing semiconductor integrated circuit test devices have low degree of automation, require manual operation, and cannot effectively buffer the impact force of falling, resulting in damage to the surface of semiconductor integrated circuits and affecting the product pass rate.
A semiconductor integrated circuit testing device including a clamping mechanism, an impact testing mechanism and a buffer mechanism is designed. By lifting the lifting assembly, the lifting plate is driven upward to drive the test head to fall for impact testing, and a buffer mechanism is provided on the inner bottom wall of the housing to buffer. Impact force, clamping mechanism is used to limit semiconductor integrated circuits of different models.
It improves the automation level of the test device, saves manpower, improves detection efficiency, and avoids damage to the semiconductor integrated circuit by the drop impact force of the test head through the buffer mechanism, ensuring product qualification rate.
Smart Images

Figure CN222166506U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of semiconductor integrated circuit testing, in particular to a semiconductor integrated circuit testing device. Background Art
[0002] As the core component of electronic products, the performance and reliability of semiconductor integrated circuits directly affect the quality and service life of electronic products. Therefore, before using semiconductor integrated circuits, they are often subjected to impact resistance tests to evaluate their performance and reliability when subjected to physical impact.
[0003] The existing semiconductor integrated circuit test devices generally have the following problems when performing anti-impact effect tests on semiconductor integrated circuits:
[0004] 1. Low degree of automation, requiring manual operation, which not only consumes human resources but also affects testing efficiency;
[0005] 2. During the test, the impact force of the fall cannot be effectively buffered, which can easily cause damage to the surface of the semiconductor integrated circuit and affect the product's qualification rate. Utility Model Content
[0006] In view of the deficiencies existing in the prior art, the utility model provides a semiconductor integrated circuit testing device.
[0007] The utility model discloses a semiconductor integrated circuit testing device, comprising a base and a shell, wherein the shell is mounted above the base through a plurality of first connecting columns, and further comprising:
[0008] A clamping mechanism, through which the semiconductor integrated circuit is clamped and fixed on the upper surface of the base;
[0009] An impact test mechanism, the impact test mechanism is arranged in the housing, and comprises a lifting plate, the lifting plate is installed in the housing in a lifting manner through a lifting assembly, a plurality of second connecting pillars are installed at the bottom of the lifting plate in a vertical direction, the bottom ends of the plurality of second connecting pillars extend out of the housing bottom plate and are connected to a test head, and the test head is placed directly above the semiconductor integrated circuit;
[0010] A buffer mechanism is arranged on the inner bottom wall of the shell and placed directly below the lifting plate. The buffer mechanism is used to buffer the impact force of the test head.
[0011] As a further improvement of the present utility model, the clamping mechanism comprises a support plate and a clamping plate;
[0012] The two support plates are arranged on both sides of the semiconductor integrated circuit and are fixedly mounted on the upper surface of the base. The two support plates are screwed with adjustment bolts, and the ends of the two adjustment bolts close to the semiconductor integrated circuit are provided with clamping plates, and the sides of the two clamping plates close to the semiconductor integrated circuit are provided with first rubber pads;
[0013] A plurality of guide posts are arranged between the two clamping plates on one side away from the semiconductor integrated circuit and the supporting plates on the corresponding side.
[0014] As a further improvement of the present invention, the lifting plate is arranged parallel to the bottom plate of the shell, and counterweight blocks are respectively arranged at the four corners of the bottom of the lifting plate;
[0015] The upper ends of the four second connection columns are fixedly connected to the bottom of the lifting plate, and the lower ends of the four second connection columns are fixedly connected to the four corners of the top of the mounting plate after passing through the bottom plate of the shell, and the test head is arranged at the bottom of the mounting plate corresponding to the position of the semiconductor integrated circuit;
[0016] The lifting plate drives the test head to move upward through the lifting assembly.
[0017] As a further improvement of the utility model, the lifting assembly includes a gear plate, a driving shaft, a driven shaft, a transmission shaft, a first synchronous wheel, a second synchronous wheel, a first gear, a second gear, a half gear and a motor;
[0018] The four tooth plates are respectively fixedly mounted on the left and right ends of the lifting plate in the vertical direction, and the upper ends of the four tooth plates extend out of the top plate of the shell; the driving shaft and the driven shaft are respectively arranged on the left and right ends of the lifting plate, and the driving shaft and the driven shaft are provided with the half gear meshing with the tooth plate at the positions corresponding to the tooth plates; the driving shaft is provided with the first gear at the front end position near the lifting plate, the shell is provided with a transmission shaft corresponding to the front end of the lifting plate and close to the position of the first gear, and the transmission shaft is provided with a first synchronous wheel and a second gear meshing with the first gear, and the driven shaft is provided with a second synchronous wheel at the front end position near the lifting plate, and the first synchronous wheel and the second synchronous wheel are connected by a synchronous belt transmission; the motor is fixedly mounted on the back of the shell, and the output shaft of the motor is connected to the driving shaft after passing through the shell.
[0019] As a further improvement of the present invention, a hidden shell is sleeved on the top of the shell body corresponding to the protruding parts of the four tooth plates.
[0020] As a further improvement of the utility model, the buffer mechanism includes a shock absorbing seat, a buffer plate and a spring;
[0021] The shock absorbing seat is fixedly mounted on the inner bottom wall of the shell and is placed directly below the lifting plate, and the top of the shock absorbing seat is concave to form a buffer cavity; the buffer plate is placed above the buffer cavity, and the bottom ends of the plurality of springs are respectively fixedly mounted on the bottom of the buffer cavity, and the top ends of the plurality of springs are respectively fixedly mounted on the bottom of the buffer plate.
[0022] As a further improvement of the utility model, a second rubber pad is fixedly connected to the upper surface of the buffer plate.
[0023] As a further improvement of the utility model, it further comprises a display screen and control buttons; the display screen and the control buttons are respectively embedded in the front side of the base.
[0024] Compared with the prior art, the beneficial effects of the utility model are:
[0025] The utility model has a simple structure and is easy to operate. The lifting plate is driven upward by the lifting component. After being lifted into place, the test head at the bottom is driven downward by gravity to complete the impact test of the semiconductor integrated circuit. Compared with the existing testing device, it has a higher degree of automation, which can not only effectively save manpower, but also improve the detection efficiency of semiconductor integrated circuits.
[0026] The utility model provides a buffer mechanism below the lifting plate corresponding to the inner bottom wall of the shell, which can buffer the impact force of falling when the semiconductor integrated circuit is tested for its anti-impact effect, thereby effectively avoiding surface damage of the semiconductor integrated circuit caused by excessive impact force of the test head falling, and ensuring the qualified rate of the product to a certain extent.
[0027] The utility model can facilitate the positioning of semiconductor integrated circuits of different models by arranging a clamping mechanism on the upper surface of the base, thereby improving the practicability of the test device. BRIEF DESCRIPTION OF THE DRAWINGS
[0028] Figure 1 A schematic diagram of the structure of a semiconductor integrated circuit testing device disclosed in one embodiment of the utility model;
[0029] Figure 2 A side cross-sectional view of a semiconductor integrated circuit testing device disclosed in one embodiment of the utility model;
[0030] Figure 3 A schematic diagram of the structure of an impact test mechanism of a semiconductor integrated circuit test device disclosed in one embodiment of the utility model;
[0031] Figure 4 The present invention is a schematic diagram of a buffer mechanism structure of a semiconductor integrated circuit testing device disclosed in an embodiment of the present invention.
[0032] In the figure:
[0033] 1. Base; 2. Shell; 2-1. Hidden shell; 3. Semiconductor integrated circuit; 4. Lifting assembly; 4-1. Tooth plate; 4-2. Driving shaft; 4-3. Driven shaft; 4-4. Half gear; 4-5. First gear; 4-6. Transmission shaft; 4-7. Second synchronous wheel; 4-8. Synchronous belt; 4-9. Motor; 5. Buffer mechanism; 5-1. Shock absorber seat; 5-2. Buffer plate; 5-3. Second rubber pad; 5-4. Spring; 6-1. Support plate; 6-2. Clamping plate; 6-3. Adjusting bolt; 6-4. Guide column; 6-5. First rubber pad; 7. Lifting plate; 7-1. Counterweight; 8. Mounting plate; 9. Test head; 10-1. First connecting column; 10-2. Second connecting column; 11. Control button; 12. Display screen. DETAILED DESCRIPTION
[0034] In order to make the purpose, technical solution and advantages of the embodiment of the utility model clearer, the technical solution in the embodiment of the utility model will be clearly and completely described below in conjunction with the drawings in the embodiment of the utility model. Obviously, the described embodiment is a part of the embodiment of the utility model, not all of the embodiments. Based on the embodiment of the utility model, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the utility model.
[0035] In the description of the present invention, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc., indicating the orientation or positional relationship, are based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present invention. In addition, the terms "first", "second", and "third" are used for descriptive purposes only, and cannot be understood as indicating or implying relative importance.
[0036] In the description of the present invention, it is also necessary to explain that, unless otherwise clearly specified and limited, the terms "installation", "connection" and "connection" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.
[0037] The utility model is further described in detail below in conjunction with the accompanying drawings:
[0038] like Figure 1-2 As shown, a semiconductor integrated circuit testing device provided by the utility model includes a base 1, a shell 2, a clamping mechanism, an impact testing mechanism 4 and a buffering mechanism 5, wherein the shell 2 is installed above the base 1 through a plurality of first connecting pillars 10-1, and the semiconductor integrated circuit 3 is clamped and fixed on the upper surface of the base 1 through the clamping mechanism; the impact testing mechanism is arranged in the shell 2, and includes a lifting plate 7, which is installed in the shell 2 in a liftable manner through a lifting component 4, and a plurality of second connecting pillars 10-2 are installed at the bottom of the lifting plate 7 in a vertical direction, and the bottom ends of the plurality of second connecting pillars 10-2 extend out of the bottom plate of the shell 2 and are connected to a test head 9, and the test head 9 is placed directly above the semiconductor integrated circuit 3; the buffering mechanism 5 is arranged on the inner bottom wall of the shell and is placed directly below the lifting plate 7, and the buffering mechanism 5 is used to buffer the impact force of the test head 9.
[0039] In this case, the lifting plate 7 is driven upward by the lifting component 4. After being lifted into place, the test head 9 at the bottom is driven downward by gravity to complete the impact test of the semiconductor integrated circuit 3. Compared with the existing testing device, it has a higher degree of automation, which can not only effectively save manpower, but also improve the detection efficiency of semiconductor integrated circuits. By arranging a buffer mechanism 5 below the bottom wall of the shell 2 corresponding to the lifting plate 7, the impact force of the fall can be buffered when the semiconductor integrated circuit 3 is tested for its anti-impact effect, thereby effectively avoiding surface damage to the semiconductor integrated circuit 3 caused by excessive impact force of the test head 9, thereby ensuring the product qualification rate to a certain extent.
[0040] Specific:
[0041] like Figure 1-2 As shown, in the above embodiment, preferably, the clamping mechanism includes a support plate 6-1, a clamping plate 6-2, an adjusting bolt 6-3, a guide column 6-4 and a first rubber pad 6-5, wherein the two support plates 6-1 are respectively arranged on both sides of the semiconductor integrated circuit 3 and are fixedly installed on the upper surface of the base 1, and the two support plates 6-1 are both screwed with adjusting bolts 6-3 in the horizontal direction, and the two adjusting bolts 6-3 are both provided with a clamping plate 6-2 at one end close to the semiconductor integrated circuit 3, and the two clamping plates 6-2 are both provided with a first rubber pad 6-5 on one side close to the semiconductor integrated circuit 3, and a plurality of guide columns 6-4 are respectively provided between the side of the two clamping plates 6-2 away from the semiconductor integrated circuit 3 and the support plate 6-1 on the corresponding side. In this embodiment, the number of guide columns 6-4 located on the same side is 2, and the two guide columns 6-4 are respectively arranged on the front and rear sides of the adjusting bolt 6-3.
[0042] During actual adjustment, the two adjusting bolts 6-3 on both sides of the semiconductor integrated circuit 3 are screwed in the direction of the semiconductor integrated circuit 3. At this time, the two adjusting bolts 6-3 drive the two clamping plates 4 to move in the direction of the semiconductor integrated circuit 3, so that the semiconductor integrated circuit 3 can be clamped and limited. In this embodiment, by arranging a clamping mechanism on the upper surface of the base 1, it is convenient to limit the semiconductor integrated circuits 3 of different models, thereby improving the practicability of the test device.
[0043] like Figure 2 As shown, in the above embodiment, preferably, the lifting plate 7 is arranged parallel to the bottom plate of the shell 2, and the four corners of the bottom of the lifting plate 7 are respectively provided with counterweights 7-1, and the upper ends of the four second connecting columns 10-2 are respectively fixedly connected to the bottom of the lifting plate 7, and the lower ends of the four second connecting columns 10-2 are respectively passed through the bottom plate of the shell 2 and fixedly connected to the four corners of the top of the mounting plate 8, and the bottom of the mounting plate 8 is provided with a test head 9 corresponding to the position of the semiconductor integrated circuit. The mounting plate 8 in this embodiment is arranged parallel to the upper surface of the base 1;
[0044] In the above embodiment, preferably, the lifting plate 7 and the mounting plate 8 are both rectangular structures.
[0045] In actual operation, when the lifting plate 7 is lifted upward along the vertical direction on the inner wall of the shell 2 by the lifting assembly, the mounting plate 8 at the bottom thereof can be lifted up through the plurality of second connecting columns 10-2. Since the test head 9 is installed at the bottom of the mounting plate 8, it can be lifted synchronously with the mounting plate 8.
[0046] like Figure 3As shown, in the above embodiment, preferably, the lifting assembly includes a tooth plate 4-1, a driving shaft 4-2, a driven shaft 4-3, a transmission shaft 4-6, a first synchronous wheel, a second synchronous wheel 4-7, a first gear 4-5, a second gear, a half gear 4-4 and a motor 4-9; wherein, the four tooth plates 4-1 are respectively fixedly installed on the front and rear sides of the left and right ends of the lifting plate 7 in the vertical direction, the bottom ends of the four tooth plates 4-1 are respectively fixedly connected to the upgrading plate 7, and the upper ends of the four tooth plates 4-1 extend out of the top plate of the shell 2; the driving shaft 4-2 and the driven shaft 4-3 are respectively arranged on the left and right ends of the lifting plate 7, and the corresponding tooth plates on the driving shaft 4-2 and the driven shaft 4-3 A half gear 4-4 meshing with the tooth plate 4-1 is provided at the position of each of the driven shafts 4-2 and 4-1; a first gear 4-5 is provided at the front end position of the driving shaft 4-2 near the lifting plate 7, a transmission shaft 4-6 is provided at the front end of the shell 2 corresponding to the lifting plate 7 and near the first gear 4-5, and a first synchronous wheel and a second gear meshing with the first gear 4-5 are provided on the transmission shaft 4-6, a second synchronous wheel 4-7 is provided at the front end position of the driven shaft 4-3 near the lifting plate 7, and the first synchronous wheel and the second synchronous wheel 4-7 are connected through a synchronous belt 4-8; a motor 4-9 is fixedly mounted on the back of the shell 2, and the output shaft of the motor 4-9 passes through the shell 2 and is connected to the driving shaft 4-2.
[0047] In the above embodiment, preferably, the half gears 4-4 located at the left and right ends of the lifting plate 7 are arranged in the same manner to ensure that the four sides of the lifting plate 7 can be stably and synchronously lifted under the cooperation of the half gears 4-4 and the toothed plate 4-1.
[0048] In the above embodiment, preferably, the top of the housing 2 corresponding to the extended parts of the four tooth plates 4-1 is covered with a hidden shell 2-1. The hidden shell 2-1 is used to hide the extended parts of the four tooth plates 4-1 to prevent them from leaking out and affecting the appearance.
[0049] like Figure 4 As shown, in the above embodiment, preferably, the buffer mechanism 5 includes a shock absorbing seat 5-1, a buffer plate 5-2 and a spring 5-4; wherein, the shock absorbing seat 5-1 is fixedly mounted on the inner bottom wall of the shell 2 and is placed directly below the lifting plate 7, and the top of the shock absorbing seat 5-1 is concave to form a buffer cavity; the buffer plate 5-2 is placed above the buffer cavity, and the bottom ends of the plurality of springs 5-4 are respectively fixedly mounted on the bottom of the buffer cavity, and the top ends of the plurality of springs 5-4 are respectively fixedly mounted on the bottom of the buffer plate 5-2.
[0050] In the above embodiment, preferably, the upper surface of the buffer plate 5 - 2 is also fixedly connected to a second rubber pad 5 - 3 .
[0051] In the above embodiment, preferably, the size of the buffer plate 5 - 2 is adapted to the buffer cavity, so that the buffer plate 5 - 2 can be compressed in the buffer cavity under pressure.
[0052] In the above embodiment, preferably, a display screen 12 and a control button 11 are further included; the display screen 12 and the control button 11 are respectively embedded in the front side of the base 1 .
[0053] The method of using this embodiment is as follows:
[0054] 1) Place the semiconductor integrated circuit 3 on the upper surface of the base 1, and screw the two adjusting bolts 6-3 on both sides of the semiconductor integrated circuit 3 in the direction of the semiconductor integrated circuit 3, so as to clamp and limit the semiconductor integrated circuit 3 through the clamping plates 6-2 on both sides;
[0055] 2) Start the motor. At this time, the motor 4-9 controls the driving shaft 4-2 to rotate outward, and the driving shaft 4-2 drives the two half gears 4-4 and the first gear 4-5 to rotate outward. Since the two adjacent first gears 4-5 are meshed, the transmission shaft 4-6, the first synchronous wheel and the driven shaft 4-3 can rotate away from the driving shaft 4-2, so that the two half gears 4-4 on the driven shaft 4-3 also rotate outward, thereby driving the gear plate 4-1, the lifting plate 7 and the detection head 9 to move upward;
[0056] 3) When the four half gears 4-4 located on the driving shaft 4-2 and the driven shaft 4-3 move to a point where they are no longer in contact with the tooth plate 4-1, under the action of gravity, the lifting plate 7 and the detection head 9 will move downward, and then the detection head 9 will hit the semiconductor integrated circuit 3 below, completing an impact test experiment of the semiconductor integrated circuit 3.
[0057] In the above step 3, before the detection head 9 hits the semiconductor integrated circuit 3, the lifting plate 7 will first hit the second rubber pad 5-3 of the buffer mechanism 5, and the impact force will drive the buffer plate 5-2 to move toward the inside of the shock absorbing seat 5-1, thereby compressing the air and spring 5-4 inside the buffer cavity, and then buffering the impact force of the fall, so as to avoid damage to the surface of the semiconductor integrated circuit 3 and affect the qualified rate.
[0058] In the above embodiment, preferably, during the continuous rotation of the active shaft 4-2, the lifting plate 7 and the detection head 9 will move back and forth up and down, thereby realizing the anti-impact effect test of the semiconductor integrated circuit 3. The entire test process has a high degree of automation, which can not only effectively save manpower, but also improve the detection efficiency of the semiconductor integrated circuit 3.
[0059] The above are only preferred embodiments of the present invention and are not intended to limit the present invention. For those skilled in the art, the present invention may be subject to various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.
Claims
1. A semiconductor integrated circuit testing device, comprising a base and a housing, wherein the housing is mounted above the base through a plurality of first connecting columns, wherein: Also includes: A clamping mechanism, through which the semiconductor integrated circuit is clamped and fixed on the upper surface of the base; An impact test mechanism, the impact test mechanism is arranged in the housing, and comprises a lifting plate, the lifting plate is installed in the housing in a lifting manner through a lifting assembly, a plurality of second connecting pillars are installed at the bottom of the lifting plate in a vertical direction, the bottom ends of the plurality of second connecting pillars extend out of the housing bottom plate and are connected to a test head, and the test head is placed directly above the semiconductor integrated circuit; A buffer mechanism is arranged on the inner bottom wall of the shell and placed directly below the lifting plate. The buffer mechanism is used to buffer the impact force of the test head.
2. The semiconductor integrated circuit testing device according to claim 1, characterized in that: The clamping mechanism comprises a support plate and a clamping plate; The two support plates are arranged on both sides of the semiconductor integrated circuit and are fixedly mounted on the upper surface of the base. The two support plates are screwed with adjustment bolts, and the ends of the two adjustment bolts close to the semiconductor integrated circuit are provided with clamping plates, and the sides of the two clamping plates close to the semiconductor integrated circuit are provided with first rubber pads; A plurality of guide posts are arranged between the two clamping plates on one side away from the semiconductor integrated circuit and the supporting plates on the corresponding side.
3. The semiconductor integrated circuit testing device according to claim 1, wherein: The lifting plate is arranged parallel to the bottom plate of the shell, and counterweight blocks are respectively arranged at the four corners of the bottom of the lifting plate; The upper ends of the four second connection columns are fixedly connected to the bottom of the lifting plate, and the lower ends of the four second connection columns are fixedly connected to the four corners of the top of the mounting plate after passing through the bottom plate of the shell, and the test head is arranged at the bottom of the mounting plate corresponding to the position of the semiconductor integrated circuit; The lifting plate drives the test head to move upward through the lifting assembly.
4. The semiconductor integrated circuit testing device according to claim 1 or 3, characterized in that: The lifting assembly includes a gear plate, a driving shaft, a driven shaft, a transmission shaft, a first synchronous wheel, a second synchronous wheel, a first gear, a second gear, a half gear and a motor; The four tooth plates are respectively fixedly mounted on the left and right ends of the lifting plate in the vertical direction, and the upper ends of the four tooth plates extend out of the top plate of the shell; the driving shaft and the driven shaft are respectively arranged on the left and right ends of the lifting plate, and the driving shaft and the driven shaft are provided with the half gear meshing with the tooth plate at the positions corresponding to the tooth plates; the driving shaft is provided with the first gear at the front end position near the lifting plate, the shell is provided with a transmission shaft corresponding to the front end of the lifting plate and close to the position of the first gear, and the transmission shaft is provided with a first synchronous wheel and a second gear meshing with the first gear, and the driven shaft is provided with a second synchronous wheel at the front end position near the lifting plate, and the first synchronous wheel and the second synchronous wheel are connected by a synchronous belt transmission; the motor is fixedly mounted on the back of the shell, and the output shaft of the motor is connected to the driving shaft after passing through the shell.
5. The semiconductor integrated circuit testing device according to claim 4, characterized in that: The top of the shell body corresponding to the protruding parts of the four tooth plates are all sleeved with hidden shells.
6. The semiconductor integrated circuit testing device according to claim 1, wherein: The buffer mechanism includes a shock absorbing seat, a buffer plate and a spring; The shock absorbing seat is fixedly mounted on the inner bottom wall of the shell and is placed directly below the lifting plate, and the top of the shock absorbing seat is concave to form a buffer cavity; the buffer plate is placed above the buffer cavity, and the bottom ends of the plurality of springs are respectively fixedly mounted on the bottom of the buffer cavity, and the top ends of the plurality of springs are respectively fixedly mounted on the bottom of the buffer plate.
7. The semiconductor integrated circuit testing device according to claim 6, characterized in that: The upper surface of the buffer plate is also fixedly connected with a second rubber pad.
8. The semiconductor integrated circuit testing device according to claim 1, wherein: It also includes a display screen and control buttons; the display screen and the control buttons are respectively embedded in the front side of the base.
