Ball grid array packaging structure, circuit board and electronic equipment
By setting a non-coinciding projection of the via disk and the pad in the ball grid array package structure and ensuring that the spacing is greater than the wire width, the wire passing problem is solved, reducing cost and complexity and improving stability.
Patent Information
- Application Number
- CN202323599383.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2023-12-27
- Publication Date
- 2024-12-13
- Estimated Expiration
- 2033-12-27
AI Technical Summary
In the existing ball grid array package, the contact between the via disk and the pad causes the wire to pass through normally, and the production process is complicated and the cost is high.
A ball grid array packaging structure is designed, in which the via disk and the pad are arranged on the substrate, the projection of the via disk and the electrically connected pad does not coincide, and the distance between the via disk and the non-electrically connected pad is greater than Or equals the wire width of the wire, ensuring that the wire can pass through smoothly without the need to remodel the pads.
The interference between the via disc and the pad is reduced, processing costs and complexity is reduced, and the flexibility of wire arrangement and the stability of the ball grid array packaging structure are improved.
Smart Images
Figure CN222170085U_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to the technical field of ball grid array packaging, and in particular, to a ball grid array packaging structure, a circuit board, and an electronic device. Background Art
[0002] In the related art, ball grid array packaging is usually packaged in two ways: Dog bone and Via in pad. For Dog bone ball grid array packaging, the way of fanning out the via pad to the center of the rectangular array will affect the normal passage of the wire and the flexibility of the wire layout; while for Via in pad ball grid array packaging, it adopts the method of directly adding vias on the pad and connecting to other layers of the PCB. Although it does not affect the layout of the wire, the above method has the problems of complex production process and high production cost. Utility Model Content
[0003] The purpose of the present disclosure is to provide a ball grid array packaging structure, a circuit board and an electronic device to solve the technical problems existing in the related art.
[0004] In order to achieve the above-mentioned purpose, the first aspect of the present disclosure provides a ball grid array packaging structure, including a substrate, a plurality of solder pads and a plurality of via pads, wherein the plurality of solder pads and the plurality of via pads are arranged on the substrate, and the plurality of solder pads are arranged in a matrix on the substrate, each of the via pads is electrically connected to each of the solder pads one by one, the projection of the via pad on the substrate and the projection of the solder pad electrically connected thereto on the substrate do not overlap, and the distance between the via pad and at least one of the plurality of solder pads that is not electrically connected thereto is greater than or equal to the line width of the wire passing therebetween.
[0005] Optionally, a distance between the via pad and at least one of the plurality of pads that is not electrically connected to the via pad is greater than or equal to N times the line width of the conductive line.
[0006] Optionally, the distance between the via pad and the pad that is not electrically connected to the via pad and is closest to the via pad is greater than or equal to zero.
[0007] Optionally, the plurality of pads include a first pad, a second pad, a third pad and a fourth pad, the first pad, the second pad, the third pad and the fourth pad are arranged on the substrate in a matrix, the first pad and the third pad are arranged diagonally, the second pad and the fourth pad are arranged diagonally, and the via pad is electrically connected to the second pad;
[0008] The first gap between the via pad and the third pad is used for allowing a wire to pass through;
[0009] The second gap between the via pad and the fourth pad is used for allowing a wire to pass through;
[0010] The third gap between the third pad and the fourth pad is used for allowing a wire to pass through;
[0011] At least one of the first gap, the second gap and the third gap is used for a wire to pass through.
[0012] Optionally, the difference between the first gap between the via pad and the third pad and the wire passing therethrough, the difference between the second gap between the via pad and the fourth pad and the wire passing therethrough, and the difference between the third gap between the third pad and the fourth pad and the wire passing therethrough are all greater than or equal to M times the line width of the wire.
[0013] Optionally, the distance between the center of the via pad and the center of the pad electrically connected thereto is greater than or equal to the sum of the radii of the via pad and the pad electrically connected thereto.
[0014] Optionally, the via plate includes a punching portion and a cutting portion, the via hole is formed in the punching portion, and the cutting portion is used to adjust the distance between the via plate and the pad adjacent thereto by cutting.
[0015] A second aspect of the present disclosure provides a circuit board, comprising the ball grid array package structure as described above.
[0016] Optionally, the circuit board further comprises a conducting wire, and a distance between the conducting wire and the pad which is closest to and not electrically connected to the conducting wire is greater than or equal to a line width of the conducting wire.
[0017] Optionally, the wires are wires connected to the pads in the same matrix;
[0018] Alternatively, the conductive wires are conductive wires that are not connected to the pads in the same matrix.
[0019] A third aspect of the present disclosure provides an electronic device, comprising the circuit board as described above.
[0020] Through the above technical solution, the projection of the via pad on the substrate and the projection of the pad electrically connected to it on the substrate do not overlap, thereby reducing the problem of interference or interference between the via pad and the pad due to contact, and the distance between the via pad and at least one of the multiple pads not electrically connected to it is greater than or equal to the line width of the wire passing therebetween, that is, the distance between the via pad and at least one pad is greater than or equal to the line width of the wire passing therebetween. In this way, it can be ensured that there is a large enough gap between the via pad and the pad for the wire to pass through, and there is no need to modify the pad (such as drilling a hole on the pad), which makes the arrangement of the wire simpler and can effectively reduce the modification and processing costs of the ball grid array packaging structure.
[0021] Other features and advantages of the present disclosure will be described in detail in the following detailed description. BRIEF DESCRIPTION OF THE DRAWINGS
[0022] The accompanying drawings are used to provide a further understanding of the present disclosure and constitute a part of the specification. Together with the following specific embodiments, they are used to explain the present disclosure but do not constitute a limitation of the present disclosure. In the accompanying drawings:
[0023] Figure 1 is a partial top view schematic diagram of a ball grid array package structure provided by a first exemplary embodiment of the present disclosure, wherein the wire is not connected to the pads in the matrix, and the wire passes through the gap between the via pad and the third pad and the gap between the via pad and the fourth pad in sequence;
[0024] Figure 2 is a partial top view schematic diagram of a ball grid array package structure provided by a second exemplary embodiment of the present disclosure, wherein the wire is not connected to the pads in the matrix, and the wire passes through the gap between the via pad and the fourth pad and the gap between the third pad and the fourth pad in sequence;
[0025] Figure 3 is a partial top view schematic diagram of a ball grid array package structure provided by a third exemplary embodiment of the present disclosure, wherein the wire is not connected to the pads in the matrix, and the wire passes through the gap between the via pad and the third pad and the gap between the third pad and the fourth pad in sequence;
[0026] Figure 4 is a partial top view schematic diagram of a ball grid array package structure provided by a fourth exemplary embodiment of the present disclosure, wherein the wire is connected to the third pad in the matrix, and the wire passes through the gap between the via pad and the fourth pad;
[0027] Figure 5 is a partial top view schematic diagram of a ball grid array package structure provided by a fifth exemplary embodiment of the present disclosure, wherein the wire is connected to the fourth pad in the matrix, and the wire passes through the gap between the via pad and the third pad;
[0028] Figure 6 It is a partial top view schematic diagram of a ball grid array packaging structure provided by an exemplary embodiment of the present disclosure, wherein the cutting portion is in a cut state.
[0029] Description of Reference Numerals
[0030] 1-Ball grid array packaging structure; 10-substrate; 20-pad; 21-first pad; 22-second pad; 23-third pad; 24-fourth pad; 30-via pad; 31-via; 311-preset hole; 312-final hole; 32-punching part; 33-cutting part; 100-conductor; S1-first gap; S2-second gap; S3-third gap; S4-the distance between the center of the via pad and the center of the connected pad; S5-the distance between the conductor and the pad closest to it and not electrically connected to it; S6-line width; S7-the minimum distance between the via pad and the pad not electrically connected to it; S8-the minimum distance between the conductor and the via pad; S9-the maximum adjustable distance of the via on the punching part. DETAILED DESCRIPTION
[0031] The specific implementation of the present disclosure is described in detail below in conjunction with the accompanying drawings. It should be understood that the specific implementation described herein is only used to illustrate and explain the present disclosure, and is not used to limit the present disclosure.
[0032] In the present disclosure, unless otherwise stated, the directional words used are only for the convenience of describing the present disclosure and simplifying the description, and are not intended to indicate or imply that the device or element referred to must have a specific orientation, and a specific orientation structure and operation. Therefore, they cannot be understood as limitations on the present disclosure. The terms "inside and outside" refer to the inside and outside of the corresponding structural contour.
[0033] In addition, it should be noted that the terms used, such as "first", "second", etc., are used to distinguish one element from another element, and do not have order or importance. In addition, in the description with reference to the drawings, the same number in different drawings represents the same element.
[0034] In the description of the present disclosure, it is also necessary to explain that, unless otherwise clearly stipulated and limited, the terms "set", "connect", "connected", and "installed" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection.
[0035] It can be directly connected or indirectly connected through an intermediate medium. For ordinary technicians in this field, the specific meanings of the above terms in this disclosure can be understood according to specific circumstances.
[0036] In the existing ball grid array packaging structure, the wires connecting the via pads and the pads and the via pads squeeze the space between the two adjacent pads during the fan-out process, resulting in the problem that the wires cannot pass through the gap between the two adjacent pads. Based on this, reference Figures 1 to 6 As shown, the first aspect of the present disclosure provides a ball grid array packaging structure, including a substrate 10, a plurality of solder pads 20 and a plurality of via pads 30, wherein the plurality of solder pads 20 and the plurality of via pads 30 are all arranged on the substrate 10, and the plurality of solder pads 20 are arranged on the substrate 10 in a matrix shape, each via pad 30 is electrically connected to each solder pad 20 one by one, the projection of the via pad 30 on the substrate 10 and the projection of the solder pad 20 electrically connected thereto on the substrate 10 do not overlap, and the distance between the via pad 30 and at least one solder pad 20 that is not electrically connected thereto among the plurality of solder pads 20 is greater than or equal to the line width of the wire 100 passing therebetween.
[0037] Through the above technical solution, the projection of the via pad 30 on the substrate 10 and the projection of the pad 20 electrically connected thereto on the substrate 10 do not overlap, thereby reducing the problem of interference or interference between the via pad 30 and the pad 20 due to contact, and the distance between the via pad 30 and at least one of the multiple pads 20 not electrically connected thereto is greater than or equal to the line width of the wire 100 passing therebetween, that is, the distance between the via pad 30 and at least one pad 20 is greater than or equal to the line width of the wire 100 passing therebetween. In this way, it can be ensured that there is a sufficiently large gap between the via pad 30 and the pad 20 for the wire 100 to pass through, and there is no need to modify the pad 20 (such as drilling a hole on the pad 20), the arrangement of the wire 100 is simpler, and the modification and processing costs of the ball grid array packaging structure 1 can be effectively reduced.
[0038] Optionally, the distance between the via pad 30 and at least one pad 20 that is not electrically connected to the via pad 30 is greater than or equal to N times the line width of the wire 100. It should be noted that the above N can be any integer or non-integer value such as 1, 2, 3, 4, 5, and the distance between the via pad 30 and at least one pad 20 that is not electrically connected to the via pad 30 is greater than or equal to N times the line width of the wire 100. In this way, while ensuring that the wire 100 passes through the gap between the via pad 30 and the pad 20, it is also possible to ensure that there is a certain gap between the wire and the via pad 30 and / or the pad 20, thereby reducing or reducing the interference or interference caused by the wire 100 to the via pad 30 and / or the pad 20, and reducing the difficulty of processing.
[0039] In an exemplary embodiment provided in the present disclosure, the above-mentioned N can be 3, that is, the distance between the via pad 30 and at least one of the multiple pads 20 that is not electrically connected to it is greater than or equal to 3 times the line width of the conductor 100. In this way, when the conductor 100 passes between the above-mentioned via pad 30 and the pad 20, the conductor 100 can be at least one time away from the line width of the via pad 30 and the pad 20.
[0040] The minimum distance S7 between the via pad 30 and the pad 20 not electrically connected thereto is greater than or equal to zero. In other words, when the minimum distance S7 between the via pad 30 and the pad 20 not electrically connected thereto is greater than or equal to zero, the interference or interference between the via pad 30 and the pad 20 can be reduced, thereby improving the stability of the ball grid array package structure 1 during operation.
[0041] The following description takes the example that the line width of the wire 100 used in the ball grid array packaging structure 1 is 0.09 mm. It should be understood that the present disclosure does not limit the specific line width of the wire 100 used, and the value related to the wire line width is determined based on the specific line width of the wire 100 used.
[0042] In an exemplary embodiment provided in the present disclosure, the minimum distance S7 between the via pad 30 and the pad 20 that is not electrically connected thereto can be greater than or equal to 0.09 mm. In this way, the distance between the via pad 30 and the pad 20 that is not electrically connected thereto can be reduced as much as possible, thereby improving the integration of the ball grid array package structure 1 and reducing the processing cost of the ball grid array package structure 1.
[0043] Optionally, the plurality of pads 20 include a first pad 21, a second pad 22, a third pad 23 and a fourth pad 24, the first pad 21, the second pad 22, the third pad 23 and the fourth pad 24 are arranged in a matrix on the substrate 10, and the first pad 21 and the third pad 23 are arranged diagonally, the second pad 22 and the fourth pad 24 are arranged diagonally, and the via pad 30 is electrically connected to the second pad 22. In an exemplary embodiment provided in the present disclosure, as Figure 1 , Figure 3 as well as Figure 5 As shown, the first gap S1 between the via pad 30 and the third pad 23 is used for the wire 100 to pass through.
[0044] Alternatively, in a second exemplary embodiment provided by the present disclosure, Figure 1 , Figure 2 , Figure 4 as well as Figure 6 As shown, the second gap S2 between the via pad 30 and the fourth pad 24 is used for the wire 100 to pass through.
[0045] In a third exemplary embodiment provided by the present disclosure, Figure 2 , Figure 3 As shown, the third gap S3 between the third pad 23 and the fourth pad 24 is used for the wire 100 to pass through.
[0046] That is to say, the present disclosure does not restrict the specific arrangement path of the wire 100. Designers can arrange the wire 100 in any of the above-mentioned ways according to actual usage requirements. Moreover, in the process of the wire 100 passing through the pads 20 through the above-mentioned gap, there is no need to adjust the arrangement method of the pads 20 on the substrate 10 and the distance between two adjacent pads 20, and the interference between the wire 100 and the adjacent pads 20 can be reduced.
[0047] The difference between the first gap S1 between the via pad 30 and the third pad 23 and the wire 100 passing through, the difference between the second gap S2 between the via pad 30 and the fourth pad 24 and the wire 100 passing through, and the difference between the third gap S3 between the third pad 23 and the fourth pad 24 and the wire 100 passing through are all greater than or equal to M times the line width of the wire 100. In this way, it can be ensured that the wire 100 can pass through the first gap S1, the second gap S2 and the third gap S3, while a certain safety distance can be maintained between the wire 100 and the via pad 30, the third pad 23, and the fourth pad 24.
[0048] Similarly, the above-mentioned M can also be any integer or non-integer value such as 1, 2, 3, 4, 5, etc. For example, in an exemplary embodiment provided in the present disclosure, the above-mentioned M can be 2, that is, the difference between the first gap S1, the second gap S2 and the third gap S3 and the conductive line 100 can all be twice the line width.
[0049] For example, in the actual processing process, the minimum size of the line width S6 of the wire 100 used in the ball grid array package structure 1 is 0.09 mm. In this way, the difference between the first gap S1, the second gap S2, and the third gap S3 and the wire 100 is set to 0.18 mm (i.e., twice the line width), so that the wire 100 can form a distance of at least 0.09 mm with the via plate 30 and the third pad 23 when passing through the first gap S1 between the via plate 30 and the third pad 23, and the wire 100 can form a distance of at least 0.09 mm with the via plate 30 and the third pad 23 when passing through the first gap S1 between the via plate 30 and the fourth pad 24. When the second gap S2 passes through, a distance of at least 0.09 mm is formed between the via pad 30 and the fourth pad 24, and when the wire 100 passes through the third gap S3 between the third pad 23 and the fourth pad 24, a distance of at least 0.09 mm is formed between the third pad 23 and the fourth pad 24, that is, the minimum distance S7 between the via pad 30 and the pad 20 that is not electrically connected thereto is 0.09 mm, and the minimum distance S8 between the wire 100 and the via pad 30 is 0.09 mm, thereby reducing interference or interference between the wire 100 and the via pad 30, the third pad 23, and the fourth pad 24.
[0050] Alternatively, it can also be understood that the first gap S1 between the via plate 30 and the third pad 23, the second gap S2 between the via plate 30 and the fourth pad 24, and the third gap S3 between the third pad 23 and the fourth pad 24 are all greater than or equal to 0.27 mm. In this way, when the wire 100 having a line width S6 greater than or equal to 0.09 mm passes through the above gap, the distance between both sides of the wire 100 and the pad 20 can be at least 0.09 mm. It should be understood that the specific size of the gap can be flexibly set based on the line width of the wire 100, and the present disclosure does not limit it.
[0051] It should be noted here that the connection between the above-mentioned via pad 30 and the second pad 22 is only an exemplary embodiment provided to facilitate the understanding of the present disclosure. The above-mentioned via pad 30 can be connected to any one of the first pad 21, the third pad 23 and the fourth pad 24, which will not be described in detail in the present disclosure.
[0052] It should be noted that, due to the existence of line width, the N mentioned above should be greater than M. Further, in order to reduce the interference between the via pad 30 and the pad 20 electrically connected thereto, the distance between the center of the via pad 30 and the center of the pad 20 electrically connected thereto can be greater than or equal to the sum of the radii of the two. There is no contact or overlap between the two, thereby reducing the occurrence of cold solder joints on the pad 20.
[0053] In one embodiment provided by the present disclosure, in an exemplary embodiment in which the size of the pad 20 is 0.25 mm and the size of the via pad 30 is 0.35 mm, the distance S4 between the center of the via pad 30 and the center of the pad 20 electrically connected thereto is greater than or equal to 0.31 mm. According to the sizes of the pad 20 and the via pad 30, when the edge of the via pad 30 is in contact with the pad 20, the distance between the center of the pad 20 and the center of the via pad 30 is 0.31 mm, that is, when the distance between the center of the via pad 30 and the center of the pad 20 electrically connected thereto is greater than or equal to 0.31 mm, it can be ensured that there is at least a 0.01 mm gap between the edge of the via pad 30 and the edge of the pad 20, that is, the via pad 30 does not contact the pad 20, thereby reducing the ink splashing onto the pad 20 when making the solder resist ink to cover the via 31, thereby reducing the influence on the welding of the pad 20.
[0054] In order to improve the error tolerance during processing, optionally, Figure 6 As shown, the via plate 30 may include a punching portion 32 and a cutting portion 33, the via 31 is penetrated through the punching portion 32, and the cutting portion 33 is used to adjust the distance between the via plate 30 and the adjacent pad 20 by cutting. In this way, when processing in the factory, the cutting portion 33 can be cut or not cut according to specific needs. For example, when the via plate 30 is too close to the pad 20 (for example, the via plate 30 partially covers the pad 20), the cutting portion 33 covering the pad 20 can be cut, so that the via plate 30 and the pad 20 are in a relatively independent state, so as to reduce the ink splashing onto the pad 20 when making the solder resist ink covering the via 31, and the influence on the welding of the pad 20.
[0055] In addition, when there is a small gap between the via plate 30 and the pad 20, the cutting portion 33 close to the pad 20 can also be cut. When there is a sufficient distance between the via plate 30 and the pad 20, there is no need to cut the cutting portion 33.
[0056] In order to further improve the fault tolerance of the through-hole plate 30, in the present disclosure, the position of the through-hole 31 can be adjusted according to the cutting condition of the cutting portion 33, and relative to the preset hole 311, such as Figure 6 As shown, the maximum adjustable distance S9 of the final hole 312 on the punching portion 32 is 1.5 mil.
[0057] Furthermore, since the holes can be punched within the range of the punching portion 32, that is, the position of the via 31 formed on the punching portion 32 is adjustable, the error tolerance during the processing can be further increased, the requirements for processing accuracy can be reduced, and thus the processing cost can be reduced.
[0058] A second aspect of the present disclosure provides a circuit board, comprising the above ball grid array package structure 1.
[0059] Optionally, the circuit board further includes a wire 100, and a distance S5 between the wire 100 and the pad 20 that is closest to and not electrically connected thereto is greater than or equal to the line width of the wire 100. In this way, when the wire 100 passes through the gap between the pad 20 and the via pad 30, interference or interference between the wire 100 and the via pad 30, the third pad 23, and the fourth pad 24 can be reduced.
[0060] In an exemplary embodiment provided by the present disclosure, a distance S5 between the conductive line 100 and the pad 20 that is closest to and not electrically connected to the conductive line 100 may be greater than or equal to 0.09 mm.
[0061] In addition, the present disclosure does not limit the connection relationship of the above-mentioned wires 100. For example, in an exemplary embodiment provided by the present disclosure, the wires 100 can be wires 100 connected to pads 20 in the same matrix.
[0062] Alternatively, in another exemplary embodiment provided by the present disclosure, the wire 100 may be a wire 100 that is not connected to the pad 20 in the same matrix, for example, the wire 100 may be a wire 100 connected to the pad 20 in an adjacent matrix. In short, the gap between the via plate 30 and the pad 20 can satisfy the passage of different types of wires 100, and the wire 100 can be adaptively arranged according to the use requirements, and the present disclosure does not limit this.
[0063] The third aspect of the present disclosure provides an electronic device, comprising the above circuit board. The circuit board and the electronic device have all the beneficial effects of the above ball grid array packaging structure 1, which will not be described in detail in the present disclosure.
[0064] The preferred embodiments of the present disclosure are described in detail above in conjunction with the accompanying drawings; however, the present disclosure is not limited to the specific details in the above embodiments. Within the technical concept of the present disclosure, a variety of simple modifications can be made to the technical solution of the present disclosure, and these simple modifications all fall within the protection scope of the present disclosure.
[0065] It should also be noted that the various specific technical features described in the above specific embodiments can be combined in any suitable manner without contradiction. In order to avoid unnecessary repetition, the present disclosure will not further describe various possible combinations.
[0066] In addition, various embodiments of the present disclosure may be arbitrarily combined, and as long as they do not violate the concept of the present disclosure, they should also be regarded as the contents disclosed by the present disclosure.
Claims
1. A ball grid array packaging structure, characterized in that: It includes a substrate, a plurality of solder pads and a plurality of via pads, wherein the plurality of solder pads and the plurality of via pads are arranged on the substrate, and the plurality of solder pads are arranged on the substrate in a matrix shape, each via pad is electrically connected to each solder pad in a one-to-one correspondence, the projection of the via pad on the substrate and the projection of the solder pad electrically connected thereto on the substrate do not overlap, and the distance between the via pad and at least one of the plurality of solder pads that is not electrically connected thereto is greater than or equal to the line width of the conductor passing therebetween.
2. The ball grid array packaging structure according to claim 1, characterized in that: The distance between the via pad and at least one of the plurality of pads that is not electrically connected to the via pad is greater than or equal to N times the line width of the conductive line.
3. The ball grid array packaging structure according to claim 1, characterized in that: The distance between the via pad and the pad that is not electrically connected to the via pad and is closest to the via pad is greater than or equal to zero.
4. The ball grid array packaging structure according to claim 1, characterized in that: The plurality of pads include a first pad, a second pad, a third pad and a fourth pad, the first pad, the second pad, the third pad and the fourth pad are arranged on the substrate in a matrix, the first pad and the third pad are arranged diagonally, the second pad and the fourth pad are arranged diagonally, and the via pad is electrically connected to the second pad; The first gap between the via pad and the third pad is used for allowing a wire to pass through; The second gap between the via pad and the fourth pad is used for allowing a wire to pass through; The third gap between the third pad and the fourth pad is used for allowing a wire to pass through; At least one of the first gap, the second gap and the third gap is used for a wire to pass through.
5. The ball grid array packaging structure according to claim 4, characterized in that: The difference between the first gap between the via pad and the third pad and the wire passing therethrough, the difference between the second gap between the via pad and the fourth pad and the wire passing therethrough, and the difference between the third gap between the third pad and the fourth pad and the wire passing therethrough are all greater than or equal to M times the line width of the wire.
6. The ball grid array packaging structure according to claim 1, characterized in that: The distance between the center of the via pad and the center of the pad electrically connected thereto is greater than or equal to the sum of the radii of the via pad and the pad electrically connected thereto.
7. The ball grid array package structure according to any one of claims 1 to 6, characterized in that: The via plate includes a punching portion and a cutting portion, the via hole is formed in the punching portion, and the cutting portion is used to adjust the distance between the via plate and the adjacent pad by cutting.
8. A circuit board, characterized in that: A ball grid array packaging structure comprising any one of claims 1-7.
9. The circuit board according to claim 8, characterized in that: The circuit board also includes a conductive line, wherein a distance between the conductive line and the pad that is closest to and not electrically connected to the conductive line is greater than or equal to a line width of the conductive line.
10. The circuit board according to claim 8, characterized in that: The wires are wires connected to the pads in the same matrix; Alternatively, the conductive wires are conductive wires that are not connected to the pads in the same matrix.
11. An electronic device, characterized in that: A circuit board comprising any one of claims 8-10.