Field effect transistor based on micro-fluidic chip

Abstract

The utility model provides a field effect transistor based on a micro-fluidic chip. The field effect transistor based on the micro-fluidic chip comprises a substrate, a semiconductor material layer and the micro-fluidic chip, a semiconductor material layer is arranged on the substrate; the micro-fluidic chip covers the semiconductor material layer; a central flow channel and an electrode channel are arranged on the micro-fluidic chip; a low-melting-point metal layer is arranged in the electrode channel to form a source electrode and a drain electrode; the part, covered by the electrode channel, of the semiconductor material layer is provided with a low-melting-point metal layer. The field effect transistor based on the micro-fluidic chip can identify biomarkers, and has excellent sensitivity and specific identification capability.

Description

Technical Field

[0001] The utility model relates to a field effect transistor based on a microfluidic chip, belonging to the technical field of semiconductors. Background Art

[0002] Biosensors based on field-effect transistors (FETs) have the advantages of low cost, rapid response, and accurate detection. The principle is that the electrodes of a field-effect transistor are composed of three electrodes: source, drain, and gate. There is a conductive channel material between the source and drain, and the current flowing between the source and drain is regulated by the electric field applied to the gate. By modifying the conductive channel material with a specific receptor, it is functionalized so that it has the function of specifically capturing target biomolecules. Graphene has excellent two-dimensional structure and photoelectric properties and is an excellent conductive channel material. Graphene field effect transistors (G-FETs) have the advantages of high sensitivity, easy integration, and large specific surface area. It is expected to achieve low-cost, portable, low-power, label-free, and high-sensitivity rapid detection of biomarkers, which is suitable for grassroots and on-site detection. However, the current G-FET biosensors have complex structures, complex manufacturing processes, and cumbersome and time-consuming photolithography steps, which can also easily damage the structure of graphene. Most biochemical reactions are carried out in ionic solutions, which places high demands on the packaging of G-FETs. Therefore, defects such as high cost, complex process and unstable efficiency have severely restricted the current application potential of G-FETs in the field of biomarker detection. With the rapid development of micro-nano processing technology, there are new ideas for constructing new biosensors with simple systems, low costs, short preparation time and high precision.

[0003] The structure of the traditional graphene field effect transistor is complex and needs to be processed by at least two photolithography processes. Layer-by-layer overlay has high process requirements, low yield, high cost, and is easy to damage the structure of graphene, causing the device performance to decline. In addition, in most cases, the detection area is a static area, which is not conducive to the reaction, resulting in low reaction efficiency, and it is easy to cause other liquids to remain, resulting in distortion of the detection results. For example, CN114264712A discloses a miRNA detection method based on a graphene field effect transistor and its application. The graphene field effect transistor can only detect 10pM biological targets, and the detection process is complicated and difficult to be practical.

[0004] There are also microfluidic-based graphene field effect transistors in the prior art. For example, CN107051601A discloses a nucleic acid detection microfluidic chip and preparation method based on graphene field effect tube. However, the device still has many shortcomings: 1. The device actually still uses the traditional micro-nano processing technology, and photolithography technology is required to make electrodes, which will not only increase the difficulty and cost of preparation, but also damage the graphene, and chemical reagents will remain on the surface of the graphene, affecting the performance of the device. 2. The device fails to be fully encapsulated in structure, and a hole needs to be punched in the center of the flow channel to insert the Ag / AgCl electrode wire as a gate. At the same time, because the PDMS microfluidic channel sheet is directly covered on the device electrode, the bonding ability of PDMS and the gold electrode is poor, which is easy to cause damage to the gold electrode, and the substrate and the microfluidic channel sheet are not firmly bonded. In addition, the device is not fixed and clamped by a fixture, which will cause leakage. 3. When the device is used to detect DNA, Au nanoparticles need to be used to modify graphene, and the device is immersed in chemical reagents, which will damage the device.

[0005] In summary, the current biosensors based on graphene field effect transistors have the following main disadvantages: 1. Most biosensors based on graphene field effect transistors place a micro reaction area on the surface of the device channel, and replace the solution through a syringe. It has two main disadvantages. The first is that the static solution is not easy to react with graphene, and biological molecules are not easy to connect to graphene; the second is that the syringe cannot completely absorb all the solution in the reaction chamber, and the reaction molecules are easy to remain, causing concentration deviation and affecting the test results. 2. Biosensors based on graphene field effect transistors generally have a multi-layer structure, and their preparation process requires at least two photolithography processes. The photolithography process is not only time-consuming and labor-intensive, but also requires layer-by-layer photolithography, which is also very complicated. The photolithography process needs to be repeated every time a biological test is performed.

[0006] Therefore, developing a new type of field effect transistor for biomarker detection remains one of the urgent problems to be solved in this field. Utility Model Content

[0007] To solve the above technical problems, the purpose of the present invention is to provide a field effect transistor based on a microfluidic chip. The field effect transistor based on a microfluidic chip of the present invention has the advantages of modularization and simplification, can be used to identify biomarkers, and has excellent sensitivity and specificity recognition capabilities.

[0008] In order to achieve the above-mentioned purpose, the utility model provides a field effect transistor based on a microfluidic chip, which comprises: a substrate, a semiconductor material layer and a microfluidic chip;

[0009] The semiconductor material layer is arranged on the substrate; the microfluidic chip is covered on the semiconductor material layer;

[0010] The microfluidic chip is provided with a central flow channel and a plurality of electrode channels;

[0011] Each pair of electrode channels comprises a first electrode channel and a second electrode channel, wherein the first electrode channel and the second electrode channel are respectively arranged on both sides of the central flow channel; the ends of the first electrode channel and the second electrode channel are respectively provided with a wire socket; the first electrode channel and the second electrode channel are both provided with a low melting point metal layer to form a source electrode and a drain electrode;

[0012] The electrode channel is in contact with the semiconductor material layer, and a low melting point metal layer is provided on the portion of the semiconductor material layer covered by the electrode channel;

[0013] One end of the central flow channel is a liquid inlet, and the other end is a liquid outlet; a metal electrode is inserted into the liquid inlet of the central flow channel, and the metal electrode serves as a conductive electrode of the grid;

[0014] The central flow channel is in contact with the layer of semiconductor material.

[0015] In the above-mentioned field effect transistor based on the microfluidic chip, preferably, the substrate comprises a silicon wafer having an insulating layer.

[0016] In the above-mentioned field effect transistor based on the microfluidic chip, preferably, the semiconductor material layer is a layer formed of a semiconductor material. The semiconductor material may include graphene, black phosphorus, carbon nanotubes, molybdenum disulfide or an organic semiconductor material, etc. More preferably, the semiconductor material is graphene.

[0017] In the above-mentioned field effect transistor based on the microfluidic chip, preferably, the material of the microfluidic chip includes polydimethylsiloxane (PDMS).

[0018] In the above-mentioned field effect transistor based on the microfluidic chip, preferably, the first electrode channel and the second electrode channel are symmetrically distributed with the central flow channel as the symmetry axis.

[0019] In the above-mentioned field effect transistor based on the microfluidic chip, preferably, the ends of the first electrode channel and the second electrode channel are each further provided with a low melting point metal inlet.

[0020] In the above-mentioned field effect transistor based on the microfluidic chip, preferably, the low melting point metal layer is a layer formed of a low melting point metal. More preferably, the low melting point metal is a tin-indium alloy.

[0021] According to a specific embodiment of the utility model, preferably, the above-mentioned field effect transistor based on the microfluidic chip further includes: a plurality of wires, one end of each of which is respectively arranged in the wire sockets of the first electrode channel and the second electrode channel, and is at least partially located in the low-melting-point metal layer.

[0022] In the above-mentioned field effect transistor based on the microfluidic chip, preferably, the area where the semiconductor material layer contacts the central flow channel is covered with ionic liquid, and the ionic liquid contacts the metal electrode; the metal electrode and the ionic liquid form an ionic liquid gate.

[0023] According to a specific embodiment of the present utility model, preferably, the above-mentioned field effect transistor based on the microfluidic chip further comprises: a clamp, and the clamp is used to fix and clamp the substrate and the microfluidic chip.

[0024] The utility model provides a field effect transistor based on a microfluidic chip. The structure of the field effect transistor based on the microfluidic chip has the advantages of modularization and simplification, and reduces the cost. In addition, the field effect transistor is a fully encapsulated device that can isolate the device from the water and oxygen environment of the outside, and effectively isolate the ionic liquid gate and the source and drain. In addition, the field effect transistor based on the microfluidic chip reduces the damage to the semiconductor material layer. Therefore, the field effect transistor based on the microfluidic chip has excellent electrical properties and high stability, and avoids the influence of the use conditions on it; at the same time, the field effect transistor based on the microfluidic chip has the characteristics of the microfluidic chip, so that the solution can modify the semiconductor material layer in a flowing state, and has a washable function, and can also quantitatively control the ionic liquid containing biomarkers. The field effect transistor based on the microfluidic chip can detect different biomarkers based on different sensing mechanisms, and has excellent sensitivity and specific recognition capabilities.

[0025] Compared with the prior art, the technical solution of the utility model has at least the following beneficial effects:

[0026] (1) The field effect transistor based on the microfluidic chip of the utility model successfully integrates electrodes, microfluidic channels and test wires into one device, thus obtaining an integrated platform for biosensor testing. (2) The field effect transistor based on the microfluidic chip of the utility model has good airtightness and obvious characteristics of the microfluidic chip technology. During use, it can isolate the external water and oxygen environment and can quantitatively control the ionic liquid containing biomarkers. (3) The utility model can effectively protect the semiconductor material layer, reduce the damage to the semiconductor material layer by chemical reagents and photolithography technology, so that the field effect transistor based on the microfluidic chip of the utility model has better electrical performance and stability. (4) The field effect transistor based on the microfluidic chip of the utility model can be used to realize the identification of biomarkers with high sensitivity, and successfully distinguish between a complementary chain of 10fM and a non-complementary chain with only one base mutation; at the same time, it also has the advantages of short detection time, convenience and rapidity. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 The schematic diagram shows the structure of the field effect transistor based on the microfluidic chip in some specific embodiments of the utility model.

[0028] Figure 2 The schematic diagrams of the structures of the central flow channel and the electrode channel in some specific embodiments of the present invention are shown.

[0029] Figure 3 The schematic diagrams of the structures of the clamps in some specific embodiments of the utility model are shown.

[0030] Figure 4 A schematic flow chart showing a method for preparing a field effect transistor based on a microfluidic chip in some specific embodiments of the utility model is shown.

[0031] Figure 5 The mold mask layout of the microfluidic chip produced in Example 1 is shown.

[0032] Figure 6 The Raman spectrum detection results of the graphene in the substrate formed with the semiconductor material layer in Example 1 and the graphene in the graphene field effect transistor in Comparative Example 1 are shown.

[0033] Figure 7 The electrical performance test results of the field effect transistor based on the microfluidic chip of Example 1 are shown.

[0034] Figure 8 A comparison of the electrical properties of Example 1 and Comparative Example 1 is shown.

[0035] Fig. 9 The specificity detection graph and the sensitivity detection graph in Test Example 3 are shown.

[0036] Description of Figure Numbers:

[0037] 1-substrate; 2-semiconductor material layer; 3-microfluidic chip; 4-fixture;

[0038] 301-central flow channel; 302-electrode channel; 303-first electrode channel; 304-second electrode channel; 305-wire socket; 306-low-melting-point metal layer; 307-liquid inlet; 308-liquid outlet; 309-low-melting-point metal inlet; 310-wire. DETAILED DESCRIPTION

[0039] In order to have a clearer understanding of the technical features, purposes and beneficial effects of the utility model, the technical solution of the utility model is now described in detail below, but it should not be understood as limiting the applicable scope of the utility model.

[0040] The utility model provides a field effect transistor based on a microfluidic chip, such as Figure 1 and Figure 2 As shown, it includes: a substrate 1, a semiconductor material layer 2 and a microfluidic chip 3;

[0041] A semiconductor material layer 2 is provided on the substrate 1; a microfluidic chip 3 is covered on the semiconductor material layer 2;

[0042] The microfluidic chip 3 is provided with a central flow channel 301 and a plurality of electrode channels 302;

[0043] Each pair of electrode channels 302 includes a first electrode channel 303 and a second electrode channel 304, which are respectively arranged on both sides of the central flow channel 301; the ends of the first electrode channel 303 and the second electrode channel 304 are respectively provided with a wire socket 305; the first electrode channel 303 and the second electrode channel 304 are both provided with a low melting point metal layer 306 to form a source electrode and a drain electrode;

[0044] The electrode channel 302 is in contact with the semiconductor material layer 2, and a low melting point metal layer 306 is provided on the portion of the semiconductor material layer 2 covered by the electrode channel 302;

[0045] One end of the central flow channel 301 is a liquid inlet 307, and the other end is a liquid outlet 308; a metal electrode is inserted into the liquid inlet 307 of the central flow channel 301, and the metal electrode serves as a conductive electrode of the gate;

[0046] The central flow channel 301 is in contact with the semiconductor material layer 2 .

[0047] In some embodiments, the substrate 1 may include a silicon wafer having an insulating layer. The material of the insulating layer may include but is not limited to silicon dioxide, tantalum pentoxide, or aluminum oxide, etc., preferably silicon dioxide.

[0048] In some embodiments, the semiconductor material layer 2 is a layer formed of a semiconductor material. The semiconductor material may include graphene, black phosphorus, carbon nanotubes, molybdenum disulfide or an organic semiconductor material, etc. Preferably, the semiconductor material is graphene.

[0049] In some embodiments, the material of the microfluidic chip 3 includes PDMS.

[0050] In some embodiments, Figure 2 As shown, the first electrode channel 303 and the second electrode channel 304 are symmetrically distributed with the central flow channel 301 as the symmetry axis.

[0051] In some embodiments, Figure 2 As shown, the number of electrode channels 302 is three pairs.

[0052] In some embodiments, Figure 2 As shown, the ends of the first electrode channel 303 and the second electrode channel 304 are further provided with a low melting point metal inlet 309 .

[0053] In some embodiments, the low melting point metal layer 306 is a layer formed of a low melting point metal. Preferably, the low melting point metal is a tin-indium alloy.

[0054] In some embodiments, the field effect transistor based on the microfluidic chip further includes: a plurality of wires 310 , one end of each of which is disposed in the wire sockets 305 of the first electrode channel 303 and the second electrode channel 304 , and at least partially located in the low melting point metal layer 306 .

[0055] In some embodiments, the metal electrode is, for example but not limited to, a hollow gold needle.

[0056] In some embodiments, the area where the semiconductor material layer 2 contacts the central flow channel 301 is covered with an ionic liquid, and the ionic liquid contacts the metal electrode; the metal electrode and the ionic liquid form an ionic liquid gate. It can be understood by those skilled in the art that, generally speaking, when the field effect transistor based on the microfluidic chip of the present invention is used, that is, when it is used for biomarker detection, it contacts the ionic liquid to form a gate.

[0057] In some embodiments, the field effect transistor based on the microfluidic chip further includes: a fixture 4, which is used to fix and clamp the substrate 1 and the microfluidic chip 3. The structure of the fixture 4 is, for example but not limited to: Figure 3 As shown, it may include an upper clamp ( Figure 3left image) and the lower fixture ( Figure 3 As shown in the right figure in FIG. 1 , the upper fixture is provided with at least openings corresponding to the liquid inlet 307, the liquid outlet 308, the wire socket 305 and the low melting point metal inlet 309. The upper fixture is connected to the lower fixture to fix and clamp the substrate 1 and the microfluidic chip 3.

[0058] The field effect transistor based on the microfluidic chip of the present utility model can be prepared by the following preparation method. Figure 4 As shown, the preparation method comprises the following steps:

[0059] (1) forming a semiconductor material layer 2 on a substrate 1;

[0060] (2) preparing a microfluidic chip 3 having a central flow channel 301 and a plurality of electrode channels 302;

[0061] (3) assembling the substrate 1 formed with the semiconductor material layer 2 obtained in step (1) and the microfluidic chip 3 obtained in step (2);

[0062] (4) forming a low melting point metal layer 306 in the electrode channel 302 and in the portion of the semiconductor material layer 2 covered by the electrode channel 302 to obtain a source electrode and a drain electrode;

[0063] (5) Inserting a metal electrode into the liquid inlet 307 of the central flow channel 301 to form a conductive electrode of the gate, thereby obtaining a field effect transistor based on the microfluidic chip.

[0064] In step (1), the method of forming the semiconductor material layer 2 on the substrate 1 may include: directly growing the semiconductor material on the substrate 1 to form the semiconductor material layer 2, or, after preparing the semiconductor material, transferring the prepared semiconductor material to the substrate 1 to form the semiconductor material layer 2. Preferably, when the semiconductor material is graphene, the semiconductor material layer 2 is formed on the substrate 1 by wet transfer.

[0065] Step (2) may specifically include: preparing a positive mold of the microfluidic chip 3 by micro-nano processing technology; and then using the positive mold to prepare the microfluidic chip 3 by using polydimethylsiloxane in a reverse molding method. Specifically, in the process of preparing the positive mold of the microfluidic chip 3, the layout of the photolithography mask of the designed microfluidic structure can be drawn by software, and then a photolithography mask can be made, and then the photolithography mask can be used to prepare a positive mold with a raised microfluidic structure on a silicon wafer (such as a silicon / silicon dioxide wafer) by micro-nano processing technology. In the process of preparing the microfluidic chip 3, PDMS and a curing agent can be mixed evenly in a suitable ratio (such as a mass ratio of 10:1), and then poured on the prepared positive mold. After curing and forming, a PDMS negative mold is obtained, and the PDMS negative mold is cut into a desired shape and size, and holes are punched at specific positions to form a liquid inlet 307, a liquid outlet 308, a wire socket 305 and a low melting point metal inlet 309, so as to obtain a microfluidic chip 3.

[0066] Step (3) may specifically include: covering the microfluidic chip 3 obtained in step (2) on the substrate 3 formed with the semiconductor material layer 2 obtained in step (1), and then fixing and clamping them with a clamp 4.

[0067] Before forming the low melting point metal layer 306 in step (4) of the preparation method, the step may further include: inserting one end of a plurality of wires 310 into the wire sockets 305 of the first electrode channel 303 and the second electrode channel 304 respectively.

[0068] Step (4) may specifically include: inserting one end of a plurality of wires 310 into the wire sockets 305 of the first electrode channel 303 and the second electrode channel 304 respectively; introducing a low-melting-point metal into the electrode channel 302 through a low-melting-point metal inlet 309 provided at the ends of the first electrode channel 303 and the second electrode channel 302, wherein the liquid low-melting-point metal flows in the electrode channel 302 and contacts the portion of the semiconductor material layer 2 covered by the electrode channel, and flows to the wire socket 305 and contacts the wire 310, and after the liquid low-melting-point metal solidifies into a solid state, a low-melting-point metal layer 306 is formed to obtain a source and a drain, and at least a portion of the wire 310 located in the wire socket 305 is wrapped in the low-melting-point metal layer 306.

[0069] Step (5) may further include: introducing ionic liquid into the central channel 301 through the liquid inlet 307 of the central channel 301, the ionic liquid covers the area where the semiconductor material layer 2 contacts the central channel 301, and the ionic liquid contacts the metal electrode, and the metal electrode and the ionic liquid form an ionic liquid gate.

[0070] The method for detecting biomarkers using the field effect transistor based on the microfluidic chip of the utility model may include the following steps:

[0071] The ionic liquid containing the biomarker is injected through the liquid inlet 307 of the central flow channel 301 of the field effect transistor based on the microfluidic chip, and the ionic liquid containing the biomarker flows through the semiconductor material layer 2 to detect the biomarker.

[0072] The method for detecting biomarkers may specifically include the following steps: injecting a solution containing a functionalized modifier through the liquid inlet 307 of the central flow channel 301 of the field effect transistor based on the microfluidic chip to functionally modify the semiconductor material layer 2, and then injecting an ionic liquid containing the biomarker, the functionally modified semiconductor material layer 2 captures the biomarker, and then detecting the biomarker.

[0073] Wherein, the functionalized modifier may include 1-pyrenebutanoic acid succinimidyl ester (PBSE) and a DNA probe.

[0074] The biomarkers may include one or a combination of DNA, RNA and protein molecules.

[0075] The technical solution of the present invention is specifically described below through embodiments and comparative examples, but the present invention is not limited to these embodiments and can be implemented in various modifications within the scope of the gist of the present invention.

[0076] Example 1

[0077] This embodiment provides a field effect transistor based on a microfluidic chip, such as Figure 1 , Figure 2 and Figure 3 As shown, it includes: a substrate 1, a semiconductor material layer 2, a microfluidic chip 3, a fixture 4 and a number of wires 310;

[0078] A semiconductor material layer 2 is provided on the substrate 1; a microfluidic chip 3 is covered on the semiconductor material layer 2;

[0079] The microfluidic chip 3 is provided with a central flow channel 301 and three pairs of electrode channels 302;

[0080] Each pair of electrode channels 302 includes a first electrode channel 303 and a second electrode channel 304, and the first electrode channel 303 and the second electrode channel 304 are symmetrically distributed with the central flow channel 301 as the symmetry axis; the ends of the first electrode channel 303 and the second electrode channel 304 are respectively provided with a wire socket 305 and a low-melting-point metal inlet 309; the first electrode channel 303 and the second electrode channel 304 are both provided with a low-melting-point metal layer 306 to form a source and a drain; one end of a plurality of wires 310 is respectively provided in the wire socket 305 of the first electrode channel 303 and the second electrode channel 304, and at least part of one end of the plurality of wires 310 is located in the low-melting-point metal layer 306;

[0081] The electrode channel 302 is in contact with the semiconductor material layer 2, and a low melting point metal layer 306 is provided on the portion of the semiconductor material layer 2 covered by the electrode channel 302;

[0082] One end of the central flow channel 301 is a liquid inlet 307, and the other end is a liquid outlet 308; a metal electrode is inserted into the liquid inlet 307 of the central flow channel 301, and the metal electrode serves as a conductive electrode of the gate;

[0083] The central flow channel 301 is in contact with the semiconductor material layer 2;

[0084] The fixture 4 is used to fix and clamp the substrate 1 and the microfluidic chip 3. Its structure is as follows: Figure 3 shown.

[0085] In this embodiment, the width of the central channel 301 is 50 μm-300 μm.

[0086] In this embodiment, the substrate 1 is a silicon wafer with an insulating layer, and the material of the insulating layer is silicon dioxide.

[0087] In this embodiment, the semiconductor material layer 2 is a layer formed of a semiconductor material, and the semiconductor material is graphene.

[0088] In this embodiment, the material of the microfluidic chip 3 includes PDMS.

[0089] In this embodiment, the low melting point metal layer 306 is a layer formed of a low melting point metal, and the low melting point metal is a tin-indium alloy.

[0090] In this embodiment, if Figure 3 As shown, the fixture 4 specifically includes an upper fixture ( Figure 3 left image) and the lower fixture ( Figure 3 As shown in the right figure in FIG. 1 , the upper fixture is provided with at least openings corresponding to the liquid inlet 307, the liquid outlet 308, the wire socket 305 and the low melting point metal inlet 309. The upper fixture is connected to the lower fixture to fix and clamp the substrate 1 and the microfluidic chip 3.

[0091] In this embodiment, the metal electrode is a hollow gold needle.

[0092] In this embodiment, when the field effect transistor based on the microfluidic chip is used, the area where the semiconductor material layer 2 contacts the central flow channel 301 is covered with ionic liquid, and the ionic liquid contacts the metal electrode; the metal electrode and the ionic liquid form an ionic liquid gate.

[0093] like Figure 4 As shown, the method for preparing a field effect transistor based on a microfluidic chip of this embodiment includes the following steps:

[0094] (1) forming a semiconductor material layer 2 on a substrate 1;

[0095] (2) preparing a microfluidic chip 3 having a central flow channel 301 and a plurality of electrode channels 302;

[0096] (3) assembling the substrate 1 formed with the semiconductor material layer 2 obtained in step (1) and the microfluidic chip 3 obtained in step (2);

[0097] (4) forming a low melting point metal layer 306 in the electrode channel 302 and in the portion of the semiconductor material layer 2 covered by the electrode channel 302 to obtain a source electrode and a drain electrode;

[0098] (5) Inserting a metal electrode into the liquid inlet 307 of the central flow channel 301 to form a conductive electrode of the gate, thereby obtaining a field effect transistor based on the microfluidic chip.

[0099] Wherein, step (1) specifically includes:

[0100] (a) Graphene grown on copper foil by commercial chemical vapor deposition method, firstly spin-coating polymethyl methacrylate (PMMA) solution on the graphene surface at a speed of 4000 rpm for 1 min; then heating at 170° C. until the water in the PMMA solution is completely evaporated, thereby forming a PMMA protective layer with a thickness of about 200 nm on the graphene surface;

[0101] (b) The copper foil was cut into a rectangle of 0.5 cm × 1.5 cm, and the PMMA protective layer was placed upward into an ammonium persulfate solution for etching. When the copper was completely etched, the solution changed from colorless to light blue, and the transparent colorless PMMA / graphene film floated on the surface of the solution.

[0102] (c) using a pipette to absorb the solution substantially, leaving a small amount of solution to float the film, and then injecting ultrapure water, and repeatedly washing at least 4 times; using a 4-inch silicon / silicon dioxide wafer (the silicon wafer surface has a silicon dioxide insulating layer with a thickness of 300 nm) as a substrate, ultrasonically cleaning it with acetone, isopropanol and deionized water for 15 min in sequence; then using the cleaned silicon / silicon dioxide wafer to fish out the PMMA / graphene film from the water, and allowing it to air dry naturally;

[0103] (d) The silicon / silicon dioxide wafer with the PMMA / graphene film is heated at 90° C. for 30 min and at 130° C. for 30 min, respectively; then, it is immersed in acetone for 4 h to completely remove the PMMA protective layer from the graphene surface, and then, it is rinsed with isopropanol and deionized water, respectively, and then dried with nitrogen gas to obtain a substrate 1 having a semiconductor material layer 2 (i.e., a graphene layer).

[0104] Step (2) specifically includes:

[0105] (e) Use CAD to draw the layout of the photolithography mask of the designed microfluidic structure (i.e., the structure with a central flow channel 301 and three pairs of electrode channels 302 as described above), as shown in FIG. Figure 5 As shown, a photolithography mask is then produced;

[0106] (f) an 8-inch silicon / silicon dioxide wafer was ultrasonically cleaned with acetone, isopropanol and deionized water for 15 min in sequence, the cleaned silicon / silicon dioxide wafer was placed in the center of a spin coating machine and fixed, and SU-8 3050 photoresist was spin-coated on the surface of the silicon / silicon dioxide wafer using a two-step spin coating method, the first step was spin coating at a rotation speed of 500 rpm for 20 s, and the second step was spin coating at a rotation speed of 3000 rpm for 30 s;

[0107] (g) placing the silicon / silicon dioxide wafer after spin coating with photoresist on a hot plate and heating it at 95° C. for 25 min to complete pre-baking;

[0108] (h) placing the photolithography mask at the corresponding position of the photolithography machine, and then placing the pre-baked silicon / silicon dioxide wafer at the corresponding position of the photolithography machine, the photolithography machine adopts the direct contact photolithography mode, and exposes the silicon / silicon dioxide wafer to ultraviolet light for 12 seconds;

[0109] (i) placing the exposed silicon / silicon dioxide wafer on a hot stage, heating it at 95° C. for 30 min, and then baking it;

[0110] (j) developing the post-baked silicon / silicon dioxide wafer in a negative photoresist developer for 20 seconds;

[0111] (k) placing the developed silicon / silicon dioxide wafer on a hot stage and heating it at 150° C. for 30 min to complete the hardening of the mold, thereby obtaining a positive mold of the microfluidic chip 3;

[0112] The above steps complete the preparation of the positive mold of the microfluidic chip 3, which has a raised microfluidic structure, and the average height of the raised part is 50 μm; the positive mold can be reused to avoid the need for photolithography every time a field effect transistor based on a microfluidic chip is prepared;

[0113] (l) Take 50g of PDMS and 5g of curing agent respectively, mix them evenly, and pour them evenly and flatly on the male mold;

[0114] (m) evacuating the male mold containing the mixture of PDMS and the curing agent in a closed environment for 2 hours to expel the bubbles in the mixture of PDMS and the curing agent; and then baking it in an environment of 80° C. for 20 minutes to cure the PDMS;

[0115] (n) The solidified PDMS is peeled off from the positive mold to obtain a PDMS negative mold, the PDMS negative mold is cut into a desired shape and size, and holes are punched at specific positions with a puncher to form a liquid inlet 307, a liquid outlet 308, a wire socket 305 and a low-melting-point metal inlet 309, thereby obtaining a microfluidic chip 3.

[0116] The microfluidic chip 3 has a concave microfluidic structure. The overall height of the microfluidic chip 3 is 50 μm. The width of the central flow channel 301 is 50 μm-300 μm. Different microfluidic structures can be designed based on the embodiments of the utility model to obtain positive molds with different microfluidic structures, thereby obtaining microfluidic chips 3 with different microfluidic structures.

[0117] Step (3) specifically includes:

[0118] (o) Covering the microfluidic chip 3 obtained in step (2) with the microfluidic structure on the substrate 3 formed with the semiconductor material layer 2 obtained in step (1), and then fixing and clamping them with a clamp 4 to obtain a package.

[0119] Step (4) specifically includes:

[0120] (p) Insert one end of a plurality of wires 310 into the wire sockets 305 of the first electrode channel 303 and the second electrode channel 304 respectively; then inject a low-melting-point metal (i.e., tin-indium alloy, whose melting point is 85°C) into the electrode channel 302 through the low-melting-point metal inlet 309 provided at the ends of the first electrode channel 303 and the second electrode channel 302, heat the package body to 90°C to convert the tin-indium alloy into liquid metal, the liquid low-melting-point metal flows in the electrode channel 302 and contacts the portion of the semiconductor material layer 2 covered by the electrode channel, and flows to the wire socket 305 to contact the wire 310, after cooling, the liquid low-melting-point metal solidifies into a solid state to form a low-melting-point metal layer 306, thereby obtaining a source and a drain, and at least a portion of the wire 310 located in the wire socket 305 is wrapped in the low-melting-point metal layer 306.

[0121] Step (5) specifically includes:

[0122] (q) inserting a metal electrode into the liquid inlet 307 of the central flow channel 301 to form a conductive electrode of a gate to apply an electric field for regulation, thereby obtaining a field effect transistor based on a microfluidic chip;

[0123] (r) When using the field effect transistor based on the microfluidic chip, the ionic liquid is introduced into the central channel 301 through the liquid inlet 307 of the central channel 301, and the ionic liquid covers the area where the semiconductor material layer 2 contacts the central channel 301, and the ionic liquid contacts the metal electrode, and the metal electrode and the ionic liquid form an ionic liquid gate.

[0124] Comparative Example 1

[0125] This comparative example provides a graphene field effect transistor based on a microfluidic chip.

[0126] The graphene field effect transistor based on the microfluidic chip includes: a substrate, a graphene layer, a source electrode, a drain electrode, an electric wire and a microfluidic chip; a graphene layer is arranged on the substrate; the source electrode and the drain electrode are respectively arranged at two ends of the surface of the graphene layer; the source electrode and the drain electrode are respectively connected to the electric wire; the microfluidic chip has a central flow channel, the microfluidic chip is covered on the graphene layer, and the central flow channel is in contact with the graphene layer between the source electrode and the drain electrode; one end of the central flow channel is a liquid inlet and the other end is a liquid outlet; a metal electrode is inserted into the liquid inlet of the central flow channel, the metal electrode is a hollow gold needle, and the metal electrode serves as a conductive electrode of a gate; when in use, the area where the graphene layer contacts the central flow channel is covered with an ionic liquid, and the ionic liquid contacts the metal electrode, and the metal electrode and the ionic liquid form an ionic liquid gate.

[0127] The preparation method of the graphene field effect transistor based on the microfluidic chip comprises the following steps:

[0128] (1) Forming a graphene layer on a substrate

[0129] A graphene layer is formed on a silicon / silicon dioxide wafer substrate by wet transfer using the same method as step (1) of Example 1;

[0130] (2) Depositing gold electrodes on the graphene layer using a lift-off process

[0131] Spin-coating SU-8 3050 photoresist on the surface of the graphene layer, exposing and developing the photoresist according to the designed electrode pattern to obtain a patterned photoresist and an area exposed from the patterned photoresist, evaporating a gold electrode with a thickness of 100 nm on the patterned photoresist and the area exposed from the patterned photoresist, then dissolving the photoresist with acetone to obtain a source electrode and a drain electrode, connecting wires to the source electrode and the drain electrode, and obtaining a graphene field effect transistor;

[0132] (3) Preparation of microfluidic chip

[0133] Prepare a microfluidic chip with a central flow channel according to step (2) of Example 1;

[0134] (4) Assembly of graphene field effect transistors and microfluidic chips

[0135] The side of the microfluidic chip having the central flow channel obtained in step (3) is covered on the graphene field effect transistor obtained in step (2), so that the central flow channel contacts the graphene layer between the source and the drain, and a metal electrode is inserted into the liquid inlet of the central flow channel to obtain a graphene field effect transistor based on the microfluidic chip.

[0136] Test Example 1

[0137] The graphene in the substrate 1 having the semiconductor material layer 2 (i.e., the graphene layer) obtained in step (1) of Example 1 and the graphene in the graphene field effect transistor of Comparative Example 1 were scanned using a Raman spectrometer. The Raman spectrum detection results obtained are as follows: Figure 6 As shown. The graphene of Example 1 and Comparative Example 1 were subjected to Raman scanning of the same area. Figure 6 It can be seen from the ratio of 2D peak / G peak and the ratio of G peak / D peak that, compared with comparative example 1, the graphene in embodiment 1 has fewer defects, better quality and more excellent performance.

[0138] Test Example 2

[0139] The field effect transistor based on the microfluidic chip of Example 1 and the graphene field effect transistor based on the microfluidic chip of Comparative Example 1 were tested for electrical performance. The source, drain and gate of the device were connected using a semiconductor analyzer for electrical performance testing. Transfer characteristic curve ( Figure 7 The left figure in the figure adopts I ds -Vgs Scan mode, test parameters are: source-drain bias voltage V ds =0.1V, gate V gs The scanning range is -0.9V to 0.9V, with a step length of 0.01V. Output characteristic curve ( Figure 7 The right figure in the figure) adopts I ds -V ds Scan mode, test parameters are: gate voltage V gs The range is -0.5V to 0.5V, with a step size of 0.2V, and the source-drain bias voltage V ds The range is 0V-0.1V.

[0140] Figure 7 The electrical performance test results of the field effect transistor based on the microfluidic chip of Example 1 include the transfer characteristic curve and the output characteristic curve. Among them, the Dirac point is an important parameter for the identification of the new coronavirus. Figure 7 It can be seen that the Dirac point in the intrinsic signal of the field effect transistor based on the microfluidic chip is close to 0V, which is consistent with the linear distribution of the output characteristic curve, indicating that graphene and tin-indium alloy are in ohmic contact, which is consistent with the ideal state of the graphene field effect transistor.

[0141] Figure 8 The electrical performance comparison diagram of the field effect transistor based on the microfluidic chip of Example 1 and the graphene field effect transistor based on the microfluidic chip of Comparative Example 1 is shown in FIG. Figure 8 It can be seen that the electrical performance of Comparative Example 1 is significantly lower than that of Example 1, and the performance in terms of current level, transconductance, switching ratio and carrier mobility is relatively poor. This shows that the field effect transistor based on the microfluidic chip of Example 1 has more excellent electrical performance.

[0142] Test Example 3

[0143] The field effect transistor based on the microfluidic chip of Example 1 (the width of the central flow channel 301 is 50 μm) is used to detect nucleic acids.

[0144] The novel coronavirus sample used in this test contains a complementary chain, which is a single strand of RNA and can be complementary to the DNA probe. The healthy sample contains a non-complementary chain, which is a single strand of RNA and cannot be completely complementary to the DNA probe. Its nucleotide sequence is only one base different from the complementary chain, and the similarity is extremely high.

[0145] DNA probe nucleotide sequence: 5'-H2N-C6-GCAGATTTCTTAGTGACAGTTTGGCCTTG-3'. Complementary strand nucleotide sequence: 5'-CAAGGCCAAACUGUCACUAAGAAAUCUGC-3'. Non-complementary strand nucleotide sequence: 5'-CAAGGCCAAACUGUCACUAAGGAAUCUGC-3'.

[0146] The detection method of this test case includes the following steps:

[0147] (1) injecting a 5 mM 1-pyrenebutanoic acid succinimidyl ester (PBSE) solution through the liquid inlet 307 of the central flow channel 301 of the field effect transistor based on the microfluidic chip, wherein the solvent in the solution is methanol, the injection time is 1 h, the flow rate is 0.05 μL / min, and the flow rate can be controlled by a syringe pump. After completion, injecting a 1×PBS solution for flushing once, the flow rate is 10 μL / min;

[0148] (2) Inject a 1 μM DNA probe solution containing a 1× PBS solution as the solvent for 2 h at a flow rate of 0.05 μL / min. After completion, inject a 1× PBS solution for flushing at a flow rate of 10 μL / min.

[0149] (3) Different concentrations of novel coronavirus sample solutions were injected respectively, wherein the solvent in the solution was 1×PBS solution, and the concentrations were 10fM, 1pM, 100pM, 10nM and 1μM, respectively, and the injection time was 15 min. Similarly, in the control group experiment, after step (2), different concentrations of healthy sample solutions were injected respectively, wherein the concentrations were 10fM, 1pM, 100pM, 10nM and 1μM, respectively, and the injection time was 15 min.

[0150] After each injection of the functionalized modifier solution and the sample solution, the electrical signal of the field effect transistor based on the microfluidic chip is tested. The test steps include: using a semiconductor analyzer to connect the source, drain and gate of the device, adjusting the test mode to I ds -V gs , test device transfer characteristic curve, test parameters are: source-drain bias voltage V ds =0.1V, gate V gs The scanning range was from -0.3 V to 0.3 V with a step length of 0.01 V. The obtained data were exported and analyzed using software.

[0151] Fig. 9 The specificity detection diagram obtained by the test ( Fig. 9(a) and (b)) and sensitivity detection diagram ( Fig. 9 (c) in the figure. Fig. 9 The concentrations of the novel coronavirus sample solution and the healthy sample solution in (a) and (b) are both 1 μM. Fig. 9 As can be seen from (a) and (b) in the figure, the Dirac point of the complementary chain shifts toward the negative gate voltage relative to the signal of the non-complementary chain, indicating that compared with the non-complementary chain, the complementary chain has n-doped the graphene, and the non-complementary chain has not been captured by the DNA probe. The device can successfully distinguish between the new coronavirus sample and the healthy sample. Fig. 9 As can be seen from (c), as the concentration of the complementary chain increases, the Dirac point shifts significantly toward the negative gate voltage, indicating that the combination of the DNA probe and the complementary chain produces n-type doping on graphene, and its detection limit is as low as 10fM, and it can effectively distinguish the complementary chain from the non-complementary chain with a single base mutation. The non-complementary chain with a single base mutation is a nucleotide sequence that is only one base pair different from the complementary chain, and its similarity to the complementary chain is extremely high. The field effect transistor based on the microfluidic chip provided by the utility model can successfully identify the complementary chain and the non-complementary chain with only one base pair different, indicating its excellent biosensing performance.

Claims

1. A field effect transistor based on a microfluidic chip, comprising: A substrate, a semiconductor material layer and a microfluidic chip; the semiconductor material layer is arranged on the substrate; The microfluidic chip is covered on the semiconductor material layer, and is characterized in that: The microfluidic chip is provided with a central flow channel and a plurality of electrode channels; Each pair of electrode channels comprises a first electrode channel and a second electrode channel, wherein the first electrode channel and the second electrode channel are respectively arranged on both sides of the central flow channel; the ends of the first electrode channel and the second electrode channel are respectively provided with a wire socket; the first electrode channel and the second electrode channel are both provided with a low melting point metal layer to form a source electrode and a drain electrode; The electrode channel is in contact with the semiconductor material layer, and a low melting point metal layer is provided on the portion of the semiconductor material layer covered by the electrode channel; One end of the central flow channel is a liquid inlet, and the other end is a liquid outlet; a metal electrode is inserted into the liquid inlet of the central flow channel, and the metal electrode serves as a conductive electrode of the grid; The central flow channel is in contact with the layer of semiconductor material.

2. The field effect transistor based on the microfluidic chip according to claim 1, characterized in that: The substrate includes a silicon wafer having an insulating layer.

3. The field effect transistor based on a microfluidic chip according to claim 1, characterized in that: The semiconductor material layer is a layer formed of a semiconductor material.

4. The field effect transistor based on the microfluidic chip according to claim 3, characterized in that: The semiconductor material includes graphene, black phosphorus, carbon nanotubes, molybdenum disulfide or organic semiconductor materials.

5. The field effect transistor based on the microfluidic chip according to claim 4, characterized in that: The semiconductor material is graphene.

6. The field effect transistor based on a microfluidic chip according to claim 1, characterized in that: The first electrode channel and the second electrode channel are symmetrically distributed with the central flow channel as a symmetry axis.

7. The field effect transistor based on a microfluidic chip according to claim 1, characterized in that: The ends of the first electrode channel and the second electrode channel are each further provided with a low melting point metal inlet.

8. The field effect transistor based on a microfluidic chip according to claim 1, characterized in that: The low melting point metal layer is a layer formed of a low melting point metal.

9. The field effect transistor based on a microfluidic chip according to claim 8, characterized in that: The low melting point metal is a tin-indium alloy.

10. The field effect transistor based on a microfluidic chip according to claim 1, characterized in that: The field effect transistor based on the microfluidic chip further includes: a plurality of wires, one end of each of which is respectively disposed in the wire sockets of the first electrode channel and the second electrode channel, and is at least partially located in the low melting point metal layer.

11. The field effect transistor based on a microfluidic chip according to claim 1, characterized in that: The area where the semiconductor material layer contacts the central flow channel is covered with ionic liquid, and the ionic liquid contacts the metal electrode; the metal electrode and the ionic liquid form an ionic liquid gate.

12. The field effect transistor based on a microfluidic chip according to claim 1, characterized in that: The field effect transistor based on the microfluidic chip further comprises: a fixture, which is used to fix and clamp the substrate and the microfluidic chip.

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