Circuit using same IO port to control different function modules
Through the IO multiplexing technology and the voltage division technology of the parallel switch module, the problem of insufficient use of IO ports in the microcontroller system is solved, and the control of multiple functional modules is realized, which reduces the main chip interface occupation, reduces the project transformation cost, and increases the Functional execution efficiency.
Patent Information
- Application Number
- CN202420968974.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-05-07
- Publication Date
- 2024-12-17
- Estimated Expiration
- 2034-05-07
AI Technical Summary
In microcontroller systems, with the increase in functional requirements, the IO port of the main chip is not used enough, resulting in the need to solve the problem by extending the port or deleting the function items, which increases the complexity and cost of the product and affects the user experience.
Using IO multiplexing technology, multiple functional modules are controlled through the same IO port, and parallel switching modules and resistor voltage division technology are used to identify different switching modules, reducing the occupation of main chip interfaces and expanding functional requirements.
It effectively solves the problems of insufficient interfaces and too many signal lines, reduces the use of main chip interfaces, optimizes peripheral circuits, reduces project transformation costs, and improves scalability and function execution efficiency.
Smart Images
Figure CN222189730U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the field of controller circuits, in particular to a circuit which uses the same IO port to control different functional modules. Background Art
[0002] With the development of electronic equipment technology, the demand for integrated functions realized by products is increasing, so the load capacity requirements for the main chip to handle the requirements are gradually increasing. Switches or buttons are common methods used for human-computer interaction in common single-chip microcomputer systems. Usually, the on-off status of switches or buttons can be obtained through ordinary IO ports. In some circuit designs, if there are many interfaces for switches or buttons required, and the functional pins of a mass-produced chip have been used up, the IO port of the single-chip microcomputer will be insufficient. At this time, it is necessary to either increase the number of read switches or buttons through port expansion, such as through parallel-to-serial conversion chips, or to achieve the purpose by deleting functional items. Port expansion and other methods will undoubtedly increase the complexity and cost of the product, and deleting functions will affect the realization of product functions and undoubtedly affect the user experience. Utility Model Content
[0003] In order to solve the problems in the prior art, the utility model provides a circuit that uses the same IO port to control different functional modules, adopts IO multiplexing technology, realizes the purpose of a single interface being able to control multiple functional modules, and can greatly reduce the main chip interface occupancy.
[0004] The utility model uses the same IO port to control a circuit of different functional modules, including a processor and more than two groups of parallel switch modules, one end of the parallel switch module is respectively connected to a power supply and an input port of the processor, and the other end is connected to a power ground, the switch module includes a first resistor and a switch connected in series, the resistance value of the first resistor in all switch modules is different, and when different switch modules are closed, different voltage values are output to the input port of the processor.
[0005] Furthermore, it also includes a second resistor, which is connected in series between one end of the parallel switch module and the power supply.
[0006] Furthermore, it also includes a first capacitor, which is connected in parallel with each switch module and is arranged at the output end of each parallel switch module.
[0007] Furthermore, the capacitance value of the first capacitor is 10nF.
[0008] Furthermore, it also includes a first transient suppression element, wherein the first transient suppression element and the first capacitor are connected in parallel to the input port of the processor.
[0009] Furthermore, an ADC processing unit is provided in the processor, and the input port is an ADC interface of the ADC processing unit.
[0010] As one improvement of the present invention, the processor is further provided with output interfaces which are the same in number as the switch modules and are controlled one-to-one with the switch modules, and the output interfaces are used to control different functional modules.
[0011] The utility model makes another improvement, the processor is also provided with multiple output interfaces, the number of the output interfaces is greater than the number of the switch modules, the output interfaces are signal-connected with the single switch module, and the switch module and more than two combined switch modules in a one-to-one correspondence, and the output interfaces control different functional modules through the switch module or the switch module combination.
[0012] Compared with the prior art, the beneficial effects of the present invention are: effectively solving technical problems such as insufficient interfaces, too many signal lines, insufficient PCB area, etc., by connecting multiple switch modules in parallel to the input port of the processor, when different switch modules are closed, the voltage values output to the processor input port are different, thereby realizing the identification of different switches. The present invention can reduce the occupancy of the main chip interface, effectively expand multiple functional requirements, efficiently and without increasing costs, optimize peripheral circuits to meet the needs of multiple different customized solutions, and even reserve spare functional items, reduce project transformation costs, and have strong scalability. BRIEF DESCRIPTION OF THE DRAWINGS
[0013] In order to more clearly illustrate the solutions in the present invention or the prior art, a brief introduction is given below to the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.
[0014] Figure 1 This is a structural diagram of the utility model;
[0015] Figure 2 This is a circuit diagram of an embodiment of the utility model;
[0016] Figure 3 This is a schematic diagram of the circuit board structure of an embodiment of the utility model. DETAILED DESCRIPTION
[0017] Unless otherwise defined, all technical and scientific terms used in the present invention have the same meanings as those commonly understood by technicians in the technical field of the present invention; the terms used in the specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention; the terms "including" and "having" and any variations thereof in the specification and claims of the present invention and the above-mentioned drawings are intended to cover non-exclusive inclusions. The terms "first", "second", etc. in the specification and claims of the present invention or the above-mentioned drawings are used to distinguish different objects, not to describe a specific order.
[0018] Reference to "embodiments" in the present invention means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present invention. The appearance of the phrase in various locations in the specification does not necessarily refer to the same embodiment, nor is it mutually exclusive, independent, or alternative to other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described in the present invention may be combined with other embodiments.
[0019] In order to enable those skilled in the art to better understand the solution of the utility model, the technical solution in the embodiment of the utility model will be clearly and completely described below in conjunction with the accompanying drawings.
[0020] like Figure 1 As shown, the utility model uses the same IO port to control the circuit of different functional modules, including a processor, M groups of parallel switch modules, and the output ends of the parallel switch modules are connected to an input port of the processor. In addition, the processor of this example is also provided with N output interfaces, each output interface is connected to an application function module, and the numbers of M and N in this example are both integers greater than 2. The numbers of M and N in this example can be set to be the same, and the switch module corresponds to the output interface controlled by the application function module one by one, and the output interface is used to control different functional modules. The number M of the switch modules in this example can also be less than the number N of the application function modules, and different functional modules are controlled by the switch modules and the combination of the switch modules.
[0021] like Figure 2 and Figure 3 As shown, the switch modules in this example have the same structure, and a total of 4 paths are set. Each switch module includes a first resistor and a switch. One end of the switch modules connected in parallel is respectively connected to the power supply and the input port of the processor, and the other end is connected to the power ground. The resistors in the four paths of this example are resistors R2-R5. In this example, the resistance values of all resistors R2-R5 are different. When different switch modules are closed, different voltage values are output to the input port of the processor.
[0022] The processor in this example is a CPU or MCU with ADC detection function. An ADC processing unit is provided in the processor. The input port is the sampling input port ADC1 of the ADC processing unit. Seven ports are provided on the processor chip U1 in this example, namely, the sampling input port ADC1 and the application function module output ports GPI01-GPI06. The corresponding function module device is executed through different voltage values collected by the sampling input port ADC1.
[0023] Preferably, this example further includes a second resistor R1, which is connected in series between one end of the parallel switch modules and the power supply. It also includes a first capacitor C1, which is connected in parallel with each switch module and is arranged at the output end of each parallel switch module to play a filtering role and eliminate jitter and noise for the circuit signal. The capacitance value of the first capacitor C1 in this example is 10nF.
[0024] Furthermore, a first transient suppression element is further included, and the first transient suppression element and the first capacitor are connected in parallel to the input port of the processor. The first transient suppression element in this example can be a transient suppression diode D1, an electrostatic tube, or other elements.
[0025] The power supply in this example is a 1.8V DC source, a voltage divider resistor R2, a switch S1, and a resistor R1 are connected in series, one end of the voltage divider resistor R2 is connected to R1 and the sampling input port ADC1 of the CPU at the same time, one end of the switch S1 is connected to R2, and the other end is connected to the ground, and the initial state of the switch S1 is disconnected. The other three paths are connected in the same way, and the initial state of each switch module is disconnected.
[0026] In this example, the resistance value of the resistor R1 is 1KΩ, the resistance value of the resistor R2 is 2.7KΩ, the resistance value of the resistor R3 is 6.8KΩ, the resistance value of the resistor R4 is 15KΩ, and the resistance value of the resistor R5 is 39KΩ.
[0027] This example works like this:
[0028] The first resistors connected in series to the buttons in parallel in the utility model have different resistance values, so after each button is pressed, the voltage of the signal line is the voltage divided by the voltage divider resistor R1 and the switch series resistor to the power supply 1.8V. Since each switch series resistor is different, the corresponding signal line voltage is also different. After the voltage value is read by the sampling input port ADC1 of the processor chip, it is compared with the predetermined voltage division range of each switch, so that it can be determined which switch is turned on.
[0029] When switches S1, S2, S3, and S4 are all in the off state, the sampling input port ADC1 of the processor chip U1 detects a voltage value of 1.8V, the processor chip U1 does not act, the processor chip output port GPIO1 is at a low level, and all application function modules are not turned on (the default high level starts the application function module, and the application function module does not act in the low level case).
[0030] When the switch S1 is closed and S2, S3, and S4 are all in the open state, the sampling input port ADC1 of the processor chip U1 detects a voltage value of 1.31351V, the output port GPIO1 of the processor chip U1 is at a high level, and the application function module 1 is turned on.
[0031] When S2 is closed and S1, S3, and S4 are all in the open state, the sampling input port ADC1 of the processor chip U1 detects a voltage value of 1.56923V, the output port GPIO2 of the processor chip U1 is at a high level, and the application function module 2 is turned on.
[0032] When S3 is closed and S1, S2, and S4 are all in the open state, the sampling input port ADC1 of the processor chip U1 detects a voltage value of 1.68750V, the output port GPIO3 of the processor chip U1 is at a high level, and the application function module 3 is turned on.
[0033] When S4 is closed and S1, S2, and S3 are all in the open state, the sampling input port ADC1 of the processor chip U1 detects a voltage value of 1.75500V, the output port GPIO4 of the processor chip U1 is at a high level, and the application function module 4 is turned on.
[0034] When S1 and S2 are closed and S3 and S4 are both in the open state, the sampling input port ADC1 of the processor chip U1 detects a voltage value of 1.18622V, the output port GPIO5 of the processor chip U1 is at a high level, and the application function module 5 is turned on.
[0035] When S1 and S3 are closed and S2 and S4 are both in the open state, the sampling input port ADC1 of the processor chip U1 detects a voltage value of 1.25257V, the output port GPIO5 of the processor chip U1 is at a high level, and the application function module 6 is turned on.
[0036] Similarly, the closed and open truth tables are configured to the corresponding application modules.
[0037] The utility model determines the application function type of the processor chip by combining any one or several of the switches S1, S2, S3 and S4, thereby realizing production design of multiple groups of different application occasions, flexibly realizing configuration selection of multiple application function modules, and writing different application function modules to the main chip U1.
[0038] In order to reliably determine the switch through the analog divided voltage read by the ADC, it is necessary to reasonably select the voltage divider resistor so that the interval between the voltages corresponding to each button is as large as possible. In the above actual designed circuit, the sampling input port ADC1 only reads the status of four buttons, and a total of 6 (<16) button states are read using one ADC port.
[0039] The processor chip U1 is provided with six type identification output ports, and four switches can be set to execute up to 16 types of different application function modules, including but not limited to the number of expansion switches and the number of output port GPIOs of the above-mentioned solution. The number can be increased or decreased according to actual production needs and actual application scenarios.
[0040] like Figure 3 As shown, it is obvious that the switch module of the utility model can be set on the same circuit board as the processor chip U1, or on a separate circuit board. If the switch module, processor, and application function module are separated, the switch module in this example can be connected to the sampling input port ADC1 of the processor chip U1 through a lead, and the main chip U1 circuit board leads out six signal lines with different interfaces, which are respectively connected to the corresponding application function modules that need to be controlled, and the above effects can also be achieved. If the switch panel needs to be connected to the main chip circuit through a long lead, or the main chip circuit and the function execution module need to be connected through a long lead, the interface circuit needs to be protected to improve the EMC characteristics of the circuit.
[0041] Preferably, in this example, the switch module and the processor chip U1 are arranged on the same circuit board, and screw holes are arranged. The arrangement of the screw holes can facilitate the fixation of the entire circuit board.
[0042] As can be seen from the above, the utility model adopts IO multiplexing technology, which can effectively solve technical problems such as insufficient interfaces or too many signal lines, insufficient PCB area, etc. The utility model uses an ADC port to read multiple switch status information, that is, to reduce the main chip interface occupancy, solve the problem of insufficient interfaces, and reserve spare interfaces for other uses, reducing project expansion and derivative costs. And through different switch combinations, the functional modules at the back end of the main chip can be controlled accordingly, and the main chip can be notified by pressing the switch to execute the production and processing plan of the corresponding functional module, thereby improving the efficiency of functional execution and the competitiveness of the enterprise.
[0043] The specific implementation methods described above are preferred implementation methods of the present utility model, and are not intended to limit the specific implementation scope of the present utility model. The scope of the present utility model includes but is not limited to the specific implementation methods. All equivalent changes made in accordance with the present utility model are within the protection scope of the present utility model.
Claims
1. A circuit that uses the same IO port to control different functional modules. Features: It includes a processor and more than two groups of parallel switch modules, one end of the parallel switch module is respectively connected to the power supply and the input port of the processor, and the other end is connected to the power ground. The switch module includes a first resistor and a switch connected in series. The resistance value of the first resistor in all switch modules is different. When different switch modules are closed, the voltage value output to the input port of the processor is different.
2. The circuit for controlling different functional modules using the same IO port according to claim 1, Features: It also includes a second resistor, which is connected in series between one end of the parallel switch module and the power supply.
3. The circuit for controlling different functional modules using the same IO port according to claim 1, Features: It also includes a first capacitor, which is connected in parallel with each switch module and is arranged at the output end of each parallel switch module.
4. The circuit for controlling different functional modules using the same IO port according to claim 3, Features: The capacitance value of the first capacitor is 10nF.
5. The circuit for controlling different functional modules using the same IO port according to claim 1, Features: The device also includes a first transient suppression element, wherein the first transient suppression element and the first capacitor are connected in parallel to the input port of the processor.
6. The circuit for controlling different functional modules using the same IO port according to any one of claims 1 to 4, Features: An ADC processing unit is provided in the processor, and the input port is an ADC interface of the ADC processing unit.
7. The circuit for controlling different functional modules using the same IO port according to claim 6, Features: The processor is also provided with output interfaces which are the same in number as the switch modules and are controlled one-to-one with the switch modules, and the output interfaces are used to control different functional modules.
8. The circuit for controlling different functional modules using the same IO port according to claim 6, Features: The processor is also provided with a plurality of output interfaces, the number of the output interfaces being greater than the number of the switch modules, the output interfaces being signal-connected in a one-to-one correspondence with a single switch module, and with the switch module and more than two combined switch modules, and the output interfaces controlling different functional modules through the switch modules or a combination of switch modules.