Overcurrent protection circuit and LED testing machine

By using a combination of sampling module and N-channel depletion MOS tube in the power supply protection circuit, the inrush current is quickly identified and cut off, and the problem of slow response speed of the existing power supply protection circuit is solved, and the safety of the LED tester is achieved Improved sex and stability.

CN222321092UActive Publication Date: 2025-01-07SIDEA SEMICON EQUIP (SHENZHEN) CO LTD
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Patent Information

Application Number
CN202420027202.4
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-01-05
Publication Date
2025-01-07
Estimated Expiration
2034-01-05

AI Technical Summary

Technical Problem

The existing power protection circuit responds too slowly during overcurrent and cannot quickly disconnect the overload current, resulting in circuit damage and sparks or smoke, affecting the safety and stability of the LED tester.

Method used

An overcurrent protection circuit is designed, and the sampling module and the N-channel depletion MOS tube are used to quickly identify and cut off the forward and reverse surge currents through the combination of the first MOS tube and the second MOS tube to ensure the current. If the power input or output is not reached, the filter module and thermistor are combined to achieve fast overcurrent protection.

Benefits of technology

It realizes the rapid disconnection of current during overcurrent, prevents power supply damage, improves the response speed and anti-interference of power protection, and improves the safety and stability of LED testers.

✦ Generated by Eureka AI based on patent content.

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Abstract

The embodiment of the utility model provides an overcurrent protection circuit and an LED testing machine, and belongs to the technical field of power supply protection. The circuit comprises a sampling module, a power input end, a power output end, a first MOS tube and a second MOS tube, the drain electrode of the first MOS tube is electrically connected with the power input end, the source electrode of the first MOS tube is electrically connected with the first end of the sampling module, the grid electrode of the first MOS tube is electrically connected with the second end of the sampling module, the drain electrode of the second MOS tube is electrically connected with the power output end, and the source electrode of the second MOS tube is electrically connected with the first end of the sampling module. The source electrode of the second MOS tube is electrically connected with the second end of the sampling module, the grid electrode of the second MOS tube is electrically connected with the first end of the sampling module, and current flows in from the power input end or the power output end. According to the embodiment of the invention, the current in the circuit is collected through the sampling module, overcurrent protection is realized through the first MOS tube and the second MOS tube, the overcurrent protection is sensitive in response and short in response time, and surge voltage and current can be quickly filtered to prevent a power supply from being damaged.
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Description

Technical Field

[0001] The present application relates to the technical field of power supply protection, and in particular, to an overcurrent protection circuit and an LED testing machine. Background Art

[0002] At present, the power protection circuit is used to cut off the power supply when there is an instantaneous overcurrent to prevent excessive current from damaging the power circuit. In the related art, an ordinary thermistor is used as a power protection circuit. When the subsequent circuit is damaged or short-circuited, the protection response speed of the protection circuit is not fast enough, and the overload current of the subsequent circuit cannot be immediately limited, and the transient surge current cannot be filtered out. For example, a self-resetting fuse is used as a power protection circuit. When the subsequent circuit is damaged or short-circuited, the protection circuit cannot immediately disconnect the power supply. It is necessary to wait for the self-resetting fuse to heat up until the resistance is large enough to disconnect the contact and play a protective role. During this period, the overload current of the circuit can continue to damage the circuit. For example, in a multi-channel LED tester, if a test channel circuit board card is damaged, the slow response speed of the power protection circuit will cause the entire power system to fail, thereby causing abnormal circuit boards in other test channels.

[0003] Therefore, the response speed of the power protection circuit in the related art is not timely, and the slow response speed of the power protection circuit will also lead to defects in the fire protection performance of the product. The rear circuit of the recoverable fuse can generate a current of several amperes at the moment of short circuit, which is very likely to generate sparks or smoke. Therefore, how to make the protection circuit quickly disconnect when overcurrent occurs has become a technical problem that needs to be solved urgently. Summary of the invention

[0004] The main purpose of the embodiments of the present application is to provide an overcurrent protection circuit and an LED tester, which are intended to quickly disconnect the protection circuit when overcurrent occurs.

[0005] To achieve the above object, a first aspect of an embodiment of the present application provides an overcurrent protection circuit, the method comprising:

[0006] A sampling module, used to collect the current in the circuit;

[0007] A power input terminal, a power output terminal, a first MOS tube and a second MOS tube;

[0008] The drain of the first MOS transistor is electrically connected to the power input terminal, the source of the first MOS transistor is electrically connected to the first terminal of the sampling module, and the gate of the first MOS transistor is electrically connected to the second terminal of the sampling module;

[0009] The drain of the second MOS transistor is electrically connected to the power output terminal, the source of the second MOS transistor is electrically connected to the second terminal of the sampling module, and the gate of the second MOS transistor is electrically connected to the first terminal of the sampling module; wherein the current flows in from the power input terminal or the power output terminal.

[0010] In some embodiments, the first MOS transistor and the second MOS transistor are N-channel depletion-type MOS transistors.

[0011] In some embodiments, a filter module is further included, one end of which is electrically connected to the drain of the second MOS tube and the power output end, and the other end of which is grounded, for filtering the transmitted current.

[0012] In some embodiments, the filtering module includes a capacitor, one end of the capacitor is electrically connected to the source of the second MOS tube and the power output terminal, and the other end of the capacitor is grounded.

[0013] In some embodiments, the capacitor is a polarized capacitor, a positive electrode of the polarized capacitor is electrically connected to the source of the second MOS tube and the power output terminal, and a negative electrode of the polarized capacitor is grounded.

[0014] In some embodiments, the sampling module includes a thermistor, a first end of the thermistor is electrically connected to the source of the first MOS tube and the gate of the second MOS tube, and a second end of the thermistor is electrically connected to the gate of the first MOS tube and the source of the second MOS tube.

[0015] In some embodiments, the thermistor is a positive temperature coefficient thermistor.

[0016] In some embodiments, the positive temperature coefficient thermistor is a resettable fuse.

[0017] To achieve the above-mentioned purpose, a second aspect of an embodiment of the present application provides an LED testing machine, and the system includes: the overcurrent protection circuit described in the above-mentioned first aspect.

[0018] In some embodiments, the LED tester is a multi-channel LED tester, the multi-channel LED tester includes a plurality of test channels, and the multi-channel LED tester is provided with circuit board cards located in the test channels.

[0019] The overcurrent protection circuit proposed in the present application collects the current in the circuit through the sampling module, and implements overcurrent protection through the first MOS tube and the second MOS tube. If a forward surge current appears in the circuit, the forward current passing through the sampling module is too high, and the voltage exceeds the cut-off voltage of the first MOS tube, triggering the first MOS tube to cut off, and the first MOS tube controls the voltage and current between its source and drain, so that the forward surge current cannot reach the power supply output end. If a reverse surge current appears in the circuit, the reverse current passing through the sampling module is too high, and the voltage exceeds the cut-off voltage of the second MOS tube, triggering the second MOS tube to cut off, and the second MOS tube controls the voltage and current between its source and drain, so that the reverse surge current cannot reach the power supply input end. The overcurrent protection circuit is formed by combining the first MOS tube and the second MOS tube, and its overcurrent protection is sensitive and has a short reaction time, and can quickly filter surge voltage and current to prevent power supply damage. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 is a schematic diagram of electrical connections of an overcurrent protection circuit provided in an embodiment of the present application;

[0021] Figure 2 is another electrical connection diagram of the overcurrent protection circuit provided in an embodiment of the present application;

[0022] Figure 3 is another electrical connection diagram of the overcurrent protection circuit provided in an embodiment of the present application;

[0023] Figure 4 is another electrical connection diagram of the overcurrent protection circuit provided in an embodiment of the present application;

[0024] Figure 5 It is a specific implementation schematic diagram of an application example provided in an embodiment of the present application;

[0025] Figure 6 It is a structural schematic diagram of the LED testing machine provided in an embodiment of the present application. DETAILED DESCRIPTION

[0026] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0027] It should be noted that, although the functional modules are divided in the device schematic diagram and the logical order is shown in the flowchart, in some cases, the steps shown or described may be performed in a different order than the module division in the device or the order in the flowchart. The terms "first", "second", etc. in the specification, claims and the above drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence.

[0028] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein are only for the purpose of describing the embodiments of this application and are not intended to limit this application.

[0029] First, some nouns involved in this application are analyzed:

[0030] Inrush current: Refers to the momentary high input current consumed by a power supply or electrical equipment when it is turned on, which may cause voltage sag or equipment damage.

[0031] Voltage sag: refers to the sudden drop of the effective value of the power supply voltage to 90% to 10% of the rated value, lasting for 0.5 cycle to 1 minute.

[0032] The structural diagram provided in the embodiment of the present application is specifically illustrated by the following embodiments. First, the overcurrent protection circuit in the embodiment of the present application is described.

[0033] See also Figure 1 The overcurrent protection circuit provided in the embodiment of the present application includes: a power input terminal 100, a power output terminal 200, a sampling module 300, a first MOS tube M1 and a second MOS tube M2. The sampling module 300 is used to collect the current in the circuit.

[0034] The drain of the first MOS transistor M1 is electrically connected to the power input terminal 100, the source of the first MOS transistor M1 is electrically connected to the first end of the sampling module 300, and the gate of the first MOS transistor M1 is electrically connected to the second end of the sampling module 300. The drain of the second MOS transistor M2 is electrically connected to the power output terminal 200, the source of the second MOS transistor M2 is electrically connected to the second end of the sampling module 300, and the gate of the second MOS transistor M2 is electrically connected to the first end of the sampling module 300. The current flows in from the power input terminal 100 or the power output terminal 200.

[0035] It should be noted that the current flows bidirectionally from the overcurrent protection circuit, specifically forward current and reverse current. The forward current flows from the power input terminal 100 to the power output terminal 200. The path of the forward current is: power input terminal 100 → drain of the first MOS tube M1 → source of the first MOS tube M1 → sampling module 300 → source of the second MOS tube M2 → drain of the second MOS tube M2 → power output terminal 200.

[0036] It should be noted that the reverse current flows from the power output terminal 200 to the power input terminal 100. The path of the reverse current is: the power output terminal 200 → the drain of the second MOS tube M2 → the source of the second MOS tube M2 → the sampling module 300 → the source of the first MOS tube M1 → the drain of the first MOS tube M1 → the power input terminal 100.

[0037] It should be noted that the MOS tube has a gate (G terminal), a drain (D terminal) and a source (S terminal). In this embodiment, the current flows from the source of the MOS tube to the drain of the MOS tube, and there is no current between the gate and the source of the MOS tube. In this case, the MOS tube is equivalent to a diode.

[0038] It should be noted that the power input terminal 100 and the power output terminal 200 are both grounded (GND).

[0039] It should be noted that the cutoff voltage of the first MOS tube M1 and the resistance of the sampling module 300 determine the upper limit current value of the first MOS tube M1, and the cutoff voltage of the second MOS tube M2 and the resistance of the sampling module 300 determine the upper limit current value of the second MOS tube M2.

[0040] The beneficial effects of the embodiments of the present application include but are not limited to:

[0041] The current in the circuit is collected by the sampling module 300, and overcurrent protection is implemented by the first MOS tube M1 and the second MOS tube M2. If a forward surge current occurs in the circuit, the forward current passing through the sampling module 300 exceeds the upper limit current value of the first MOS tube M1, and the voltage exceeds the cut-off voltage of the first MOS tube M1, triggering the first MOS tube M1 to be cut off, and the first MOS tube M1 controls the voltage and current between its source and drain, so that the forward surge current cannot reach the power output terminal 200. If a reverse surge current occurs in the circuit, the reverse current passing through the sampling module 300 exceeds the upper limit current value of the second MOS tube M2, and the voltage exceeds the cut-off voltage of the second MOS tube M2, triggering the second MOS tube M2 to be cut off, and the second MOS tube M2 controls the voltage and current between its source and drain, so that the reverse surge current cannot reach the power input terminal 100. The overcurrent protection of the overcurrent protection circuit is sensitive and has a short reaction time, and can quickly filter surge voltage and current to prevent power damage.

[0042] In some embodiments, the first MOS transistor M1 and the second MOS transistor M2 are both N-channel depletion-type MOS transistors.

[0043] Specifically, the condition for an N-channel depletion-type MOS transistor to enter the cut-off region is VGS=VGS(off), where VGS is the gate voltage and VGS(off) is the gate threshold voltage, i.e., the above-mentioned cut-off voltage.

[0044] Specifically, when the current in the overcurrent protection circuit surges, causing the voltage on the sampling module 300 to be equal to or exceed the VGS(off) of the N-channel depletion MOS tube, the N-channel depletion MOS tube enters the cut-off region, making the current of the circuit less than the preset upper limit current, thereby avoiding damage to the power supply. The preset upper limit current is less than or equal to the rated current of the drain of the N-channel depletion MOS tube.

[0045] The advantage of this embodiment is that by selecting an N-channel depletion-type MOS tube, the voltage drop consumed by the overcurrent protection circuit is smaller. Specifically, the Vth (gate threshold voltage) of the enhancement-type MOS tube is generally 3-5V, while the Vth of the depletion-type MOS tube is 0V. It can be seen that the voltage required for the depletion-type MOS tube to be turned on is smaller than that of the enhancement-type MOS tube, thereby reducing the voltage drop consumed by the overcurrent protection circuit.

[0046] See also Figure 2 In some embodiments, the overcurrent protection circuit further includes a filter module 400, one end of the filter module 400 is electrically connected to the drain of the second MOS tube M2 and the power output terminal 200, and the other end of the filter module 400 is grounded (GND) for filtering the transmitted current.

[0047] The advantage of this embodiment is that by connecting the filter module 400 between the drain of the second MOS tube M2 and the power output terminal 200, the filter module 400 filters the current, removes the unnecessary AC components in the DC power supply, and makes the DC power of the power output terminal 200 smooth, thereby improving the anti-interference performance of the overcurrent protection circuit.

[0048] In some embodiments, the filter module 400 is a capacitor, one end of the capacitor is electrically connected to the source of the second MOS transistor M2 and the power output terminal 200, and the other end of the capacitor is grounded (GND).

[0049] The advantage of this embodiment is that the capacitor filters the current to filter out the unnecessary AC components in the DC power supply, so that the DC power at the power output terminal 200 becomes smooth, thereby improving the anti-interference performance of the overcurrent protection circuit.

[0050] See also Figure 3 In some embodiments, the capacitor is a polar capacitor C1, the positive electrode of the polar capacitor C1 is electrically connected to the source of the second MOS tube M2 and the power output terminal 200, and the negative electrode of the polar capacitor C1 is grounded (GND).

[0051] Specifically, the rated voltage of the polarized capacitor C1 is 25V and the capacity is 680μf.

[0052] The advantage of this embodiment is that, since the working voltage of the polar capacitor is higher than that of the non-polar capacitor and the capacity of the polar capacitor is usually larger than that of the non-polar capacitor, this embodiment selects the polar capacitor C1 to filter the current, filter out the unnecessary AC components in the DC power supply, and make the DC power at the power output terminal 200 smooth, thereby more effectively improving the anti-interference performance of the overcurrent protection circuit.

[0053] See also Figure 4 In some embodiments, the sampling module 300 includes a thermistor R1, a first end of the thermistor R1 is electrically connected to the source of the first MOS transistor M1 and the gate of the second MOS transistor M2, and a second end of the thermistor R1 is electrically connected to the gate of the first MOS transistor M1 and the source of the second MOS transistor M2.

[0054] It should be noted that the resistance value of thermistor R1 and the gate threshold voltage VGS(off) of the MOS tube affect the upper limit current. In this embodiment, the upper limit current is adjusted by changing the resistance value of thermistor R1. The corresponding formula is: I=VGS(off) / R, where I is the upper limit current value, R is the resistance value of thermistor R1, and VGS(off) is the gate threshold voltage value of the MOS tube.

[0055] When the current is forward, the VGS(off) of the first MOS tube M1 is taken to calculate the upper limit current value, and when the current is reverse, the VGS(off) of the second MOS tube M2M2 is taken to calculate the upper limit current value. The upper limit current value of the forward current and the upper limit current value of the reverse current can be the same or different, and this embodiment does not limit this. In this embodiment, the VGS(off) of the first MOS tube M1 and the second MOS tube M2 are the same.

[0056] Specifically, the VGS(off) of the first MOS tube M1 and the second MOS tube M2 are both 1.8 V. If the resistance value of the thermistor R1 is set to 90Ω, the upper limit current is 1.8V / 90Ω=0.02A (i.e., 20mA). If the resistance value of the thermistor R1 is set to 18Ω, the upper limit current is 1.8V / 18Ω=0.1A (i.e., 100mA).

[0057] It should be noted that the upper limit current does not exceed the maximum Id (maximum drain current) calibrated by the MOS tube. In this embodiment, the Id of the first MOS tube M1 and the second MOS tube M2 are both 2 A. Correspondingly, the value range of the upper limit current is 0 to 2A.

[0058] The advantage of this embodiment is that the current in the circuit is collected through the thermistor R1. If a surge current occurs in the circuit, the current passing through the thermistor R1 exceeds the preset upper limit current, and the absolute value of the voltage on the thermistor R1 is equal to or greater than the absolute value of the gate threshold voltage VGS(off) of the MOS tube, causing the gate voltage VGS of the MOS tube to be equal to or greater than VGS(off), triggering the MOS tube to be cut off, so that the surge current cannot flow through the MOS tube. The overcurrent protection of the overcurrent protection circuit is sensitive and has a short reaction time, and can quickly filter surge voltage and current to prevent power supply damage.

[0059] In some embodiments, the thermistor R1 is a positive temperature coefficient thermistor.

[0060] It should be noted that the positive temperature coefficient thermistor (PTC) in this embodiment is a polymer PTC (PPTC).

[0061] The advantage of this embodiment is that the current in the circuit is sampled by a positive temperature coefficient thermistor. Since the resistance value of the positive temperature coefficient thermistor increases with the increase of temperature, when a surge current appears in the circuit, the circuit temperature increases, causing the PTC to heat up and increase its resistance value, thereby gradually reducing the current until the current on the MOS tube is less than its Id (maximum drain current) and a thermal equilibrium state is reached, thereby preventing the actual working current in the circuit from exceeding the upper limit current.

[0062] In some embodiments, the positive temperature coefficient thermistor is a resettable fuse.

[0063] The advantage of this embodiment is that the current in the circuit is sampled by the self-resetting fuse, and the sampling time is short.

[0064] See also Figure 5 In one application example, the drain of the first MOS tube M1 is electrically connected to the power input terminal 100, the source of the first MOS tube M1 is electrically connected to the first end of the thermistor R1, and the gate of the first MOS tube M1 is electrically connected to the second end of the thermistor R1. The drain of the second MOS tube M2 is electrically connected to the power output terminal 200, the source of the second MOS tube M2 is electrically connected to the second end of the thermistor R1, and the gate of the second MOS tube M2 is electrically connected to the first end of the thermistor R1. The positive electrode of the polarized capacitor C1 is electrically connected to the source of the second MOS tube M2 and the power output terminal 200, and the negative electrode of the polarized capacitor C1 is grounded. One end of the power input terminal 100 is grounded, and one end of the power output terminal 200 is grounded.

[0065] See also Figure 6 , an embodiment of the present application also provides an LED testing machine, including the above-mentioned overcurrent protection circuit.

[0066] Specifically, the overcurrent protection circuit in the LED tester is connected to the subsequent circuit. The subsequent circuit is used to amplify the current and increase the power of the LED tester. In the LED tester provided by the embodiment of the present application, when a surge current appears in the subsequent circuit in the tester, the power supply is quickly disconnected through the above-mentioned overcurrent protection circuit to avoid a short circuit in the subsequent circuit and cause voltage fluctuations in the power supply system in the LED tester, thereby avoiding damage to the LED tester and improving the safety and stability of the equipment.

[0067] In one embodiment, the LED tester is a multi-channel LED tester, which includes a plurality of test channels. The multi-channel LED tester is provided with circuit board cards located in the test channels.

[0068] The LED tester provided in the embodiment of the present application performs overcurrent protection on each test channel through the overcurrent protection circuit in the circuit board card of each test channel. Even if the circuit board card in a test channel is damaged, it will not affect the normal operation of other test channels or the main power supply of the LED tester, so that the circuit in the LED tester can operate normally even under high voltage, thereby improving the safety and stability of the LED tester.

[0069] The overcurrent protection circuit in the LED tester is basically the same as the specific embodiment of the overcurrent protection circuit described above, and will not be described in detail here.

[0070] The embodiments described in the embodiments of the present application are intended to more clearly illustrate the technical solutions of the embodiments of the present application and do not constitute a limitation on the technical solutions provided in the embodiments of the present application. Those skilled in the art will appreciate that with the evolution of technology and the emergence of new application scenarios, the technical solutions provided in the embodiments of the present application are also applicable to similar technical problems.

[0071] Those skilled in the art will appreciate that the technical solutions shown in the figures do not constitute a limitation on the embodiments of the present application, and may include more or fewer steps than shown in the figures, or a combination of certain steps, or different steps.

[0072] The device embodiments described above are merely illustrative, and the units described as separate components may or may not be physically separated, that is, they may be located in one place or distributed on multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0073] Those skilled in the art will appreciate that all or some of the steps in the methods disclosed above, and the functional modules / units in the systems and devices may be implemented as software, firmware, hardware, or a suitable combination thereof.

[0074] The terms "first", "second", "third", "fourth", etc. (if any) in the specification of the present application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable where appropriate, so that the embodiments of the present application described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device comprising a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0075] It should be understood that in the present application, "at least one (item)" means one or more, and "plurality" means two or more. "And / or" is used to describe the association relationship of associated objects, indicating that three relationships may exist. For example, "A and / or B" can mean: only A exists, only B exists, and A and B exist at the same time, where A and B can be singular or plural. The character " / " generally indicates that the objects associated before and after are in an "or" relationship. "At least one of the following" or similar expressions refers to any combination of these items, including any combination of single or plural items. For example, at least one of a, b or c can mean: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, c can be single or multiple.

[0076] In the several embodiments provided in the present application, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the above units is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0077] The units described above as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0078] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of software functional units.

[0079] The preferred embodiments of the present invention are described above with reference to the accompanying drawings, but the scope of the rights of the present invention is not limited thereto. Any modification, equivalent substitution and improvement made by a person skilled in the art without departing from the scope and essence of the present invention should be within the scope of the rights of the present invention.

Claims

1. An overcurrent protection circuit, characterized in that: include: A sampling module, used to collect the current in the circuit; A power input terminal, a power output terminal, a first MOS tube and a second MOS tube; The drain of the first MOS transistor is electrically connected to the power input terminal, the source of the first MOS transistor is electrically connected to the first terminal of the sampling module, and the gate of the first MOS transistor is electrically connected to the second terminal of the sampling module; The drain of the second MOS transistor is electrically connected to the power output terminal, the source of the second MOS transistor is electrically connected to the second terminal of the sampling module, and the gate of the second MOS transistor is electrically connected to the first terminal of the sampling module; wherein the current flows in from the power input terminal or the power output terminal.

2. The overcurrent protection circuit according to claim 1, characterized in that: The first MOS tube and the second MOS tube are N-channel depletion-type MOS tubes.

3. The overcurrent protection circuit according to claim 1, characterized in that: It also includes a filter module, one end of which is electrically connected to the drain of the second MOS tube and the power output end, and the other end of which is grounded for filtering the transmitted current.

4. The overcurrent protection circuit according to claim 3, characterized in that: The filter module comprises a capacitor, one end of which is electrically connected to the source of the second MOS tube and the power output end, and the other end of which is grounded.

5. The overcurrent protection circuit according to claim 4, characterized in that: The capacitor is a polar capacitor, a positive electrode of the polar capacitor is electrically connected to the source of the second MOS tube and the power output end, and a negative electrode of the polar capacitor is grounded.

6. The overcurrent protection circuit according to claim 1, characterized in that: The sampling module includes a thermistor, a first end of the thermistor is electrically connected to the source of the first MOS tube and the gate of the second MOS tube, and a second end of the thermistor is electrically connected to the gate of the first MOS tube and the source of the second MOS tube.

7. The overcurrent protection circuit according to claim 6, characterized in that: The thermistor is a positive temperature coefficient thermistor.

8. The overcurrent protection circuit according to claim 7, characterized in that: The positive temperature coefficient thermistor is a resettable fuse.

9. An LED testing machine, characterized in that: include: An overcurrent protection circuit as claimed in any one of claims 1 to 8.

10. The LED testing machine according to claim 9, characterized in that: The LED tester is a multi-channel LED tester, which includes a plurality of test channels. The multi-channel LED tester is provided with circuit board cards located in the test channels.