Rapid overcurrent protection circuit

Abstract

The utility model belongs to the technical field of circuits, and discloses a rapid over-current protection circuit, which comprises an operational amplifier U1, a comparator U2, an isolation driving chip U3 and a control chip U4, a port VIN + is connected with a pin 1 of a mutual inductor TR1, a port VIN-is connected with a pin 2 of the mutual inductor TR1, a pin 4 of the mutual inductor TR1 is connected with one end of a resistor R1, a positive end of a diode D101 and a negative end of a diode D103, and the other end of the resistor R1 is connected with the isolation driving chip U3 and the control chip U4. The other end of the resistor R1 is connected with one end of the capacitor C1, and a pin 3 of the mutual inductor TR1 is connected with the other end of the capacitor C1, the positive end of the diode D102 and the negative end of the diode D104. The beneficial effects of the utility model are that the transistor can be closed before chip current detection and processing, and the risk that the transistor is damaged due to overlarge current is reduced.

Description

Technical Field

[0001] The utility model relates to the technical field of circuits, in particular to a fast overcurrent protection circuit. Background Art

[0002] The resonant cavity current of the LLC converter is a high-frequency alternating current with a frequency of about 90kHz. In order to prevent excessive current from damaging the transistor, a differential sampling circuit is usually used to convert the current into a small voltage signal and send it to the chip. The chip is calculated by the ADC and the program is run. When the current is greater than the value set by the chip, the chip turns off the drive to achieve the purpose of turning off the transistor. However, it usually takes tens to hundreds of milliseconds for the chip to process and turn off the drive. The chip processing time is too long. During this process, the current is still rising, and the transistor is damaged because the current is too large and exceeds the maximum allowable current.

[0003] Therefore, it is necessary to provide a fast overcurrent protection circuit that can turn off the transistor before the chip detects the current and processes it, reducing the risk of the transistor being damaged due to excessive current. Utility Model Content

[0004] The utility model discloses a fast overcurrent protection circuit, belongs to the field of power electronics, and relates to an LLC primary current overcurrent protection circuit, which can effectively solve the technical problems involved in the background technology.

[0005] To achieve the above purpose, the technical solution of the utility model is:

[0006] A fast overcurrent protection circuit includes an operational amplifier U1, a comparator U2, an isolation drive chip U3 and a control chip U4; a port VIN+ is connected to pin 1 of a mutual inductor TR1, a port VIN- is connected to pin 2 of the mutual inductor TR1, a pin 4 of the mutual inductor TR1 is connected to one end of a resistor R1, a positive end of a diode D101 and a negative end of a diode D103, the other end of the resistor R1 is connected to one end of a capacitor C1, a pin 3 of the mutual inductor TR1 is connected to the other end of the capacitor C1, a positive end of a diode D102 and a negative end of a diode D103. The negative end of the diode D101 is connected to the negative end of the diode D102, one end of the resistor R2, one end of the resistor R3, one end of the resistor R4, one end of the resistor R5 and one end of the resistor R6, the other end of the resistor R6 is connected to one end of the capacitor C2, and the positive end of the diode D103 is connected to the positive end of the diode D104, the other end of the resistor R2, the other end of the resistor R3, the other end of the resistor R4, the other end of the resistor R5 and the other end of the capacitor C2.

[0007] One end of the capacitor C2 is connected to one end of the resistor R7, the other end of the capacitor C2 is connected to one end of the resistor R8, the other end of the resistor R7 is connected to pin 6 of the operational amplifier U1, one end of the resistor R9 and one end of the capacitor C3, the other end of the resistor R8 is connected to pin 5 of the operational amplifier U1, one end of the capacitor C4 and one end of the resistor R10, the other end of the capacitor C4 and the other end of the resistor R10 are connected to port GND, pin 4 of the operational amplifier U1 is connected to port GND, pin 8 of the operational amplifier U1 is connected to port 5VCC1, and pin 7 of the operational amplifier U1 is connected to the other end of the capacitor C3, the other end of the resistor R9 and one end of the resistor R11.

[0008] The other end of the resistor R11 is connected to one end of the capacitor C5, the pin 5 of the comparator U2 and the control chip U4, the other end of the capacitor C5 is connected to the port GND, the pin 4 of the comparator U2 is connected to the port GND, the pin 6 of the comparator U2 is connected to one end of the resistor R15, one end of the capacitor C6 and one end of the resistor R12, the other end of the resistor R15 and the other end of the capacitor C6 are connected to the port GND, the other end of the resistor R12 is connected to the port 5VCC1 and one end of the resistor R13, the pin 7 of the comparator U2 is connected to the other end of the resistor R13, one end of the resistor R14 and the gate of the MOS tube Q11, the other end of the resistor R14 and the source of the MOS tube Q11 are connected to the port GND, and the pin 8 of the comparator U2 is connected to the port 5VCC1.

[0009] The drain of the MOS tube Q11 is connected to pin 2 of the isolation driving chip U3 and one end of the resistor R16, the other end of the resistor R16 is connected to the control chip U4, pin 1 of the isolation driving chip U3 is connected to port 5VCC1, pin 3 of the isolation driving chip U3 is connected to port GND, pin 4 of the isolation driving chip U3 is connected to port PGND, pin 5 of the isolation driving chip U3 is connected to port PWM-OUT, and pin 6 of the isolation driving chip U3 is connected to port 15VCC2.

[0010] As a preferred improvement of the present invention: the port VIN+ and the port VIN- are connected to the primary circuit of the LLC circuit, the port PWM-OUT is connected to the gate of the switch tube of the primary side of the LLC circuit, and the port PGND is connected to the ground terminal of the switch tube of the primary side of the LLC circuit.

[0011] As a preferred improvement of the present invention: Pin 1 and Pin 2 of the mutual inductor TR1 share a coil, and Pin 3 and Pin 4 of the mutual inductor TR1 share a coil.

[0012] As a preferred improvement of the present invention: the port 5VCC1 is connected to a 5V power supply, and the port 15VCC2 is connected to a 15V power supply.

[0013] As a preferred improvement of the present utility model: the operational amplifier U1 is of model SGM8255.

[0014] As a preferred improvement of the present utility model: the comparator U2 model is LM2903D.

[0015] As a preferred improvement of the present invention: the isolation driver chip U3 is of model Nsi6601.

[0016] As a preferred improvement of the present invention: the model of the control chip U4 is STM32F334R8T6.

[0017] As a preferred improvement of the present utility model: the port PWM-OUT is connected to one end of the resistor R17, the other end of the resistor R17 is connected to one end of the resistor R18 and the gate of the primary MOS tube Q2 of the LLC circuit, and the other end of the resistor R18 is connected to the source of the MOS tube Q2.

[0018] The beneficial effects of the utility model are as follows:

[0019] A fast current protection circuit is provided. This hardware protection circuit can turn off the transistor before the chip detects the current and processes it, which is faster and solves the problem of transistor damage due to excessive resonant cavity current in the LLC converter. The risk of transistor damage due to excessive current is reduced through devices such as comparators and isolation driver chips. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] In order to more clearly illustrate the technical solutions in the embodiments of the present utility model, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative work, among which:

[0021] Figure 1 It is a schematic diagram of a fast overcurrent protection circuit of the utility model;

[0022] Figure 2 This is the amplifier of the overcurrent protection circuit of the utility model. Figure 1 ;

[0023] Figure 3 This is the amplifier of the overcurrent protection circuit of the utility model. Figure 2 ;

[0024] Figure 4This is the amplifier of the overcurrent protection circuit of the utility model. Figure 3 ;

[0025] Figure 5 is a schematic diagram of an LLC circuit;

[0026] Figure 6 This is a circuit output connection diagram. DETAILED DESCRIPTION

[0027] The technical solutions in the embodiments of the present invention will be described clearly and completely below in combination with the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0028] It should be noted that all directional indications in the embodiments of the present invention (such as up, down, left, right, front, back, etc.) are only used to explain the relative position relationship, movement status, etc. between the components under a certain specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indication will also change accordingly.

[0029] In addition, in the present invention, descriptions such as "first", "second", etc. are only used for descriptive purposes and cannot be understood as indicating or implying their relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" or "second" may explicitly or implicitly include at least one of the features. In the description of the present invention, the meaning of "plurality" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined.

[0030] In the present invention, unless otherwise clearly specified and limited, the terms "connection", "fixation", etc. should be understood in a broad sense. For example, "fixation" can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements, unless otherwise clearly defined. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0031] In addition, the technical solutions between the various embodiments of the present invention can be combined with each other, but it must be based on the fact that ordinary technicians in the field can implement it. When the combination of technical solutions is contradictory or cannot be implemented, it should be deemed that such combination of technical solutions does not exist and is not within the scope of protection required by the present invention.

[0032] See also Figure 1As shown, the utility model provides a fast overcurrent protection circuit, including an operational amplifier U1, a comparator U2, an isolation driver chip U3 and a control chip U4, ports VIN+ and VIN- are connected to the primary side of the LLC circuit, and the current information is transmitted to the operational amplifier U1, and after being processed by the control chip U4, it is transmitted to the switch tube of the primary side LLC circuit through the isolation driver chip U3. In this embodiment, the port VIN+ and the port VIN- are connected to the primary side circuit of the LLC circuit, the port PWM-OUT is connected to the gate of the switch tube Q2 (Q1-Q6 can be) of the primary side of the LLC circuit, the port PGND is connected to the ground terminal of the switch tube Q2 of the primary side of the LLC circuit, the port 5VCC1 is connected to a 5V power supply, the port 15VCC2 is connected to a 15V power supply, the operational amplifier U1 model is SGM8255, the comparator U2 model is LM2903D, the isolation driver chip U3 model is Nsi6601, and the control chip U4 model is STM32F334R8T6.

[0033] See also Figure 2 As shown, port VIN+ is connected to pin 1 of the mutual inductor TR1, port VIN- is connected to pin 2 of the mutual inductor TR1, pin 1 and pin 2 of the mutual inductor TR1 share a coil, pin 3 and pin 4 of the mutual inductor TR1 share a coil, pin 4 of the mutual inductor TR1 is connected to one end of the resistor R1, the positive end of the diode D101 and the negative end of the diode D103, the other end of the resistor R1 is connected to one end of the capacitor C1, pin 3 of the mutual inductor TR1 is connected to the other end of the capacitor C1, the diode D102 The positive end of the diode D101 is connected to the negative end of the diode D102, one end of the resistor R2, one end of the resistor R3, one end of the resistor R4, one end of the resistor R5 and one end of the resistor R6. The other end of the resistor R6 is connected to one end of the capacitor C2. The positive end of the diode D103 is connected to the positive end of the diode D104, the other end of the resistor R2, the other end of the resistor R3, the other end of the resistor R4, the other end of the resistor R5 and the other end of the capacitor C2. Specifically, it is equivalent to the current conversion part. The current is coupled from VIN+ and VIN- to the secondary windings IN+ and IN- of the mutual inductor TR1. After full-wave rectification by diodes D1, D2, D3, and D4, the current is added to the parallel resistors R2 / / R3 / / R4 / / R5 to form a positive continuous half-wave voltage signal.

[0034] See also Figure 3As shown, one end of the capacitor C2 is connected to one end of the resistor R7, the other end of the capacitor C2 is connected to one end of the resistor R8, the other end of the resistor R7 is connected to pin 6 of the operational amplifier U1, one end of the resistor R9 and one end of the capacitor C3, the other end of the resistor R8 is connected to pin 5 of the operational amplifier U1, one end of the capacitor C4 and one end of the resistor R10, the other end of the capacitor C4 and the other end of the resistor R10 are connected to port GND, pin 4 of the operational amplifier U1 is connected to port GND, pin 8 of the operational amplifier U1 is connected to port 5VCC1, and pin 7 of the operational amplifier U1 is connected to the other end of the capacitor C3, the other end of the resistor R9 and one end of the resistor R11. Specifically, it is equivalent to the differential amplification part. The half-wave voltage signal added to the parallel resistors R2 / / R3 / / R4 / / R5 passes through the "5" and "6" pins of the operational amplifier U1 (SGM8255) and the peripheral negative feedback circuit, and is reduced to a voltage signal Iout within 3.3V and sent to the IO port of the chip U4 (STM32F334R8T6), so that the chip can be detected normally.

[0035] See also Figure 3 As shown, the other end of the resistor R11 is connected to one end of the capacitor C5, the pin 5 of the comparator U2 and the control chip U4, the other end of the capacitor C5 is connected to the port GND, the pin 4 of the comparator U2 is connected to the port GND, the pin 6 of the comparator U2 is connected to one end of the resistor R15, one end of the capacitor C6 and one end of the resistor R12, the other end of the resistor R15 and the other end of the capacitor C6 are connected to the port GND, the other end of the resistor R12 is connected to the port 5VCC1 and one end of the resistor R13, the pin 7 of the comparator U2 is connected to the other end of the resistor R13, one end of the resistor R14 and the gate of the MOS tube Q11, the other end of the resistor R14 and the source of the MOS tube Q11 are connected to the port GND, and the pin 8 of the comparator U2 is connected to the port 5VCC1. Specifically, it is equivalent to the comparator part. The inverting input terminal "6" of the comparator U2 (LM2903D) sets the reference value through the voltage division of 5VCC1, resistor R15 and resistor R12. When the output voltage signal Iout of the operational amplifier U1 is greater than the voltage of the inverting input terminal "6" of U2, U2 outputs a high level, that is, the voltage is 5V*R14 / (R13+R14). When the output voltage signal Iout of the operational amplifier U1 is less than the voltage of the inverting input terminal of U2, U2 outputs a low level.

[0036] See also Figure 4As shown, the drain of the MOS tube Q11 is connected to the pin 2 of the isolation driver chip U3 and one end of the resistor R16, the other end of the resistor R16 is connected to the control chip U4, the pin 1 of the isolation driver chip U3 is connected to the port 5VCC1, the pin 3 of the isolation driver chip U3 is connected to the port GND, the pin 4 of the isolation driver chip U3 is connected to the port PGND, the pin 5 of the isolation driver chip U3 is connected to the port PWM-OUT, and the pin 6 of the isolation driver chip U3 is connected to the port 15VCC2. Specifically, it is equivalent to the control part of the driver chip. U3 is an isolation driver chip, which requires 5VCC1 and 15VCC2 to supply power to the primary side and the secondary side respectively, and the port PWM-OUT is connected to Q2 (a transistor of the upper bridge arm or the lower bridge arm in the LLC converter). When the LLC converter is working normally, the PWM generated by the chip IO port is isolated by the "IN" foot of U3, and Q2 is turned on or off from the "OUT" foot. When the comparator U2 outputs a high level, Q1 is turned on, and the high level of the "IN" pin of the isolation driver core U3 is forced to be pulled down to a low level, causing Q2 to be quickly turned off.

[0037] See also Figure 6 As shown, as an implementation mode, the port PWM-OUT is connected to one end of the resistor R17, the other end of the resistor R17 is connected to one end of the resistor R18 and the gate of the primary MOS tube Q2 of the LLC circuit, and the other end of the resistor R18 is connected to the source of the MOS tube Q2.

[0038] The working principle of the fast overcurrent protection circuit is as follows:

[0039] 1. The primary alternating current of the LLC converter flows through the primary winding "VIN+-VIN-" of the transformer TR1 and is coupled to the secondary winding IN+-IN-. After full-wave rectification by diodes D1, D2, D3, and D4, a positive continuous half-wave voltage signal is formed on the parallel resistors R2 / / R3 / / R4 / / R5.

[0040] 2. The continuous half-wave voltage signal added to the parallel resistors R2 / / R3 / / R4 / / R5 is reduced to a voltage signal Iout within 3.3V through the operational amplifier U1 and the peripheral negative feedback circuit and sent to the IO port of the chip U4.

[0041] 3. When the output voltage signal Iout of the operational amplifier U1 is less than the voltage of the inverting input terminal "6" of U2, U2 outputs a low level, Q11 is not turned on, and the on and off of the transistor Q2 is only controlled by the PWM generated by the chip IO port. The PWM signal passes through the "IN" pin of the isolation driver chip U3, and turns Q2 on or off from the "OUT" pin through the resistor R17.

[0042] 4. When the output voltage signal Iout of the operational amplifier U1 is greater than the voltage set at the inverting input terminal of the comparator U2, U2 outputs a high level, the high level of the "IN" pin of the isolation driver core U3 is forced to be pulled down to a low level, and the "OUT" pin outputs a low level to quickly turn off Q2, preventing the transistor of the LLC converter from being damaged due to excessive current.

[0043] Although the implementation scheme of the utility model has been disclosed as above, it is not limited to the applications listed in the specification and the implementation scheme. It can be fully applied to various fields suitable for the utility model. For those familiar with the art, additional modifications can be easily implemented. Therefore, without departing from the general concept defined by the claims and the scope of equivalents, the utility model is not limited to the specific details and the illustrations shown and described herein.

Claims

1. A fast overcurrent protection circuit, characterized in that: It includes an operational amplifier U1, a comparator U2, an isolation driver chip U3 and a control chip U4; Port VIN+ is connected to pin 1 of mutual inductor TR1, port VIN- is connected to pin 2 of the mutual inductor TR1, pin 4 of the mutual inductor TR1 is connected to one end of resistor R1, the positive end of diode D101 and the negative end of diode D103, the other end of the resistor R1 is connected to one end of capacitor C1, pin 3 of the mutual inductor TR1 is connected to the other end of capacitor C1, the positive end of diode D102 and the negative end of diode D104, the negative end of diode D101 is connected to the negative end of diode D102, one end of resistor R2, one end of resistor R3, one end of resistor R4, one end of resistor R5 and one end of resistor R6, the other end of resistor R6 is connected to one end of capacitor C2, the positive end of diode D103 is connected to the positive end of diode D104, the other end of resistor R2, the other end of resistor R3, the other end of resistor R4, the other end of resistor R5 and the other end of capacitor C2; One end of the capacitor C2 is connected to one end of the resistor R7, the other end of the capacitor C2 is connected to one end of the resistor R8, the other end of the resistor R7 is connected to pin 6 of the operational amplifier U1, one end of the resistor R9 and one end of the capacitor C3, the other end of the resistor R8 is connected to pin 5 of the operational amplifier U1, one end of the capacitor C4 and one end of the resistor R10, the other end of the capacitor C4 and the other end of the resistor R10 are connected to port GND, pin 4 of the operational amplifier U1 is connected to port GND, pin 8 of the operational amplifier U1 is connected to port 5VCC1, and pin 7 of the operational amplifier U1 is connected to the other end of the capacitor C3, the other end of the resistor R9 and one end of the resistor R11; The other end of the resistor R11 is connected to one end of the capacitor C5, the pin 5 of the comparator U2 and the control chip U4, the other end of the capacitor C5 is connected to the port GND, the pin 4 of the comparator U2 is connected to the port GND, the pin 6 of the comparator U2 is connected to one end of the resistor R15, one end of the capacitor C6 and one end of the resistor R12, the other end of the resistor R15 and the other end of the capacitor C6 are connected to the port GND, the other end of the resistor R12 is connected to the port 5VCC1 and one end of the resistor R13, the pin 7 of the comparator U2 is connected to the other end of the resistor R13, one end of the resistor R14 and the gate of the MOS tube Q11, the other end of the resistor R14 and the source of the MOS tube Q11 are connected to the port GND, and the pin 8 of the comparator U2 is connected to the port 5VCC1; The drain of the MOS tube Q11 is connected to pin 2 of the isolation driving chip U3 and one end of the resistor R16, the other end of the resistor R16 is connected to the control chip U4, pin 1 of the isolation driving chip U3 is connected to port 5VCC1, pin 3 of the isolation driving chip U3 is connected to port GND, pin 4 of the isolation driving chip U3 is connected to port PGND, pin 5 of the isolation driving chip U3 is connected to port PWM-OUT, and pin 6 of the isolation driving chip U3 is connected to port 15VCC2.

2. A fast overcurrent protection circuit according to claim 1, characterized in that: The port VIN+ and the port VIN- are connected to the primary circuit of the LLC circuit, the port PWM-OUT is connected to the gate of the switch tube of the primary circuit of the LLC circuit, and the port PGND is connected to the ground terminal of the switch tube of the primary circuit of the LLC circuit.

3. A fast overcurrent protection circuit according to claim 1, characterized in that: Pin 1 and pin 2 of the mutual inductor TR1 share a coil, and pin 3 and pin 4 of the mutual inductor TR1 share a coil.

4. A fast overcurrent protection circuit according to claim 1, characterized in that: The port 5VCC1 is connected to a 5V power supply, and the port 15VCC2 is connected to a 15V power supply.

5. A fast overcurrent protection circuit according to claim 1, characterized in that: The operational amplifier U1 is of model SGM8255.

6. A fast overcurrent protection circuit according to claim 1, characterized in that: The comparator U2 is of model LM2903D.

7. A fast overcurrent protection circuit according to claim 1, characterized in that: The isolation driver chip U3 is of model Nsi6601.

8. A fast overcurrent protection circuit according to claim 1, characterized in that: The model of the control chip U4 is STM32F334R8T6.

9. A fast overcurrent protection circuit according to claim 1, characterized in that: The port PWM-OUT is connected to one end of the resistor R17, the other end of the resistor R17 is connected to one end of the resistor R18 and the gate of the primary MOS tube Q2 of the LLC circuit, and the other end of the resistor R18 is connected to the source of the MOS tube Q2.

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