Ring oscillation circuit applied to boost DC-DC ultra-low voltage cold start chip structure

Abstract

The utility model discloses a ring oscillation circuit applied to a boost type DC-DC ultra-low voltage cold start chip structure, which relates to a cold start circuit and comprises N stacked phase inverters, and each stacked phase inverter consists of a PMOS (P-channel Metal Oxide Semiconductor) tube PM1, an NMOS (N-channel Metal Oxide Semiconductor) tube NM2, a PMOS tube PM3, an NMOS tube NM4, a PMOS tube PM5 and an NMOS tube NM6; grid electrodes and substrates of the PMOS transistor PM1, the NMOS transistor NM2, the PMOS transistor PM3, the NMOS transistor NM4, the PMOS transistor PM5 and the NMOS transistor NM6 are connected together to serve as an input end of the stacked phase inverter, a source electrode of the PMOS transistor PM1 and a source electrode of the PMOS transistor PM5 are connected to serve as a power supply input end of the stacked phase inverter, a drain electrode of the PMOS transistor PM1 is simultaneously connected with a drain electrode of the NMOS transistor NM2 and a source electrode of the PMOS transistor PM3, a drain electrode of the PMOS transistor PM3 is connected with a drain electrode of the NMOS transistor NM4 to serve as an output end of the stacked phase inverter, and a drain electrode of the NMOS transistor NM4 serves as an input end of the stacked phase inverter. And the source electrode of the NMOS tube NM4 is simultaneously connected with the drain electrode of the PMOS tube PM5 and the drain electrode of the NMOS tube NM6. According to the utility model, the threshold voltage is reduced, the wide voltage output range of the energy acquisition source is satisfied, ultra-low voltage oscillation is realized, and cold start is carried out.

Description

Technical Field

[0001] The utility model relates to a cold start circuit, and more specifically to a ring oscillator circuit applied to a boost type DC-DC ultra-low voltage cold start chip structure. Background Art

[0002] The boost DC-DC circuit is a very critical circuit in the energy harvesting system, usually in the energy harvesting application of thermal energy battery energy source. This circuit needs to use a cold start circuit to pull up the voltage so that it enters the normal energy harvesting mode. However, the startup voltage required for the cold start circuit of the traditional structure is relatively high, mostly above 0.5V, which limits the input range of the energy harvesting source voltage and does not have a wide input range of energy harvesting. For example, the oscillator composed of an inverter in the traditional structure is in the subthreshold working area of ​​the MOS tube at ultra-low voltage, the current is limited, and its flipping speed and output swing are very limited, which makes it difficult to start at ultra-low voltage, so that it does not have a wide input range of energy harvesting. Utility Model Content

[0003] The technical problem to be solved by the utility model is to provide a ring oscillator circuit applied to a boost-type DC-DC ultra-low voltage cold start chip structure in view of the deficiencies in the prior art, which meets a wide energy collection source voltage output range, realizes ultra-low voltage oscillation and performs cold start.

[0004] The utility model discloses a ring oscillator circuit for a boost-type DC-DC ultra-low voltage cold start chip structure, comprising N stacked inverters, wherein the N stacked inverters are connected in series, wherein N is a natural number greater than 1, and the input end of the first stacked inverter is connected to the output end of the Nth stacked inverter;

[0005] The stacked inverter is composed of a PMOS tube PM1, an NMOS tube NM2, a PMOS tube PM3, an NMOS tube NM4, a PMOS tube PM5, and an NMOS tube NM6; the gate electrodes and substrates of the PMOS tube PM1, the NMOS tube NM2, the PMOS tube PM3, the NMOS tube NM4, the PMOS tube PM5, and the NMOS tube NM6 are connected together as the input end of the stacked inverter, and the source electrode of the PMOS tube PM1 and the source electrode of the PMOS tube PM5 are connected together as the input end of the stacked inverter. The drain of the PMOS tube PM1 is connected to the drain of the NMOS tube NM2 and the source of the PMOS tube PM3 at the same time, the drain of the PMOS tube PM3 is connected to the drain of the NMOS tube NM4 as the output end of the stacked inverter, the source of the NMOS tube NM4 is connected to the drain of the PMOS tube PM5 and the drain of the NMOS tube NM6 at the same time, and the source of the NMOS tube NM2 and the source of the NMOS tube NM6 are both grounded.

[0006] Preferably, the number of the stacked inverters is nine.

[0007] Preferably, the power input terminals of all the stacked inverters are connected together, and the power input terminals of the stacked inverters are connected to an energy harvesting source Vin via a control switch.

[0008] Preferably, the control switch is a PMOS tube PM7, the source of the PMOS tube PM7 is connected to the energy collection source Vin, the drain of the PMOS tube PM7 is connected to the power input end of the stacked inverter, and the gate of the PMOS tube PM7 inputs a control signal CTR.

[0009] Preferably, the control signal CTR is generated by a voltage detection circuit of a cold start chip structure.

[0010] Beneficial Effects

[0011] The advantages of the utility model are: the traditional MOS tube in the inverter structure adopts PMOS tube and NMOS tube to realize the inverter function, and the substrates of all PMOS tubes and NMOS tubes are connected to their gates as the input end of the stacked inverter, which reduces the threshold voltage, obtains a larger DC gain and output swing, and realizes ultra-low voltage oscillation and cold start. In addition, after adopting the stacked inverter structure proposed by the utility model, the ring oscillation circuit only needs to connect multiple stacked inverters in series to meet the oscillation and normal output requirements of the signal, which greatly reduces the complexity of the circuit compared with the prior art. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Figure 1 This is a schematic diagram of the overall structure of the cold start circuit of the utility model;

[0013] Figure 2 This is a schematic diagram of the connection structure of the stacked inverter of the utility model;

[0014] Figure 3 This is a schematic diagram of the circuit structure of the stacked inverter of the present utility model. DETAILED DESCRIPTION

[0015] The utility model is further described below in conjunction with the embodiments, but does not constitute any limitation to the utility model. Any limited modifications made by anyone within the scope of the claims of the utility model are still within the scope of the claims of the utility model.

[0016] First, we introduce the cold start chip structure and circuit using the ring oscillator circuit. Figure 1As shown, it includes a ring oscillator circuit 1, a clock drive circuit 2, a linear charge pump 3, a low-power pulse generator 4, and a voltage detection circuit 5. One end of the off-chip inductor L1 is connected to the energy collection source Vin, and the other end of the off-chip inductor L1 is simultaneously connected to the drain of the cold start power tube Q1 and the drain of the rectifier tube Q3. The end of the off-chip inductor L1 connected to the energy collection source Vin is grounded through the off-chip filter capacitor Cin. The source and gate of the rectifier tube Q3 are simultaneously connected to the off-chip energy storage capacitor Cdd and serve as the output source Vdd. The voltage detection circuit 5 uses the output source Vdd as its power supply and detection input source, and the output end of the voltage detection circuit 5 outputs a control signal CTR. The ring oscillator circuit 1, the clock drive circuit 2, and the linear charge pump 3 all use the energy collection source Vin as the power supply. The ring oscillator circuit 1 outputs the clock signal CLK to the clock drive circuit 2. The clock drive circuit 2 outputs the drive signal CLKA and the drive signal CLKB to the linear charge pump 3. The linear charge pump 3 outputs the power supply signal Vcp as the power supply of the low-power pulse generator 4. The output end of the low-power pulse generator 4 outputs the start signal HCLK to the gate of the cold start power tube Q1. The source of the cold start power tube Q1 is connected to one end of the off-chip energy storage capacitor Cdd and is grounded.

[0017] During operation, the energy collection source Vin is powered on, the initial level of the output source Vdd is 0, and the voltage detection circuit 5 outputs a control signal CTR of low level, so that the ring oscillator circuit 1 starts to work, and then the entire cold start is started. When the output source Vdd rises to the set voltage, the voltage detection circuit 5 outputs a control signal CTR of high level, turns off the ring oscillator circuit 1 and the low-power pulse generator 4, makes the HCLK level 0, and ends the cold start process.

[0018] In the traditional cold start chip structure, the important factor limiting low voltage startup is the threshold voltage of the MOS tube in the ring oscillator circuit 1. Taking the energy harvester with an output of 1.8V as an example, it needs to use a MOS power tube with a withstand voltage of not less than 5V. Due to the ultra-low voltage power supply, the MOS tube is in the sub-threshold working area, which will cause the ring oscillator circuit 1 in the cold start chip structure to flip slowly and have insufficient driving ability. Therefore, the utility model is designed as follows Figure 2 and Figure 3 The ring oscillator circuit adopts a back gate bias structure and a stacked structure in the ring oscillator circuit 1 to reduce the threshold voltage of the field effect tube under low voltage conditions, so that it can achieve ultra-low voltage startup as low as 0.18V.

[0019] like Figure 2As shown, a ring oscillator circuit of the utility model applied to a boost-type DC-DC ultra-low voltage cold start chip structure includes nine stacked inverters. The nine stacked inverters are connected in series, and the input end of the first stacked inverter is connected to the output end of the ninth stacked inverter. The ring oscillator circuit 1 uses stacked inverters, which can not only increase the delay of the inverter itself to achieve the effect of reducing the clock frequency, but also increase the output swing of the ring oscillator when the power supply is low voltage, and the performance is better than the traditional double-tube inverter structure composed of a PMOS tube and an NMOS tube.

[0020] In addition, the power input terminals of all stacked inverters are connected together, and the power input terminals of the stacked inverters are connected to the energy collection source Vin through a control switch. In this embodiment, the control switch is a PMOS tube PM7, the source of the PMOS tube PM7 is connected to the energy collection source Vin, the drain of the PMOS tube PM7 is connected to the power input terminal of the stacked inverter, and the gate of the PMOS tube PM7 inputs a control signal CTR.

[0021] The thermoelectric battery is used as the energy source of the thermoelectric energy harvesting system. In the initial state, the voltage detection circuit 5 outputs a control signal CTR of low level, which acts on the gate of the PMOS tube PM7 of the ring oscillation circuit 1. At this time, the PMOS tube PM7 is turned on and the ring oscillation circuit 1 uses Vin as the power supply. When the energy source output voltage Vin meets the working requirements of the ring oscillation circuit 1, the ring oscillation circuit 1 works to generate a clock signal CLK. In addition, the clock frequency generated by the ring oscillation circuit 1 changes with the change of the input voltage Vin, and the frequency will increase as the Vin voltage value increases.

[0022] like Figure 3 As shown, the stacked inverter is composed of a PMOS transistor PM1, an NMOS transistor NM2, a PMOS transistor PM3, an NMOS transistor NM4, a PMOS transistor PM5, and an NMOS transistor NM6. The gate electrodes and substrates of the PMOS transistor PM1, the NMOS transistor NM2, the PMOS transistor PM3, the NMOS transistor NM4, the PMOS transistor PM5, and the NMOS transistor NM6 are connected together as the input end of the stacked inverter, the source electrode of the PMOS transistor PM1 is connected to the source electrode of the PMOS transistor PM5 as the power input end of the stacked inverter, the drain electrode of the PMOS transistor PM1 is connected to the drain electrode of the NMOS transistor NM2 and the source electrode of the PMOS transistor PM3 at the same time, the drain electrode of the PMOS transistor PM3 is connected to the drain electrode of the NMOS transistor NM4 as the output end of the stacked inverter, the source electrode of the NMOS transistor NM4 is connected to the drain electrode of the PMOS transistor PM5 and the drain electrode of the NMOS transistor NM6 at the same time, and the source electrode of the NMOS transistor NM2 and the source electrode of the NMOS transistor NM6 are both grounded.

[0023] If the oscillator is directly constructed with an inverter of a traditional structure, the MOS tube is in a subthreshold working area at ultra-low voltage, the current is limited, and its flip speed and output swing are very limited, which makes it difficult to start at ultra-low voltage, and it does not have energy collection with a wide input range. However, the utility model uses PMOS tubes and NMOS tubes to realize the inverter function of the traditional MOS tubes in the inverter structure, and connects the substrates of all PMOS tubes and NMOS tubes to their gates as the input end of the stacked inverter. Due to the lining effect of the PMOS tubes and NMOS tubes, the threshold voltage is reduced, and a larger DC gain and output swing are obtained, so that ultra-low voltage oscillation and cold start are realized, and normal operation can be achieved at an energy collection source voltage as low as 0.18V.

[0024] The above is only a preferred embodiment of the present invention. It should be pointed out that for those skilled in the art, several modifications and improvements can be made without departing from the structure of the present invention, which will not affect the effect of the implementation of the present invention and the practicality of the patent.

Claims

1. A ring oscillator circuit for a boost DC-DC ultra-low voltage cold start chip structure, characterized in that: The invention comprises N stacked inverters, wherein the N stacked inverters are connected in series, wherein N is a natural number greater than 1, and an input end of a first stacked inverter is connected to an output end of an Nth stacked inverter; The stacked inverter is composed of a PMOS tube PM1, an NMOS tube NM2, a PMOS tube PM3, an NMOS tube NM4, a PMOS tube PM5, and an NMOS tube NM6; the gate electrodes and substrates of the PMOS tube PM1, the NMOS tube NM2, the PMOS tube PM3, the NMOS tube NM4, the PMOS tube PM5, and the NMOS tube NM6 are connected together as the input end of the stacked inverter, and the source electrode of the PMOS tube PM1 and the source electrode of the PMOS tube PM5 are connected together as the input end of the stacked inverter. The drain of the PMOS tube PM1 is connected to the drain of the NMOS tube NM2 and the source of the PMOS tube PM3 at the same time, the drain of the PMOS tube PM3 is connected to the drain of the NMOS tube NM4 as the output end of the stacked inverter, the source of the NMOS tube NM4 is connected to the drain of the PMOS tube PM5 and the drain of the NMOS tube NM6 at the same time, and the source of the NMOS tube NM2 and the source of the NMOS tube NM6 are both grounded.

2. The ring oscillator circuit for a boost-type DC-DC ultra-low voltage cold start chip structure according to claim 1, characterized in that: The number of the stacked inverters is nine.

3. A ring oscillator circuit for a boost-type DC-DC ultra-low voltage cold start chip structure according to claim 1 or 2, characterized in that: The power input terminals of all the stacked inverters are connected together, and the power input terminals of the stacked inverters are connected to an energy harvesting source Vin through a control switch.

4. The ring oscillator circuit for a boost-type DC-DC ultra-low voltage cold start chip structure according to claim 3, characterized in that: The control switch adopts a PMOS tube PM7, the source of the PMOS tube PM7 is connected to the energy collection source Vin, the drain of the PMOS tube PM7 is connected to the power input end of the stacked inverter, and the gate of the PMOS tube PM7 inputs a control signal CTR.

5. The ring oscillator circuit for a boost-type DC-DC ultra-low voltage cold start chip structure according to claim 4, characterized in that: The control signal CTR is generated by a voltage detection circuit of a cold start chip structure.

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