LRM storage module based on domestic processor

Abstract

The utility model discloses an LRM storage module based on a domestic processor, which comprises a processor and a PCIE (Peripheral Component Interface Express) expansion chip electrically connected with the processor, and the PCIE expansion chip is electrically connected with a first interface; the memory slot is electrically connected with the processor through a DDR4 link; the network chip is electrically connected with the processor; the X100 nest plate is electrically connected with the processor; the LRM storage module based on the domestic processor further comprises a monitoring management chip, and the monitoring management chip is electrically connected with the processor, the PCIE expansion chip, the memory slot, the network chip and the X100 nest plate. According to the LRM storage module based on the domestic processor, the processor, the PCIE expansion chip, the network chip, the X100 chip set, the monitoring management chip and the CPLD module are all domestically produced, the LRM storage module can adapt to a domestic operating system, safety and data reliability are improved, meanwhile, a DDR4 slot is adopted, and the storage capacity and the throughput rate are increased.

Description

Technical Field

[0001] The utility model belongs to the LRM field, and in particular relates to an LRM storage module based on a domestic processor. Background Art

[0002] The LRM integrated framework (i.e., Line replaceable Module (LRM) integrated framework) has the advantages of field replaceability, flexible configuration, high security, and strong reliability, and is widely used in vehicle-mounted information collection systems. Among them, the vehicle-mounted storage module, as a module of the LRM integrated framework, is mainly responsible for the storage and transmission of system collected data and is a relatively important component of the LRM integrated framework.

[0003] Taking the existing LRM storage device on the market as an example, its principle block diagram is as follows Figure 1 As shown in the figure, its main components include: main chip (FPGA), 88E1111, QXC850M, MAX2491ED, LRM connector, etc. The device uses FPGA as the main control device, which is divided into PS end and PL end. The PS end is the system end and the PL end is the logic end. 88E1111 is connected to the PS end and is responsible for network communication. The level conversion module is connected to the PL end, which is mainly responsible for the power-on and power-off timing control and level conversion function of the whole machine. The storage interface is connected to the PL end to realize the configuration of large-capacity storage units. The existing FPGA is used as the main chip. Although it meets the basic requirements of the device system end, it cannot adapt to the domestic operating system of Galaxy Kirin, nor can it adapt to many domestic platform application software; DDR3 is used as the memory technology, which lags behind the current mainstream technology in the market; at the same time, the main chips such as 88E1111 are products of foreign chip companies, which do not meet the current demand for high localization, and there are compatibility issues with domestic products. At the same time, there is a lack of control, and security and data reliability cannot be guaranteed. Utility Model Content

[0004] The purpose of the utility model is to solve the problems raised in the background technology and to propose an LRM storage module based on a domestic processor.

[0005] In order to achieve the above purpose, the technical solution adopted by the utility model is:

[0006] The utility model proposes an LRM storage module based on a domestic processor, comprising a processor, and:

[0007] A PCIE expansion chip electrically connected to the processor, wherein the PCIE expansion chip is electrically connected to a first interface;

[0008] a memory slot electrically connected to the processor via a DDR4 link;

[0009] A network chip electrically connected to the processor;

[0010] An X100 chip set electrically connected to the processor.

[0011] Preferably, the first interface is an M.2 NVME storage interface.

[0012] Preferably, the network chip comprises a Gigabit PHY chip and a 10 Gigabit network chip, and both the Gigabit PHY chip and the 10 Gigabit network chip are provided with a network interface.

[0013] Preferably, the X100 chip set is provided with a second interface and a third interface, and the second interface is a DP interface, and the third interface is a USB interface.

[0014] Preferably, the LRM storage module based on the domestic processor also includes a monitoring management chip, and the monitoring management chip is electrically connected to the processor, PCIE expansion chip, memory slot, network chip and X100 chip set respectively.

[0015] Preferably, the LRM storage module based on the domestic processor also includes a CPLD module, and the CPLD module is electrically connected to the processor, PCIE expansion chip, memory slot, network chip, X100 chip set and monitoring management chip respectively.

[0016] Preferably, the processor adopts Feiteng Ruiteng D2000 / 8 processor.

[0017] Compared with the prior art, the beneficial effects of the utility model are:

[0018] The processor, PCIE expansion chip, network chip, X100 chip set, monitoring management chip and CPLD module in this LRM storage module based on domestic processors are all domestically produced, which can be adapted to domestic operating systems, improve security and data reliability, and use DDR4 slots to increase storage capacity and throughput rate. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 is a block diagram of an LRM storage module in the prior art;

[0020] Figure 2 The utility model is a block diagram of the LRM storage module based on the domestic processor. DETAILED DESCRIPTION

[0021] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0022] It should be noted that when a component is referred to as being "connected" to another component, it may be directly connected to the other component or there may be an intermediate component. Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application.

[0023] like Figure 2 As shown, an LRM storage module based on a domestic processor includes a processor, and:

[0024] A PCIE expansion chip electrically connected to the processor, and the PCIE expansion chip is electrically connected to a first interface; wherein the processor is electrically connected to the PCIE expansion chip via a PCIE3.0 bus, the PCIE expansion chip adopts a domestic SM8748 PCIE expansion chip (or a PEX8748 expansion chip, which can reduce costs), the PCIE expansion chip is electrically connected to the first interface via a PCIE3.0 bus, the first interface is an M.2NVME storage interface, and the number of first interfaces in this embodiment is 8 (supporting 8-way PCIE X4NVME interfaces), supporting a maximum storage capacity of 8T; in this embodiment, the processor adopts the domestic Feiteng Ruiteng D2000 / 8 industrial version as the central processing unit, the processor integrates 8 64-bit high-performance cores, and integrates a system-level security mechanism, which can meet the performance requirements and security and trust requirements in complex application scenarios.

[0025] A memory slot electrically connected to the processor via a DDR4 link; wherein the processor is electrically connected to the memory slot via a DDR4 interface, and the memory slot adopts a DDR4 slot, specifically adopts two memory sticks with a memory capacity of 16GB.

[0026] A network chip electrically connected to the processor; the network chip includes a Gigabit PHY chip and a 10 Gigabit network chip, and both the Gigabit PHY chip and the 10 Gigabit network chip are provided with network interfaces; wherein the Gigabit PHY chip is a domestically produced Gigabit PHY chip YT8531, and the 10 Gigabit network chip is a domestically produced Netcom 10 Gigabit network chip, and external Gigabit network communications and 10 Gigabit network communications are achieved through network interfaces provided on the Gigabit PHY chip and the 10 Gigabit network chip, the Gigabit network adopts the serdes protocol, and the 10 Gigabit network adopts the 10GBASE-KR protocol; the processor is electrically connected to the Gigabit PHY chip through an RGMII interface (Reduced Gigabit Media Independent Interface is Reduced GMII (Gigabit Media Independent Interface)), and the processor is electrically connected to the 10 Gigabit network chip through a PCIE3.0 bus.

[0027] The X100 chip set is electrically connected to the processor; the X100 chip set adopts the Feiteng X100 chip set, and the X100 chip set is provided with a second interface and a third interface, and the second interface is a DP interface (a one-way display interface), and the third interface is a USB interface (there are two, namely two-way USB interfaces, for human-computer interaction), and the processor is electrically connected to the X100 chip set through a PCIE3.0 bus.

[0028] In one embodiment, the LRM storage module based on the domestic processor also includes a monitoring management chip, and the monitoring management chip is electrically connected to the processor, PCIE expansion chip, memory slot, network chip and X100 chip set respectively. The monitoring management chip adopts the domestic GigaDevice GD32 series MCU chip, which is electrically connected to each component (i.e., processor, PCIE expansion chip, memory slot, network chip and X100 chip set) to detect the monitoring status of each component.

[0029] In one embodiment, the LRM storage module based on the domestic processor also includes a CPLD (Complex Programming logic device) module, and the CPLD module is electrically connected to the processor, PCIE expansion chip, memory slot, network chip, X100 chip set and monitoring management chip respectively. The CPLD module adopts the domestic FPGA Ziguang PGC4KD-6I, and is electrically connected to each component (i.e., processor, PCIE expansion chip, memory slot, network chip, X100 chip set and monitoring management chip) to realize the functions of power-on and power-off timing control, level conversion, etc. of each component.

[0030] The processor, PCIE expansion chip, network chip, X100 chip set, monitoring management chip and CPLD module in this LRM storage module based on domestic processors are all domestically produced, which can be adapted to domestic operating systems, improve security and data reliability, and use DDR4 slots to increase storage capacity and throughput rate.

[0031] The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0032] The above-described embodiments only express the more specific and detailed embodiments described in this application, but they cannot be understood as limiting the scope of the patent application. It should be pointed out that for ordinary technicians in this field, several modifications and improvements can be made without departing from the concept of this application, which all belong to the protection scope of this application. Therefore, the protection scope of the patent application shall be based on the attached claims.

Claims

1. An LRM storage module based on a domestic processor, characterized in that: The LRM storage module based on the domestic processor includes a processor, and: A PCIE expansion chip electrically connected to the processor, wherein the PCIE expansion chip is electrically connected to a first interface; a memory slot electrically connected to the processor via a DDR4 link; A network chip electrically connected to the processor; An X100 chip set electrically connected to the processor.

2. The LRM storage module based on a domestic processor as claimed in claim 1, characterized in that: The first interface is an M.2 NVME storage interface.

3. The LRM storage module based on a domestic processor as claimed in claim 1, characterized in that: The network chip comprises a Gigabit PHY chip and a 10 Gigabit network chip, and both the Gigabit PHY chip and the 10 Gigabit network chip are provided with a network interface.

4. The LRM storage module based on a domestic processor as claimed in claim 1, characterized in that: The X100 chip set is provided with a second interface and a third interface, and the second interface is a DP interface, and the third interface is a USB interface.

5. The LRM storage module based on a domestic processor as claimed in claim 1, characterized in that: The LRM storage module based on the domestic processor also includes a monitoring management chip, and the monitoring management chip is electrically connected to the processor, PCIE expansion chip, memory slot, network chip and X100 chip set respectively.

6. The LRM storage module based on a domestic processor as claimed in claim 5, characterized in that: The LRM storage module based on the domestic processor also includes a CPLD module, and the CPLD module is electrically connected to the processor, the PCIE expansion chip, the memory slot, the network chip, the X100 chip set and the monitoring management chip respectively.

7. The LRM storage module based on a domestic processor as claimed in claim 1, characterized in that: The processor adopts Feiteng Ruiteng D2000 / 8 processor.

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