Display device

Abstract

A display device includes: a substrate including a display area and a peripheral area surrounding the display area in a plan view; a power line on the substrate and overlapping the peripheral region; a pixel electrode on the substrate, overlapping the display area, and spaced apart from the power line; a light emitting layer on the pixel electrode and overlapping the display area; a common electrode on the light emitting layer and overlapping the display area; and a partition wall on the substrate, overlapping with the display area and the peripheral area, directly contacting the common electrode in the display area, and directly contacting the power line in the peripheral area.

Description

Technical Field

[0001] Embodiments relate to display devices that provide visual information. Background Art

[0002] A display device is a device that displays an image to provide visual information to a user. The display device may be a flat panel display device such as a liquid crystal display device, a field emission display device, or a light-emitting display device. The light-emitting display device may include an organic light-emitting display device including an organic light-emitting diode element as a light-emitting element, an inorganic light-emitting display device including an inorganic semiconductor element as a light-emitting element, or an ultra-small light-emitting diode device (or micro-light-emitting diode device) including a micro-light-emitting device as a light-emitting device on an ultra-small light-emitting diode element (or micro-light-emitting diode element).

[0003] The display device may include a power line for transmitting a panel driving voltage to a peripheral area. In order to transmit the panel driving voltage to the display area, the power line and the common electrode may be electrically connected to each other through a partition wall including titanium and aluminum. Utility Model Content

[0004] The embodiment provides a display device having improved reliability.

[0005] A display device according to an embodiment of the present disclosure includes: a substrate, including a display area and a peripheral area surrounding the display area in a plan view; a power line, on the substrate and overlapping the peripheral area; a pixel electrode, on the substrate, overlapping the display area and spaced apart from the power line; a light-emitting layer, on the pixel electrode and overlapping the display area; a common electrode, on the light-emitting layer and overlapping the display area; and a partition wall, on the substrate, overlapping the display area and the peripheral area, directly contacting the common electrode in the display area and directly contacting the power line in the peripheral area.

[0006] The partition wall may contact a side surface of the common electrode.

[0007] The display device may further include: a pixel defining layer on the substrate, below the partition wall and exposing a portion of the pixel electrode; and an insulating layer between the substrate and the pixel defining layer.

[0008] The insulating layer may define a first opening partially overlapping the power line in the peripheral region, wherein the pixel defining layer defines a second opening overlapping the first opening.

[0009] The first opening and the second opening overlap with the partition wall.

[0010] The power line may include: a first portion in which a plurality of holes are defined and the first portion overlaps the pixel defining layer and the insulating layer; and a second portion in which the plurality of holes are not defined and the second portion directly contacts the partition wall through the first opening and the second opening.

[0011] The pixel defining layer may include an inorganic material.

[0012] The insulating layer may include an organic material.

[0013] The partition wall may include a first partition layer on the pixel defining layer and a second partition layer on the first partition layer.

[0014] The first separation layer and the second separation layer may include different materials.

[0015] The first spacer layer may include aluminum and the second spacer layer may include titanium.

[0016] The partition wall may extend from the display area to the peripheral area.

[0017] A display device according to an embodiment of the present disclosure includes: a substrate, including a display area and a peripheral area surrounding the display area in a plan view; a power line, on the substrate and overlapping the peripheral area; a pixel electrode, on the substrate, overlapping the display area and the peripheral area and defining a contact opening overlapping the power line; a light-emitting layer, on the pixel electrode and overlapping the display area; a common electrode, on the light-emitting layer and overlapping the display area; and a partition wall, on the substrate, overlapping the display area and the peripheral area, directly contacting the common electrode in the display area and directly contacting the power line through the contact opening in the peripheral area.

[0018] The partition wall may contact a side surface of the common electrode.

[0019] The display device may further include: a pixel defining layer on the pixel electrode, under the partition wall, and exposing a portion of the pixel electrode in the display region; and an insulating layer between the substrate and the pixel defining layer.

[0020] The insulating layer may define a first opening overlapping the contact opening, wherein the pixel defining layer defines a second opening overlapping the first opening.

[0021] The contact opening, the second opening, and the third opening may overlap with the partition wall.

[0022] The power line may include: a first portion in which a plurality of holes are defined; and a second portion in which the plurality of holes are not defined, wherein the first portion overlaps with a pixel defining layer, a pixel electrode, and an insulating layer, and wherein the second portion directly contacts the partition wall through a contact opening, a first opening, and a second opening.

[0023] The partition wall may include a first partition layer on the pixel defining layer, and a second partition layer on the first partition layer and including a different material from the first partition layer.

[0024] The first spacer layer may include aluminum and the second spacer layer may include titanium.

[0025] In the display device according to the embodiment, since the pixel electrode is spaced apart from the power line, the power line and the partition wall can be in direct contact with each other. Therefore, since the partition wall directly contacts the power line in the peripheral area and directly contacts the common electrode in the display area, the resistance can be reduced. In addition, since the pixel electrode is not located between the power line and the partition wall, the exhaust volume and parasitic capacitance can be reduced. Therefore, the reliability of the display device can be improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Illustrative, non-limiting embodiments will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings.

[0027] Figure 1 is a plan view showing a display device according to one or more embodiments of the present disclosure.

[0028] Figure 2 It is shown Figure 1 Magnified view of area A.

[0029] Figure 3 It is along Figure 2 A cross-sectional view taken along line II′.

[0030] Figure 4 , Figure 5 , Figure 6 and Figure 7 is a layout diagram illustrating a portion of a display device according to one or more embodiments of the present disclosure.

[0031] Figure 8 It is along Figure 7 A cross-sectional view taken along line II-II′.

[0032] Fig. 9 , Fig.10 and Fig.11 is a layout diagram illustrating a portion of a display device according to one or more other embodiments of the present disclosure.

[0033] Fig.12 It is along Fig.11 A cross-sectional view taken along line III-III′. DETAILED DESCRIPTION

[0034] By referring to the detailed description of the embodiments and the accompanying drawings, it is easier to understand the various aspects of some embodiments of the present disclosure and the methods for implementing them. The described embodiments are provided as examples so that the present disclosure will be thorough and complete, and will fully convey the various aspects of the present disclosure to those skilled in the art. Therefore, redundant, irrelevant or irrelevant to the description of the embodiments, or processes, elements and techniques that are not necessary for a person of ordinary skill in the art to fully understand the various aspects of the present disclosure can be omitted. Unless otherwise stated, throughout the drawings and written descriptions, the same reference numerals, characters or combinations thereof refer to the same elements, and thus, repeated descriptions thereof can be omitted.

[0035] The described embodiments may have various modifications and may be implemented in different forms, and should not be construed as being limited to the embodiments shown herein. The present disclosure encompasses all modifications, equivalents, and alternatives within the scope of the present disclosure's ideas and techniques. In addition, each feature of the various embodiments of the present disclosure may be combined with each other in part or in whole, and various interlocks and drives are technically possible. Each embodiment may be implemented independently of one another or may be implemented together in association.

[0036] In the drawings, the relative sizes of elements, layers, and regions may be exaggerated for clarity and / or descriptive purposes. In addition, the use of cross-hatching and / or shading is generally provided in the drawings to clarify the boundaries between adjacent elements. As such, unless otherwise specified, the presence or absence of cross-hatching or shading does not convey or indicate any preference or requirement for a particular material, material property, size, ratio, commonality between the elements shown, and / or any other characteristic, property, performance, etc. of an element.

[0037] Various embodiments are described herein with reference to cross-sectional views as schematic diagrams of embodiments and / or intermediate structures. Thus, variations in the shapes of the diagrams due to, for example, manufacturing techniques and / or tolerances can be expected. In addition, for the purpose of describing embodiments according to the concepts of the present disclosure, the specific structural or functional descriptions disclosed herein are merely illustrative. Thus, the embodiments disclosed herein need not be interpreted as being limited to the shapes of the elements, layers, or regions shown, but will include deviations in shapes caused by, for example, manufacturing.

[0038] For example, an implanted region illustrated as a rectangle will, typically, have rounded or curved features and / or a gradient of implant concentration at its edges rather than a binary change from implanted to non-implanted region. Likewise, a buried region formed by implantation may result in some implantation in the region between the buried region and the surface through which the implantation is made.

[0039] For ease of explanation, spatially relative terms such as "below", "below", "lower", "under", "under", "above", "upper", and "upper" may be used herein to describe the relationship of one element or feature to another element or feature shown in the drawings. It will be understood that, in addition to the orientations depicted in the drawings, spatially relative terms are also intended to cover different orientations of the device in use or operation. For example, if the device is turned over in the drawings, the elements described as "below", "below", or "below" other elements or features will then be oriented "above" other elements or features. Thus, the exemplary terms "below" and "under" can cover both "above" and "below". The device can be oriented in other ways (e.g., rotated 90 degrees or at other orientations), and the spatially relative descriptors used in this article should be interpreted accordingly. Similarly, when a first part is described as being arranged "on" a second part, this indicates that the first part is arranged at the upper or lower side of the second part, without being limited to its upper side based on the direction of gravity.

[0040] In addition, the phrase "in a plan view" means when the target portion is observed from above, and the phrase "in a schematic cross-sectional view" means when the schematic cross-section obtained by vertically cutting the target portion is observed from the side. The term "overlap" or "overlapping" means that the first object can be above or below the second object or on one side of the second object, and vice versa. In addition, the term "overlap" can include stacking, facing or facing, extending above, covering or partially covering, or any other suitable term that a person of ordinary skill in the art will understand and understand. The statement "non-overlapping" can include the meaning of "away from", "separated" or "deviation" and any other suitable equivalent that a person of ordinary skill in the art will understand and understand. The terms "facing" and "facing" can mean that the first object can be directly or indirectly opposite to the second object. In the case where the third object is between the first object and the second object, although still facing each other, the first and second objects can be understood to be indirectly opposite to each other.

[0041] It will be understood that when an element, layer, region, or component is referred to as being "formed on," "on," "connected to," or "(operably or communicatively) coupled to" another element, layer, region, or component, it may be directly formed on, directly on, directly connected to, or directly coupled to the other element, layer, region, or component, or indirectly formed on, indirectly on, indirectly connected to, or indirectly coupled to the other element, layer, region, or component, such that there may be one or more intervening elements, layers, regions, or components. Additionally, this may collectively represent direct or indirect coupling or connection, as well as integrally or non-integrally coupling or connection. For example, when a layer, region, or component is referred to as being "electrically connected" or "electrically coupled" to another layer, region, or component, it may be directly electrically connected or coupled to the other layer, region, and / or component, or there may be intervening layers, regions, or components. However, "directly connected / directly coupled" or "directly on" means that one component is directly connected or coupled to another component or is directly on another component without intervening components.

[0042] In addition, in this specification, when a part of a layer, film, region, plate, etc. is formed on another part, the formation direction is not limited to the upper direction, but includes forming the part on the side surface or in the lower direction. On the contrary, when a part of a layer, film, region, plate, etc. is formed "under" another part, this not only includes the situation that the part is "directly under" the other part, but also includes the situation that there is another part between the part and the other part. At the same time, other expressions describing the relationship between components such as "between...", "immediately between...", "adjacent to..." and "directly adjacent to..." can be interpreted similarly. It will be understood that when an element or layer is referred to as "between" two elements or layers, it can be the only element or layer between the two elements or layers, or one or more intermediate elements or intermediate layers may also exist.

[0043] For the purposes of this disclosure, when following a list of elements, expressions such as "at least one of..." or "any one of..." or "one or more of..." modify the entire list of elements without modifying the individual elements in the list. For example, "at least one of X, Y, and Z" and "at least one selected from the group consisting of X, Y, and Z" can be interpreted as only X, only Y, only Z, or any combination of two or more of X, Y, and Z, such as XYZ, XYY, YZ, and ZZ, or any variation thereof. Similarly, expressions such as "at least one of A and B" can include A, B, or A and B. As used herein, "or" generally means "and / or", and the term "and / or" includes any and all combinations of one or more of the relevant listed items. For example, expressions such as "A and / or B" can include A, B, or A and B. Similarly, expressions such as “at least one of,” “a plurality of,” “one of,” and other prepositional phrases, when preceding or following a list of elements, modify the entire list of elements and do not modify the individual elements of the list.

[0044] It will be understood that, although the terms "first", "second", etc. can be used in this article to describe each element, component, area, layer and / or section, these elements, components, areas, layers and / or sections should not be limited by these terms. These terms do not correspond to a specific order, position or priority, and are only used to distinguish an element, member, component, area, layer, section or part from another element, member, component, area, area, layer, section or part. Thus, without departing from the spirit and scope of the present disclosure, the first element, component, area, layer or section described below can be referred to as the second element, component, area, layer or section. Describing an element as a "first" element may not require or imply the presence of a second element or other elements. The terms "first", "second", etc. can also be used in this article to distinguish between different categories or different groups of elements. For simplicity, the terms "first", "second", etc. can respectively represent "first category (or first group)", "second category (or second group)", etc.

[0045] The terms used in this article are only for the purpose of describing the embodiments and are not intended to limit the present disclosure. Unless the context clearly indicates otherwise, the singular forms "one" and "one (person / kind)" as used herein are also intended to include the plural forms, and the plural forms are also intended to include the singular forms. It will be further understood that when used in this specification, the terms "comprises / comprising", "have / having" and "includes / including" illustrate the presence of stated features, wholes, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, components and / or their groups.

[0046] As used herein, the terms "substantially," "approximately," "approximately," and other similar terms are used as approximate terms rather than terms of degree, and are intended to account for inherent deviations in measured or calculated values ​​that one of ordinary skill in the art would recognize. Taking into account the measurements in question and the errors associated with the measurement of a particular quantity (i.e., the limitations of the measurement system), "approximately" or "approximately" as used herein include the stated values ​​and mean within an acceptable range of deviations of the particular value determined by one of ordinary skill in the art. For example, "approximately" may mean within one or more standard deviations, or within ±30%, ±20%, ±10%, or ±5% of the stated value. In addition, when describing embodiments of the present disclosure, the use of "may" refers to "one or more embodiments of the present disclosure."

[0047] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by those of ordinary skill in the art to which the present disclosure belongs. It will be further understood that, unless explicitly defined as such herein, terms (such as those defined in general dictionaries) should be interpreted as having a meaning consistent with their context in the relevant art and / or in this specification, and should not be interpreted in an idealized or overly formal sense.

[0048] Figure 1 is a plan view showing a display device according to one or more embodiments of the present disclosure.

[0049] refer to Figure 1 , the display device 10 according to one or more embodiments may include a display area DA and a peripheral area PA.

[0050] The display device 10 may have a rectangular planar shape having long sides in the first direction DR1 and short sides in the second direction DR2. The second direction DR2 may cross the first direction DR1. However, the second direction DR2 is not limited thereto.

[0051] The display area DA may be an area for displaying an image. The planar shape of the display area DA may be a rectangular shape, or may be a rectangular shape with rounded corners. However, the planar shape of the display area DA is not limited thereto, and the display area DA may have various planar shapes such as a circular shape, an elliptical shape, or other polygonal shapes.

[0052] The peripheral area PA may be located around the display area DA. The peripheral area PA may surround the display area DA (e.g., in a plan view). The peripheral area PA may be an area where an image is not displayed. In one or more embodiments, a driver for driving the display area DA to display an image may be located in the peripheral area PA.

[0053] The pixels PX may be arranged in a matrix form in the display area DA. The pixel PX may be defined as a minimum light-emitting unit capable of displaying white light. In addition, signal lines such as gate lines and data lines may be located in the display area DA. Signal lines such as gate lines and data lines may be connected to each of the pixels PX. Each of the pixels PX may receive a gate signal or a data signal from the signal line, etc.

[0054] In one or more embodiments, the display device 10 may be an ultra-small LED display device (or a micro LED display device) including ultra-small LEDs (or micro LEDs) as light emitting elements. However, the present disclosure is not limited thereto.

[0055] Figure 2 It is shown Figure 1 Magnified view of area A.

[0056] Further references Figure 2 , each of the plurality of pixels PX may include a plurality of light emitting areas EA1, EA2, and EA3 that emit light. In the drawings, it is shown that each of the plurality of pixels PX includes three light emitting areas EA1, EA2, and EA3, but the present disclosure is not limited thereto. For example, each of the plurality of pixels PX may include four or more light emitting areas.

[0057] Each of the plurality of light emitting areas EA1, EA2, and EA3 may include a light emitting diode LD that emits a first light. The first light may be white light. However, the present disclosure is not limited thereto. In addition, although the light emitting diode LD has a rectangular planar shape, the present disclosure is not limited thereto. For example, the light emitting diode LD may have a polygonal shape other than a quadrilateral shape, or may have a circular shape, an elliptical shape, or an atypical shape.

[0058] Each of the first light emitting regions EA1 may emit a second light. Each of the first light emitting regions EA1 may convert the first light emitted from the light emitting diode LD into a second light to emit the second light. For example, the second light may be light in a blue wavelength band. However, embodiments of the present disclosure are not limited thereto.

[0059] Each of the second light emitting regions EA2 may emit a third light. Each of the second light emitting regions EA2 may convert the first light emitted from the light emitting diode LD into a third light to emit the third light. The third light may be light in a green wavelength band. However, the present disclosure is not limited thereto.

[0060] Each of the third light emitting regions EA3 may emit fourth light. Each of the third light emitting regions EA2 may convert the first light emitted from the light emitting diode LD into fourth light to emit the fourth light. The fourth light may be light in a red wavelength band. However, the present disclosure is not limited thereto.

[0061] The first light emitting area EA1, the second light emitting area EA2 and the third light emitting area EA3 may be alternately arranged in the first direction DR1. For example, the first light emitting area EA1, the second light emitting area EA2 and the third light emitting area EA3 may be arranged in the first direction DR1 in the order of the first light emitting area EA1, the second light emitting area EA2 and the third light emitting area EAD3.

[0062] The first light emitting area EA1 may be arranged in the second direction DR2. The second light emitting area EA2 may be arranged in the second direction DR2. The third light emitting area EA3 may be arranged in the second direction DR2.

[0063] The plurality of light emitting areas EA1, EA2, and EA3 may be partitioned by partition walls SW. The partition walls SW may surround the light emitting diode LD. The partition walls SW may be spaced apart from the light emitting diode LD. The partition walls SW may have a planar shape of a mesh shape, a net shape, or a lattice shape.

[0064] Each of the plurality of light emitting regions EA1, EA2, and EA3 defined by the partition wall SW may have a rectangular planar shape, but the present disclosure is not limited thereto. For example, each of the plurality of light emitting regions EA1, EA2, and EA3 defined by the partition wall SW may have a polygonal shape other than a quadrilateral shape, or may have a circular shape, an elliptical shape, or an atypical shape.

[0065] Figure 3 It is along Figure 2 A cross-sectional view taken along line II′.

[0066] refer to Figure 1 , Figure 2 and Figure 3, the display device 10 may include a substrate SUB, a conductive layer CL, an insulating layer IL, a pixel electrode PXL, a pixel defining layer PDL, a partition wall SW, an overhang layer pattern OV, an organic material layer EL, and a common electrode CA.

[0067] Since the display device 10 includes a display area DA and a peripheral area PA, the substrate SUB may include the display area DA and the peripheral area PA. The substrate SUB may include various materials. For example, the substrate SUB may include various materials such as silicon wafer, glass, or plastic.

[0068] The conductive layer CL may be located on the substrate SUB. The conductive layer CL may include a conductive material. For example, the conductive layer CL may include a metal such as titanium or aluminum. However, the present disclosure is not limited thereto.

[0069] The insulating layer IL may be located on the substrate SUB. The insulating layer IL may cover the conductive layer CL. The insulating layer IL may include an organic material.

[0070] Additional conductive layers and insulating layers may be further located between the substrate SUB and the conductive layer CL. However, the present disclosure is not limited thereto.

[0071] The pixel electrode PXL may be located on the substrate SUB. The pixel electrode PXL may overlap the display area DA. In addition, the pixel electrode PXL may not overlap the peripheral area PA. The pixel electrode PXL may include a conductive material. For example, the pixel electrode PXL may include indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO x ) or indium oxide (InO x ) etc. These may be used alone or in combination with each other.

[0072] The pixel electrode PXL may have a single-layer structure including at least one of the above materials. Alternatively, the pixel electrode PXL may have a multi-layer structure.

[0073] The pixel defining layer PDL may be on the substrate SUB (eg, on the insulating layer IL), and may define an opening exposing a portion of an upper surface of the pixel electrode PXL.

[0074] The pixel defining layer PDL may include an inorganic material. For example, the pixel defining layer PDL may include silicon nitride (SiN x ), silicon oxide (SiO x ), silicon oxynitride (Si x N y O z ) or magnesium fluoride (MgF x )wait.

[0075] In one or more embodiments, the partition wall SW may be located on the pixel defining layer PDL. The partition wall SW may overlap the display area DA and the peripheral area PA. That is, the partition wall SW may extend from the display area DA to the peripheral area PA.

[0076] In one or more embodiments, the partition wall SW may include a first partition layer SW1 and a second partition layer SW2. The first partition layer SW1 may be located on the pixel defining layer PDL. The second partition layer SW2 may be located on the first partition layer SW1.

[0077] In one or more embodiments, the first separation layer SW1 and the second separation layer SW2 may include different materials. For example, the first separation layer SW1 may include a first metal, and the second separation layer SW2 may include a second metal different from the first metal. For example, the first metal may be aluminum (Al), and the second metal may be titanium (Ti). In other words, when the first separation layer SW1 includes aluminum, the second separation layer SW2 including titanium may be located on the first separation layer SW1. Therefore, the second separation layer SW2 may protect the first separation layer SW1 from corrosion.

[0078] In one or more embodiments, the first spacer layer SW1 and the second spacer layer SW2 may have the same taper angle. For example, each of the first spacer layer SW1 and the second spacer layer SW2 may have a regular tapered shape. However, the present disclosure is not limited thereto. For example, the second spacer layer SW2 may be omitted.

[0079] The overhanging layer pattern OV may be located on the partition wall SW. For example, the overhanging layer pattern OV may be located on the second partition layer SW2. The overhanging layer pattern OV may include an inorganic material or a metal. For example, the overhanging layer pattern OV may include an inorganic material. Examples of inorganic materials may include silicon nitride (SiN x ) or silicon oxide (SiO x ) etc. For another example, the overhanging layer pattern OV may include metal. Examples of the metal may include titanium (Ti) and the like.

[0080] The width of the upper surface of the overhanging layer pattern OV may be greater than the width of the upper surface of the pixel defining layer PDL. Therefore, the overhanging layer pattern OV may function as a tip.

[0081] The organic material layer EL may overlap the display area DA. The organic material layer EL may include a first light emitting portion PO1 and a second light emitting portion PO2 spaced apart from the first light emitting portion PO1. The first light emitting portion PO1 may be located on the overhang layer pattern OV. The second light emitting portion PO2 may be located on the pixel electrode PXL and the pixel defining layer PDL. In other words, the first light emitting portion PO1 of the organic material layer EL and the second light emitting portion PO2 of the organic material layer EL may have a disconnected structure.

[0082] The organic material layer EL may include a light-emitting layer and a functional layer. The light-emitting layer may overlap with the display area DA. The functional layer may include a hole transport layer, a hole injection layer, an electron transport layer, or an electron injection layer, etc. For example, the organic material layer EL may include a hole transport layer, a hole injection layer, an emission layer, an electron transport layer, and an electron injection layer. However, the present disclosure is not limited thereto, and the stacking order or stacking shape may be changed.

[0083] The common electrode CA may overlap the display area DA. The common electrode CA may include a first electrode portion PO3 and a second electrode portion PO4 spaced apart from the first electrode portion PO3. The first electrode portion PO3 of the common electrode CA may be located on the first light emitting portion PO1 of the organic material layer EL. The second electrode portion PO4 of the common electrode CA may be located on the second light emitting portion PO2 of the organic material layer EL and may contact the partition wall SW. That is, the common electrode CA may directly contact the partition wall SW in the display area DA.

[0084] The side surface of the common electrode CA may be electrically connected to the entire panel by contacting the partition wall SW. That is, when a panel driving voltage is applied to the partition wall SW, the organic material layer EL may receive the panel driving voltage through the common electrode CA contacting the side surface of the partition wall SW.

[0085] The common electrode CA may include a transparent conductive material. For example, the common electrode CA may include lithium (Li), calcium (CA), aluminum (Al), silver (Ag), magnesium (Mg), or barium (Ba), etc. These may be used alone or in combination with each other.

[0086] Figure 4 , Figure 5 , Figure 6 and Figure 7 is a layout diagram illustrating a portion of a display device according to one or more embodiments of the present disclosure. Figure 8 It is along Figure 7 A cross-sectional view taken along line II-II′.

[0087] For example, Figure 4 , Figure 5 , Figure 6 and Figure 7 Can be Figure 1 Layout diagram of area A.

[0088] refer to Figure 4 and Figure 8 The power line PL may be located on the substrate SUB. The power line PL may transmit the panel driving voltage to the display area DA (see Figure 1 The power line PL can be connected to the peripheral area PA (see Figure 1 ) and may not overlap with the display area DA. In addition, the power line PL may overlap with the conductive layer CL (see Figure 3 ) are located on the same layer. That is, the power line PL may include the same material as the conductive layer CL.

[0089] The power line PL may include a first portion P1 and a second portion P2 adjacent to the first portion P1. A plurality of holes HL may be defined in the first portion P1, and a plurality of holes HL may not be defined in the second portion P2. Gas generated from the organic material may be exhausted through the plurality of holes HL.

[0090] Further references Figure 5 , the insulating layer IL may be located on the power line PL. The insulating layer IL may completely overlap the first portion P1 and may partially overlap the second portion P2. The insulating layer IL may define a first opening OP1 partially overlapping the power line PL in the peripheral area PA. For example, the first opening OP2 may overlap the second portion P2. That is, the first opening OP1 may expose at least a portion of the second portion P2.

[0091] Further references Figure 6 , the pixel defining layer PDL may be located on the insulating layer IL. The pixel defining layer PDF may completely overlap the first portion P1 and may partially overlap the second portion P2. The pixel defining layer PDL may define a second opening OP2 overlapping the first opening OP1. For example, the second opening OP2 and the first opening OP1 may form one opening. Therefore, the second opening OP2 may overlap the second portion P2 and may expose at least a portion of the second portion P2.

[0092] Further references Figure 7 , the partition wall SW may be located on the power line PL, the insulating layer IL, and the pixel defining layer PDL. The partition wall SW may overlap the display area DA and the peripheral area PA. That is, the partition wall SW may extend from the display area DA to the peripheral area PA. In one or more embodiments, the partition wall SW may define a plurality of holes. The gas generated from the organic material may be discharged through the plurality of holes. However, the present disclosure is not limited thereto.

[0093] In one or more embodiments, the pixel electrode PXL located in the display area DA may be spaced apart from the power line PL. Figure 3 ) is not located between the partition wall SW and the power line PL, so the partition wall SW can directly contact the power line PL.

[0094] For example, the partition wall SW may overlap the first opening OP1 and the second opening OP2. That is, the partition wall SW may directly contact the second portion P2 through the first opening OP1 and the second opening OP2. Therefore, the first portion P1 of the power line PL may overlap the pixel defining layer PDL and the insulating layer IL, and the second portion P2 of the power line PL may directly contact the partition wall SW.

[0095] In one or more embodiments, because the pixel electrode PXL is spaced apart from the power line PL, the power line PL and the partition wall SW can directly contact each other. Therefore, because the partition wall SW directly contacts the power line PL in the peripheral area PA and directly contacts the common electrode in the display area DA, the resistance can be reduced. In addition, because the pixel electrode PXL is not located between the power line PL and the partition wall SW, the exhaust volume and parasitic capacitance can be reduced. Therefore, the reliability of the display device 10 can be improved.

[0096] Fig. 9 , Fig.10 and Fig.11 is a layout diagram illustrating a portion of a display device according to one or more other embodiments of the present disclosure. Fig.12 It is along Fig.11 A cross-sectional view taken along line III-III′.

[0097] For example, Fig. 9 , Fig.10 and Fig.11 Can be Figure 1 In addition, in addition to the pixel electrode PXL, reference Fig. 9 , Fig.10 , Fig.11 and Fig.12 The display device described can be used with reference Figure 1 , Figure 2 , Figure 3 , Figure 4 , Figure 5 , Figure 6 , Figure 7 and Figure 8 The display device 10 described is the same. Therefore, redundant descriptions may be omitted or simplified.

[0098] refer to Figure 4 , Figure 5 , Fig. 9 and Fig.12, the power line PL may be located on the substrate SUB. The power line PL may be connected to the peripheral area PA (see Figure 1 ) and may not overlap with the display area DA (see Figure 1 )overlapping.

[0099] The power line PL may include a first portion P1 and a second portion P2 adjacent to the first portion P1. A plurality of holes HL may be defined in the first portion P1, and a plurality of holes HL may not be defined in the second portion P2.

[0100] The insulating layer IL may be located on the power line PL. The insulating layer IL may completely overlap the first portion P1 and may partially overlap the second portion P2. The insulating layer IL may define a first opening OP1 partially overlapping the power line PL in the peripheral area PA. For example, the first opening OP1 may overlap the second portion P2. That is, the first opening OP1 may expose at least a portion of the second portion P2.

[0101] In one or more embodiments, the pixel electrode PXL may be located on the insulating layer IL. The pixel electrode PXL may overlap the display area DA and the peripheral area PA. The pixel electrode PXL may define a contact opening CNT overlapping the power line PL. The contact opening CNT may overlap the first opening OP1. That is, the contact opening CNT may expose at least a portion of the second portion P2 together with the first opening OP1.

[0102] The pixel electrode PXL may define a plurality of pixel holes PXH. Gas generated from the organic material may be exhausted through the plurality of pixel holes PXH. However, the present disclosure is not limited thereto.

[0103] Further references Fig.10 , the pixel defining layer PDL may be located on the insulating layer IL and the pixel electrode PXL. The pixel defining layer PDL may completely overlap the first portion P1 and may partially overlap the second portion P2. The pixel defining layer PDL may define a second opening OP2 overlapping the first opening OP1 and the contact opening CNT. For example, the second opening OP2 may form an opening with the first opening OP1 and the contact opening CNT. Therefore, the second opening OP2 may overlap the second portion P2 and may expose at least a portion of the second portion P2.

[0104] Further references Fig.11 , the partition wall SW may be located on the power line PL, the insulating layer IL, the pixel electrode PXL, and the pixel defining layer PDL. The partition wall SW may overlap the display area DA and the peripheral area PA. That is, the partition wall SW may extend from the display area DA to the peripheral area PA. In addition, the partition wall SW may contact the common electrode CA in the display area DA.

[0105] The partition wall SW may include a first partition layer SW1 and a second partition layer SW2 located on the first partition layer SW1. The first partition layer SW1 and the second partition layer SW2 may include different materials. For example, the first partition layer SW1 may include aluminum, and the second partition layer SW2 may include titanium.

[0106] In one or more embodiments, the partition wall SW may directly contact the power line PL in the peripheral area PA. For example, the partition wall SW may overlap the contact opening CNT, the first opening OP1, and the second opening OP2. That is, the partition wall SW may directly contact the second portion P2 through the contact opening CNT, the first opening OP1, and the second opening OP2. Therefore, the first portion P1 of the power line PL may overlap the pixel electrode PXL, the pixel defining layer PDL, and the insulating layer IL, and the second portion P2 of the power line PL may directly contact the partition wall SW.

[0107] In one or more embodiments, since the pixel electrode PXL defines a contact opening CNT overlapping the power line PL and the partition wall SW, the power line PL and the partition wall SW can be in direct contact through the contact opening CNT. Therefore, since the partition wall SW directly contacts the power line PL in the peripheral area PA and directly contacts the common electrode CA in the display area DA, the resistance can be reduced. Therefore, the reliability of the display device can be improved.

[0108] The present disclosure may be applied to various display devices. For example, the present disclosure may be applied to various display devices such as display devices for vehicles, ships, and aircraft, portable communication devices, display devices for display or information transmission, or medical display devices.

[0109] The above is an illustration of the embodiments and should not be construed as limiting thereof. Although some embodiments have been described, it will be readily appreciated by those skilled in the art that many modifications may be made in the embodiments without substantially departing from the novel teachings and aspects of the present disclosure. Therefore, all such modifications are intended to be included within the scope of the present disclosure as defined in the claims. Therefore, it should be understood that the above is an illustration of various embodiments and should not be construed as being limited to the specific embodiments disclosed, and modifications to the embodiments of the present disclosure as well as other embodiments are intended to be included within the scope of their functional equivalents to which the appended claims will include.

Claims

1. A display device, characterized in that: The display device comprises: a substrate including a display area and a peripheral area surrounding the display area in a plan view; a power line on the substrate and overlapping the peripheral region; a pixel electrode on the substrate, overlapping the display area and spaced apart from the power line; a light-emitting layer, on the pixel electrode and overlapping the display area; a common electrode on the light emitting layer and overlapping the display area; and A partition wall is on the substrate, overlaps the display area and the peripheral area, directly contacts the common electrode in the display area, and directly contacts the power line in the peripheral area.

2. The display device according to claim 1, characterized in that The partition wall contacts a side surface of the common electrode.

3. The display device according to claim 1, characterized in that The display device further comprises: a pixel defining layer on the substrate, below the partition wall and exposing a portion of the pixel electrode; and An insulating layer is between the substrate and the pixel defining layer.

4. The display device according to claim 3, characterized in that: The insulating layer defines a first opening in the peripheral region that partially overlaps the power line, wherein the pixel defining layer defines a second opening overlapping the first opening, and Wherein, the first opening and the second opening overlap with the partition wall.

5. The display device according to claim 3, characterized in that: The insulating layer defines a first opening in the peripheral region that partially overlaps the power line, wherein the pixel defining layer defines a second opening overlapping the first opening, and Wherein, the power cord comprises: a first portion in which a plurality of holes are defined and which overlaps the pixel defining layer and the insulating layer; and A second portion in which the plurality of holes are not defined and in which the second portion directly contacts the partition wall through the first opening and the second opening.

6. A display device, characterized in that: The display device comprises: a substrate including a display area and a peripheral area surrounding the display area in a plan view; a power line on the substrate and overlapping the peripheral region; a pixel electrode on the substrate, overlapping the display area and the peripheral area and defining a contact opening overlapping the power line; a light-emitting layer, on the pixel electrode and overlapping the display area; a common electrode on the light emitting layer and overlapping the display area; and A partition wall is on the substrate, overlaps the display area and the peripheral area, directly contacts the common electrode in the display area, and directly contacts the power line through the contact opening in the peripheral area.

7. The display device according to claim 6, characterized in that: The partition wall contacts a side surface of the common electrode.

8. The display device according to claim 6, characterized in that: The display device further comprises: a pixel defining layer on the pixel electrode, below the partition wall, and exposing a portion of the pixel electrode in the display area; and An insulating layer is between the substrate and the pixel defining layer.

9. The display device according to claim 8, characterized in that: The insulating layer defines a first opening overlapping the contact opening, wherein the pixel defining layer defines a second opening overlapping the first opening, and Wherein, the contact opening, the second opening and the second opening overlap with the partition wall.

10. The display device according to claim 8, characterized in that: The insulating layer defines a first opening overlapping the contact opening, wherein the pixel defining layer defines a second opening overlapping the first opening, and The power cord includes a first portion and a second portion, the first portion is defined with a plurality of holes, and the second portion is not defined with the plurality of holes, wherein the first portion overlaps with the pixel defining layer, the pixel electrode and the insulating layer, and The second portion directly contacts the partition wall through the contact opening, the first opening, and the second opening.

Images