Boss-shaped embedded packaging PCB of standard power device
By designing a standard power device boss-shaped embedded package PCB board, and utilizing the stacked interconnection of copper substrates and standard package units, the problems of high parasitic inductance and large switching loss of traditional motor controllers are solved, and performance improvement and process simplification are achieved.
Patent Information
- Application Number
- CN202420063819.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-01-11
- Publication Date
- 2025-01-17
- Estimated Expiration
- 2034-01-11
AI Technical Summary
The power modules of traditional motor controllers have high parasitic inductance and large switching losses, resulting in large volume and mass, and complex processes, making it difficult to meet the usage requirements and performance improvements of new energy vehicles.
Design a standard power device boss-shaped embedded packaging PCB board, which shortens the power loop path and reduces parasitic inductance through the stacked interconnection of copper substrate and standard packaging units.
It reduces the parasitic inductance of the power loop, improves the performance and efficiency of the controller, reduces the volume and quality, and simplifies the process flow.
Smart Images
Figure CN222366418U_ABST
Abstract
Description
Technical Field
[0001] The utility model belongs to the technical field of PCB boards and power device packaging, and in particular relates to a standard power device boss-shaped embedded packaging PCB board. Background Art
[0002] With the development and popularization of new energy vehicles, the importance of motor controllers as the core components of electric drive is constantly increasing. Traditional motor controller design ideas can no longer meet the increasing usage demand, and performance is gradually encountering bottlenecks. With the continuous development of third-generation semiconductors SiC and GaN, the trend of miniaturization of motor controllers is becoming increasingly obvious.
[0003] The power module of the traditional motor controller is based on welding the power chip on the ceramic substrate, conducting the circuit through bonding lines, and then designing the circuit board with drive and control functions. Connectors are used to connect the circuit board and the power module to realize its functions. This approach leads to high parasitic inductance, large switching losses, large volume and mass of the controller, and complex back-end processes. Therefore, it is necessary to design a standard power device boss-shaped embedded package PCB board with small parasitic inductance. Utility Model Content
[0004] The purpose of the utility model is to provide a standard power device boss-shaped embedded package PCB board to solve the problems raised in the above-mentioned background technology in view of the existing technical defects.
[0005] In order to solve the above technical problems, the utility model provides the following technical solutions: a standard power device boss-shaped embedded package PCB board, comprising a copper substrate, a plurality of groups of standard package units are arranged on the upper side of the copper substrate, a connecting layer is fixedly connected between the standard package units and the copper substrate, a PCB board is arranged on the upper side of the standard package units, and the standard package units are embedded in the lower side of the PCB board.
[0006] The utility model further describes that the copper substrate includes a sixth copper layer, an ultra-high thermal conductivity insulation layer is fixedly connected to the upper side of the sixth copper layer, a fifth copper layer is fixedly connected to the upper side of the ultra-high thermal conductivity insulation layer, and the upper side of the fifth copper layer is fixedly connected to the connection layer.
[0007] The utility model further describes that the PCB board includes a first copper layer, a second copper layer, a third copper layer, and a fourth copper layer, and the first copper layer, the second copper layer, the third copper layer, and the fourth copper layer are arranged in sequence from top to bottom, and resin is filled between each layer from the first copper layer to the fourth copper layer and between the fourth copper layer and the upper side of the copper substrate, and the resin is a high Tg resin.
[0008] The utility model further describes that a plurality of groups of copper-plated blind holes are opened in the resin between the first copper layer and the second copper layer and between the second copper layer and the third copper layer, and the copper-plated blind holes respectively connect the first copper layer and the second copper layer and the second copper layer and the third copper layer from top to bottom.
[0009] The utility model further describes that a shunt resistor is buried on the left side between the third copper layer and the fourth copper layer, the upper side of the shunt resistor is in direct contact with part of the copper-plated blind holes, and several groups of standard packaging units are embedded between the third copper layer and the fourth copper layer and are located on the right side of the shunt resistor.
[0010] The utility model further illustrates that the standard packaging unit includes a carrier frame, the upper side of the carrier frame is wrapped with a power chip, and the lower side of the carrier frame is in direct contact with the connection layer.
[0011] The utility model further illustrates that the upper and lower sides of the partial copper-plated blind hole are directly in contact with the lower side of the second copper layer and the upper side of the carrier frame respectively, the upper and lower sides of the partial copper-plated blind hole are directly in contact with the lower side of the second copper layer and the upper side of the power chip respectively, a busbar is buried on the right side between the third copper layer and the fourth copper layer, the busbar is located on the right side of the standard packaging unit, the upper side of the busbar is in direct contact with the partial copper-plated blind hole, and the lower side of the busbar is in direct contact with the upper side of the connecting layer.
[0012] Compared with the prior art, the beneficial effects achieved by the utility model are as follows: the utility model, by providing a copper substrate and a standard packaging unit welded to the copper substrate, and then embedding the boss-shaped structure formed by the copper substrate and the standard packaging unit on the PCB board through the PCB process, realizes the stacking interconnection with the standard packaging unit by embedding on the PCB board, shortens the power circuit path, and reduces the parasitic inductance of the power circuit. BRIEF DESCRIPTION OF THE DRAWINGS
[0013] The accompanying drawings are used to provide a further understanding of the present invention and constitute a part of the specification. Together with the embodiments of the present invention, they are used to explain the present invention and do not constitute a limitation of the present invention. In the accompanying drawings:
[0014] Figure 1 It is a schematic diagram of the overall side sectional structure of the utility model;
[0015] In the figure: 1. Copper substrate; 2. Standard packaging unit; 3. Connection layer; 4. PCB board; 5. Sixth copper layer; 6. Ultra-high thermal conductivity insulation layer; 7. Fifth copper layer; 8. First copper layer; 9. Second copper layer; 10. Third copper layer; 11. Fourth copper layer; 12. Resin; 13. Copper-plated blind via; 14. Shunt resistor; 15. Carrier frame; 16. Power chip; 17. Busbar. Implementation
[0016] The following is a further non-limiting detailed description of the technical solution of the utility model in conjunction with the preferred embodiments and the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the utility model, not all of the embodiments. Based on the embodiments of the utility model, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the utility model.
[0017] See also Figure 1 The utility model provides a technical solution: a standard power device boss-shaped embedded package PCB board, including a copper substrate 1, a plurality of groups of standard package units 2 are arranged on the upper side of the copper substrate 1, a connection layer 3 is fixedly connected between the standard package unit 2 and the copper substrate 1, and the connection layer 3 is a solder layer or a sintering layer, a PCB board 4 is arranged on the upper side of the standard package unit 2, and the standard package unit 2 is embedded in the lower side of the PCB board 4.
[0018] The copper substrate 1 comprises a sixth copper layer 5, an ultra-high thermal conductivity insulating layer 6 is fixedly connected to the upper side of the sixth copper layer 5, and a fifth copper layer 7 is fixedly connected to the upper side of the ultra-high thermal conductivity insulating layer 6;
[0019] The upper side of the fifth copper layer 7 is fixedly connected to the connection layer 3 , and the ultra-high thermal conductivity insulating layer 6 is any material with high thermal conductivity and insulation, including but not limited to high thermal conductivity PP, high thermal conductivity resin 12 , polyimide, and insulating paper.
[0020] The PCB board 4 includes a first copper layer 8, a second copper layer 9, a third copper layer 10, and a fourth copper layer 11, which are arranged in sequence from top to bottom. Resin 12 is filled between each layer from the first copper layer 8 to the fourth copper layer 11 and between the fourth copper layer 11 and the upper side of the copper substrate 1, and the resin 12 is a high Tg resin.
[0021] A plurality of copper-plated blind holes 13 are provided in the resin 12 between the first copper layer 8 and the second copper layer 9 and between the second copper layer 9 and the third copper layer 10. The copper-plated blind holes 13 connect the first copper layer 8 and the second copper layer 9 and between the second copper layer 9 and the third copper layer 10 respectively.
[0022] A shunt resistor 14 may be selectively embedded on the left side between the third copper layer 10 and the fourth copper layer 11. The shunt resistor 14 is used for current detection. The upper side of the shunt resistor 14 is in direct contact with a portion of the copper-plated blind hole 13.
[0023] Several groups of standard package units 2 are embedded in the middle between the third copper layer 10 and the fourth copper layer 11 . The standard package units 2 are located on the right side of the shunt resistor 14 .
[0024] The standard packaging unit 2 includes a carrier frame 15, the upper side of the carrier frame 15 is wrapped with a power chip 16, the lower side of the carrier frame 15 is in direct contact with the connection layer 3, and the power chip 16 can be Si MOSFET, SiC MOSFET, GaN MOSFET or IGBT;
[0025] The upper and lower sides of the partial copper-plated blind holes 13 are in direct contact with the lower side of the second copper layer 9 and the upper side of the carrier frame 15 respectively, and the upper and lower sides of the partial copper-plated blind holes 13 are in direct contact with the lower side of the second copper layer 9 and the upper side of the power chip 16 respectively;
[0026] The current passes through the second copper layer 9 and the copper-plated blind via 13 to conduct the power chip 16 . The heat generated by the power chip 16 during operation is introduced into the heat sink through the carrier frame 15 and the copper substrate 1 to achieve heat dissipation for the power chip 16 .
[0027] A busbar 17 is buried on the right side between the third copper layer 10 and the fourth copper layer 11. The busbar 17 is located on the right side of the standard packaging unit 2. The upper side of the busbar 17 is in direct contact with part of the copper-plated blind holes 13, and the lower side of the busbar 17 is in direct contact with the upper side of the connection layer 3. The busbar 17 supplies power to the standard packaging unit 2 through the copper-plated blind holes 13 and the second copper layer 9.
[0028] In this embodiment, after the copper substrate 1 is processed by PCB processes such as exposure, etching, and cutting, it is sintered or welded together with the standard packaging unit 2 by silver sintering or sintered copper, and then the boss-shaped structure formed by the copper substrate 1 and the standard packaging unit 2 is embedded in the PCB board 4 through PCB production processes such as pressing, laser blind hole, hole filling electroplating, VCP electroplating, circuit production, solder mask, routing, and electrical testing.
[0029] In the description of the present invention, it should be understood that the terms "upper", "lower", "front", "back", "left", "right", etc., indicating directions or positional relationships, are based on the directions or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention, and do not indicate or imply that the device or element referred to must have a specific direction, be constructed and operated in a specific direction, and therefore should not be understood as a limitation on the present invention.
[0030] Finally, it should be pointed out that the above embodiments are only used to illustrate the technical solutions of the utility model, rather than to limit them. Although the utility model is described in detail with reference to the above embodiments, a person skilled in the art should understand that the technical solutions described in the above embodiments can still be modified, or some of the technical features can be replaced by equivalents, and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the utility model.
Claims
1. A standard power device boss-shaped embedded package PCB board, comprising a copper substrate (1), a plurality of groups of standard package units (2) being arranged on the upper side of the copper substrate (1), a connection layer (3) being fixedly connected between the standard package units (2) and the copper substrate (1), a PCB board (4) being arranged on the upper side of the standard package units (2), and the standard package units (2) being embedded on the lower side of the PCB board (4).
2. A standard power device boss-shaped embedded package PCB board according to claim 1, characterized in that: The copper substrate (1) comprises a sixth copper layer (5), an ultra-high thermal conductivity insulating layer (6) is fixedly connected to the upper side of the sixth copper layer (5), a fifth copper layer (7) is fixedly connected to the upper side of the ultra-high thermal conductivity insulating layer (6), and the upper side of the fifth copper layer (7) is fixedly connected to the connecting layer (3).
3. A standard power device boss-shaped embedded package PCB board according to claim 2, characterized in that: The PCB board (4) comprises a first copper layer (8), a second copper layer (9), a third copper layer (10), and a fourth copper layer (11); the first copper layer (8), the second copper layer (9), the third copper layer (10), and the fourth copper layer (11) are arranged in sequence from top to bottom; resin (12) is filled between each layer from the first copper layer (8) to the fourth copper layer (11) and between the fourth copper layer (11) and the upper side of the copper substrate (1); and the resin (12) is a high Tg resin.
4. A standard power device boss-shaped embedded package PCB board according to claim 3, characterized in that: A plurality of groups of copper-plated blind holes (13) are provided in the resin (12) between the first copper layer (8) and the second copper layer (9) and between the second copper layer (9) and the third copper layer (10), and the copper-plated blind holes (13) respectively connect the first copper layer (8) and the second copper layer (9) and the second copper layer (9) and the third copper layer (10) from top to bottom.
5. A standard power device boss-shaped embedded package PCB board according to claim 4, characterized in that: A shunt resistor (14) is embedded on the left side between the third copper layer (10) and the fourth copper layer (11); the upper side of the shunt resistor (14) is in direct contact with a portion of the copper-plated blind hole (13); and a plurality of groups of the standard packaging units (2) are embedded between the third copper layer (10) and the fourth copper layer (11) and are located on the right side of the shunt resistor (14).
6. A standard power device boss-shaped embedded package PCB board according to claim 5, characterized in that: The standard packaging unit (2) comprises a carrier frame (15), the upper side of the carrier frame (15) is wrapped with a power chip (16), and the lower side of the carrier frame (15) is in direct contact with the connection layer (3).
7. A standard power device boss-shaped embedded package PCB board according to claim 6, characterized in that: The upper and lower sides of the partially copper-plated blind hole (13) are in direct contact with the lower side of the second copper layer (9) and the upper side of the carrier frame (15), respectively; the upper and lower sides of the partially copper-plated blind hole (13) are in direct contact with the lower side of the second copper layer (9) and the upper side of the power chip (16), respectively; a busbar (17) is embedded on the right side between the third copper layer (10) and the fourth copper layer (11); the busbar (17) is located on the right side of the standard packaging unit (2); the upper side of the busbar (17) is in direct contact with the partially copper-plated blind hole (13), and the lower side of the busbar (17) is in direct contact with the upper side of the connection layer (3).