Multi-group direct current fan locked-rotor fault detection circuit

Abstract

The utility model discloses a locked-rotor fault detection circuit for a plurality of groups of direct-current fans, which comprises a plurality of groups of fan fault detection circuits connected in parallel and a digital signal processor (DSP) controller, and the plurality of groups of fan fault detection circuits are connected with the DSP controller. The fan fault detection circuit comprises a signal acquisition circuit module, a high level detection circuit module, a low level detection circuit module and a fan fault judgment circuit module. The beneficial effects of the utility model are that the manufacturing cost and subsequent maintenance cost of the detection circuit are effectively reduced, and meanwhile, the phenomenon of resource waste can be prevented; the reliability of the detection circuit is effectively improved; the circuit is simple and reliable in structure.

Description

Technical Field

[0001] The utility model relates to the technical field of detection circuits, in particular to a multi-group DC fan stall fault detection circuit. Background Art

[0002] At present, different fan manufacturers produce fans with different feedback signals to improve product performance and efficiency, such as: frequency or speed signal output FG function, operation detection signal output RD function, RD inverted output signal RDb function, etc. These feedback signals will output signals of different levels when the fan stops, and different level signals can be used to determine whether the fan is faulty. There are two schemes for the existing DC fan stall fault detection circuit: Scheme 1 is to directly use the DSP's fewer CAP pins to collect the fan feedback (FG) signal; Scheme 2 is to use a filter circuit to convert the fan feedback (FG) signal into a high and low level signal, and input it to the microcontroller pin through a comparator. Although both schemes can detect whether the fan is faulty, both schemes still have disadvantages, and the specific disadvantages are as follows:

[0003] like Figure 1 As shown in the figure, Solution 1 directly uses the controller pin to collect the fan feedback (FG) signal. Although it can accurately detect the fan speed information and is suitable for occasions where the speed of a single fan needs to be regulated, when the speed does not need to be regulated and multiple sets of fans are used, the controller resources are insufficient. If a controller with more abundant resources is selected, the cost will increase and resources will be wasted.

[0004] like Figure 2 As shown, in Scheme 2, multiple signals are filtered into high and low level signals through RC filters, and an OR gate is established through diodes. Multiple signals form one signal input to the controller. Although Scheme 2 saves the controller I / O port, it can only accurately detect the fault when the output signal is low when the fan is blocked. However, when the fan feedback (FG) signal is blocked, there is a 50% probability that it will output a high level. At this time, the circuit of Scheme 2 cannot accurately determine the fan fault. Utility Model Content

[0005] In order to achieve the above purpose, the utility model adopts the following technical means:

[0006] A multi-group DC fan stall fault detection circuit, comprising a plurality of parallel fan fault detection circuits and a DSP controller, wherein the plurality of fan fault detection circuits are connected to the DSP controller, and the fan fault detection circuit comprises a signal acquisition circuit module, a high-level detection circuit module, a low-level detection circuit module, and a fan fault judgment circuit module;

[0007] The signal acquisition circuit module includes a fan output signal FAN, a current limiting resistor R1, and a pull-up resistor R2;

[0008] The high-level detection circuit module includes a current limiting resistor R3, a voltage dividing resistor R4, a filter capacitor C1, a transistor Q1, a pull-up resistor R5, an anti-reverse diode D1, a pull-up resistor R6, and a filter capacitor C2;

[0009] The low-level detection circuit module includes an anti-reverse diode D3, a pull-up resistor R7, and a filter capacitor C3;

[0010] The fan fault judgment circuit module includes an anti-reverse diode D2, an anti-reverse diode D4, a current limiting resistor R8, a voltage dividing resistor R9, a filter capacitor C4, a MOS tube Q2, and a pull-up resistor R10.

[0011] A further solution of the present invention is that the fan output signal FAN is connected to one end of the resistor R1 , the other end of the resistor R1 is connected to one end of the pull-up resistor R2 , and the other end of the pull-up resistor R2 is connected to a power supply.

[0012] A further solution of the utility model is that one end of the resistor R3 is connected to the other end of the resistor R1, the other end of the resistor R3 is connected to the base of the transistor Q1, one end of the resistor R4, and one end of the capacitor C1, the emitter of the transistor Q1, the other end of the resistor R4, and the other end of the capacitor C1 are connected to GND, the collector of the transistor Q1 is connected to one end of the resistor R5 and the cathode of the diode D1, the other end of the resistor R5 is connected to a power supply, the anode of the diode D1 is connected to one end of the resistor R6 and one end of the filter capacitor C2, the other end of the resistor R6 is connected to the power supply, and the other end of the filter capacitor C2 is connected to GND.

[0013] A further solution of the utility model is that the cathode of the diode D3 is connected to the other end of the resistor R1, the anode of the diode D3 is connected to one end of the resistor R7 and one end of the filter capacitor C3, the other end of the resistor R7 is connected to the power supply, and the other end of the filter capacitor C3 is connected to GND.

[0014] A further solution of the utility model is that the anode of the diode D2 is connected to one end of the resistor R6, the anode of the diode D4 is connected to one end of the resistor R7, the cathodes of the diode D2 and the diode D4 are connected to one end of the resistor R8, the other end of the resistor R8 is connected to the gate of the MOS tube Q2, one end of the resistor R9, and one end of the filter capacitor C4, the source of the MOS tube Q2, the other end of the resistor R9, and the other end of the filter capacitor C4 are connected to GND, the drain of the MOS tube Q2 is connected to the DSP controller and one end of the resistor R10, and the other end of the resistor R10 is connected to the power supply.

[0015] Beneficial effects of the utility model:

[0016] 1. The detection circuit of the utility model converts the fan feedback signal into high and low level signals, does not occupy the CAP port of the DSP controller, does not need to select a controller with richer resources and higher cost, effectively reduces the production cost of the detection circuit and the subsequent maintenance cost, and at the same time, can also prevent the phenomenon of waste of resources.

[0017] 2. The detection circuit of the utility model can ensure that when the fan is blocked, whether the fan feedback signal is at a high level or a low level, the fan feedback signal can be accurately identified by the DSP controller, thereby effectively improving the reliability of the detection circuit.

[0018] 3. The structure of the circuit of the utility model is simple and reliable. It can be applied in the field of industrial and commercial energy storage, and can flexibly increase or decrease the number of fans used, greatly improving the flexibility of industrial and commercial energy storage systems; it can stably detect the operating status of the fan, greatly improving the reliability of the operation of the energy storage equipment. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 This is a circuit connection diagram of the existing solution 1 of the utility model;

[0020] Figure 2 This is a circuit connection diagram of the existing solution 2 of the utility model;

[0021] Figure 3 It is a circuit connection schematic diagram of the utility model;

[0022] Figure 4 This is a circuit diagram of a fan fault detection circuit of the utility model;

[0023] Reference numerals:

[0024] A fan fault detection circuit 10 , a signal acquisition circuit module 11 , a high-level detection circuit module 12 , a low-level detection circuit module 13 , a fan fault judgment circuit module 14 , and a DSP controller 20 . DETAILED DESCRIPTION

[0025] The technical solution of the utility model will be described clearly and completely below in conjunction with the accompanying drawings. Obviously, the described embodiments are part of the embodiments of the utility model, not all of the embodiments. Based on the embodiments of the utility model, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the utility model.

[0026] In the description of the present invention, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc., indicating the orientation or positional relationship, are based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present invention. In addition, the terms "first", "second", and "third" are used for descriptive purposes only, and cannot be understood as indicating or implying relative importance.

[0027] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installation", "connection" and "connection" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0028] Example

[0029] like Figure 3 As shown, the utility model provides a plurality of DC fan stall fault detection circuits, including a plurality of parallel fan fault detection circuits 10 and a DSP controller 20 , wherein the plurality of fan fault detection circuits 10 are connected to the DSP controller 20 .

[0030] like Figure 4 As shown, the fan fault detection circuit 10 includes a signal acquisition circuit module 11 , a high-level detection circuit module 12 , a low-level detection circuit module 13 , and a fan fault judgment circuit module 14 .

[0031] The signal acquisition circuit module 11 includes a fan output signal FAN, a current limiting resistor R1, and a pull-up resistor R2. In the signal acquisition circuit module, the fan output signal FAN is connected to one end of the resistor R1, the other end of the resistor R1 is connected to one end of the pull-up resistor R2, and the other end of the pull-up resistor R2 is connected to a power supply.

[0032] The high-level detection circuit module 12 includes a current limiting resistor R3, a voltage dividing resistor R4, a filter capacitor C1, a transistor Q1, a pull-up resistor R5, an anti-reverse diode D1, a pull-up resistor R6, and a filter capacitor C2. In the high-level detection circuit module, the FGH signal is input to one end of the resistor R3, that is, one end of the resistor R3 is connected to the other end of the resistor R1, the other end of the resistor R3 is connected to the base of the transistor Q1, one end of the resistor R4, and one end of the capacitor C1, the emitter of the transistor Q1, the other end of the resistor R4, and the other end of the capacitor C1 are connected to GND, the collector of the transistor Q1 is connected to one end of the resistor R5 and the cathode of the diode D1, the other end of the resistor R5 is connected to the power supply, the anode of the diode D1 is connected to one end of the resistor R6 and one end of the filter capacitor C2, the other end of the resistor R6 is connected to the power supply, and the other end of the filter capacitor C2 is connected to GND.

[0033] The low-level detection circuit module 13 includes an anti-reverse diode D3, a pull-up resistor R7, and a filter capacitor C3. In the low-level detection circuit module, the FGL signal is input to the cathode of the diode D3, that is, the cathode of the diode D3 is connected to the other end of the resistor R1, the anode of the diode D3 is connected to one end of the resistor R7 and one end of the filter capacitor C3, the other end of the resistor R7 is connected to the power supply, and the other end of the filter capacitor C3 is connected to GND.

[0034] The fan fault judgment circuit module 14 includes an anti-reverse diode D2, an anti-reverse diode D4, a current limiting resistor R8, a voltage dividing resistor R9, a filter capacitor C4, a MOS tube Q2, and a pull-up resistor R10. In the fan fault judgment circuit module, the FBH signal is connected to the anode of the diode D2, that is, the anode of the diode D2 is connected to one end of the resistor R6, the FBL signal is connected to the anode of the diode D4, that is, the anode of the diode D4 is connected to one end of the resistor R7, the cathodes of the diodes D2 and D4 are both connected to one end of the resistor R8, the other end of the resistor R8 is connected to the gate of the MOS tube Q2, one end of the resistor R9, and one end of the filter capacitor C4, the source of the MOS tube Q2, the other end of the resistor R9, and the other end of the filter capacitor C4 are connected to GND, the drain of the MOS tube Q2 is connected to one end of the resistor R10, the other end of the resistor R10 is connected to the power supply, the drain of the MOS tube Q2 outputs the FB_FAULT signal, and the drain of the MOS tube Q2 is connected to the DSP controller 20.

[0035] In the circuit of this embodiment, the fan feedback (FG) signal is converted into a PWM pulse signal corresponding to the fan speed through a signal acquisition circuit, and the PWM pulse signal is converted into a high and low level signal through a detection circuit. Then, multiple sets of fan operation information are summarized and uploaded to the DSP controller through a fan fault judgment circuit.

[0036] When the fan is operating normally, the PWM signal fed back by the fan passes through the current limiting resistor R1 and the pull-up resistor R2 to reach the detection circuit.

[0037] On the FGH channel, the transistor Q1 is driven after passing through the current limiting resistor R3, the voltage dividing resistor R4 and the filter capacitor C1. The PWM signal fed back by the fan is inverted through the transistor Q1 and the pull-up resistor R5, and then input into the RC filter composed of the pull-up resistor R6 and the filter capacitor C2 through the diode D1. The PWM signal is converted into a low-level signal FBH through the pull-up resistor R6 and the filter capacitor C2, and is input into the fan fault judgment circuit through the OR gate circuit composed of the diode D2.

[0038] On the FGL channel, the PWM signal fed back by the fan is input into the RC filter composed of the pull-up resistor R7 and the filter capacitor C3 through the diode D3. The PWM signal is converted into a low-level signal FBL through the pull-up resistor R7 and the filter capacitor C3, and is input into the fan fault judgment circuit through the OR gate circuit composed of the diode D4.

[0039] When the FBH and FBL signals are both low level signals, the FB signal is low level. After the low level signal passes through the current limiting resistor R8, the voltage dividing resistor R9, the filter capacitor C4, the driving MOS tube Q2 and the pull-up resistor R10, the FB signal output is high level, and the DSP controller 20 detects that the fan is running normally.

[0040] When the fan fails, the fan feedback signal is affected by the rotor position and reaches the detection circuit through the current limiting resistor R1 and the pull-up resistor R2. It may be a high level or a low level.

[0041] When the feedback signal is low, on the FGH channel, after passing through the current limiting resistor R3, the voltage dividing resistor R4 and the filter capacitor C1, the transistor Q1 is driven, Q1 is in the cut-off state, after passing through the pull-up resistor R5, it is high level, and after passing through the diode D1 and the RC filter composed of the pull-up resistor R6 and the filter capacitor C2, the FBH signal is high level; on the FGL channel, after passing through the diode D3, the FBL signal output after being input into the RC filter composed of the pull-up resistor R7 and the filter capacitor C3 is low level. When FBH is high level and FBL is low level signal, the FB signal is high level, and after the low level signal passes through the current limiting resistor R8, the voltage dividing resistor R9, the filter capacitor C4, the drive MOS tube Q2 and the pull-up resistor R10, the FB signal output is low level, and the DSP controller 20 detects that the fan has failed.

[0042] When the feedback signal is high, on the FGH channel, after passing through the current limiting resistor R3, the voltage dividing resistor R4 and the filter capacitor C1, the transistor Q1 is driven, Q1 is saturated, and after passing through the pull-up resistor R5, it is low level, and after passing through the diode D1 and the RC filter composed of the pull-up resistor R6 and the filter capacitor C2, the FBH signal is low level; on the FGL channel, after passing through the diode D3, the FBL signal output after being input into the RC filter composed of the pull-up resistor R7 and the filter capacitor C3 is high level. When FBH is low level and FBL is high level signal, the FB signal is high level, and after the low level signal passes through the current limiting resistor R8, the voltage dividing resistor R9, the filter capacitor C4, the drive MOS tube Q2 and the pull-up resistor R10, the FB signal output is low level, and the DSP controller 20 detects that the fan has failed.

[0043] When using multiple fans, connect the FB signals of each fan in parallel. As long as one fan fails, the DSP controller can detect the fan failure and make a shutdown or derating decision to protect the equipment from overheating or component damage due to fan stoppage.

[0044] The examples given in the present invention are not limitations on the implementation methods. For ordinary technicians in the relevant field, other different forms of changes or modifications can be made based on the above description. It is not necessary and impossible to list all the implementation methods here, and the obvious changes or modifications derived from them are still within the scope of protection of the present invention.

Claims

1. A multi-group DC fan stall fault detection circuit, characterized in that: It includes multiple sets of parallel fan fault detection circuits and DSP controllers, wherein the multiple sets of fan fault detection circuits are connected to the DSP controller, and the fan fault detection circuit includes a signal acquisition circuit module, a high-level detection circuit module, a low-level detection circuit module, and a fan fault judgment circuit module; The signal acquisition circuit module includes a fan output signal FAN, a current limiting resistor R1, and a pull-up resistor R2; The high-level detection circuit module includes a current limiting resistor R3, a voltage dividing resistor R4, a filter capacitor C1, a transistor Q1, a pull-up resistor R5, an anti-reverse diode D1, a pull-up resistor R6, and a filter capacitor C2; The low-level detection circuit module includes an anti-reverse diode D3, a pull-up resistor R7, and a filter capacitor C3; The fan fault judgment circuit module includes an anti-reverse diode D2, an anti-reverse diode D4, a current limiting resistor R8, a voltage dividing resistor R9, a filter capacitor C4, a MOS tube Q2, and a pull-up resistor R10.

2. A multi-group DC fan stall fault detection circuit according to claim 1, characterized in that: The fan output signal FAN is connected to one end of the resistor R1 , the other end of the resistor R1 is connected to one end of the pull-up resistor R2 , and the other end of the pull-up resistor R2 is connected to a power source.

3. A multi-group DC fan stall fault detection circuit according to claim 2, characterized in that: One end of the resistor R3 is connected to the other end of the resistor R1, the other end of the resistor R3 is connected to the base of the transistor Q1, one end of the resistor R4, and one end of the capacitor C1, the emitter of the transistor Q1, the other end of the resistor R4, and the other end of the capacitor C1 are connected to GND, the collector of the transistor Q1 is connected to one end of the resistor R5 and the cathode of the diode D1, the other end of the resistor R5 is connected to a power supply, the anode of the diode D1 is connected to one end of the resistor R6 and one end of the filter capacitor C2, the other end of the resistor R6 is connected to the power supply, and the other end of the filter capacitor C2 is connected to GND.

4. A multi-group DC fan stall fault detection circuit according to claim 3, characterized in that: The cathode of the diode D3 is connected to the other end of the resistor R1, the anode of the diode D3 is connected to one end of the resistor R7 and one end of the filter capacitor C3, the other end of the resistor R7 is connected to a power supply, and the other end of the filter capacitor C3 is connected to GND.

5. A multi-group DC fan stall fault detection circuit according to claim 4, characterized in that: The anode of the diode D2 is connected to one end of the resistor R6, the anode of the diode D4 is connected to one end of the resistor R7, the cathodes of the diode D2 and the diode D4 are connected to one end of the resistor R8, the other end of the resistor R8 is connected to the gate of the MOS tube Q2, one end of the resistor R9, and one end of the filter capacitor C4, the source of the MOS tube Q2, the other end of the resistor R9, and the other end of the filter capacitor C4 are connected to GND, the drain of the MOS tube Q2 is connected to the DSP controller and one end of the resistor R10, and the other end of the resistor R10 is connected to the power supply.

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