Power supply circuit and NAS device
By designing power supply circuits in NAS equipment and using dual comparator circuits to prevent non-compliant power sockets from being inserted, the problem of NAS equipment being damaged due to accessing non-compliant power sockets is solved, and the reliability of the equipment is improved.
Patent Information
- Application Number
- CN202421144084.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-05-23
- Publication Date
- 2025-02-14
- Estimated Expiration
- 2034-05-23
AI Technical Summary
Existing NAS devices are prone to damage due to accessing non-compliant power sockets.
A power supply circuit is designed, including a power supply input terminal, a power supply output terminal, an anti-reverse connection unit and a driving unit. A dual comparator circuit is realized through a reference voltage circuit module, a comparator and a switching unit to prevent the insertion of non-compliant power sockets.
Effectively prevent non-compliant power socket insertion from causing damage to NAS equipment, improving the reliability of anti-reverse connection.
Smart Images
Figure CN222482697U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of computer peripherals, in particular to a power supply circuit and NAS equipment. Background Art
[0002] In the era of big data, cloud storage provides a large-capacity and convenient storage method. Usually, storage devices that provide cloud storage functions, such as NAS devices, generally use hard disk expansion to meet storage capacity requirements. Among them, NAS devices are network-attached storage devices. Network Attached Storage (NAS) literally means a device connected to the network with data storage functions, so it is also called "network storage". It is a dedicated data storage server that is data-centric, completely separates storage devices from servers, and centrally manages data, thereby freeing up bandwidth, improving performance, and reducing costs.
[0003] In the prior art, the power input terminal of the NAS device supports forward and reverse insertion of the power supply. However, the external power socket may be non-compliant and fail to meet the forward and reverse insertion requirements. If a non-compliant power socket is inserted into the power input terminal, the NAS device may be damaged. Utility Model Content
[0004] The technical problem to be solved by the embodiments of the present utility model is to provide a power supply circuit and a NAS device to solve the problem in the prior art that the NAS device is easily damaged due to being connected to a non-compliant power socket.
[0005] The utility model discloses a power supply circuit, which is applied to NAS equipment, including:
[0006] A power supply input terminal, used for inputting a power supply voltage;
[0007] Power output terminal, used to power the NAS device;
[0008] An anti-reverse connection unit is provided between the power supply input terminal and the power supply output terminal, and a control terminal of the anti-reverse connection unit is connected to the power supply input terminal;
[0009] A driving unit, the driving unit includes a reference voltage circuit module, a first comparator, a second comparator, a first switch unit and a second switch unit, the non-phase input terminal of the first comparator is connected to the output terminal of the reference voltage circuit module, the inverting input terminal is used to input the voltage of the power supply input terminal, the output terminal of the first comparator is connected to the control terminal of the first switch unit, the inverting input terminal of the second comparator is connected to the output terminal of the reference voltage circuit module, the non-phase input terminal is used to input the voltage of the power supply input terminal, the output terminal of the second comparator is connected to the control terminal of the second switch unit, the first terminal of the first switch unit is connected to the second terminal of the second switch unit, the second terminal is grounded, and the first terminal of the second switch unit is connected to the control terminal of the anti-reverse connection unit.
[0010] Among them, a preferred solution is that the anti-reverse connection unit includes a first PMOS tube and a second PMOS tube, the gate of the first PMOS tube is connected to the gate of the second PMOS tube and connected to the first end of the second switch unit and the power supply input end, the drain of the first PMOS tube is connected to the power supply input end, the source is connected to the source of the second PMOS tube, and the drain of the second PMOS tube is connected to the power supply output end.
[0011] Among them, a preferred solution is that the first switch unit includes a first NMOS tube, and the second switch unit includes a second NMOS tube, the gate of the first NMOS tube is connected to the output end of the first comparator, the source is grounded, and the drain is connected to the source of the second NMOS tube, the gate of the second NMOS tube is connected to the output end of the second comparator, and the drain is connected to the gate of the first PMOS tube and the gate of the second PMOS tube.
[0012] Among them, a preferred solution is that the power supply circuit also includes a first resistor and a second resistor connected in series, the other end of the first resistor is connected to the power supply input end and the drain of the first PMOS tube, the other end of the second resistor is connected to the drain of the second NMOS tube, and the series node of the first resistor and the second resistor is connected to the gate of the first PMOS tube and the gate of the second PMOS tube.
[0013] Among them, a preferred solution is that the power supply circuit also includes a third switch unit and a fourth switch unit, the third switch unit is arranged between the anti-reverse connection unit and the power supply output end, the control end of the third switch unit is connected to the first end of the fourth switch unit, the control end of the fourth switch unit is used to receive a control signal, and the second end is grounded.
[0014] Among them, a preferred solution is that the third switch unit includes a third PMOS tube, the fourth switch unit includes a third NMOS tube, the source of the third PMOS tube is connected to the anti-reverse connection unit, the drain is connected to the power supply output end, the gate is connected to the drain of the third NMOS tube, the source of the third NMOS tube is grounded, and the gate is used to receive a control signal.
[0015] Among them, a preferred solution is that the power supply circuit also includes a third resistor and a fourth resistor connected in series, the other end of the third resistor is connected to the anti-reverse connection unit and the source of the third PMOS tube, the other end of the fourth resistor is connected to the drain of the third NMOS tube, and the series node of the third resistor and the fourth resistor is connected to the gate of the third PMOS tube.
[0016] Among them, a preferred solution is that the power supply circuit also includes a first voltage acquisition unit and a second voltage acquisition unit, the first voltage acquisition unit and the second voltage acquisition unit are both used to acquire the voltage of the power supply input end, the first voltage acquisition unit is respectively connected to the power supply input end and the inverting input end of the first comparator, and the second voltage acquisition unit is respectively connected to the power supply input end and the non-inverting input end of the second comparator.
[0017] Among them, a preferred solution is that the reference voltage circuit module includes a fifth resistor and a controllable precision voltage-stabilizing source, the first end of the fifth resistor is connected to the power supply input terminal, the second end is connected to the cathode of the controllable precision voltage-stabilizing source, the positive input terminal of the first comparator and the inverting input terminal of the second comparator, the anode of the controllable precision voltage-stabilizing source is grounded, and the reference electrode is connected to the second end of the fifth resistor, the positive input terminal of the first comparator and the inverting input terminal of the second comparator.
[0018] The utility model also discloses a NAS device, comprising the power supply circuit as described above, wherein a power supply input end of the power supply circuit is connected to a power supply end of the power supply unit.
[0019] Compared with the prior art, the power supply circuit and NAS device provided by the embodiments of the utility model have the following beneficial effects: by setting a power supply input terminal, a power supply output terminal, an anti-reverse connection unit and a driving unit, the driving unit includes a reference voltage circuit module, a first comparator, a second comparator, a first switch unit and a second switch unit. The first comparator outputs a level signal to control the conduction or disconnection of the first switch unit according to the comparison result between the voltage of the reference voltage circuit module and the voltage of the power supply input terminal, and the second comparator outputs a level signal to control the conduction or disconnection of the second switch unit according to the comparison result between the voltage of the reference voltage circuit module and the voltage of the power supply input terminal, thereby driving the conduction or disconnection of the anti-reverse connection unit. The dual comparator circuit is used to realize the anti-reverse connection of the power supply input terminal, and the anti-reverse connection of the power supply of the NAS device is realized, so as to avoid damage to the NAS device caused by the insertion of an unqualified power socket, and the reliability of the anti-reverse connection is high. BRIEF DESCRIPTION OF THE DRAWINGS
[0020] The technical solution of the utility model will be further described in detail below with reference to the accompanying drawings and embodiments, in which:
[0021] Figure 1 It is a structural block diagram of a power supply circuit provided by an embodiment of the utility model;
[0022] Figure 2 It is a partial circuit diagram of a power supply circuit provided by an embodiment of the utility model;
[0023] Figure 3 It is a circuit diagram of a comparator chip provided by an embodiment of the utility model;
[0024] Figure 4 is a circuit diagram of a third switch unit and a fourth switch unit provided in an embodiment of the utility model;
[0025] Figure 5 It is a circuit diagram of a reference voltage circuit module provided in an embodiment of the utility model.
[0026] The reference numerals in the figures are:
[0027] 10. Power supply input terminal; 20. Power supply output terminal; 30. Anti-reverse connection unit; 40. Drive unit; 41. Reference voltage circuit module; 42. First comparator; 43. Second comparator; 44. First switch unit; 45. Second switch unit; 50. Third switch unit; 60. Fourth switch unit; 70. First voltage acquisition unit; 80. Second voltage acquisition unit;
[0028] MP1, the first PMOS tube; MP2, the second PMOS tube; MP3, the third PMOS tube; Q1, the first NMOS tube; Q2, the second NMOS tube; Q3, the third NMOS tube; R1, the first resistor; R2, the second resistor; R3, the third resistor; R4, the fourth resistor; R5, the fifth resistor; R6, the sixth resistor; R7, the seventh resistor; R8, the eighth resistor; R9, the ninth resistor; D1, the controllable precision voltage source; U1, the comparator chip. DETAILED DESCRIPTION
[0029] It should be noted that, in the absence of conflict, the embodiments and features in the embodiments of the present application can be combined with each other. Now, in conjunction with the accompanying drawings, a preferred embodiment of the present utility model is described in detail.
[0030] The utility model embodiment provides a power supply circuit, such as Figure 1 As shown, the power supply circuit includes a power supply input terminal 10, a power supply output terminal 20, an anti-reverse connection unit 30 and a driving unit 40.
[0031] The power input terminal 10 is used to input a power supply voltage. For example, an external adapter converts AC power into DC power and then transmits the DC power to the power input terminal 10 through a power socket.
[0032] The power output terminal 20 is used to supply power to the NAS device, that is, to supply power to the circuit board, hard disk, etc. inside the NAS device.
[0033] The reverse connection prevention unit 30 is disposed between the power supply input terminal 10 and the power supply output terminal 20 .
[0034] The driving unit 40 includes a reference voltage circuit module 41, a first comparator 42, a second comparator 43, a first switch unit 44 and a second switch unit 45. The positive phase input terminal of the first comparator 42 is connected to the output terminal of the reference voltage circuit module 41, and the negative phase input terminal is used to input the voltage of the power supply input terminal 10. The output terminal of the first comparator 42 is connected to the control terminal of the first switch unit 44. The negative phase input terminal of the second comparator 43 is connected to the output terminal of the reference voltage circuit module 41, and the positive phase input terminal is used to input the voltage of the power supply input terminal 10. The output terminal of the second comparator 43 is connected to the control terminal of the second switch unit 45. The first terminal of the first switch unit 44 is connected to the second terminal of the second switch unit 45, and the second terminal is grounded. The first terminal of the second switch unit 45 is connected to the control terminal of the anti-reverse connection unit 30.
[0035] In the embodiment of the present application, a power supply input terminal 10, a power supply output terminal 20, an anti-reverse connection unit 30 and a driving unit 40 are provided. The driving unit 40 includes a reference voltage circuit module 41, a first comparator 42, a second comparator 43, a first switch unit 44 and a second switch unit 45. The first comparator 42 outputs a level signal to control the on or off of the first switch unit 44 according to a comparison result between the voltage of the reference voltage circuit module 41 and the voltage of the power supply input terminal 10. The second comparator 43 outputs a level signal to control the on or off of the second switch unit 45 according to a comparison result between the voltage of the reference voltage circuit module 41 and the voltage of the power supply input terminal 10, thereby driving the on or off of the anti-reverse connection unit 30. The anti-reverse connection of the power supply input terminal 10 is realized by a dual comparator circuit, and the anti-reverse connection of the power supply of the NAS device is realized, so as to avoid damage to the NAS device caused by the insertion of an unqualified power socket, and the reliability of the anti-reverse connection is high.
[0036] Specifically, when the external power socket is connected to the power input terminal 10 in the forward direction, the output terminal of the first comparator 42 outputs a low level, the first switch unit 44 is disconnected, the output terminal of the second comparator 43 outputs a low level, the second switch unit 45 is disconnected, the anti-reverse connection unit 30 is turned on, and the power supply voltage input to the power input terminal 10 can be transmitted to the power output terminal 20 to power the NAS device. When the external power socket is connected to the power input terminal 10 in the reverse direction, the output terminal of the first comparator 42 outputs a high level, the first switch unit 44 is turned on, the output terminal of the second comparator 43 outputs a high level, the second switch unit 45 is turned on, the voltage of the control terminal of the anti-reverse connection unit 30 is pulled down, the anti-reverse connection unit 30 is disconnected, the power supply voltage input to the power input terminal 10 cannot be transmitted to the power output terminal 20, the power supply of the NAS device is disconnected, the anti-reverse connection is realized, the NAS device is protected, and the NAS device is prevented from being damaged.
[0037] The first comparator 42 and the second comparator 43 may be implemented using separate comparator components, or the first comparator 42 and the second comparator 43 may be integrated in a comparator chip U1, and implemented using the first comparator 42 and the second comparator 43 in the same comparator chip U1. In this embodiment, it is preferred to integrate the first comparator 42 and the second comparator 43 in the comparator chip U1, and use the comparator chip U1 to implement the functions of the first comparator 42 and the second comparator 43. Compared with the discrete design method, the chip form can effectively save space, reduce the number of components, and simplify circuit design and layout. In addition, comparators integrated in the same chip usually have better matching performance and lower power consumption.
[0038] refer to Figure 1 and Figure 2In this embodiment, the anti-reverse connection unit 30 includes a first PMOS tube MP1 and a second PMOS tube MP2, the gate of the first PMOS tube MP1 is connected to the gate of the second PMOS tube MP2 and is connected to the first end of the second switch unit 45 and the power supply input terminal 10, the drain of the first PMOS tube MP1 is connected to the power supply input terminal 10, the source is connected to the source of the second PMOS tube MP2, and the drain of the second PMOS tube MP2 is connected to the power supply output terminal 20.
[0039] The first PMOS tube MP1 and the second PMOS tube MP2 connected in series are used to prevent reverse connection. The first PMOS tube MP1 and the second PMOS tube MP2 have fast response speed, small size and simple circuit structure, which is conducive to miniaturization of the circuit and the applied equipment.
[0040] In other embodiments, the reverse connection prevention unit 30 may also be a reverse connection prevention circuit formed by two relays connected in series.
[0041] refer to Figure 1 and Figure 2 In this embodiment, the first switch unit 44 includes a first NMOS transistor Q1, and the second switch unit 45 includes a second NMOS transistor Q2. The gate of the first NMOS transistor Q1 is connected to the output end of the first comparator 42, the source is grounded, and the drain is connected to the source of the second NMOS transistor Q2. The gate of the second NMOS transistor Q2 is connected to the output end of the second comparator 43, and the drain is connected to the gate of the first PMOS transistor MP1 and the gate of the second PMOS transistor MP2.
[0042] The first switch unit 44 uses a first NMOS transistor Q1, and drives the first NMOS transistor Q1 to be turned on or off according to the voltage comparison result of the first comparator 42. The second switch unit 45 uses a second NMOS transistor Q2, and drives the second NMOS transistor Q2 to be turned on or off according to the voltage comparison result of the second comparator 43. The first NMOS transistor Q1 cooperates with the second NMOS transistor Q2 to control the driving of the first PMOS transistor MP1 and the second PMOS transistor MP2 to be turned on or off, and has a fast response speed, a small size, a high reliability, and is relatively convenient and flexible to control.
[0043] In other embodiments, the first switch unit 44 and the second switch unit 45 may also be switch devices such as relays.
[0044] refer to Figure 2In this embodiment, the power supply circuit further includes a first resistor R1 and a second resistor R2 connected in series, the other end of the first resistor R1 is connected to the power supply input terminal 10 and the drain of the first PMOS tube MP1, the other end of the second resistor R2 is connected to the drain of the second NMOS tube Q2, and the series node of the first resistor R1 and the second resistor R2 is connected to the gate of the first PMOS tube MP1 and the gate of the second PMOS tube MP2.
[0045] By setting the first resistor R1, when the external power socket is forwardly connected to the power supply input terminal 10, the output terminal of the first comparator 42 outputs a low level, the first NMOS tube Q1 is disconnected, the output terminal of the second comparator 43 outputs a low level, the second NMOS tube Q2 is disconnected, the gate level of the first PMOS tube MP1 and the gate level of the second PMOS tube MP2 are pulled up to the level of the power supply voltage by the first resistor R1, and are in a high level state, the first PMOS tube MP1 and the second PMOS tube MP2 are turned on, and the power supply voltage input from the power supply input terminal 10 can be transmitted to the power supply output terminal 20 to power the NAS device. When the external power socket is reversely connected to the power supply input terminal 10, the output terminal of the first comparator 42 outputs a high level, the first NMOS tube Q1 is turned on, the output terminal of the second comparator 43 outputs a high level, the second NMOS tube Q2 is turned on, and the gate level of the first PMOS tube MP1 and the gate level of the second PMOS tube MP2 are pulled down to the ground terminal, which is in a low level state, the first PMOS tube MP1 and the second PMOS tube MP2 are disconnected, and the power supply voltage input from the power supply input terminal 10 cannot be transmitted to the power supply output terminal 20, and the power supply of the NAS device is disconnected to achieve reverse connection prevention. The second resistor R2 can limit the current flowing to the gate of the first PMOS tube MP1 and the gate of the second PMOS tube MP2, and protect the first PMOS tube MP1 and the second PMOS tube MP2.
[0046] In this embodiment, reference Figure 2 and Figure 4 The power supply circuit also includes a third switch unit 50 and a fourth switch unit 60. The third switch unit 50 is arranged between the anti-reverse connection unit 30 and the power supply output end 20. The control end of the third switch unit 50 is connected to the first end of the fourth switch unit 60. The control end of the fourth switch unit 60 is used to receive a control signal, and the second end is grounded.
[0047] By setting the third switch unit 50 and the fourth switch unit 60, the control end of the fourth switch unit 60 receives the control signal, and is turned on or off under the drive of the control signal, thereby driving the third switch unit 50 to be turned on or off, and supplying power to or disconnecting the NAS device. The NAS device can be supplied with power or disconnected by controlling the fourth switch unit 60 to be turned on or off, allowing the entire device to enter a dormant state, saving energy.
[0048] Among them, the control signal received by the control end of the fourth switch unit 60 can be a high-level signal or a low-level signal output by the main control chip used by the overall device, and the fourth switch unit 60 is turned on or off under the drive of the high-level signal or the low-level signal.
[0049] Further, the third switch unit 50 includes a third PMOS tube MP3, the fourth switch unit 60 includes a third NMOS tube Q3, the source of the third PMOS tube MP3 is connected to the anti-reverse connection unit 30, the drain is connected to the power supply output terminal 20, the gate is connected to the drain of the third NMOS tube Q3, the source of the third NMOS tube Q3 is grounded, and the gate is used to receive a control signal.
[0050] The third switch unit 50 uses the third PMOS tube MP3, and the fourth switch unit 60 uses the third NMOS tube Q3, which have fast switch response speed, small size, simple circuit structure, high reliability, and convenient and flexible control.
[0051] Specifically, when the anti-reverse connection unit 30 is turned on, when the gate of the third NMOS tube Q3 receives a high-level signal, the third NMOS tube Q3 is turned on, and the gate of the third PMOS tube MP3 is pulled down to the ground end, which is in a low-level state, and the third PMOS tube MP3 is disconnected, thereby disconnecting the power supply of the NAS device; when the gate of the third NMOS tube Q3 receives a low-level signal, the third NMOS tube Q3 is disconnected, and the gate of the third PMOS tube MP3 is in a high-level state because it is connected to the anti-reverse connection unit 30 and the power supply input terminal 10 has a power supply voltage input, and the third PMOS tube MP3 is turned on to supply power to the NAS device.
[0052] Further, refer to Figure 1 , Figure 2 and Figure 4 The power supply circuit also includes a third resistor R3 and a fourth resistor R4 connected in series, the other end of the third resistor R3 is connected to the anti-reverse connection unit 30 and the source of the third PMOS tube MP3, the other end of the fourth resistor R4 is connected to the drain of the third NMOS tube Q3, and the series node of the third resistor R3 and the fourth resistor R4 is connected to the gate of the third PMOS tube MP3.
[0053] By setting the third resistor R3, when the gate of the third NMOS tube Q3 receives a low-level signal, the third NMOS tube Q3 is disconnected, and the third resistor R3 can clamp the gate of the third PMOS tube MP3 to the voltage input by the power supply input terminal 10, so that the gate of the third PMOS tube MP3 is in a high-level state, and the third PMOS tube MP3 is turned on to maintain normal power supply of the NAS device. The second resistor R2 can limit the current flowing to the gate of the third PMOS tube MP3 to prevent the third PMOS tube MP3 from being damaged by excessive current.
[0054] refer to Figure 1 and Figure 3 In this embodiment, the power supply circuit also includes a first voltage acquisition unit 70 and a second voltage acquisition unit 80. The first voltage acquisition unit 70 and the second voltage acquisition unit 80 are both used to acquire the voltage of the power supply input terminal 10. The first voltage acquisition unit 70 is respectively connected to the power supply input terminal 10 and the inverting input terminal of the first comparator 42, and the second voltage acquisition unit 80 is respectively connected to the power supply input terminal 10 and the non-inverting input terminal of the second comparator 43.
[0055] By setting the first voltage acquisition unit 70 and the second voltage acquisition unit 80 to collect the voltage of the power supply input terminal 10, the voltage of the power supply input terminal 10 is monitored as the comparison object input by the first comparator 42 and the second comparator 43, and the anti-reverse connection unit 30 is controlled based on the comparison results of the first comparator 42 and the second comparator 43, the reverse connection of the power supply input terminal 10 can be effectively prevented.
[0056] Specifically, the first voltage acquisition unit 70 includes a sixth resistor R6 and a seventh resistor R7 connected in series, the other end of the sixth resistor R6 is connected to the power supply input terminal 10, the other end of the seventh resistor R7 is grounded, and the series node of the sixth resistor R6 and the seventh resistor R7 is connected to the inverting input terminal of the first comparator 42. The first comparator 42 can obtain the voltage of the power supply input terminal 10 through the sixth resistor R6 and the seventh resistor R7. The circuit structure of the first voltage acquisition unit 70 is simple, which is conducive to the miniaturization of the circuit.
[0057] The second voltage acquisition unit 80 includes an eighth resistor R8 and a ninth resistor R9 connected in series, the other end of the eighth resistor R8 is connected to the power supply input terminal 10, the other end of the ninth resistor R9 is grounded, and the series node of the eighth resistor R8 and the ninth resistor R9 is connected to the non-inverting input terminal of the second comparator 43, and the second comparator 43 can obtain the voltage of the power supply input terminal 10 through the eighth resistor R8 and the ninth resistor R9. The circuit structure of the second voltage acquisition unit 80 is simple, which is conducive to miniaturization of the circuit.
[0058] refer to Figure 1 , Figure 3 and Figure 5 In this embodiment, the reference voltage circuit module 41 includes a fifth resistor R5 and a controllable precision voltage regulator D1. The first end of the fifth resistor R5 is connected to the power supply input terminal 10, and the second end is connected to the cathode of the controllable precision voltage regulator D1, the positive input terminal of the first comparator 42, and the inverting input terminal of the second comparator 43. The anode of the controllable precision voltage regulator D1 is grounded, and the reference electrode is connected to the second end of the fifth resistor R5, the positive input terminal of the first comparator 42, and the inverting input terminal of the second comparator 43.
[0059] By using the controllable precision voltage regulator D1 and the fifth resistor R5 to provide a stable reference voltage, the first comparator 42 and the second comparator 43 both have a stable voltage reference, further reducing misjudgment caused by input voltage fluctuations.
[0060] The controllable precision voltage regulator D1 is a TL431 chip. Using the TL431 chip with the fifth resistor R5 as the reference voltage circuit module 41 has the following advantages: it can provide a relatively stable reference voltage with high accuracy; it has good stability under different temperature and voltage conditions; it can be used for long-term stable operation with high reliability.
[0061] In specific applications, the reference voltage output by the reference voltage circuit module 41 may be 2.5V, which may be adjusted according to actual needs.
[0062] The present utility model also provides a NAS device. Figure 1 , the NAS device includes the power supply circuit as described above.
[0063] In the embodiment of the utility model, the power supply circuit of the NAS device is provided with a power supply input terminal 10, a power supply output terminal 20, an anti-reverse connection unit 30 and a driving unit 40. The driving unit 40 includes a reference voltage circuit module 41, a first comparator 42, a second comparator 43, a first switch unit 44 and a second switch unit 45. The first comparator 42 outputs a level signal to control the on or off of the first switch unit 44 according to the comparison result between the voltage of the reference voltage circuit module 41 and the voltage of the power supply input terminal 10. The second comparator 43 outputs a level signal to control the on or off of the second switch unit 45 according to the comparison result between the voltage of the reference voltage circuit module 41 and the voltage of the power supply input terminal 10, thereby driving the on or off of the anti-reverse connection unit 30. The anti-reverse connection of the power supply input terminal 10 is realized by a dual comparator circuit, and the anti-reverse connection of the power supply of the NAS device is realized, so as to avoid damage to the NAS device caused by the insertion of an unqualified power socket, and the reliability of the anti-reverse connection is high.
[0064] Among them, the power socket can be attached to an external adapter and is used to output the power supply voltage. The external adapter can convert AC voltage into DC voltage, such as converting 220V AC voltage into 12V DC voltage, and inputting the 12V DC voltage into the power supply input terminal 10 of the power supply circuit.
[0065] It should be understood that the above embodiments are only used to illustrate the technical solutions of the present utility model rather than to limit it. For those skilled in the art, the technical solutions described in the above embodiments can be modified, or some of the technical features therein can be replaced by equivalents; and all these modifications and replacements should fall within the scope of protection of the claims attached to the present utility model.
Claims
1. A power supply circuit, applied to NAS equipment, characterized in that: include: A power supply input terminal, used for inputting a power supply voltage; Power output terminal, used to power the NAS device; An anti-reverse connection unit is provided between the power supply input terminal and the power supply output terminal, and a control terminal of the anti-reverse connection unit is connected to the power supply input terminal; A driving unit, the driving unit includes a reference voltage circuit module, a first comparator, a second comparator, a first switch unit and a second switch unit, the non-phase input terminal of the first comparator is connected to the output terminal of the reference voltage circuit module, the inverting input terminal is used to input the voltage of the power supply input terminal, the output terminal of the first comparator is connected to the control terminal of the first switch unit, the inverting input terminal of the second comparator is connected to the output terminal of the reference voltage circuit module, the non-phase input terminal is used to input the voltage of the power supply input terminal, the output terminal of the second comparator is connected to the control terminal of the second switch unit, the first terminal of the first switch unit is connected to the second terminal of the second switch unit, the second terminal is grounded, and the first terminal of the second switch unit is connected to the control terminal of the anti-reverse connection unit.
2. The power supply circuit according to claim 1, characterized in that: The anti-reverse connection unit includes a first PMOS tube and a second PMOS tube, the gate of the first PMOS tube is connected to the gate of the second PMOS tube and connected to the first end of the second switch unit and the power supply input end, the drain of the first PMOS tube is connected to the power supply input end, the source is connected to the source of the second PMOS tube, and the drain of the second PMOS tube is connected to the power supply output end.
3. The power supply circuit according to claim 2, characterized in that: The first switch unit includes a first NMOS tube, and the second switch unit includes a second NMOS tube. The gate of the first NMOS tube is connected to the output end of the first comparator, the source is grounded, and the drain is connected to the source of the second NMOS tube. The gate of the second NMOS tube is connected to the output end of the second comparator, and the drain is connected to the gate of the first PMOS tube and the gate of the second PMOS tube.
4. The power supply circuit according to claim 3, characterized in that: The power supply circuit also includes a first resistor and a second resistor connected in series, the other end of the first resistor is connected to the power supply input end and the drain of the first PMOS tube, the other end of the second resistor is connected to the drain of the second NMOS tube, and the series node of the first resistor and the second resistor is connected to the gate of the first PMOS tube and the gate of the second PMOS tube.
5. The power supply circuit according to claim 1, characterized in that: The power supply circuit also includes a third switch unit and a fourth switch unit. The third switch unit is arranged between the anti-reverse connection unit and the power supply output end. The control end of the third switch unit is connected to the first end of the fourth switch unit. The control end of the fourth switch unit is used to receive a control signal, and the second end is grounded.
6. The power supply circuit according to claim 5, characterized in that: The third switch unit includes a third PMOS tube, and the fourth switch unit includes a third NMOS tube. The source of the third PMOS tube is connected to the anti-reverse connection unit, the drain is connected to the power supply output end, the gate is connected to the drain of the third NMOS tube, the source of the third NMOS tube is grounded, and the gate is used to receive a control signal.
7. The power supply circuit according to claim 6, characterized in that: The power supply circuit also includes a third resistor and a fourth resistor connected in series, the other end of the third resistor is connected to the anti-reverse connection unit and the source of the third PMOS tube, the other end of the fourth resistor is connected to the drain of the third NMOS tube, and the series node of the third resistor and the fourth resistor is connected to the gate of the third PMOS tube.
8. The power supply circuit according to any one of claims 1 to 7, characterized in that: The power supply circuit also includes a first voltage acquisition unit and a second voltage acquisition unit, both of which are used to acquire the voltage of the power supply input terminal, the first voltage acquisition unit is respectively connected to the power supply input terminal and the inverting input terminal of the first comparator, and the second voltage acquisition unit is respectively connected to the power supply input terminal and the non-inverting input terminal of the second comparator.
9. The power supply circuit according to any one of claims 1 to 7, characterized in that: The reference voltage circuit module includes a fifth resistor and a controllable precision voltage-stabilizing source, wherein the first end of the fifth resistor is connected to the power supply input end, the second end is connected to the cathode of the controllable precision voltage-stabilizing source, the positive input end of the first comparator and the inverting input end of the second comparator, the anode of the controllable precision voltage-stabilizing source is grounded, and the reference electrode is connected to the second end of the fifth resistor, the positive input end of the first comparator and the inverting input end of the second comparator.
10. A NAS device, characterized in that: It comprises a power supply circuit as claimed in any one of claims 1 to 9, wherein a power supply input end of the power supply circuit is connected to an external power socket.