Optical chip packaging structure
By adopting the design of small cavity combined with filler in optical chip packaging, the reliability risk problem of PLCC/CLCC packaging under high reliability requirements is solved, and effective protection of metal pads and binding lines is achieved, reducing the Cost and improve electrical connectivity.
Patent Information
- Application Number
- CN202323466262.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2023-12-19
- Publication Date
- 2025-02-21
- Estimated Expiration
- 2033-12-19
AI Technical Summary
Large cavity designs for PLCC/CLCC packages pose reliability risks in areas where high reliability requirements include popcorn problems caused by metal pad corrosion and gas expansion, and airtight packaging increases costs.
The structural design of small cavity combined with filler glue protects metal pads or binding wires is used to reduce the corrosion impact of water vapor and impurities through chip filling glue and binding wire filling glue, and prevent gas expansion in high-temperature environments. .
It effectively reduces the popcorn problem caused by cavity gas expansion in high temperature environments, reduces the corrosion of water vapor and impurities on the metal pads of chips and substrates, improves the electrical connectivity of the packaging structure, and reduces production costs.
Smart Images

Figure CN222515493U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of optical chip packaging, in particular to an optical chip packaging structure. Background Art
[0002] In the packaging of optical chips, PLCC / CLCC packaging is widely used, but the design of large cavity has a higher reliability risk in some fields with high reliability requirements, such as industrial and automotive products, for the following reasons:
[0003] First, inside the cavity of the PLCC / CLCC package, the wire bonding pads on the chip and the substrate are exposed in the cavity. If conventional airtight packaging is used, there will be a certain amount of water vapor and impurities in the cavity. During the reliability process of high and low temperatures, the metal pads will be corroded, resulting in an open circuit of the binding bond, that is, the popcorn problem caused by the expansion of the cavity gas caused by the high temperature environment is prone to occur.
[0004] Second, due to the large cavity structure of PLCC / CLCC packaging, the airtightness issue needs to be considered. The airtight packaging has very high requirements on materials and processing technology, which directly leads to an increase in packaging costs. For example, adding inert gas inside the packaging cavity or making the internal cavity a negative pressure environment, these measures to improve the reliability of airtight packaging in high temperature environments will increase packaging costs.
[0005] Third, if the PLCC / CLCC package is not made into an airtight package and the air escape holes are not reserved during the packaging stage, the cost of the later stage of production will increase. After the chip is soldered by high-temperature reflow soldering, the air escape holes need to be filled. Otherwise, moisture and impurities will enter during the product assembly stage, causing the chip to fail. At the same time, after the chip is soldered to the circuit board, it is difficult to detect the overall airtightness, and the final reliability performance cannot be guaranteed.
[0006] Therefore the prior art needs to be improved and enhanced. Utility Model Content
[0007] In view of the above-mentioned shortcomings of the prior art, the utility model provides an optical chip packaging structure, which adopts a structural design of a small cavity combined with a filling glue to protect the metal pad or the binding wire. It can better deal with the popcorn problem caused by the expansion of the cavity gas caused by the high temperature environment, and can also reduce the corrosion of water vapor and impurities on the metal pads of the chip and the substrate, and better ensure the electrical connectivity of the packaging structure.
[0008] In order to achieve the above purpose, the utility model adopts the following technical solutions:
[0009] An optical chip packaging structure comprises a substrate, an optical chip is fixed on the substrate, the soldering pads of the optical chip are electrically connected to the soldering pads of the substrate through binding wires, a chip filling glue dam is circumferentially arranged on the upper surface of the optical chip, and the chip filling glue dam is located between the sensing area of the optical chip and the soldering pads of the optical chip, the optical chip comprises a passivation layer, and the soldering pads of the optical chip, the soldering pads of the substrate, and the spatial area where the binding wires are located are provided with binding wire filling glue.
[0010] Furthermore, a substrate filling glue dam is provided on the substrate, and the bonding wire filling glue is located between the substrate filling glue dam and the chip filling glue dam.
[0011] Furthermore, the surface of the chip filling glue dam is flush with the surface of the bonding wire filling glue.
[0012] Furthermore, the optical chip and the substrate are fixed by an adhesive.
[0013] An optical chip packaging structure comprises a substrate, an optical chip is fixed on the substrate, a soldering pad of the optical chip is electrically connected to a soldering pad of the substrate via a binding wire, a chip filling glue dam is circumferentially arranged on the upper surface of the optical chip, and the chip filling glue dam is located between a sensing area of the optical chip and the soldering pad of the optical chip, an optical glass is arranged on the chip filling glue dam, the optical glass and the chip filling glue dam form a cavity on the surface of the optical chip, and a binding wire filling glue is arranged in a spatial area where the soldering pad of the optical chip, the soldering pad of the substrate, and the binding wire are located.
[0014] Furthermore, a substrate filling glue dam is provided on the substrate, and the bonding wire filling glue is located between the substrate filling glue dam and the chip filling glue dam.
[0015] Furthermore, the surface of the optical glass is flush with the surface of the bonding wire filling glue.
[0016] Furthermore, the optical chip and the substrate are fixed by an adhesive.
[0017] Furthermore, the substrate-filled glue dam includes an epoxy resin molding structure or an adhesive injection molding structure.
[0018] Compared with the prior art, the optical chip packaging structure provided by the utility model includes a substrate, an optical chip is fixed on the substrate, the pads of the optical chip are electrically connected to the pads of the substrate through binding wires, a chip filling glue dam is circumferentially arranged on the upper surface of the optical chip, and the chip filling glue dam is located between the sensing area of the optical chip and the pads of the optical chip, the optical chip includes a passivation layer, or an optical glass is arranged on the chip filling glue dam, the optical glass and the chip filling glue dam form a cavity on the surface of the optical chip, and the pads of the optical chip, the pads of the substrate, and the space area where the binding wires are located are provided with binding wire filling glue. Compared with the prior art, the utility model adopts a structural design of a small cavity combined with a filling glue to protect the metal pads or binding wires, which can better cope with the popcorn problem caused by the expansion of the cavity gas caused by a high temperature environment, and can also reduce the corrosion of water vapor and impurities to the metal pads of the chip and the substrate, and better ensure the electrical connectivity of the packaging structure. BRIEF DESCRIPTION OF THE DRAWINGS
[0019] In order to more clearly illustrate the embodiments of the utility model or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the utility model. For ordinary technicians in this field, other drawings can be obtained based on the structures shown in these drawings without paying creative work.
[0020] Figure 1 This is a structural schematic diagram of the first embodiment of the optical chip packaging structure provided by the utility model.
[0021] Figure 2 This is a structural schematic diagram of a second embodiment of the optical chip packaging structure provided by the utility model.
[0022] Figure 3 This is a structural schematic diagram of a third embodiment of the optical chip packaging structure provided by the utility model.
[0023] Figure 4 This is a structural schematic diagram of a fourth embodiment of the optical chip packaging structure provided by the utility model.
[0024] In the figure: substrate-1, optical chip-2, pad of optical chip-3, binding wire-4, pad of substrate-5, chip filling glue dam-6, binding wire filling glue-7, substrate filling glue dam-8, optical glass-9, cavity-10, optical chip sensing area-11, adhesive-12. DETAILED DESCRIPTION
[0025] In order to facilitate understanding of the present application, the present application will be described more fully below with reference to the relevant drawings. Embodiments of the present application are provided in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present application more thorough and comprehensive.
[0026] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application.
[0027] In the present utility model, the terms "upper", "lower", "left", "right", "front", "back", "top", "bottom", "inside", "outside", "middle", "vertical", "horizontal", "lateral", "longitudinal" and the like indicate directions or positional relationships based on the directions or positional relationships shown in the accompanying drawings. These terms are mainly used to better describe the present utility model and its embodiments, and are not used to limit the indicated devices, elements or components to have a specific direction, or to be constructed and operated in a specific direction. Moreover, in addition to being used to indicate directions or positional relationships, some of the above terms may also be used to indicate other meanings. For example, the term "upper" may also be used to indicate a certain dependency or connection relationship in some cases. For those of ordinary skill in the art, the specific meanings of these terms in the present utility model can be understood according to the specific circumstances.
[0028] In addition, the terms "first" and "second" etc. used in this application can be used to describe various elements in this article, but these elements are not limited by these terms. These terms are only used to distinguish the first element from another element. When used here, the singular "one", "one" and "said / the" can also include plural forms, unless the context clearly indicates another way. It should also be understood that the terms "include / comprise" or "have" etc. specify the existence of stated features, wholes, steps, operations, components, parts or combinations thereof, but do not exclude the possibility of existing or adding one or more other features, wholes, steps, operations, components, parts or combinations thereof.
[0029] It should be noted that when an element is referred to as being "fixed to" another element, it may be directly on the other element or there may be a central element. When an element is considered to be "connected to" another element, it may be directly connected to the other element or there may be a central element at the same time. The terms "vertical", "horizontal", "left", "right" and similar expressions used herein are for illustrative purposes only.
[0030] In addition, the technical solutions between the various embodiments can be combined with each other, but it must be based on the fact that ordinary technicians in the field can implement it. When the combination of technical solutions is contradictory or cannot be implemented, it should be deemed that such combination of technical solutions does not exist and is not within the scope of protection required by the present utility model.
[0031] In the first embodiment, if Figure 1 As shown, the optical chip 2 packaging structure provided by the utility model includes a substrate 1, on which an optical chip 2 is fixed, and the soldering pads 3 of the optical chip are electrically connected to the soldering pads 5 of the substrate through binding wires 4, and a chip filling glue dam 6 is circumferentially arranged on the upper surface of the optical chip 2, and the chip filling glue dam 6 is located between the sensing area 11 of the optical chip 2 and the soldering pads 3 of the optical chip, the optical chip 2 includes a passivation layer, and the spatial area where the soldering pads 3 of the optical chip, the soldering pads 5 of the substrate, and the binding wires 4 are located is provided with binding wire filling glue 7. It can be understood that the sensing area of the optical chip 2 is used to receive external light and convert the light into corresponding electrical signals. In order to meet some special optical requirements, the sensing area of the optical chip 2 will be directly exposed. Since the optical chip 2 includes a passivation layer, it can effectively resist the influence of moisture. The chip filling glue dam 6 can block the binding wire filling glue 7 to ensure that the binding wire filling glue 7 does not overflow into the sensing area of the optical chip 2 and affect the optical performance. The binding wire filling glue 7 can seal and protect the pads 3 of the optical chip, the pads 5 of the substrate and the binding wires 4.
[0032] Compared with the prior art, the binding wire filling glue 7 can protect the pads 3 of the optical chip, the pads 5 of the substrate and the binding wires 4, can better cope with the popcorn problem caused by the expansion of the gas in the cavity 10 caused by the high temperature environment, and can also reduce the corrosion of water vapor and impurities on the metal pads of the chip and the substrate 1, thereby better ensuring the electrical connectivity of the packaging structure.
[0033] Based on the first embodiment described above, in the second embodiment, if Figure 2 As shown, a substrate filling glue dam 8 is provided on the substrate 1, and the bonding wire filling glue 7 is located between the substrate filling glue dam 8 and the chip filling glue dam 6. It should be noted that the substrate 1 filling glue can be formed by epoxy resin sealing, and the substrate 1 filling glue can ensure that the bonding wire filling glue 7 does not overflow, and the bonding wire filling glue 7 can seal and protect the pads 3 of the optical chip, the pads 5 of the substrate, and the bonding wires 4.
[0034] Furthermore, the surface of the chip filling glue dam 6 is flush with the surface of the binding wire filling glue 7 to ensure the packaging flatness of the optical chip 2 and ensure that the optical chip 2 can be stably fixed at the designated assembly position.
[0035] Furthermore, the optical chip 2 and the substrate 1 are fixed by an adhesive 12 , and the adhesive 12 can ensure that the optical chip 2 is fixed on the substrate 1 , thereby ensuring the assembly stability of the optical chip 2 and the substrate 1 .
[0036] In the third embodiment, if Figure 3 As shown, an optical chip 2 packaging structure includes a substrate 1, on which an optical chip 2 is fixed, and a soldering pad 3 of the optical chip is electrically connected to a soldering pad 5 of the substrate through a binding wire 4, a chip filling glue dam 6 is circumferentially arranged on the upper surface of the optical chip 2, and the chip filling glue dam 6 is located between a sensing area 11 of the optical chip 2 and the soldering pad 3 of the optical chip, an optical glass 9 is arranged on the chip filling glue dam 6, and the optical glass 9 and the chip filling glue dam 6 form a cavity 10 on the surface of the optical chip 2, and the cavity 10 can better reduce the loss and refraction of light and improve the optical performance of the chip, and a binding wire filling glue 7 is arranged in the space area where the soldering pad 3 of the optical chip, the soldering pad 5 of the substrate, and the binding wire 4 are located.
[0037] Compared with the prior art, the design of a small cavity 10 is adopted to reduce the space of the cavity 10 to the chip sensing area, and a dam glue is formed around the sensing area. Then, the optical glass 9 is bonded to the dam glue to form an airtight small cavity 10 structure, which can better deal with the popcorn problem caused by the expansion of the gas in the cavity 10 caused by the high temperature environment.
[0038] Based on the above third embodiment, in the fourth embodiment, if Figure 4 As shown, a substrate filling glue dam 8 is provided on the substrate 1, and the bonding wire filling glue 7 is located between the substrate filling glue dam 8 and the chip filling glue dam 6. Specifically, the substrate filling glue dam 8 includes an epoxy resin plastic packaging structure or an adhesive injection molding structure. The substrate 1 filling glue can ensure that the bonding wire filling glue 7 does not overflow, and the bonding wire filling glue 7 can seal and protect the pads 3 of the optical chip, the pads 5 of the substrate, and the bonding wires 4.
[0039] Furthermore, the surface of the optical glass 9 is flush with the surface of the binding wire filling glue 7 to ensure the packaging flatness of the optical chip 2 and ensure that the optical chip 2 can be stably fixed at the designated assembly position.
[0040] Furthermore, the optical chip 2 and the substrate 1 are fixed by an adhesive 12 , and the adhesive 12 can ensure that the optical chip 2 is fixed on the substrate 1 , thereby ensuring the assembly stability of the optical chip 2 and the substrate 1 .
[0041] In summary, the optical chip packaging structure provided by the utility model includes a substrate, an optical chip is fixed on the substrate, the pads of the optical chip are electrically connected to the pads of the substrate through binding wires, a chip filling glue dam is circumferentially arranged on the upper surface of the optical chip, and the chip filling glue dam is located between the sensing area of the optical chip and the pads of the optical chip, the optical chip includes a passivation layer, or an optical glass is arranged on the chip filling glue dam, the optical glass and the chip filling glue dam form a cavity on the surface of the optical chip, and the pads of the optical chip, the pads of the substrate, and the space area where the binding wires are located are provided with binding wire filling glue. Compared with the prior art, the utility model adopts a structural design of a small cavity combined with a filling glue to protect the metal pads or binding wires, which can better cope with the popcorn problem caused by the expansion of the cavity gas caused by a high temperature environment, and can also reduce the corrosion of water vapor and impurities to the metal pads of the chip and the substrate, and better ensure the electrical connectivity of the packaging structure.
[0042] The embodiments of the utility model are described above in conjunction with the accompanying drawings, but the utility model is not limited to the above-mentioned specific implementation methods. The above-mentioned specific implementation methods are merely illustrative and not restrictive. Under the enlightenment of the utility model, ordinary technicians in this field can also make many forms without departing from the scope of protection of the utility model and the claims, which all belong to the protection scope of the utility model.
Claims
1. An optical chip packaging structure, characterized in that: The invention comprises a substrate (1), an optical chip (2) being fixed on the substrate (1), a soldering pad (3) of the optical chip being electrically connected to a soldering pad (5) of the substrate via a binding wire (4), a chip filling glue dam (6) being circumferentially arranged on the upper surface of the optical chip (2), and the chip filling glue dam (6) being located between a sensing area (11) of the optical chip (2) and the soldering pad (3) of the optical chip, the optical chip (2) comprising a passivation layer, and a binding wire filling glue (7) being arranged in a space where the soldering pad (3) of the optical chip, the soldering pad (5) of the substrate, and the binding wire (4) are located.
2. The optical chip packaging structure according to claim 1, characterized in that: A substrate filling glue dam (8) is provided on the substrate (1), and the binding wire filling glue (7) is located between the substrate filling glue dam (8) and the chip filling glue dam (6).
3. The optical chip packaging structure according to claim 2, characterized in that: The surface of the chip filling glue dam (6) is flush with the surface of the bonding wire filling glue (7).
4. The optical chip packaging structure according to claim 1, characterized in that: The optical chip (2) and the substrate (1) are fixed via an adhesive (12).
5. An optical chip packaging structure, characterized in that: The invention comprises a substrate (1), on which an optical chip (2) is fixed, a soldering pad (3) of the optical chip is electrically connected to a soldering pad (5) of the substrate via a binding wire (4), a chip filling glue dam (6) is circumferentially arranged on the upper surface of the optical chip (2), and the chip filling glue dam (6) is located between a sensing area (11) of the optical chip (2) and the soldering pad (3) of the optical chip, an optical glass (9) is arranged on the chip filling glue dam (6), and the optical glass (9) and the chip filling glue dam (6) form a cavity (10) on the surface of the optical chip (2), and a binding wire filling glue (7) is arranged in a space where the soldering pad (3) of the optical chip, the soldering pad (5) of the substrate, and the binding wire (4) are located.
6. The optical chip packaging structure according to claim 5, characterized in that: A substrate filling glue dam (8) is provided on the substrate (1), and the binding wire filling glue (7) is located between the substrate filling glue dam (8) and the chip filling glue dam (6).
7. The optical chip packaging structure according to claim 6, characterized in that: The surface of the optical glass (9) is flush with the surface of the binding line filling glue (7).
8. The optical chip packaging structure according to claim 5, characterized in that: The optical chip (2) and the substrate (1) are fixed via an adhesive (12).
9. The optical chip packaging structure according to claim 6, characterized in that: The substrate filling glue dam (8) comprises an epoxy resin plastic packaging structure or a bonding injection molding structure.