Integrated circuit package

Abstract

The utility model relates to an integrated circuit package, comprising an integrated circuit device having a first side surface having an optical sensor and a first electrical connection pad and an opposite second side surface; an optical element mounted to the first side to extend over the sensor; a body of LDS encapsulation material encapsulating the integrated circuit device and the optical element, having first and second surfaces coplanar with the upper surface and the second side surface of the optical element, respectively; the body includes an activation trace region at the first surface, a first activation via opening extending from the first surface through the body to the second surface, and a second activation via opening extending from the first surface into the body to the first electrical connection pad; a first conductive line at the active trace region; a first conductive via electrically connected to the first conductive line at the first and second active via openings; a first passivation layer covering the first conductive line, the first surface, and a portion of the optical element; a second passivation layer covering the second surface and the second side surface; and a redistribution layer.

Description

Technical Field

[0001] The present disclosure relates generally to semiconductor packaging and, more particularly, to packaging of optical semiconductor devices. Background Art

[0002] refer to Figure 1 , which shows a cross-sectional view of a conventional packaging configuration of an optical integrated circuit sensor device 10. The device 10 includes a first side 12 and an opposite second side 14, having a peripheral side edge 16. The first side 12 of the device 10 includes an optical sensor 18 and a plurality of electrical connection pads 20 (referred to in the art as bonding pads). The second side 14 of the device 10 is attached to an upper surface 22 of a support substrate 24. The upper surface 22 of the support substrate 24 includes a plurality of electrical connection pads 26 (referred to in the art as bonding fingers). The electrical connection pads 20 of the device 10 are electrically connected to the electrical connection pads 26 of the support substrate 24 using bonding wires 28. The lower surface 30 of the support substrate 24 also includes a plurality of electrical connection pads 32. The electrical connection pads 26 are electrically connected to the electrical connection pads 32 using an interconnection network 34 formed in the support substrate 24. The interconnection network 34 includes one or more layers of interconnect lines 36 and vias 38. The optical element 40 is mounted to the first side 12 of the device 10 to extend above the optical sensor 18. The mounting is achieved by using an adhesive spacer ring 42 that surrounds the optical sensor 18 and is located between the optical element and the first side 12. For example, the spacer ring 42 may include a bead of epoxy material deposited in a ring around the optical sensor 18. A first body 44 of encapsulating material (referred to in the art as an underfill material) is used to encapsulate the device 10, the bonding wires 28, the optical element 40, and the spacer ring 42. It should be noted that the spacer ring 42 prevents the encapsulating material from encroaching on the optical sensor 18 at the first side 12 of the device 10. A second body 46 of encapsulating material is provided as a package encapsulation using a molding operation, wherein the second body 46 of encapsulating material is typically different from the encapsulating material used for the first body 44 and, for example, includes a resin. A plurality of electrical connection pads 32 at the lower surface 30 of the support substrate 24 are arranged in a row and column array. A solder ball 50 may be included at each electrical connection pad 32 .

[0003] Figure 2 Another embodiment of an optical integrated circuit sensor device 10 is illustrated. Figure 1 and Figure 2 Like reference numerals in the drawings refer to the same or similar components, and descriptions thereof will not be repeated. Figure 2 Examples and Figure 1 The embodiments differ primarily with respect to the configuration of the encapsulation. Figure 2 In an embodiment, the underfill provided by the first body 44 of encapsulation material is omitted, and a molded resin material is used to provide a body 46 that encapsulates the device 10 , the bond wires 28 , the optical element 40 , and the spacer ring 42 .

[0004] Although Figure 1 and Figure 2 The illustrated embodiment of the packaging configuration of the optical integrated circuit sensor device 10 is widely used in consumer products and automotive applications, but it should be noted that these conventional packaging configurations are subject to many challenges and problems. For example, there are situations where cracks 60 are formed in the optical element 40 (such as Figure 3A ), and the delamination 62 that occurs at the first side 12 of the device 10 (as shown in Figure 3B These problems arise from stresses caused by mismatches in the coefficients of thermal expansion between the encapsulation material and the optical components, and between the integrated circuit and the supporting substrate. Figure 1 and Figure 2 An additional concern with the illustrated packaging configuration is the large form factor of the package in both the xy plane (parallel to opposing faces of the integrated circuit) and the perpendicular z direction.

[0005] Therefore, there is a need in the art to solve the above problems. Utility Model Content

[0006] An object of the utility model is to provide an improved integrated circuit package.

[0007] According to one aspect of the present disclosure, an integrated circuit package is provided, comprising: an integrated circuit device having a first side and an opposite second side, an optical sensor and a first electrical connection pad at the first side; an optical element mounted to the first side of the integrated circuit device to extend above the optical sensor; a body of laser direct structuring (LDS) encapsulation material encapsulating the integrated circuit device and the optical element, the body having a first surface coplanar with an upper surface of the optical element and a second surface coplanar with a second side of the integrated circuit device; wherein the body comprises an activation trace region at the first surface, a first activation via opening extending from the first surface through the body to the second surface, and a second activation via opening extending from the first surface into the body to the first electrical connection pad; a first conductive line at the activation trace region; a first conductive via electrically connected to the first conductive line at the first activation via opening and the second activation via opening; a first passivation layer (passivation layer) covering the first conductive line, the first surface of the body, and a portion of the optical element a second passivation layer covering the second surface of the body and the second side of the integrated circuit device; and a redistribution layer (RDL) including a second conductive line and a second conductive via, wherein the second conductive via extends through the second passivation layer to electrically connect the second conductive line to the first conductive via.

[0008] In some embodiments, the integrated circuit package further includes an adhesive spacer ring surrounding the optical sensor and located between the lower surface of the optical element and the first side of the integrated circuit device.

[0009] In some embodiments, the adhesive spacer ring is made from a bead of epoxy material.

[0010] In some embodiments, the first passivation layer includes an opening over a central region of the optical element that is optically aligned with the optical sensor.

[0011] In some embodiments, the RDL further includes a pad extending from the second conductive line.

[0012] In some embodiments, the integrated circuit package further includes solder balls attached to the pads of the RDL.

[0013] In some embodiments, the integrated circuit package further includes a solder resist layer covering the second passivation layer and including an opening at a location of the pad of the RDL.

[0014] In some embodiments, the first conductive line and the first conductive via include metal plating at the active trace area and the first and second active via openings.

[0015] In an embodiment, a method includes: mounting a plurality of integrated circuit devices in a spaced-apart manner to a support handle; wherein an optical element is mounted to a first side of each integrated circuit device to extend above an optical sensor; molding a laser direct structuring (LDS) encapsulation material to form a body encapsulating a plurality of integrated circuit devices and the optical element mounted thereon; wherein a first surface of the body is coplanar with an upper surface of each optical element; laser defining an activation trace area on a first surface of the body; laser drilling a first activation via opening extending from the first surface into the body, the first activation via opening reaching an electrical connection pad at a first side of the integrated circuit device; laser drilling a second activation via opening extending from the first surface into the body, the depth of which does not reach a second surface of the body in contact with the support handle; electroplating a first activation via opening at the first activation via opening. The invention relates to a method for manufacturing a conductive via having a first surface and a second active via opening of the main body, and electroplating a conductive via at the active trace area; depositing a first passivation layer to cover the first surface of the main body, the conductive wire and a portion of the upper surface of each optical element; removing the support handle to expose the second surface of the main body and a second side surface of each integrated circuit device opposite to the first side surface; thinning the main body from its second surface and thinning each integrated circuit device from its second side surface to form a thinned surface at which a distal end of the conductive via at the second active via opening is exposed; depositing a second passivation layer to cover the thinned surface; and forming a redistribution layer (RDL) including a second conductive wire and a second conductive via, the second conductive via extending through the second passivation layer to electrically connect the second conductive wire to the distal end of the conductive via at the second active via opening. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] For a better understanding of the present embodiments, reference will now be made, by way of example only, to the accompanying drawings, in which:

[0017] Figure 1 and Figure 2 A cross-sectional view showing a conventional packaging configuration of an optical integrated circuit sensor device;

[0018] Figure 3A and Figure 3B Illustrated about Figure 1 and Figure 2 Defects that may arise from conventional packaging configurations;

[0019] Figure 4 A cross-sectional view showing an embodiment of an optical integrated circuit sensor device packaging configuration;

[0020] Figure 5A-5M Shown for manufacturing Figure 4 The steps of the method for the optical integrated circuit sensor device packaging configuration shown in; and

[0021] Figure 6 Shows the use of Figure 4 A cross-sectional view of an imaging sensor product of an optical integrated circuit sensor device packaging configuration as shown in FIG. DETAILED DESCRIPTION

[0022] This application claims priority to U.S. Provisional Patent Application No. 63 / 447,971, filed on February 24, 2023, the disclosure of which is incorporated herein by reference.

[0023] refer to Figure 4 , Figure 4A cross-sectional view of a packaging configuration of an embodiment of an optical integrated circuit sensor device 110 is shown. The device 110 includes a first side 112 and an opposing second side 114 having a peripheral side edge 116. The first side 112 of the device 110 includes an optical sensor 118 and a plurality of electrical connection pads 120 (referred to in the art as bonding pads). An optical element 140 is mounted to the first side 112 of the device 110 to extend above the optical sensor 118. This mounting is achieved by using an adhesive spacer ring 142 that surrounds the optical sensor 118 and is located between the optical element and the first side 112. For example, the spacer ring 142 can include a bead of epoxy material deposited in a ring around the optical sensor 118. A body 144 of laser direct structuring (LDS) encapsulation material is used to encapsulate the device 110, the optical element 140, and the spacer ring 142. It is noted that the spacer ring 142 prevents the LDS encapsulation material from eroding the optical sensor 118 at the first side 112 of the device 110. The first surface 143 of the body 144 is coplanar with the upper surface of the optical element 140, and the second surface 145 of the body 144 is coplanar with the second side 114 of the device 110. The LDS encapsulation material is formed by laser processing to define an activated trace region on the first surface 143 of the body 144 and an activated through-hole opening extending from the first surface 143 into the body 144. The activated trace region defines the location of the electrical connection network. Using electroplating technology, conductive lines 136 of the electrical connection network are formed at the activated trace region, and conductive through-holes 138 are formed at the activated through-hole openings. The activated through-hole opening includes a first opening for a through-hole 138 extending from the first surface 143 into the body 144 to reach the electrical connection pad 120 of the device 110, wherein the proximal end of the through-hole 138 is in electrical contact with the conductive line 136, and the distal end of the through-hole 138 is in electrical contact with the electrical connection pad 120. The activation via opening further includes a second opening deeper than the first opening for a via 138 extending from the first surface 143 into the body 144 to completely pass through the thickness of the body 144, wherein the proximal end of the via 138 is in electrical contact with the conductive line 136. The first passivation layer 146 covers the first surface 143 of the body 144, the conductive line 136 for the electrical connection network, and a portion of the upper surface of the optical element 140. The opening 147 in the first passivation layer 146 exposes a central area of ​​the optical element 140 optically aligned with the optical sensor 118. The second passivation layer 156 covers the second surface 145 of the body 144 and the second side 114 of the device 110. Using photolithography processing and metal deposition techniques, an electrical redistribution layer (RDL) is formed at the second passivation layer 156 to provide a conductive line 161, a pad 162, and a via 163.The through hole 163 extends through the second passivation layer 156 between the conductive lines 161 and the distal end of the through hole 138 passing through the body 144. A plurality of pads 162 of the electrical RDL are arranged in a row and column array. A solder mask layer 170 covers the second passivation layer 156. An opening 172 is provided in the solder mask layer 170 at the location of the pad 162 of the electrical RDL. A solder ball 150 may be included in the opening 172 of each pad 162.

[0024] Figures 5A-5M Shown for manufacturing Figure 4 The steps in the method of packaging configuration of the optical integrated circuit sensor device are shown in FIG.

[0025] Figure 5A An integrated circuit wafer 210 comprising a plurality of optical integrated circuit sensor devices is mounted to a first support handle 212, for example made of a glass material. The attachment of the wafer 210 to the handle 212 may be performed using any suitable adhesive layer. At the location of each optical sensor 118, an optical element 140 is mounted to the first side 112 using an adhesive spacer ring 142, wherein the optical element extends above the optical sensor 118. A wafer dicing operation is then performed to cut the wafer 210 along scribe lines 214 extending between the locations of the integrated circuit sensor devices.

[0026] Figure 5B -pass Figure 5A The singulated optical integrated circuit sensor devices 110 with the optical elements 140 and the spacer rings 142 mounted thereon resulting from the wafer dicing operation are then mounted in a spaced-apart manner to the second support handle 216. The attachment of the singulated optical integrated circuit sensor devices 110 to the handle 216 may be performed using any suitable adhesive layer.

[0027] Figure 5C -The handle 216 with the separated optical integrated circuit sensor device 110, optical element 140 and spacer ring 142 attached is then placed in a molding cavity, and a laser direct structuring (LDS) encapsulation material is injected into the molding cavity to produce an encapsulated body 220. Such transfer molding processes are well known in the art. The laser direct structuring encapsulation material may include, for example, a resin material impregnated with laser activatable particles. Such LDS encapsulation materials are well known to those skilled in the art.

[0028] Figure 5D-Then, a laser machining operation is used for shaping to laser define an activation trace area 224 on the first surface 226 of the body 220, and to laser drill activation via openings 228a, 228b extending from the first surface 226 into the body 220. Those skilled in the art are aware of the laser operating parameter requirements for activating the LDS encapsulation material. It is noted that the via opening 228a extends into the body 220 to a depth that reaches and exposes the electrical connection pads 120 of the device 110. The via opening 228b extends into the body 220 to a depth that is less than the thickness of the body 220. Those skilled in the art can control the laser operating parameters to set the desired depth of the laser drilled via openings.

[0029] Figure 5E - Using electroplating techniques, such as electroless plating, conductive lines 136 for the electrical connection network are formed at the activated trace areas 224, and conductive vias 138 are formed at the activated via openings 228a, 228b.

[0030] Fig. 5F A first passivation layer 146 is deposited to cover the surface 226 of the body 220, the conductive lines 136 for the electrical connection network and a portion of the upper surface of the optical elements 140. Using photolithographic processing techniques, for example by using controlled etching, openings 147 are formed in the first passivation layer 146 to expose a central area of ​​each optical element 140 optically aligned with the optical sensor 118.

[0031] Figure 5G - Then, the handle 240 is mounted to the first passivation layer 146. The attachment of the handle 240 to the first passivation layer 146 may be performed using any suitable adhesive layer. The handle 216 is removed.

[0032] Figure 5H - The assembly is then flipped 180° in its processing direction and a back grinding process is performed to thin the body 220 and the device 110 from their coplanar backside surfaces until the distal ends of the conductive vias 138 within the activated via openings 228b are exposed.

[0033] Fig.5I A second passivation layer 156 is deposited to cover the second surface 114 of the thinned device 110 and the back surface of the thinned body 220 .

[0034] Figure 5JAn electrical redistribution layer (RDL) is formed at the second passivation layer 156 using photolithography processing and metal deposition techniques (such as via etching and filling followed by metal layer deposition and patterning) to provide conductive lines 161, pads 162, and vias 163. Vias 163 extend through the second passivation layer 156 between conductive lines 161 and are in electrical contact with the distal ends of vias 138 that pass through the thinned body 220. Conductive lines 161 are in electrical contact with the proximal ends of vias 163 and extend above the surface of the second passivation layer 156.

[0035] Figure 5K - Then, a solder resist layer 170 is deposited to cover the second passivation layer 156. Openings 172 are formed in the solder resist layer 170 at the locations of the pads 162 of the electrical RDL using photolithographic processing techniques, for example by controlled etching.

[0036] Figure 5L - A solder ball 150 is then mounted within each opening 172 on the solder pad 162. A dicing operation is then performed to cut the structure along separation lines 260 extending between the locations of the integrated circuit sensor devices 110 to produce a plurality of optical integrated circuit sensor device packages; Figure 4 and Figure 5M One such device package is shown in . The handle 240 is also removed.

[0037] and Figure 1 and Figure 2 Compared to the conventional package configuration shown, Figure 4 and Figure 5M The optical integrated circuit sensor device packaging configuration shown presents many advantages, including: a smaller form factor in the xy plane (parallel to the opposing first and second surfaces of the integrated circuit sensor) due to the use of laser direct structured wiring and vias that occupy less area than wire bonding; a smaller form factor in the orthogonal z-direction due to the elimination of the need for a thick supporting substrate with electrical interconnects; reduced stress concentration due to smaller size and less mismatch in thermal expansion coefficients (thus eliminating bending caused by die / substrate thermal interaction). Figure 1 and Figure 2 Compared with the package, Figure 4 The package configuration also exhibits improved optical, electrical and thermal performance.

[0038] Figure 6 Shows the use of Figure 4 and Figure 5MA cross-sectional view of an imaging sensor product of an optical integrated circuit sensor device package configuration is shown. A lens assembly 300 is mounted to the passivation layer 146 of the optical integrated circuit sensor device package using an adhesive material. The lens assembly 300 includes a frame 302, which includes sidewall legs 304 mounted to the passivation layer 146 and a front plate 306 with an internally threaded center hole 308. A lens 310 is secured within a center hole 312 of a cylindrical lens mount 314. A cylindrical outer surface 316 of the mount 314 has external threads (engaging with the internal threads of the center hole 308). A shoulder 318 of the mount 314 serves as a stop to set the maximum thread engagement depth between the mount 314 and the frame 302.

[0039] In an embodiment, a method includes: mounting a plurality of integrated circuit devices in a spaced-apart manner to a support handle; wherein an optical element is mounted to a first side of each integrated circuit device to extend above an optical sensor; molding a laser direct structuring (LDS) encapsulation material to form a body encapsulating the plurality of integrated circuit devices and the optical element mounted thereon; wherein a first surface of the body is coplanar with an upper surface of each optical element; laser defining an activation trace area on the first surface of the body; laser drilling a first activation via opening extending from the first surface into the body, the first activation via opening reaching an electrical connection pad at a first side of the integrated circuit device; laser drilling a second activation via opening extending from the first surface into the body, the depth of which does not reach a second surface of the body in contact with the support handle; The invention relates to a method for manufacturing a main body, a main structure, a main structure, and a main circuit of the optical element. The main body is provided with a plurality of optical components, and a plurality of optical components are provided with a plurality of optical components. The main body is provided with a plurality of optical components, and a plurality of optical components are provided with a plurality of optical components. The main body is provided with a plurality of optical components, and a plurality of optical components are provided with a plurality of optical components. The main body is provided with a plurality of optical components, and a plurality of optical components are provided with a plurality of optical components. The main body is provided with a plurality of optical components, and a plurality of optical components are provided with a plurality of optical components.

[0040] In some embodiments, the method further includes mounting the optical element to the first surface of the integrated circuit device using an adhesive spacer ring surrounding the optical sensor.

[0041] In some embodiments, the LDS encapsulation material comprises a resin material impregnated with laser activatable particles.

[0042] In some embodiments, laser definition and laser drilling activate the laser activatable particles at the activation trace region and the first activation via opening and the second activation via opening.

[0043] In some embodiments, the method further includes forming an opening in the first passivation layer to expose a central region of each optical element optically aligned with an optical sensor of the integrated circuit device.

[0044] In some embodiments, the method further comprises mounting another handle to the first passivation layer prior to thinning.

[0045] In some embodiments, thinning includes back grinding the second surface of the body and the second side of each integrated circuit device.

[0046] In some embodiments, the method further includes depositing a solder resist layer to cover the second passivation layer.

[0047] In some embodiments, forming the RDL further includes a pad extending from the second conductive line.

[0048] In some embodiments, the method further includes forming an opening in the solder resist layer to expose a pad of the RDL.

[0049] In some embodiments, the method further includes mounting solder balls to pads of the RDL.

[0050] In some embodiments, the method further includes performing a dicing operation to cut the first passivation layer, the thinned body, and the second passivation layer at locations between the integrated circuit devices to produce a plurality of packages.

[0051] In some embodiments, the method further includes, before mounting the plurality of integrated circuit devices: forming an integrated circuit wafer comprising a plurality of circuits; mounting the integrated circuit wafer to another support handle; mounting the optical element above each circuit; and slicing the integrated circuit wafer between the circuits to produce the plurality of integrated circuit devices.

[0052] Although the present disclosure has been illustrated and described in detail in the drawings and the foregoing description, such illustration and description are considered to be illustrative or exemplary rather than restrictive; the present disclosure is not limited to the disclosed embodiments. Other variations of the disclosed embodiments can be understood and implemented by those skilled in the art in practicing the claimed disclosure by studying the drawings, the disclosure, and the appended claims.

Claims

1. An integrated circuit package, characterized in that: include: an integrated circuit device having a first side and a second side opposite the first side, the optical sensor and a first electrical connection pad being provided at the first side; an optical element mounted to the first side of the integrated circuit device to extend over the optical sensor; a body of laser direct structuring (LDS) encapsulation material, encapsulating the integrated circuit device and the optical element, the body having a first surface coplanar with an upper surface of the optical element, and a second surface coplanar with a second side surface of the integrated circuit device; wherein the body includes an activation trace region at a first surface, a first activation via opening extending from the first surface through the body to a second surface, and a second activation via opening extending from the first surface into the body to a first electrical connection pad; a first conductive line at the activation trace region; a first conductive via electrically connected to a first conductive line at the first activation via opening and the second activation via opening; a first passivation layer covering the first conductive line, the first surface of the body and a portion of the optical element; a second passivation layer covering the second surface of the body and the second side of the integrated circuit device; and The redistribution layer (RDL) includes a second conductive line and a second conductive via, wherein the second conductive via extends through the second passivation layer to electrically connect the second conductive line to the first conductive via.

2. The integrated circuit package according to claim 1, characterized in that: Further included is an adhesive spacer ring surrounding the optical sensor and located between the lower surface of the optical element and the first side of the integrated circuit device.

3. The integrated circuit package according to claim 2, characterized in that: The adhesive spacer ring is made from a bead of epoxy material.

4. The integrated circuit package according to claim 1, wherein: The first passivation layer includes an opening over a central region of the optical element that is optically aligned with the optical sensor.

5. The integrated circuit package according to claim 1, wherein: The RDL further includes a pad extending from the second conductive line.

6. The integrated circuit package according to claim 5, characterized in that: Further included are solder balls attached to the pads of the RDL.

7. The integrated circuit package according to claim 5, characterized in that: A solder resist layer is further included, the solder resist layer covering the second passivation layer and including an opening at a location of a pad of the RDL.

8. The integrated circuit package according to claim 1, wherein: The first conductive line and the first conductive via include metal plating at the activation trace area and the first and second activation via openings.

Images