Low-warpage low-strain flip chip packaging structure
By adding buffer ribs to the chip packaging structure to connect the chip body and transition edges, the warping problem caused by thermal mechanical stress during the packaging process is solved, and the quality and reliability of the product are improved.
Patent Information
- Application Number
- CN202420424658.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-03-06
- Publication Date
- 2025-02-28
- Estimated Expiration
- 2034-03-06
AI Technical Summary
During chip packaging, thermal mechanical stress causes chip warping, which in turn affects product reliability and quality.
By adding a buffer rib body to the substrate, connecting the chip body and the transition edge, the overall deformation resistance is enhanced and the possibility of warping is reduced.
It effectively suppresses the warping and deformation of the chip during the packaging process, and improves the quality and reliability of the product.
Smart Images
Figure CN222546335U_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the technical field of chip packaging, and in particular to a flip chip packaging structure with low warpage and low strain. Background Art
[0002] Flip chip packaging technology is to directly interconnect components to substrates, carriers or circuit boards with the bumps on the chip facing downwards. Flip chip avoids unnecessary packaging processes and has the advantages of reduced size, high frequency operation, low parasitic effects and high I / O density. Flip chip packaging technology is suitable for a variety of chips such as LCD, image sensors, memory, microprocessors and microwave radio frequency. Specific application products include mobile phones, TVs, computers, tablets and cameras.
[0003] At present, as the requirements for chip performance are getting higher and higher, the integration density is gradually increasing, and the chip packaging size is also getting larger and larger. At the same time, the packaging process involves a heating process, which will cause thermomechanical stress, and this thermomechanical stress will cause product warping. Excessive warping will cause a series of product reliability problems, such as desoldering of chip I / O pins and metal wiring layers or packaging substrates or pads on PCB boards, and cracks between the edge of the chip plastic layer and the metal wiring layer or packaging substrates or PCB boards. Larger chips have greater warping, which affects product quality. Utility Model Content
[0004] In order to suppress chip warping during the packaging process, the present application provides a flip-chip packaging structure with low warping and low strain.
[0005] The present application provides a low-warpage and low-strain flip-chip packaging structure, which adopts the following technical solution: a low-warpage and low-strain flip-chip packaging structure, comprising a substrate and a filling layer, wherein the filling layer is provided with a plurality of chip bodies, the filling layer has a cavity for accommodating the chip body, a buffer rib body is arranged between the filling layer and the chip body, a transition edge is formed between adjacent cavities, the buffer rib body is at least partially connected to the transition edge, and at the same time is at least partially connected to the chip body.
[0006] By adopting the above technical solution, a buffer rib is added between the original chip body and the filling layer on the substrate, and the part of the chip body that may warp is reinforced by the buffer rib. At least the transition edge and the chip body are connected, so that when there is a possibility of warping as a whole, the overall deformation trend can be suppressed to improve product quality.
[0007] Preferably, the chip body has a first accommodating groove, the transition edge has a second accommodating groove, and the buffer rib body is embedded in and connected to the inner walls of the first accommodating groove and the second accommodating groove.
[0008] Preferably, the buffer rib body, the transition edge and the upper surface of the chip body are flush.
[0009] Preferably, one end of the first accommodating groove is open, and the other end is closed, and the inner wall of the closed end of the first accommodating groove is arc-shaped.
[0010] Preferably, a plurality of buffer ribs are provided on the edge of the chip body, the edge length of the chip body is X, the total width length of the plurality of buffer ribs is Y, and Y / X is not greater than 0.4.
[0011] Preferably, the width of a single buffer rib is no greater than 0.1X.
[0012] Preferably, a break point is provided on the inner wall of the closed end of the first accommodating groove, one end of the break point is fixedly connected to the inner wall, and the other end is used to connect the buffer rib body, and the middle part of the break point has a narrowing section with a gradually increasing width.
[0013] Preferably, the end of the buffer rib is connected to the upper side of the fracture point.
[0014] Preferably, the connection between the buffer rib and the transition edge is a first connection point, the connection between the buffer rib and the second receiving groove is a second connection point, the buffer rib is located between the first connection point and the second connection point, and there is a safety section with reduced width, and the safety section is not connected to the inner wall of the first receiving groove.
[0015] Preferably, two ends of the buffer rib body are respectively connected to the two chip bodies.
[0016] In summary, the present application includes at least one of the following beneficial technical effects:
[0017] 1. The chip bodies can be connected through transition edges and buffer ribs to improve the overall anti-deformation ability and reduce the possibility of warping of the chip body during the packaging process;
[0018] 2. When replacing some individual chip bodies, part of the buffer ribs can be separated from the chip body to avoid damage to the chip. BRIEF DESCRIPTION OF THE DRAWINGS
[0019] Figure 1 is a schematic diagram of the structure of Example 1 of the present application;
[0020] Figure 2 is a cross-sectional view of Example 1 of the present application;
[0021] Figure 3 is a partial exploded view of Example 1 of the present application;
[0022] Figure 4 is a partial cross-sectional view of Example 2 of the present application;
[0023] Figure 5 is a partial exploded view of Example 2 of the present application;
[0024] Figure 6 It is a schematic diagram of the structure of the buffer rib body in Example 3 of the present application.
[0025] Explanation of the reference numerals: 100, substrate; 110, filling layer; 111, cavity; 112, buffer rib; 113, transition edge; 120, chip body; 121, first accommodating groove; 122, second accommodating groove; 130, fracture point; 131, reduction section; 141, first connection point; 142, second connection point; 143, insurance section. DETAILED DESCRIPTION
[0026] The present application is further described in detail below in conjunction with the accompanying drawings. Example
[0027] Embodiment 1 of the present application discloses a low-warpage and low-strain flip-chip packaging structure, referring to Figure 1 , Figure 2 , including a substrate 100 and a filling layer 110 arranged from bottom to top, a plurality of chip bodies 120 are arranged on the filling layer 110, and the filling layer 110 has cavities 111 for accommodating the chip bodies 120. In this embodiment, there are four cavities 111 arranged in a matrix. A buffer rib 112 is arranged between the filling layer 110 and the chip body 120, and a transition edge 113 is formed between adjacent cavities 111. In this embodiment, the transition edge 113 is cross-shaped.
[0028] The buffer rib body 112 is at least partially connected to the transition edge 113, and at least partially connected to the chip body 120. In this embodiment, the two ends of the buffer rib body 112 extend and are connected to the two chip bodies 120 respectively, and the middle part is connected to the transition edge 113, so that the whole can form a synergistic fixing effect, and improve the ability to suppress the warping deformation of the chip body 120.
[0029] Reference Figure 3 ( Figure 3 The chip body 120 is for illustration only. The chip body 120 has a first receiving groove 121, one end of the first receiving groove 121 is open and the other end is closed. The transition edge 113 is a second receiving groove 122, both ends of the second receiving groove 122 are penetrated, and the middle of the buffer rib body 112 is located in the second receiving groove 122. The buffer rib body 112 is added to the first receiving groove 121 and the second receiving groove 122 by 3D printing, and is a fiber-reinforced Al-Si-Cu alloy composite material. At the same time, after the addition is completed, the upper surfaces of the buffer rib body 112, the transition edge 113, and the chip body 120 are flush.
[0030] In this application, due to the structural requirements of the chip body 120 itself, there are requirements for the number and corresponding width of the buffer ribs 112. The width of the buffer ribs 112 cannot be too wide, which will affect the layout of the chip itself. Therefore, in this embodiment, considering the overall chip body 120, two buffer ribs 112 are set at the edge of the chip body 120. The consideration of the number and width is that the edge length of the chip body 120 is X, the total width of several buffer ribs 112 is Y, and Y / X is not greater than 0.4. And the width of a single buffer rib 112 is not greater than 0.1X, that is to say, the buffer rib 112 cannot be too wide. Under the premise that it cannot be too wide, the overall proportion cannot be too high.
[0031] Through this layout and connection method, the four chip bodies 120 can be connected and fixed in pairs through the transition edges 113. During the packaging process, when there is warping or internal stress amplification, the deformation caused by the stress can be buffered. Example
[0032] The difference from Example 1 is that, referring to Figure 4 , Figure 5 Considering that if a large deformation occurs during the packaging process, when the buffer ribs 112 connect all the chip bodies 120, it may happen that one of the chip bodies 120 affects the other chip bodies 120. In other words, originally only one of the chip bodies 120 needed to be replaced, but at this time, all the chip bodies 120 may be damaged; or during the packaging process, a part of the chip body 120 is defective and needs to be removed separately for replacement.
[0033] Therefore, the inner wall of the closed end of the first accommodating groove 121 is firstly set to be an arc shape. Firstly, the arc shape can reduce the possibility of cracking of the chip body 120 under a high degree of deformation. At the same time, a fracture point 130 is integrally provided on the inner wall at the closed end, and the fracture point 130 is also set on the inner wall by 3D printing additive manufacturing. The middle part of the fracture point 130 has a narrowing section 131, which is specifically a shape in which the width gradually increases from small to large, and can break in the part with a smaller width. The end of the buffer rib 112 is fixedly connected to the upper side of the fracture point 130, and there is a gap between the fracture point 130 and the bottom wall of the first accommodating groove 121. In this way, in the subsequent packaging process, if the degree of deformation is too large, the connection of a buffer rib 112 of a chip body 120 will break in the narrowing section 131. This can ensure that other parts of the chip body 120 are less affected. At the same time, since the original upper surface is flush, if a break occurs, the buffer rib 112 at one end will be concave or warped, which can also better detect the break.
[0034] In another case, that is, when a certain chip body 120 needs to be replaced separately, the end of the buffer rib body 112 is deformed downward by external force, causing the reduced section 131 to break, so that the connection relationship can be disconnected more conveniently and quickly. Example
[0035] The difference from Example 2 is that, referring to Figure 6 , the breaking point of the buffer rib 112 is not at the connection with the end of the first receiving groove 121, but at the buffer rib 112 itself. The connection between the buffer rib 112 and the transition edge 113 is the first connection point 141, and the connection between the buffer rib 112 and the second receiving groove 122 is the second connection point 142. There is a safety section 143 with a reduced width between the first connection point 141 and the second connection point 142 of the buffer rib 112, and the safety section 143 is not connected to the inner wall of the first receiving groove 121. In this way, the middle part of the buffer rib 112 will be fixedly connected to the transition edge 113, and in the process of warping deformation, under the same force condition, the safety section 143 will break due to its small width, thus forming a protective effect.
[0036] Similarly, when the chip body 120 needs to be taken out separately, the safety section 143 is acted on separately, so that it can be broken separately without affecting other connection modes.
[0037] The embodiments of this specific implementation method are all preferred embodiments of the present application, and are not intended to limit the protection scope of the present application. Therefore, all equivalent changes made based on the structure, shape, and principle of the present application should be included in the protection scope of the present application.
Claims
1. A low-warpage and low-strain flip-chip packaging structure, comprising a substrate (100) and a filling layer (110), wherein the filling layer (110) is provided with a plurality of chip bodies (120), and the filling layer (110) has a cavity (111) for accommodating the chip bodies (120), characterized in that: A buffer rib (112) is provided between the filling layer (110) and the chip body (120), a transition edge (113) is formed between adjacent cavities (111), and the buffer rib (112) is at least partially connected to the transition edge (113) and at least partially connected to the chip body (120).
2. The low warpage and low strain flip chip packaging structure according to claim 1, characterized in that: The chip body (120) has a first accommodating groove (121), the transition edge (113) has a second accommodating groove (122), and the buffer rib body (112) is embedded in and connected to the inner walls of the first accommodating groove (121) and the second accommodating groove (122).
3. The low warpage and low strain flip chip packaging structure according to claim 2, characterized in that: The upper surfaces of the buffer rib body (112), the transition edge (113), and the chip body (120) are flush.
4. The low warpage and low strain flip chip packaging structure according to claim 3, characterized in that: One end of the first accommodating groove (121) is open, and the other end is closed; the inner wall of the closed end of the first accommodating groove (121) is arc-shaped.
5. A low warpage and low strain flip chip packaging structure according to claim 1 or 4, characterized in that: A plurality of the buffer ribs (112) are arranged on the edge of the chip body (120), the edge length of the chip body (120) is X, the total width length of the plurality of the buffer ribs (112) is Y, and Y / X is not greater than 0.
4.
6. The low warpage and low strain flip chip packaging structure according to claim 5, characterized in that: The width of a single buffer rib (112) is no greater than 0.1X.
7. The low warpage and low strain flip chip packaging structure according to claim 4, characterized in that: A break point (130) is provided on the inner wall of the closed end of the first accommodating groove (121), one end of the break point (130) is fixedly connected to the inner wall, and the other end is used to connect to the buffer rib (112), and the middle of the break point (130) has a narrowing section (131) whose width gradually increases from small to large.
8. The low warpage and low strain flip chip packaging structure according to claim 7, characterized in that: The end of the buffer rib (112) is connected to the upper side of the break point (130).
9. The low warpage and low strain flip chip packaging structure according to claim 4, characterized in that: The connection point between the buffer rib body (112) and the transition edge (113) is a first connection point (141), the connection point between the buffer rib body (112) and the second accommodation groove (122) is a second connection point (142), and the buffer rib body (112) is located between the first connection point (141) and the second connection point (142) and has a safety section (143) with a reduced width, and the safety section (143) is not connected to the inner wall of the first accommodation groove (121).
10. The low warpage and low strain flip chip packaging structure according to claim 6, characterized in that: Two ends of the buffer rib body (112) are respectively connected to the two chip bodies (120).