Edge internet-of-things proxy device
By designing an edge IoT proxy device, using the connection between the CPU and the network port for data processing and integration, the problem of traditional terminal data acquisition technology requiring high platform processing capabilities is solved, efficient terminal equipment data acquisition and processing is achieved, and the platform's processing efficiency is improved.
Patent Information
- Application Number
- CN202421322727.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-06-11
- Publication Date
- 2025-03-04
- Estimated Expiration
- 2034-06-11
AI Technical Summary
Traditional terminal data acquisition technology has high requirements for platform processing capabilities and a large number and types of interfaces, resulting in the reduction of the processing efficiency of the platform when there are many terminal devices.
An edge IoT proxy device is designed, including a network port, CPU, node output module, communication module, switching quantity acquisition module and analog quantity acquisition module. Through the connection between the CPU and the network port, the data of the terminal device is processed and integrated before uploading to the platform.
It effectively reduces the pressure on the back-end platform, improves the platform's processing efficiency, and realizes efficient collection and processing of terminal equipment data.
Smart Images

Figure CN222563829U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of terminal data collection, and in particular to an edge Internet of Things agent device. Background Art
[0002] Traditional terminal data collection technology uses a method of direct connection between the terminal and the platform. The terminal collects the corresponding information and directly uploads it to the platform for processing.
[0003] This method has high requirements on the platform's processing capabilities and requires a large number and types of interfaces. When there are many terminal devices, the platform's processing efficiency will be greatly reduced. Utility Model Content
[0004] The technical problem to be solved by the utility model is to provide an edge IoT agent device, which can upload the data collected by edge computing to a platform to improve the processing efficiency of the platform.
[0005] In order to solve the above technical problems, the technical solution adopted by the utility model is:
[0006] An edge IoT agent device includes a network port, a CPU, a node output module, a communication module, a switch quantity acquisition module and an analog quantity acquisition module;
[0007] The number of the node output modules is eight, the number of the communication modules is six, the number of the switch quantity acquisition modules is eight, and the number of the analog quantity acquisition modules is four;
[0008] The CPU is electrically connected to the network port, the eight node output modules, the six communication modules, the eight switch quantity acquisition modules and the four analog quantity acquisition modules respectively.
[0009] Further, the communication module is an RS485 communication unit, and the RS485 communication unit includes a resistor R60, a resistor R61, a resistor R62, a resistor R63, a resistor R67, a resistor R68, a resistor R69, a resistor R70, a resistor R71, a transistor Q2, an optical coupler U10, an optical coupler U11 and a low-power half-duplex transceiver U9;
[0010] The first pin of the optical coupler U10 is electrically connected to the VCC power supply of the peripheral device through the resistor R61, the second pin of the optical coupler U10 is electrically connected to the output end RO of the low-power half-duplex transceiver U9 through the resistor R67, the fourth pin of the optical coupler U10 is electrically connected to the data receiving end MCU_RXD_1 of the CPU and one end of the resistor R60 respectively, the other end of the resistor R60 is electrically connected to the VCC power supply of the peripheral device, and the third pin of the optical coupler U10 is grounded;
[0011] The first pin of the optocoupler U11 is electrically connected to the data sending terminal MCU_TXD_1 of the CPU, the second pin of the optocoupler U11 is grounded through a resistor R70, the third pin of the optocoupler U11 is electrically connected to one end of a resistor R71 and one end of a resistor R69 respectively, the other end of the resistor R71 is grounded, the other end of the resistor R69 is electrically connected to the base of the transistor Q2, the emitter of the transistor Q2 is grounded, the collector of the transistor Q2 is electrically connected to one end of a resistor R63, a receiver output enable terminal RE of a low-power half-duplex transceiver U9 and a driver output enable terminal DE of a low-power half-duplex transceiver U9 respectively, and the other end of the resistor R63 is electrically connected to the VCC power supply of the peripheral;
[0012] The in-phase terminal A and the inverting terminal B of the low-power half-duplex transceiver U9 are electrically connected to the peripheral terminal device with RS485 communication protocol respectively; the in-phase terminal A of the low-power half-duplex transceiver U9 is electrically connected to the VCC power supply of the peripheral device through resistor R62, and the inverting terminal B of the low-power half-duplex transceiver U9 is grounded through resistor R68.
[0013] Further, the RS485 communication unit also includes a capacitor C4 and a capacitor C5;
[0014] The power supply terminal VCC of the low power consumption half-duplex transceiver U9 is electrically connected to the VCC power supply of the peripheral device, one end of the capacitor C4 and one end of the capacitor C5 respectively, and the other end of the capacitor C4 and the other end of the capacitor C5 are both grounded.
[0015] Further, the RS485 communication unit also includes a switch S1, a resistor R64, a resistor R65 and a resistor R66;
[0016] The in-phase end A of the low-power half-duplex transceiver U9 is electrically connected to one end of the resistor R64, the inverting end B of the low-power half-duplex transceiver U9 is electrically connected to one end of the resistor R66, the other end of the resistor R64 and one end of the resistor R65 are respectively electrically connected to the peripheral terminal device with RS485 communication protocol, the other end of the resistor R66 and one end of the switch S1 are respectively electrically connected to the peripheral terminal device with RS485 communication protocol, and the other end of the resistor R65 is electrically connected to the other end of the switch S1.
[0017] Further, the RS485 communication unit also includes a bidirectional TVS diode VP2, a TVS diode VP1 and a TVS diode VP3;
[0018] The positive electrode of the TVS diode VP1 is grounded, and the negative electrode of the TVS diode VP1 is electrically connected to the other end of the resistor R64 and one end of the bidirectional TVS diode VP2 respectively. The positive electrode of the TVS diode VP3 is grounded, and the negative electrode of the TVS diode VP3 is electrically connected to the other end of the resistor R66 and the other end of the bidirectional TVS diode VP2 respectively.
[0019] Furthermore, the switch quantity acquisition module includes a diode D1, a resistor R55, a resistor R56, a resistor R57, a resistor R58, a resistor R59, a capacitor C2, a capacitor C3, an optical coupler U8 and a transistor Q1;
[0020] The positive electrode of the diode D1 is electrically connected to the VCC power supply of the peripheral device, the negative electrode of the diode D1 is electrically connected to one end of the resistor R57, the other end of the resistor R57 is electrically connected to one end of the switch device to be collected of the peripheral device, the other end of the switch device to be collected of the peripheral device is electrically connected to one end of the resistor R58, one end of the capacitor C2 and one end of the resistor R56 respectively, the other end of the capacitor C2, the other end of the resistor R58 and the second pin of the optocoupler U8 are all grounded, the other end of the resistor R56 is electrically connected to the base of the transistor Q1, the collector of the transistor Q1 is electrically connected to the VCC power supply of the peripheral device through the resistor R55, the emitter of the transistor Q1 is electrically connected to the first pin of the optocoupler U8, the third pin of the optocoupler U8 is electrically connected to one end of the resistor R59, one end of the capacitor C3 and the twenty-eighth pin of the CPU respectively, the other end of the resistor R59 and the other end of the capacitor C3 are both grounded, and the fourth pin of the optocoupler U8 is electrically connected to the VCC power supply of the peripheral device.
[0021] Furthermore, the analog quantity acquisition module includes a capacitor C6, a capacitor C7, a resistor R1, a resistor R2, a resistor R3, a resistor R4, an amplifier U1, an amplifier U3 and a linear optocoupler U2;
[0022] One end of the resistor R4 and one end of the resistor R1 are respectively electrically connected to a terminal device that can send analog quantities, the other end of the resistor R1 is respectively electrically connected to the third pin of the linear optocoupler U2, the reverse input end of the amplifier U1 and one end of the capacitor C6, the other end of the capacitor C6 is respectively electrically connected to the output end of the amplifier U1 and one end of the resistor R2, the other end of the resistor R2 is electrically connected to the first pin of the linear optocoupler U2, the second pin of the linear optocoupler U2 is electrically connected to the VCC power supply of the peripheral device, the sixth pin of the linear optocoupler U2 is respectively electrically connected to one end of the resistor R3, one end of the capacitor C7 and the reverse input end of the amplifier U3, the other end of the capacitor C7 is respectively electrically connected to the other end of the resistor R3, the output end of the amplifier U3 and the twenty-ninth pin of the CPU, the other end of the resistor R4, the fourth pin of the linear optocoupler U2, the fifth pin of the linear optocoupler U2, the positive input end of the amplifier U1 and the positive input end of the amplifier U3 are all grounded.
[0023] Furthermore, the node output module includes a relay K1 and a driver chip U7;
[0024] One end of the control coil of the relay K1 is electrically connected to the output end of the driving chip U7, the other end of the control coil of the relay K1 is externally connected to a 12V power supply, the input end of the driving chip U7 is electrically connected to the thirteenth to sixteenth pins of the CPU, and the switch contacts of the relay K1 are arranged on the node output circuit of the peripheral device.
[0025] Furthermore, the number of the relays K1 is eight, the number of the drive chips U7 is two, and four relays K1 are configured with one drive chip U7.
[0026] The beneficial effects of the utility model are:
[0027] The utility model provides an edge IoT proxy device, including multiple groups of switch quantity acquisition modules, node output modules, communication modules and analog quantity acquisition modules, which are used to collect information data and perform command control on terminal devices. It also includes a CPU and a network port. Through the connection between the CPU and the network port, the data of the terminal device is uploaded to the platform. That is, after the edge IoT proxy device is connected to multiple terminal devices, the data is first processed and integrated before uploading to the platform, so as to transfer the back-end processing to the front-end processing, thereby effectively reducing the pressure on the back-end platform and improving the processing efficiency of the platform. BRIEF DESCRIPTION OF THE DRAWINGS
[0028] Figure 1 This is an overall structural block diagram of an edge IoT proxy device of the utility model;
[0029] Figure 2 This is a schematic diagram of the circuit connection structure of a communication module of an edge IoT proxy device of the utility model;
[0030] Figure 3 This is a schematic diagram of the circuit connection structure of a switch quantity acquisition module of an edge IoT agent device of the utility model;
[0031] Figure 4 This is a schematic diagram of the circuit connection structure of an analog quantity acquisition module of an edge IoT proxy device of the utility model;
[0032] Figure 5 This is a schematic diagram of the circuit connection structure of a node output module of an edge IoT proxy device of the utility model;
[0033] Description of labels:
[0034] 1. Network port; 2. CPU; 3. Node output module; 4. Communication module; 5. Switch quantity acquisition module; 6. Analog quantity acquisition module. DETAILED DESCRIPTION
[0035] In order to explain the technical content, achieved objectives and effects of the present invention in detail, the following is an explanation in conjunction with the implementation modes and the accompanying drawings.
[0036] Please refer to Figures 1 to 5 As shown, an edge IoT agent device of the utility model includes a network port, a CPU, a node output module, a communication module, a switch quantity acquisition module and an analog quantity acquisition module;
[0037] The number of the node output modules is eight, the number of the communication modules is six, the number of the switch quantity acquisition modules is eight, and the number of the analog quantity acquisition modules is four;
[0038] The CPU is electrically connected to the network port, the eight node output modules, the six communication modules, the eight switch quantity acquisition modules and the four analog quantity acquisition modules respectively.
[0039] From the above description, it can be seen that the beneficial effects of the utility model are:
[0040] The utility model provides an edge IoT proxy device, including multiple groups of switch quantity acquisition modules, node output modules, communication modules and analog quantity acquisition modules, which are used to collect information data and perform command control on terminal devices. It also includes a CPU and a network port. Through the connection between the CPU and the network port, the data of the terminal device is uploaded to the platform. That is, after the edge IoT proxy device is connected to multiple terminal devices, the data is first processed and integrated before uploading to the platform, so as to transfer the back-end processing to the front-end processing, thereby effectively reducing the pressure on the back-end platform and improving the processing efficiency of the platform.
[0041] Further, the communication module is an RS485 communication unit, and the RS485 communication unit includes a resistor R60, a resistor R61, a resistor R62, a resistor R63, a resistor R67, a resistor R68, a resistor R69, a resistor R70, a resistor R71, a transistor Q2, an optical coupler U10, an optical coupler U11 and a low-power half-duplex transceiver U9;
[0042] The first pin of the optical coupler U10 is electrically connected to the VCC power supply of the peripheral device through the resistor R61, the second pin of the optical coupler U10 is electrically connected to the output end RO of the low-power half-duplex transceiver U9 through the resistor R67, the fourth pin of the optical coupler U10 is electrically connected to the data receiving end MCU_RXD_1 of the CPU and one end of the resistor R60 respectively, the other end of the resistor R60 is electrically connected to the VCC power supply of the peripheral device, and the third pin of the optical coupler U10 is grounded;
[0043] The first pin of the optocoupler U11 is electrically connected to the data sending terminal MCU_TXD_1 of the CPU, the second pin of the optocoupler U11 is grounded through a resistor R70, the third pin of the optocoupler U11 is electrically connected to one end of a resistor R71 and one end of a resistor R69 respectively, the other end of the resistor R71 is grounded, the other end of the resistor R69 is electrically connected to the base of the transistor Q2, the emitter of the transistor Q2 is grounded, the collector of the transistor Q2 is electrically connected to one end of a resistor R63, a receiver output enable terminal RE of a low-power half-duplex transceiver U9 and a driver output enable terminal DE of a low-power half-duplex transceiver U9 respectively, and the other end of the resistor R63 is electrically connected to the VCC power supply of the peripheral;
[0044] The in-phase terminal A and the inverting terminal B of the low-power half-duplex transceiver U9 are electrically connected to the peripheral terminal device with RS485 communication protocol respectively; the in-phase terminal A of the low-power half-duplex transceiver U9 is electrically connected to the VCC power supply of the peripheral device through resistor R62, and the inverting terminal B of the low-power half-duplex transceiver U9 is grounded through resistor R68.
[0045] From the above description, it can be seen that the CPU exchanges data with the terminal device with RS485 communication protocol through the RS485 communication unit. The resistor R63, transistor Q2 and resistor R69 are used as switches to switch the sending and receiving states. The resistor R69 is a current limiting resistor, the resistor R63 is a pull-up resistor, and the optocoupler device plays the role of photoelectric signal conversion to improve the circuit stability.
[0046] Further, the RS485 communication unit also includes a capacitor C4 and a capacitor C5;
[0047] The power supply terminal VCC of the low power consumption half-duplex transceiver U9 is electrically connected to the VCC power supply of the peripheral device, one end of the capacitor C4 and one end of the capacitor C5 respectively, and the other end of the capacitor C4 and the other end of the capacitor C5 are both grounded.
[0048] From the above description, it can be seen that capacitor C4 plays a filtering role to filter out interference noise, and capacitor C5 prevents high-frequency interference to ensure circuit stability.
[0049] Further, the RS485 communication unit also includes a switch S1, a resistor R64, a resistor R65 and a resistor R66;
[0050] The in-phase end A of the low-power half-duplex transceiver U9 is electrically connected to one end of the resistor R64, the inverting end B of the low-power half-duplex transceiver U9 is electrically connected to one end of the resistor R66, the other end of the resistor R64 and one end of the resistor R65 are respectively electrically connected to the peripheral terminal device with RS485 communication protocol, the other end of the resistor R66 and one end of the switch S1 are respectively electrically connected to the peripheral terminal device with RS485 communication protocol, and the other end of the resistor R65 is electrically connected to the other end of the switch S1.
[0051] From the above description, it can be seen that the functions of the resistor R64, the resistor R66, the resistor R65 and the switch S1 are to add a configurable impedance matching to the output signal of the RS485 communication unit, to make a reservation for long-distance communication and to ensure normal communication.
[0052] Further, the RS485 communication unit also includes a bidirectional TVS diode VP2, a TVS diode VP1 and a TVS diode VP3;
[0053] The positive electrode of the TVS diode VP1 is grounded, and the negative electrode of the TVS diode VP1 is electrically connected to the other end of the resistor R64 and one end of the bidirectional TVS diode VP2 respectively. The positive electrode of the TVS diode VP3 is grounded, and the negative electrode of the TVS diode VP3 is electrically connected to the other end of the resistor R66 and the other end of the bidirectional TVS diode VP2 respectively.
[0054] From the above description, it can be seen that the circuit composed of the bidirectional TVS diode VP2, the TVS diode VP1 and the TVS diode VP3 plays a protective role in lightning protection and surge protection.
[0055] Furthermore, the switch quantity acquisition module includes a diode D1, a resistor R55, a resistor R56, a resistor R57, a resistor R58, a resistor R59, a capacitor C2, a capacitor C3, an optical coupler U8 and a transistor Q1;
[0056] The positive electrode of the diode D1 is electrically connected to the VCC power supply of the peripheral device, the negative electrode of the diode D1 is electrically connected to one end of the resistor R57, the other end of the resistor R57 is electrically connected to one end of the switch device to be collected of the peripheral device, the other end of the switch device to be collected of the peripheral device is electrically connected to one end of the resistor R58, one end of the capacitor C2 and one end of the resistor R56 respectively, the other end of the capacitor C2, the other end of the resistor R58 and the second pin of the optocoupler U8 are all grounded, the other end of the resistor R56 is electrically connected to the base of the transistor Q1, the collector of the transistor Q1 is electrically connected to the VCC power supply of the peripheral device through the resistor R55, the emitter of the transistor Q1 is electrically connected to the first pin of the optocoupler U8, the third pin of the optocoupler U8 is electrically connected to one end of the resistor R59, one end of the capacitor C3 and the twenty-eighth pin of the CPU respectively, the other end of the resistor R59 and the other end of the capacitor C3 are both grounded, and the fourth pin of the optocoupler U8 is electrically connected to the VCC power supply of the peripheral device.
[0057] From the above description, it can be known that the switch device to be collected of the peripheral device uploads the device data to the CPU through the switch quantity collection module.
[0058] Furthermore, the analog quantity acquisition module includes a capacitor C6, a capacitor C7, a resistor R1, a resistor R2, a resistor R3, a resistor R4, an amplifier U1, an amplifier U3 and a linear optocoupler U2;
[0059] One end of the resistor R4 and one end of the resistor R1 are respectively electrically connected to a terminal device that can send analog quantities, the other end of the resistor R1 is respectively electrically connected to the third pin of the linear optocoupler U2, the reverse input end of the amplifier U1 and one end of the capacitor C6, the other end of the capacitor C6 is respectively electrically connected to the output end of the amplifier U1 and one end of the resistor R2, the other end of the resistor R2 is electrically connected to the first pin of the linear optocoupler U2, the second pin of the linear optocoupler U2 is electrically connected to the VCC power supply of the peripheral device, the sixth pin of the linear optocoupler U2 is respectively electrically connected to one end of the resistor R3, one end of the capacitor C7 and the reverse input end of the amplifier U3, the other end of the capacitor C7 is respectively electrically connected to the other end of the resistor R3, the output end of the amplifier U3 and the twenty-ninth pin of the CPU, the other end of the resistor R4, the fourth pin of the linear optocoupler U2, the fifth pin of the linear optocoupler U2, the positive input end of the amplifier U1 and the positive input end of the amplifier U3 are all grounded.
[0060] From the above description, it can be seen that the function of this circuit is to isolate the ADC signal collected at the input end and input it into the CPU chip.
[0061] Furthermore, the node output module includes a relay K1 and a driver chip U7;
[0062] One end of the control coil of the relay K1 is electrically connected to the output end of the driving chip U7, the other end of the control coil of the relay K1 is externally connected to a 12V power supply, the input end of the driving chip U7 is electrically connected to the thirteenth to sixteenth pins of the CPU, and the switch contacts of the relay K1 are arranged on the node output circuit of the peripheral device.
[0063] From the above description, it can be seen that the function of the driver chip U7 is to enhance the driving ability and drive the relay K1 to work. The input pins of the driver chip U7 are connected to the CPU, and the CPU controls the working state of the output pins of the driver chip U7 by outputting high and low levels. It is connected to the external load and can be connected to JDQ_1_NC, JDQ_1_COM or JDQ_1_NO, JDQ_1_COM as needed. As a switch node, it can control the on and off of the load.
[0064] Please refer to Figures 1 to 5 , Embodiment 1 of the present utility model is:
[0065] The utility model provides an edge IoT proxy device, which in this embodiment includes a network port 1, a CPU 2, a node output module 3, a communication module 4, a switch quantity acquisition module 5 and an analog quantity acquisition module 6.
[0066] In this embodiment, if Figure 1 As shown, the CPU 2 is electrically connected to the network port 1, the node output module 3, the communication module 4, the switch quantity acquisition module 5 and the analog quantity acquisition module 6 respectively;
[0067] In this embodiment, the number of the node output modules 3 is eight, the number of the communication modules 4 is six, the number of the switch quantity acquisition modules 5 is eight, the number of the analog quantity acquisition modules 6 is four, and each module is connected in parallel to the CPU 2, and the model of the CPU 2 is RK3399;
[0068] In this embodiment, if Figure 2 As shown, the communication module 4 is an RS485 communication unit, and the RS485 communication unit includes a bidirectional TVS diode VP2, a TVS diode VP1, a TVS diode VP3, a switch S1, a capacitor C4, a capacitor C5, a resistor R60, a resistor R61, a resistor R62, a resistor R63, a resistor R64, a resistor R65, a resistor R66, a resistor R67, a resistor R68, a resistor R69, a resistor R70, a resistor R71, a transistor Q2, an optical coupler U10, an optical coupler U11 and a low-power half-duplex transceiver U9;
[0069] The first pin of the optical coupler U10 is electrically connected to the VCC power supply 3.3V of the peripheral device through the resistor R61, the second pin of the optical coupler U10 is electrically connected to the output end RO of the low-power half-duplex transceiver U9 through the resistor R67, the fourth pin of the optical coupler U10 is electrically connected to the data receiving end MCU_RXD_1 of the CPU and one end of the resistor R60 respectively, the other end of the resistor R60 is electrically connected to the VCC power supply 3.3V of the peripheral device, and the third pin of the optical coupler U10 is grounded;
[0070] The first pin of the optocoupler U11 is electrically connected to the data sending terminal MCU_TXD_1 of the CPU, the second pin of the optocoupler U11 is grounded through a resistor R70, the third pin of the optocoupler U11 is electrically connected to one end of a resistor R71 and one end of a resistor R69 respectively, the other end of the resistor R71 is grounded, the other end of the resistor R69 is electrically connected to the base of the transistor Q2, the emitter of the transistor Q2 is grounded, the collector of the transistor Q2 is electrically connected to one end of a resistor R63, a receiver output enable terminal RE of a low-power half-duplex transceiver U9 and a driver output enable terminal DE of a low-power half-duplex transceiver U9 respectively, and the other end of the resistor R63 is electrically connected to the VCC power supply 3.3V of the peripheral;
[0071] Resistor R63, transistor Q2 and resistor R69 are used as switches to switch the transmit and receive states. Resistor R69 is a current limiting resistor, resistor R63 is a pull-up resistor, and the optocoupler device plays the role of photoelectric signal conversion to improve circuit stability.
[0072] The in-phase terminal A and the inverting terminal B of the low-power half-duplex transceiver U9 are electrically connected to the peripheral terminal device with RS485 communication protocol respectively; the in-phase terminal A of the low-power half-duplex transceiver U9 is electrically connected to the VCC power supply 3.3V of the peripheral device through the resistor R62, and the inverting terminal B of the low-power half-duplex transceiver U9 is grounded through the resistor R68;
[0073] In this embodiment, the model of the transistor Q2 is S8050, the models of the optocoupler U10 and the optocoupler U11 are both 356T, the resistance value of the resistor R60 is 10K, the resistance value of the resistor R61 is 1K, the resistance value of the resistor R62 is 10K, the resistance value of the resistor R63 is 10K, the resistance value of the resistor R67 is 1K, the resistance value of the resistor R68 is 10K, the resistance value of the resistor R69 is 10K, the resistance value of the resistor R70 is 1K, the resistance value of the resistor R71 is 10K, and the model of the low-power half-duplex transceiver U9 is SP3845;
[0074] The power supply terminal VCC of the low-power half-duplex transceiver U9 is electrically connected to the VCC power supply 3.3V of the peripheral, one end of the capacitor C4 and one end of the capacitor C5, respectively, and the other end of the capacitor C4 and the other end of the capacitor C5 are both grounded;
[0075] Capacitor C4 acts as a filter to filter out interference noise, and capacitor C5 prevents high-frequency interference to ensure stable operation of the circuit;
[0076] In this embodiment, the capacitance of capacitor C4 is 10uf, and the capacitance of capacitor C5 is 100nf;
[0077] The in-phase terminal A of the low-power half-duplex transceiver U9 is electrically connected to one end of the resistor R64, the inverting terminal B of the low-power half-duplex transceiver U9 is electrically connected to one end of the resistor R66, the other end of the resistor R64 and one end of the resistor R65 are electrically connected to an external terminal device with an RS485 communication protocol, the other end of the resistor R66 and one end of the switch S1 are electrically connected to an external terminal device with an RS485 communication protocol, and the other end of the resistor R65 is electrically connected to the other end of the switch S1;
[0078] The function of resistor R64, resistor R66, resistor R65 and switch S1 is to add a configurable impedance matching to the output signal of the RS485 communication unit, to make a reservation for long-distance communication and ensure normal communication;
[0079] In this embodiment, the resistance value of the resistor R64 is 10R, the resistance value of the resistor R65 is 120R, and the resistance value of the resistor R66 is 10R;
[0080] The positive electrode of the TVS diode VP1 is grounded, and the negative electrode of the TVS diode VP1 is electrically connected to the other end of the resistor R64 and one end of the bidirectional TVS diode VP2 respectively; the positive electrode of the TVS diode VP3 is grounded, and the negative electrode of the TVS diode VP3 is electrically connected to the other end of the resistor R66 and the other end of the bidirectional TVS diode VP2 respectively;
[0081] The circuit composed of bidirectional TVS diode VP2, TVS diode VP1 and TVS diode VP3 plays a role in lightning protection and surge protection;
[0082] In this embodiment, the model of the bidirectional TVS diode VP2 is P6SMB6.8CA, and the models of the TVS diode VP3 and the TVS diode VP1 are both P6SMB6.8A;
[0083] In this embodiment, if Figure 3 As shown, the switch quantity acquisition module 5 includes a diode D1, a resistor R55, a resistor R56, a resistor R57, a resistor R58, a resistor R59, a capacitor C2, a capacitor C3, an optical coupler U8 and a transistor Q1;
[0084] The positive electrode of the diode D1 is electrically connected to the VCC power supply 5V of the external device, the negative electrode of the diode D1 is electrically connected to one end of the resistor R57, the other end of the resistor R57 is electrically connected to one end of the external switch device to be collected, the other end of the external switch device to be collected is electrically connected to one end of the resistor R58, one end of the capacitor C2 and one end of the resistor R56 respectively, the other end of the capacitor C2, the other end of the resistor R58 and the second pin of the optocoupler U8 are all grounded, the other end of the resistor R56 is electrically connected to the base of the transistor Q1, the collector of the transistor Q1 is electrically connected to the VCC power supply 5V of the external device through the resistor R55, the emitter of the transistor Q1 is electrically connected to the first pin of the optocoupler U8, the third pin of the optocoupler U8 is electrically connected to one end of the resistor R59, one end of the capacitor C3 and the twenty-eighth pin of the CPU respectively, the other end of the resistor R59 and the other end of the capacitor C3 are all grounded, and the fourth pin of the optocoupler U8 is electrically connected to the VCC power supply 3.3V of the external device;
[0085] In this embodiment, the diode D1 is of model 1N4148, the resistance of the resistor R55 is 1K, the resistance of the resistor R56 is 2K, the resistance of the resistor R57 is 2K, the resistance of the resistor R58 is 5.6K, the resistance of the resistor R59 is 5.6K, the capacitance of the capacitor C2 is 10nf, the capacitance of the capacitor C3 is 10nf, the model of the optocoupler U8 is 356T, and the model of the transistor Q1 is S8050;
[0086] In this embodiment, if Figure 4 As shown, the analog quantity acquisition module 6 includes a capacitor C6, a capacitor C7, a resistor R1, a resistor R2, a resistor R3, a resistor R4, an amplifier U1, an amplifier U3 and a linear optocoupler U2;
[0087] One end of the resistor R4 and one end of the resistor R1 are respectively electrically connected to a terminal device that can send analog quantities, the other end of the resistor R1 is respectively electrically connected to the third pin of the linear optocoupler U2, the reverse input end of the amplifier U1 and one end of the capacitor C6, the other end of the capacitor C6 is respectively electrically connected to the output end of the amplifier U1 and one end of the resistor R2, the other end of the resistor R2 is electrically connected to the first pin of the linear optocoupler U2, the second pin of the linear optocoupler U2 is electrically connected to the VCC power supply 5V of the peripheral device, the sixth pin of the linear optocoupler U2 is respectively electrically connected to one end of the resistor R3, one end of the capacitor C7 and the reverse input end of the amplifier U3, the other end of the capacitor C7 is respectively electrically connected to the other end of the resistor R3, the output end of the amplifier U3 and the twenty-ninth pin of the CPU, the other end of the resistor R4, the fourth pin of the linear optocoupler U2, the fifth pin of the linear optocoupler U2, the positive input end of the amplifier U1 and the positive input end of the amplifier U3 are all grounded.
[0088] In this embodiment, the resistance value of resistor R1 is 30K, the resistance value of resistor R2 is 220R, the resistance value of resistor R3 is 30K, the resistance value of resistor R4 is 150R, the capacitance value of capacitor C6 is 10nf, the capacitance value of capacitor C7 is 10nf, the model of amplifier U1 is SGM8041, the model of amplifier U2 is SGM8041, and the model of linear optocoupler is HCNR200.
[0089] In this embodiment, if Figure 5 As shown, the node output module 3 includes a relay K1 and a drive chip U7;
[0090] One end of the control coil of the relay K1 is electrically connected to the output end of the driving chip U7, the other end of the control coil of the relay K1 is externally connected to a 12V power supply, the input end of the driving chip U7 is electrically connected to the thirteenth to sixteenth pins of the CPU, and the switch contact of the relay K1 is arranged on the node output circuit of the peripheral device;
[0091] In this embodiment, the model of the driver chip U7 is ULN2003A, and the model of the relay K1 is 943-1C-12DS.
[0092] The working principle of an edge IoT proxy device provided by the utility model is as follows:
[0093] In the communication module, the data transmission port MCU_TXD_1 of the CPU is respectively connected to the receiver output enable terminal RE and the driver output enable terminal of the low-power half-duplex transceiver U9. The CPU sends high and low levels to control the working state of the transceiver. The peripheral terminal device with RS485 communication protocol is respectively connected to the in-phase terminal A and the reverse phase terminal B of the low-power half-duplex transceiver U9, so that data can be transmitted to the CPU.
[0094] In the switch quantity acquisition module, AN8_1 and AN8_IN are connected to the switch devices to be collected as input contacts. The peripheral VCC power supply 5V passes through a diode D1, then through a resistor R57, and then connected to the device. After the resistor R58 divides the voltage to the ground, a voltage value is formed, which drives the transistor Q1 to turn on, and further drives the optical coupler U8 to turn on. Finally, the collected signal is isolated and output to the CPU through the AN8 terminal;
[0095] In the analog quantity acquisition module, the AD1_IN terminal is connected to the terminal device that can send analog quantities. The 1st and 2nd pins of the linear optocoupler U2 are light sources, and the 3rd, 4th, 5th and 6th pins are two identical photosensitive diodes. When current flows from the 2nd pin to the 1st pin of the linear optocoupler U2, the 3rd and 4th pins of the linear optocoupler U2 will generate a current of I1, and the 5th and 6th pins of the linear optocoupler U2 will also generate the same current I1. Therefore, the voltage at the AD1_IN terminal is I1*30K, and the voltage of AD1 is also I1*30K. The two voltages are the same, so the transmitted signal is also the same. The input signal can eventually be isolated and output to the CPU through the AD1 terminal;
[0096] In the node output module, the output circuit is connected to the relay K1, the output end of the driving chip U7 is connected to the relay K1, and the input end of the driving chip U7 is connected to the CPU. The CPU controls the state of the output end of the driving chip U7 by outputting high and low levels to the input end of the driving chip U7, thereby controlling the working state of the relay K1 and finally realizing the control of the output circuit.
[0097] The above description is only an embodiment of the present invention, and does not limit the patent scope of the present invention. Any equivalent transformations made using the contents of the specification and drawings of the present invention, or directly or indirectly applied in the relevant technical field, are also included in the patent protection scope of the present invention.
Claims
1. An edge IoT proxy device, characterized in that: Including network port, CPU, node output module, communication module, switch quantity acquisition module and analog quantity acquisition module; The number of the node output modules is eight, the number of the communication modules is six, the number of the switch quantity acquisition modules is eight, and the number of the analog quantity acquisition modules is four; The CPU is electrically connected to the network port, the eight node output modules, the six communication modules, the eight switch quantity acquisition modules and the four analog quantity acquisition modules respectively.
2. The edge IoT proxy device according to claim 1, characterized in that: The communication module is an RS485 communication unit, and the RS485 communication unit includes a resistor R60, a resistor R61, a resistor R62, a resistor R63, a resistor R67, a resistor R68, a resistor R69, a resistor R70, a resistor R71, a transistor Q2, an optical coupler U10, an optical coupler U11 and a low-power half-duplex transceiver U9; The first pin of the optical coupler U10 is electrically connected to the VCC power supply of the peripheral device through the resistor R61, the second pin of the optical coupler U10 is electrically connected to the output end RO of the low-power half-duplex transceiver U9 through the resistor R67, the fourth pin of the optical coupler U10 is electrically connected to the data receiving end MCU_RXD_1 of the CPU and one end of the resistor R60 respectively, the other end of the resistor R60 is electrically connected to the VCC power supply of the peripheral device, and the third pin of the optical coupler U10 is grounded; The first pin of the optocoupler U11 is electrically connected to the data sending terminal MCU_TXD_1 of the CPU, the second pin of the optocoupler U11 is grounded through a resistor R70, the third pin of the optocoupler U11 is electrically connected to one end of a resistor R71 and one end of a resistor R69 respectively, the other end of the resistor R71 is grounded, the other end of the resistor R69 is electrically connected to the base of the transistor Q2, the emitter of the transistor Q2 is grounded, the collector of the transistor Q2 is electrically connected to one end of a resistor R63, a receiver output enable terminal RE of a low-power half-duplex transceiver U9 and a driver output enable terminal DE of a low-power half-duplex transceiver U9 respectively, and the other end of the resistor R63 is electrically connected to the VCC power supply of the peripheral; The in-phase terminal A and the inverting terminal B of the low-power half-duplex transceiver U9 are electrically connected to the peripheral terminal device with RS485 communication protocol respectively; the in-phase terminal A of the low-power half-duplex transceiver U9 is electrically connected to the VCC power supply of the peripheral device through resistor R62, and the inverting terminal B of the low-power half-duplex transceiver U9 is grounded through resistor R68.
3. The edge IoT proxy device according to claim 2, characterized in that: The RS485 communication unit also includes a capacitor C4 and a capacitor C5; The power supply terminal VCC of the low power consumption half-duplex transceiver U9 is electrically connected to the VCC power supply of the peripheral device, one end of the capacitor C4 and one end of the capacitor C5 respectively, and the other end of the capacitor C4 and the other end of the capacitor C5 are both grounded.
4. The edge IoT proxy device according to claim 2, characterized in that: The RS485 communication unit also includes a switch S1, a resistor R64, a resistor R65 and a resistor R66; The in-phase end A of the low-power half-duplex transceiver U9 is electrically connected to one end of the resistor R64, the inverting end B of the low-power half-duplex transceiver U9 is electrically connected to one end of the resistor R66, the other end of the resistor R64 and one end of the resistor R65 are respectively electrically connected to the peripheral terminal device with RS485 communication protocol, the other end of the resistor R66 and one end of the switch S1 are respectively electrically connected to the peripheral terminal device with RS485 communication protocol, and the other end of the resistor R65 is electrically connected to the other end of the switch S1.
5. The edge IoT proxy device according to claim 4, characterized in that: The RS485 communication unit also includes a bidirectional TVS diode VP2, a TVS diode VP1 and a TVS diode VP3; The positive electrode of the TVS diode VP1 is grounded, and the negative electrode of the TVS diode VP1 is electrically connected to the other end of the resistor R64 and one end of the bidirectional TVS diode VP2 respectively. The positive electrode of the TVS diode VP3 is grounded, and the negative electrode of the TVS diode VP3 is electrically connected to the other end of the resistor R66 and the other end of the bidirectional TVS diode VP2 respectively.
6. The edge IoT proxy device according to claim 1, characterized in that: The switch quantity acquisition module includes a diode D1, a resistor R55, a resistor R56, a resistor R57, a resistor R58, a resistor R59, a capacitor C2, a capacitor C3, an optical coupler U8 and a transistor Q1; The positive electrode of the diode D1 is electrically connected to the VCC power supply of the peripheral device, the negative electrode of the diode D1 is electrically connected to one end of the resistor R57, the other end of the resistor R57 is electrically connected to one end of the switch device to be collected of the peripheral device, the other end of the switch device to be collected of the peripheral device is electrically connected to one end of the resistor R58, one end of the capacitor C2 and one end of the resistor R56 respectively, the other end of the capacitor C2, the other end of the resistor R58 and the second pin of the optocoupler U8 are all grounded, the other end of the resistor R56 is electrically connected to the base of the transistor Q1, the collector of the transistor Q1 is electrically connected to the VCC power supply of the peripheral device through the resistor R55, the emitter of the transistor Q1 is electrically connected to the first pin of the optocoupler U8, the third pin of the optocoupler U8 is electrically connected to one end of the resistor R59, one end of the capacitor C3 and the twenty-eighth pin of the CPU respectively, the other end of the resistor R59 and the other end of the capacitor C3 are both grounded, and the fourth pin of the optocoupler U8 is electrically connected to the VCC power supply of the peripheral device.
7. The edge IoT proxy device according to claim 1, characterized in that: The analog quantity acquisition module includes a capacitor C6, a capacitor C7, a resistor R1, a resistor R2, a resistor R3, a resistor R4, an amplifier U1, an amplifier U3 and a linear optocoupler U2; One end of the resistor R4 and one end of the resistor R1 are respectively electrically connected to a terminal device that can send analog quantities, the other end of the resistor R1 is respectively electrically connected to the third pin of the linear optocoupler U2, the reverse input end of the amplifier U1 and one end of the capacitor C6, the other end of the capacitor C6 is respectively electrically connected to the output end of the amplifier U1 and one end of the resistor R2, the other end of the resistor R2 is electrically connected to the first pin of the linear optocoupler U2, the second pin of the linear optocoupler U2 is electrically connected to the VCC power supply of the peripheral device, the sixth pin of the linear optocoupler U2 is respectively electrically connected to one end of the resistor R3, one end of the capacitor C7 and the reverse input end of the amplifier U3, the other end of the capacitor C7 is respectively electrically connected to the other end of the resistor R3, the output end of the amplifier U3 and the twenty-ninth pin of the CPU, the other end of the resistor R4, the fourth pin of the linear optocoupler U2, the fifth pin of the linear optocoupler U2, the positive input end of the amplifier U1 and the positive input end of the amplifier U3 are all grounded.
8. The edge IoT proxy device according to claim 1, characterized in that: The node output module includes a relay K1 and a drive chip U7; One end of the control coil of the relay K1 is electrically connected to the output end of the driving chip U7, the other end of the control coil of the relay K1 is externally connected to a 12V power supply, the input end of the driving chip U7 is electrically connected to the thirteenth to sixteenth pins of the CPU, and the switch contacts of the relay K1 are arranged on the node output circuit of the peripheral device.
9. The edge IoT proxy device according to claim 8, characterized in that: The number of the relays K1 is eight, the number of the drive chips U7 is two, and four relays K1 are configured with one drive chip U7.