Full duplex 485 circuit based on AZRS485

Abstract

The utility model provides a full duplex 485 circuit based on AZRS485. A power supply module is arranged in the circuit and is used for supplying power to each module; the RS485TXD signal isolation module is used for isolating the RS485TXD signal to generate an MRS485RXD signal, the RS485RXD signal isolation module is used for isolating the MRS485TXD signal to generate the RS485RXD signal, and the RS485TX signal output module is used for processing the RX signal to generate the RS485TXD signal; the RS485 - RX signal output module is used for processing an RS485 - RXD signal to generate a TX signal, one end of the RS485TXD signal isolation module is electrically connected with one end of the RS485 - TX signal output module, and the other end of the RS485TXD signal isolation module is electrically connected with the single chip microcomputer; one end of the RS485RXD signal isolation module is electrically connected with one end of the RS485RXD signal output module, and the other end of the RS485RXD signal isolation module is electrically connected with the single chip microcomputer; the other end of the RS485 - TX signal output module is electrically connected with an RX signal; and the other end of the RS485 - RX signal output module is electrically connected with a TX signal.

Description

Technical Field

[0001] The present application relates to the technical field of electric meter circuits, and in particular to a full-duplex 485 circuit based on AZRS485. Background Art

[0002] The main purpose of a full-duplex circuit is to achieve two-way data transmission on the same communication link, that is, data can be sent from A to B or from B to A at the same time without interfering with each other. The AZRS485 commonly used in electric meters is a half-duplex chip that cannot send and receive data at the same time, thus limiting the data transmission speed, resulting in low communication efficiency and unable to meet current communication requirements. Utility Model Content

[0003] In order to solve the above technical problems, the present application provides a full-duplex 485 circuit based on AZRS485, including a power module, an RS485_TXD signal isolation module, an RS485_RXD signal isolation module, an RS485_TX signal output module, and an RS485_RX signal output module;

[0004] The power supply module is used to supply power to each module; the RS485_TXD signal isolation module is used to isolate the RS485_TXD signal to generate an M_RS485_RXD signal; the RS485_RXD signal isolation module is used to isolate the M_RS485_TXD signal to generate an RS485_RXD signal; the RS485_TX signal output module is used to process the RX signal to generate an RS485_TXD signal; the RS485_RX signal output module is used to process the RS485_RXD signal to generate a TX signal;

[0005] One end of the power module is electrically connected to the input power supply, and the other end is electrically connected to the power pins of the remaining modules; one end of the RS485_TXD signal isolation module is electrically connected to one end of the RS485_TX signal output module, and the other end is electrically connected to the single-chip computer; one end of the RS485_RXD signal isolation module is electrically connected to one end of the RS485_RX signal output module, and the other end is electrically connected to the single-chip computer; the other end of the RS485_TX signal output module is electrically connected to the RX signal; the other end of the RS485_RX signal output module is electrically connected to the TX signal.

[0006] In some embodiments of the present application, the power module includes capacitors CN1, CN2, CN3, CN4, and an LDO chip UN1; the capacitor CN1 and the capacitor CN2 are connected in parallel, one end of which is electrically connected to the input power supply, and the other end is grounded; the capacitor CN3 and the capacitor CN4 are connected in parallel, one end of which is electrically connected to the output power supply, and the other end is grounded; the Vin pin of the LDO is electrically connected to the input power supply, the GND pin is grounded, and the Vout pin is electrically connected to the output power supply.

[0007] In some embodiments of the present application, the RS485_TXD signal isolation module includes resistors RC1, RC2, RC4, RC5, RC7, capacitors CC2, CC3, transistor QC1, and optocoupler DC1; one end of the resistor RC1 is electrically connected to the M_RS485_RXD signal, and the other end is electrically connected to the collector of the transistor QC1; one end of the capacitor CC2 is electrically connected to the M_RS485_RXD signal, and the other end is grounded; one end of the resistor RC2 is electrically connected to the DVDD signal, and the other end is electrically connected to the collector of the transistor QC1; one end of the resistor RC5 is electrically connected to the base of the transistor QC1 One end of the capacitor CC3 is electrically connected to the base of the transistor QC1, and the other end is electrically connected to the pin 3 of the optocoupler DC1; the emitter of the transistor QC1 is grounded; one end of the resistor RC7 is electrically connected to the pin 3 of the optocoupler DC1, and the other end is grounded; pin 4 of the optocoupler DC1 is electrically connected to the DVDD signal, pin 2 is electrically connected to the RS485_TXD signal, pin 1 is electrically connected to one end of the resistor RC4, and pin 3 is electrically connected to one end of the resistor RC7; one end of the resistor RC4 is connected to pin 1 of DC1, and the other end is electrically connected to the output power supply of the power module.

[0008] In some embodiments of the present application, the RS485_RXD signal isolation module includes resistors RC13, RC10, RC11, RC14, RC16, a capacitor CC5, a transistor QX1 and an optocoupler DC4; one end of the resistor RC13 is electrically connected to the DVDD signal, and the other end is electrically connected to pin 1 of the optocoupler DC4; pin 2 of the optocoupler DC4 is electrically connected to the M_RS485_TXD signal, pin 4 is electrically connected to the output power supply of the power module, and pin 3 is electrically connected to one end of RC14; one end of the resistor RC10 is electrically connected to the output power supply of the power module The other end of the resistor RC11 is electrically connected to the RS485_RXD signal; one end of the resistor RC14 is electrically connected to pin 3 of the optocoupler DC4, and the other end is electrically connected to the base of the transistor QX1; one end of the capacitor CC5 is electrically connected to pin 3 of the optocoupler DC4, and the other end is electrically connected to the base of the transistor QX1; the collector of the transistor QX1 is electrically connected to one end of the resistor RC10, and the emitter is grounded; one end of the resistor RC16 is electrically connected to pin 3 of the optocoupler DC4, and the other end is grounded.

[0009] In some embodiments of the present application, the RS485_TX signal output module includes resistors RC3, RC6, RC8, capacitor CC1, bidirectional TVS tube DC2, and 485 chip UC1; one end of the resistor RC3 is electrically connected to the VCC pin of the 485 chip UC1, and the other end is electrically connected to the A1 pin of the 485 chip; one end of the resistor RC8 is electrically connected to the GND pin of the 485 chip UC1, and the other end is electrically connected to the B1 pin of the 485 chip UC1; one end of the resistor RC6 is grounded, and the other end is electrically connected to pins 2 and 3 of the 485 chip UC1; one end of the capacitor CC1 is electrically connected to the output power supply of the power module, and the other end is grounded; one end of the bidirectional TVS tube DC2 is electrically connected to the A1 pin of the 485 chip, and the other end is electrically connected to the B1 pin of the 485 chip; the RS485_TXD signal is electrically connected to pin 1 of the 485 chip UC1.

[0010] In some embodiments of the present application, the RS485_RX signal output module includes resistors RC9, RC12, RC15, capacitor CC9, bidirectional diode DC3, and 485 chip UC2; one end of the resistor RC9 is electrically connected to one end of the bidirectional diode DC3, and the other end is electrically connected to the VCC pin of the 485 chip UC2; one end of the resistor RC15 is grounded, and the other end is electrically connected to the bidirectional diode DC3; one end of the resistor RC12 is electrically connected to the output power supply of the power module, and the other end is electrically connected to pins 2 and 3 of the 485 chip UC2; the RS485_RXD signal is electrically connected to pin 4 of the 485 chip UC2; one end of the capacitor CC4 is electrically connected to the output power supply of the power module, and the other end is grounded.

[0011] Compared with the prior art, the utility model has the following advantages and beneficial effects: the full-duplex 485 circuit based on AZRS485 of the present application is provided with an RS485_TXD signal isolation module for isolating the RS485_TXD signal to generate an M_RS485_RXD signal, the RS485_RXD signal isolation module is used to isolate the M_RS485_TXD signal to generate an RS485_RXD signal, the RS485_TX signal output module is used to process the RX signal to generate an RS485_TXD signal; the RS485_RX signal output module is used to process the RS485_RXD signal to generate a TX signal, so that the full-duplex function can be realized by two RS485 half-duplex 485 chips, and at the same time, the circuit is simple, the sensitivity is high, and it has strong adaptability and practicality.

[0012] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] The accompanying drawings constituting a part of this document are used to provide a further understanding of this document. The exemplary embodiments and descriptions of this document are used to explain this document and do not constitute an improper limitation on this document. In the accompanying drawings:

[0014] Figure 1 It is a schematic diagram of a full-duplex 485 circuit based on AZRS485 provided by an exemplary embodiment of the present application. DETAILED DESCRIPTION

[0015] In order to make the purpose, technical scheme and advantages of the embodiments of the present application clearer, the technical scheme in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, rather than all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without making creative work are within the scope of protection of the present application. It should be noted that, in the absence of conflict, the embodiments in the present application and the features in the embodiments can be combined with each other arbitrarily.

[0016] The main purpose of a full-duplex circuit is to achieve two-way data transmission on the same communication link, that is, data can be sent from A to B or from B to A at the same time without interfering with each other. The AZRS485 commonly used in electric meters is a half-duplex chip that cannot send and receive data at the same time, thus limiting the data transmission speed, resulting in low communication efficiency and unable to meet current communication requirements.

[0017] Based on this, an exemplary embodiment of the present application provides a full-duplex 485 circuit based on AZRS485, in which an RS485_TXD signal isolation module is provided for isolating the RS485_TXD signal to generate an M_RS485_RXD signal, an RS485_RXD signal isolation module is used to isolate the M_RS485_TXD signal to generate an RS485_RXD signal, and an RS485_TX signal output module is used to process the RX signal to generate an RS485_TXD signal; the RS485_RX signal output module is used to process the RS485_RXD signal to generate a TX signal, so that the full-duplex function can be achieved through two RS485 half-duplex 485 chips. At the same time, the circuit is simple, highly sensitive, and has strong adaptability and practicality.

[0018] An exemplary embodiment of the present application provides a full-duplex 485 circuit based on AZRS485, such as Figure 1As shown, the circuit includes a power module, an RS485_TXD signal isolation module, an RS485_RXD signal isolation module, an RS485_TX signal output module, and an RS485_RX signal output module; wherein the power module is used to supply power to each module; the RS485_TXD signal isolation module is used to isolate the RS485_TXD signal to generate an M_RS485_RXD signal; the RS485_RXD signal isolation module is used to isolate the M_RS485_TXD signal to generate an RS485_RXD signal; the RS485_TX signal output module is used to process the RX signal to generate an RS485_TXD signal; and the RS485_RX signal output module is used to process the RS485_RXD signal to generate a TX signal.

[0019] One end of the power module is electrically connected to the input power supply, and the other end is electrically connected to the power pins of the remaining modules; one end of the RS485_TXD signal isolation module is electrically connected to one end of the RS485_TX signal output module, and the other end is electrically connected to the single-chip computer; one end of the RS485_RXD signal isolation module is electrically connected to one end of the RS485_RX signal output module, and the other end is electrically connected to the single-chip computer; the other end of the RS485_TX signal output module is electrically connected to the RX signal; the other end of the RS485_RX signal output module is electrically connected to the TX signal.

[0020] The power module includes capacitors CN1, CN2, CN3, CN4, and an LDO chip UN1; capacitor CN1 and capacitor CN2 are connected in parallel, one end of which is electrically connected to the input power supply and the other end is grounded; capacitor CN3 and capacitor CN4 are connected in parallel, one end of which is electrically connected to the output power supply and the other end is grounded; the Vin pin of the LDO is electrically connected to the input power supply, the GND pin is grounded, and the Vout pin is electrically connected to the output power supply.

[0021] Capacitors CN1 and CN2 are filter capacitors for the input power supply of the LDO chip UN1. They are mainly used to filter out noise and ripples of the input power supply, provide a relatively clean and stable input voltage for the LDO chip UN1, and reduce the impact of input power supply fluctuations on the stability of the output voltage. Capacitors CN3 and CN4 are filter capacitors for the output power supply of the LDO chip UN1. The most important function of the output capacitor is to act as a part of a low-pass filter. It can store and release energy, locally stabilize the output voltage, eliminate output voltage fluctuations caused by transient load current changes, and provide good load transient response.

[0022] The RS485_TXD signal isolation module includes resistors RC1, RC2, RC4, RC5, RC7, capacitors CC2, CC3, transistor QC1, and optocoupler DC1; one end of the resistor RC1 is electrically connected to the M_RS485_RXD signal, and the other end is electrically connected to the collector of the transistor QC1; one end of the capacitor CC2 is electrically connected to the M_RS485_RXD signal, and the other end is grounded; one end of the resistor RC2 is electrically connected to the DVDD signal, and the other end is electrically connected to the collector of the transistor QC1; one end of the resistor RC5 is electrically connected to the base of the transistor QC1, The other end is electrically connected to pin 3 of optocoupler DC1; one end of capacitor CC3 is electrically connected to the base of transistor QC1, and the other end is electrically connected to pin 3 of optocoupler DC1; the emitter of transistor QC1 is grounded; one end of resistor RC7 is electrically connected to pin 3 of optocoupler DC1, and the other end is grounded; pin 4 of optocoupler DC1 is electrically connected to the DVDD signal, pin 2 is electrically connected to the RS485_TXD signal, pin 1 is electrically connected to one end of resistor RC4, and pin 3 is electrically connected to one end of resistor RC7; one end of resistor RC4 is connected to pin 1 of DC1, and the other end is electrically connected to the output power supply of the power module.

[0023] The RS485_RXD signal isolation module includes resistors RC13, RC10, RC11, RC14, RC16, capacitor CC5, transistor QX1 and optocoupler DC4; one end of the resistor RC13 is electrically connected to the DVDD signal, and the other end is electrically connected to pin 1 of the optocoupler DC4; pin 2 of the optocoupler DC4 is electrically connected to the M_RS485_TXD signal, pin 4 is electrically connected to the output power supply of the power module, and pin 3 is electrically connected to one end of RC14; one end of the resistor RC10 is electrically connected to the output power supply of the power module, and the other end is electrically connected to pin 1 of the optocoupler DC4. One end is electrically connected to one end of resistor RC11; the other end of resistor RC11 is electrically connected to RS485_RXD signal; one end of resistor RC14 is electrically connected to pin 3 of optocoupler DC4, and the other end is electrically connected to the base of transistor QX1; one end of capacitor CC5 is electrically connected to pin 3 of optocoupler DC4, and the other end is electrically connected to the base of transistor QX1; the collector of transistor QX1 is electrically connected to one end of resistor RC10, and the emitter is grounded; one end of resistor RC16 is electrically connected to pin 3 of optocoupler DC4, and the other end is grounded.

[0024] The RS485_TX signal output module includes resistors RC3, RC6, RC8, capacitor CC1, bidirectional TVS tube DC2, and 485 chip UC1; one end of the resistor RC3 is electrically connected to the VCC pin of the 485 chip UC1, and the other end is electrically connected to the A1 pin of the 485 chip; one end of the resistor RC8 is electrically connected to the GND pin of the 485 chip UC1, and the other end is electrically connected to the B1 pin of the 485 chip UC1; one end of the resistor RC6 is grounded, and the other end is electrically connected to pins 2 and 3 of the 485 chip UC1; one end of the capacitor CC1 is electrically connected to the output power supply of the power module, and the other end is grounded; one end of the bidirectional TVS tube DC2 is electrically connected to the A1 pin of the 485 chip, and the other end is electrically connected to the B1 pin of the 485 chip; the RS485_TXD signal is electrically connected to pin 1 of the 485 chip UC1.

[0025] The RS485_RX signal output module includes resistors RC9, RC12, RC15, capacitor CC9, bidirectional diode DC3, and 485 chip UC2; one end of the resistor RC9 is electrically connected to one end of the bidirectional diode DC3, and the other end is electrically connected to the VCC pin of the 485 chip UC2; one end of the resistor RC15 is grounded, and the other end is electrically connected to the bidirectional diode DC3; one end of the resistor RC12 is electrically connected to the output power supply of the power module, and the other end is electrically connected to pins 2 and 3 of the 485 chip UC2; the RS485_RXD signal is electrically connected to pin 4 of the 485 chip UC2; one end of the capacitor CC4 is electrically connected to the output power supply of the power module, and the other end is grounded.

[0026] Bidirectional TVS tube DC2 and bidirectional diode DC3 are both TVS tubes. Their main function in the AB bus system is to protect the circuit from transient overvoltage damage. Outdoor or in harsh environments, the AB bus may be subject to surge voltages caused by lightning strikes or other reasons. At this time, the TVS tube can quickly respond to this overvoltage event and clamp the excessive voltage to a safe level through the avalanche breakdown mechanism to prevent the surge voltage from damaging sensitive electronic components on the AB bus. The TVS tube can also protect the AB bus from electrostatic discharge. Static electricity may be generated by human contact, friction between objects, etc. When the electrostatic energy is instantly released to the AB bus, it will cause a very high transient voltage in the line. The TVS tube can absorb this part of the energy to avoid damage to the bus interface circuit. In the power system, switching operations or electromagnetic interference from nearby electrical appliances may generate transient noise on the AB bus. As an overvoltage protection element, the TVS tube can also effectively suppress these transient noises and maintain the stability of the AB bus signal.

[0027] In an exemplary embodiment, the parameters of each component are as follows:

[0028] RC1 is a chip resistor with a resistance of 100Ω.

[0029] RC2 is a chip resistor with a resistance of 820Ω.

[0030] RC4 is a chip resistor with a resistance of 1.5kΩ.

[0031] RC5 is a chip resistor with a resistance of 100Ω.

[0032] RC6 is a chip resistor with a resistance of 820Ω.

[0033] CC2 is a chip ceramic capacitor with a capacity of 100pF.

[0034] CC3 is a chip ceramic capacitor with a capacity of 220pF.

[0035] QC1 is an NPN transistor with a maximum DC amplification factor of 600.

[0036] DC2 is a photocoupler with a response time of 4uS.

[0037] RC9 is a chip resistor with a resistance of 1KΩ.

[0038] RC10 is a chip resistor with a resistance of 0Ω.

[0039] RC11 is a chip resistor with a resistance of 820Ω.

[0040] RC12 is a chip resistor with a resistance of 100Ω.

[0041] RC14 is a chip resistor with a resistance of 1KΩ.

[0042] CC5 is a chip ceramic capacitor with a capacity of 220pF.

[0043] QX1 is an NPN transistor with a maximum DC amplification factor of 600.

[0044] DC7 is a photocoupler with a response time of 4uS.

[0045] RC3 is a chip resistor with a resistance of 10KΩ.

[0046] RC7 is a chip resistor with a resistance of 10KΩ.

[0047] RC16 is a chip resistor with a resistance of 0Ω.

[0048] CC1 is a chip ceramic capacitor with a capacitance of 100nF.

[0049] DC3 is a transient diode with a switching voltage of 15V.

[0050] UC1 is a 485 communication chip with a maximum data rate of 10Mbps.

[0051] RC8 is a chip resistor with a resistance of 10KΩ.

[0052] RC13 is a chip resistor with a resistance of 10KΩ.

[0053] RC15 is a chip resistor with a resistance of 0Ω.

[0054] CC4 is a chip ceramic capacitor with a capacitance of 100nF.

[0055] DC6 is a transient diode with a switching voltage of 15V.

[0056] UC2 is a 485 communication chip with a maximum data rate of 10Mbps.

[0057] The working principle is as follows: the RO pin of the 485 chip is the receiver output pin, and the / RE pin is the receiver output enable. When / RE is low, the RO output is valid, and when / RE is high, RO is in high impedance state; the DE of the 485 chip is the driver output enable. When DE is high, the driver output is valid, and when DE is low, the output is in high impedance state; DI is the driver input. The 485 chip UC1 is only used as an output signal, and the 485 chip UC2 is only used as an input signal. When data is received on the AB bus, the / RE pin of the 485 chip UC1 is grounded through the resistor RC6. The / RE of the 485 chip UC1 is a receiver, and the output enable is valid. The RO pin of the 485 chip UC1 outputs the signal RS485_TXD, the primary side of the optocoupler DC1 is turned on, and the signal optocoupler 3 pin of the secondary side is turned on and outputs a high level, so that the transistor QC1 is turned on, M_RS485_RXD is pulled low, and the microcontroller receives the data waveform.

[0058] After receiving the waveform, the MCU outputs the waveform through the M_RS485_TXD signal, which is turned on by the optocoupler DC4. After the optocoupler 3 on the secondary side is turned on, it outputs a high level, so that the transistor QX1 is turned on and RS485_RXD is pulled low. Because the DE pin of the 485 chip UC2 is pulled up to 5V by the RC12 resistor, when DE is high, the driver output is valid, so the 485 chip UC2 receives the data waveform.

[0059] In this application, the terms "comprises", "comprising" or any other variations thereof are intended to cover non-exclusive inclusion, so that an article or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such article or device. In the absence of more restrictions, the elements defined by the sentence "comprising..." do not exclude the presence of other identical elements in the article or device comprising the elements.

[0060] Although the preferred embodiments of the present application have been described, those skilled in the art may make other changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications falling within the scope of the present application.

[0061] Obviously, those skilled in the art can make various changes and modifications to the present application without departing from the spirit and scope of the present application. Thus, if these modifications and variations of the present application fall within the scope of the claims of the present application and their equivalents, the intention of the present application also includes these modifications and variations.

Claims

1. A full-duplex 485 circuit based on AZRS485, characterized in that: Including power module, RS485_TXD signal isolation module, RS485_RXD signal isolation module, RS485_TX signal output module, RS485_RX signal output module; The power supply module is used to supply power to each module; the RS485_TXD signal isolation module is used to isolate the RS485_TXD signal to generate an M_RS485_RXD signal; the RS485_RXD signal isolation module is used to isolate the M_RS485_TXD signal to generate an RS485_RXD signal; the RS485_TX signal output module is used to process the RX signal to generate an RS485_TXD signal; the RS485_RX signal output module is used to process the RS485_RXD signal to generate a TX signal; One end of the power module is electrically connected to the input power supply, and the other end is electrically connected to the power pins of the remaining modules; one end of the RS485_TXD signal isolation module is electrically connected to one end of the RS485_TX signal output module, and the other end is electrically connected to the single-chip computer; one end of the RS485_RXD signal isolation module is electrically connected to one end of the RS485_RX signal output module, and the other end is electrically connected to the single-chip computer; the other end of the RS485_TX signal output module is electrically connected to the RX signal; the other end of the RS485_RX signal output module is electrically connected to the TX signal.

2. The full-duplex 485 circuit based on AZRS485 according to claim 1, characterized in that: The power module includes capacitors CN1, CN2, CN3, CN4, and an LDO chip UN1; the capacitor CN1 and the capacitor CN2 are connected in parallel, one end of which is electrically connected to the input power supply and the other end is grounded; the capacitor CN3 and the capacitor CN4 are connected in parallel, one end of which is electrically connected to the output power supply and the other end is grounded; the Vin pin of the LDO is electrically connected to the input power supply, the GND pin is grounded, and the Vout pin is electrically connected to the output power supply.

3. The full-duplex 485 circuit based on AZRS485 according to claim 1, characterized in that: The RS485_TXD signal isolation module includes resistors RC1, RC2, RC4, RC5, RC7, capacitors CC2, CC3, transistor QC1, and optocoupler DC1; one end of the resistor RC1 is electrically connected to the M_RS485_RXD signal, and the other end is electrically connected to the collector of the transistor QC1; one end of the capacitor CC2 is electrically connected to the M_RS485_RXD signal, and the other end is grounded; one end of the resistor RC2 is electrically connected to the DVDD signal, and the other end is electrically connected to the collector of the transistor QC1; the resistor RC5 One end of the capacitor CC3 is electrically connected to the base of the transistor QC1, and the other end is electrically connected to the pin 3 of the optocoupler DC1; one end of the capacitor CC3 is electrically connected to the base of the transistor QC1, and the other end is electrically connected to the pin 3 of the optocoupler DC1; the emitter of the transistor QC1 is grounded; one end of the resistor RC7 is electrically connected to the pin 3 of the optocoupler DC1, and the other end is grounded; the pin 4 of the optocoupler DC1 is electrically connected to the DVDD signal, the pin 2 is electrically connected to the RS485_TXD signal, the pin 1 is electrically connected to one end of the resistor RC4, and the pin 3 is electrically connected to one end of the resistor RC7; One end of the resistor RC4 is connected to pin 1 of DC1, and the other end is electrically connected to the output power of the power module.

4. The full-duplex 485 circuit based on AZRS485 according to claim 1 is characterized in that: The RS485_RXD signal isolation module includes resistors RC13, RC10, RC11, RC14, RC16, a capacitor CC5, a transistor QX1 and an optical coupler DC4; one end of the resistor RC13 is electrically connected to the DVDD signal, and the other end is electrically connected to pin 1 of the optical coupler DC4; pin 2 of the optical coupler DC4 is electrically connected to the M_RS485_TXD signal, pin 4 is electrically connected to the output power supply of the power module, and pin 3 is electrically connected to one end of RC14; one end of the resistor RC10 is electrically connected to the output power supply of the power module, and the other end is electrically connected to pin 1 of the optical coupler DC4. The end is electrically connected to one end of the resistor RC11; the other end of the resistor RC11 is electrically connected to the RS485_RXD signal; one end of the resistor RC14 is electrically connected to pin 3 of the optocoupler DC4, and the other end is electrically connected to the base of the transistor QX1; one end of the capacitor CC5 is electrically connected to pin 3 of the optocoupler DC4, and the other end is electrically connected to the base of the transistor QX1; the collector of the transistor QX1 is electrically connected to one end of the resistor RC10, and the emitter is grounded; one end of the resistor RC16 is electrically connected to pin 3 of the optocoupler DC4, and the other end is grounded.

5. The full-duplex 485 circuit based on AZRS485 according to claim 1 is characterized in that: The RS485_TX signal output module includes resistors RC3, RC6, RC8, capacitor CC1, bidirectional TVS tube DC2, and 485 chip UC1; one end of the resistor RC3 is electrically connected to the VCC pin of the 485 chip UC1, and the other end is electrically connected to the A1 pin of the 485 chip; one end of the resistor RC8 is electrically connected to the GND pin of the 485 chip UC1, and the other end is electrically connected to the B1 pin of the 485 chip UC1; one end of the resistor RC6 is grounded, and the other end is electrically connected to pins 2 and 3 of the 485 chip UC1; one end of the capacitor CC1 is electrically connected to the output power supply of the power module, and the other end is grounded; one end of the bidirectional TVS tube DC2 is electrically connected to the A1 pin of the 485 chip, and the other end is electrically connected to the B1 pin of the 485 chip; the RS485_TXD signal is electrically connected to pin 1 of the 485 chip UC1.

6. The full-duplex 485 circuit based on AZRS485 according to claim 1 is characterized in that: The RS485_RX signal output module includes resistors RC9, RC12, RC15, capacitor CC9, bidirectional diode DC3, and 485 chip UC2; one end of the resistor RC9 is electrically connected to one end of the bidirectional diode DC3, and the other end is electrically connected to the VCC pin of the 485 chip UC2; one end of the resistor RC15 is grounded, and the other end is electrically connected to the bidirectional diode DC3; one end of the resistor RC12 is electrically connected to the output power supply of the power module, and the other end is electrically connected to pins 2 and 3 of the 485 chip UC2; the RS485_RXD signal is electrically connected to pin 4 of the 485 chip UC2; one end of the capacitor CC4 is electrically connected to the output power supply of the power module, and the other end is grounded.

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