Semiconductor packaging structure and heat dissipation device thereof
By setting through silicon holes in the semiconductor package structure, heat is exported to the heat dissipation mechanism, the problem of insufficient structural optimization in the prior art is solved, and efficient heat dissipation and temperature management are achieved.
Patent Information
- Application Number
- CN202420599603.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-03-26
- Publication Date
- 2025-03-07
- Estimated Expiration
- 2034-03-26
AI Technical Summary
In the prior art, when optimizing the system heat dissipation mechanism to reduce the hot spot temperature of semiconductor chips, there is a problem of insufficient structural optimization, which is difficult to meet the chip design needs.
By providing through-silicon holes (TSVs) in the silicon substrate, the heat generated by the heating device is exported to the heat dissipation mechanism, and the through-silicon holes filled with high thermal conductivity copper material accelerate heat conduction, and combine thermal interface materials and heat sinks for heat dissipation.
It effectively reduces the hot spot temperature, improves the overall heat dissipation efficiency of the chip, and meets the temperature margin requirement of chip design.
Smart Images
Figure CN222581158U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of semiconductor packaging, and more specifically, to a semiconductor packaging structure and a heat dissipation device thereof. Background Art
[0002] For high-power transmission chips, the power consumption is very high due to the high frequency of a single device. Due to the high power consumption, a lot of heat is generated in a small area, causing the local temperature of the chip to be too high, commonly known as a "hot spot". Since the thermal conductivity of the chip silicon substrate is not high enough, the heat cannot be dissipated immediately, thus forming these hot spots.
[0003] In response to the above-mentioned hot spot phenomenon, the existing technology usually reduces the temperature of the entire system by optimizing the heat dissipation mechanism of the system, including the heat sink, fan, thermal interface material, etc., so as to provide sufficient temperature margin for the hot spot.
[0004] However, the prior art method of reducing the hot spot temperature by optimizing other structures has the defect that other structures may not be optimized to meet the requirements. Utility Model Content
[0005] The utility model aims to provide a semiconductor packaging structure and a heat dissipation device which utilizes through-silicon vias (TSV) for heat dissipation.
[0006] On the one hand, an embodiment of the present invention provides a semiconductor packaging structure comprising:
[0007] A silicon substrate having a first surface and a second surface opposite to the first surface;
[0008] a heat generating device disposed in the first surface of the silicon substrate; and
[0009] a heat dissipation mechanism, which is disposed on the second surface of the silicon substrate;
[0010] The silicon substrate has a through silicon via (TSV) for conducting heat generated by the heat generating device to the heat dissipation mechanism.
[0011] In some embodiments of the present invention, a plurality of the through silicon vias are dispersedly disposed in the silicon substrate.
[0012] In some embodiments of the present invention, the heat dissipation mechanism includes:
[0013] A thermal interface material, which is disposed on the second surface of the silicon substrate and is thermally connected to the through silicon via;
[0014] A heat sink is disposed on the thermal interface material and is thermally connected to the thermal interface material.
[0015] In some embodiments of the present invention, the through silicon via overlaps with a projection of the heat generating device on the first surface or the second surface of the silicon substrate.
[0016] In some embodiments of the present invention, a lateral dimension of the through silicon via is greater than a lateral dimension of the heat generating device.
[0017] In some embodiments of the present invention, the distance between the through silicon via and the heat generating device is 20 nm-500 nm.
[0018] In some embodiments of the present invention, the semiconductor package structure further includes an insulating layer located below the first surface of the silicon substrate.
[0019] In some embodiments of the present invention, the thermal conductivity of the through silicon via is greater than the thermal conductivity of the silicon substrate and the insulating layer. In some embodiments of the present invention, the through silicon via is filled with copper material.
[0020] In some embodiments of the present invention, the thermal conductivity of the insulating layer is lower than the thermal conductivity of the silicon substrate.
[0021] In some embodiments of the present invention, a wiring structure connected to the heating device is provided in the insulating layer.
[0022] In some implementations of the present invention, the wiring structure includes: a connecting wire and a via connecting the connecting wire to the heating device.
[0023] On the other hand, an embodiment of the present utility model provides a heat dissipation device, for example, the heat dissipation device is a heat dissipation device in a semiconductor packaging structure; wherein the heat dissipation device comprises:
[0024] A silicon substrate having a first surface and a second surface opposite to the first surface, wherein the first surface is suitable for arranging a heating device;
[0025] a heat dissipation mechanism disposed on the second surface of the silicon substrate; and
[0026] A through silicon via (TSV) is disposed in the silicon substrate to conduct heat generated by the heat generating device to the heat dissipation mechanism.
[0027] In some embodiments of the present invention, the heat dissipation mechanism includes:
[0028] A thermal interface material, which is disposed on the second surface of the silicon substrate and is thermally connected to the through silicon via;
[0029] A heat sink is disposed on the thermal interface material and is thermally connected to the thermal interface material.
[0030] In some embodiments of the present invention, the through silicon via overlaps with the projection of the heat generating device on the first surface or the second surface of the silicon substrate.
[0031] In some embodiments of the present invention, a lateral dimension of the through silicon via is greater than a lateral dimension of the heat generating device.
[0032] In some embodiments of the present invention, the distance between the through silicon via and the heat generating device is 20 nm-500 nm.
[0033] In some embodiments of the present invention, the thermal conductivity of the through silicon via is greater than the thermal conductivity of the silicon substrate.
[0034] In some implementations of the present invention, the through silicon via is filled with copper material.
[0035] In some embodiments of the present invention, a plurality of the through silicon vias are dispersedly disposed in the silicon substrate.
[0036] The utility model utilizes the high thermal conductivity of TSV materials (for example, the thermal conductivity of copper is as high as 400W / mK), and by arranging TSV near the heating device, the copper material is used to quickly conduct the heat generated by the heating device to the heat dissipation mechanism, thereby effectively reducing the temperature of the hot spot. Dispersed arrangement of multiple silicon through vias in the silicon substrate can help reduce the overall temperature of the silicon substrate.
[0037] The various aspects, features, advantages, etc. of the embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS
[0038] Figure 1 is a schematic diagram showing a semiconductor package structure according to an exemplary embodiment of the present invention.
[0039] Figure 2 It is shown Figure 1 A schematic diagram of a partial detail of a semiconductor package structure is shown. DETAILED DESCRIPTION
[0040] Herein, exemplary embodiments of the present invention will be described in more detail with reference to the accompanying drawings. It should be understood that the present invention can be embodied in various forms and should not be interpreted as being limited to the exemplary embodiments shown herein.
[0041] The terms used herein are for the purpose of describing specific embodiments, rather than for the purpose of limiting the scope of the utility model. For example, terms such as "top", "bottom", "upper", "lower", "above ... " and "below ... " can be used to refer to the direction in the accompanying drawings as a reference. It should be understood that when an element or feature is referred to as "on another element or layer", "connected to" or "coupled to" another element or layer, it can be directly on another element or feature, connected to or coupled to another element or feature, or one or more intermediate elements or features can be present. In addition, it should also be understood that when an element or feature is referred to as "between" two elements or features, it can be the only element or feature between the two elements or features, or one or more intermediate elements or features can also be present. It should also be understood that "one" is intended to also include plural forms, unless the context clearly indicates that it only represents quantity. The terms "substantially", "about" and similar terms are used as approximate terms rather than as degree terms, and are intended to take into account the inherent changes in measured values or calculated values that will be recognized by those of ordinary skill in the art.
[0042] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the present invention belongs, and should not be interpreted rigidly in their literal sense.
[0043] The inventor of the present utility model has found that the existing heat dissipation structure of the optimization system to solve the hot spot phenomenon existing in the current chip is difficult to meet the design requirements of the chip. To this end, the present utility model proposes a novel packaging structure of a semiconductor packaging structure that exports the chip hot spot temperature to the outside through silicon vias. In some embodiments, the semiconductor packaging structure may include an electronic chip, a photonic chip, etc.
[0044] In an exemplary embodiment, if Figure 1As shown, a semiconductor packaging structure of the utility model at least includes a silicon substrate 103, a heating device 101 disposed on a first surface 103-1 of the silicon substrate 103, and a heat dissipation mechanism disposed on a second surface 103-2 of the silicon substrate 103. The first surface 103-1 is opposite to the second surface 103-2, that is, the first surface 103-1 and the second surface 103-2 are respectively located on opposite sides of the silicon substrate 103. In some embodiments, the heating device 101 includes a device such as a MOS tube formed near the first surface of the silicon substrate. In other embodiments, the heating device 101 includes a power device disposed on the first surface of the silicon substrate. The heat dissipation mechanism includes a thermal interface material (TIM) 105 and a heat sink 106. A through silicon via 104 is disposed in the silicon substrate 103, and the through silicon via 104 conducts the heat generated by the heating device to the heat dissipation mechanism.
[0045] In some embodiments, the through silicon via 104 overlaps with the projection of the heat generating device 101 on the first surface 103-1 or the second surface 103-2 of the silicon substrate. In other words, the through silicon via 104 overlaps with the projection of the heat generating device 101 in a direction perpendicular to the first surface 103-1 or the second surface 103-2.
[0046] like Figure 1 As shown, the thermal interface material 105 is disposed on the second surface 103-2 of the silicon substrate and is thermally connected to the through silicon via, and the heat sink 106 is disposed on the thermal interface material 105 and is thermally connected to the thermal interface material 105. According to such a configuration structure, the heat generated by the heat-generating device 101 is thermally conducted to the thermal interface material 105 through the through silicon via 104, and then dispersedly conducted to the heat sink 106 through the thermal interface material 105. The heat sink is, for example, a heat sink fin, and then the heat on the heat sink fin is taken away by the airflow generated by the fan or the like. In this way, the temperature at the hot spot, i.e., the heat-generating device 101, is effectively reduced. In some embodiments, the thermal conductivity of the through silicon via 104 is greater than the thermal conductivity of the silicon substrate 103. When the heat-generating device 101 generates heat, the heat will seek a heat conduction path with the least heat transfer resistance. Once it encounters a part with higher thermal conductivity, i.e., the through silicon via 104, the heat will be quickly conducted out through the through silicon via 104. Typically, the material of the through silicon via 104 includes copper with high thermal conductivity, with a thermal conductivity of about 400 W / mK, while the thermal conductivity of silicon in the silicon substrate is about 124 W / mK, so the heat generated by the heat generating device 101 in the silicon substrate 103 can be conducted to the outside through the through silicon via 104. In some embodiments, the through silicon via is filled with copper material.
[0047] In some embodiments, Figure 1As shown, the semiconductor packaging structure also includes an insulating layer 102 located below the first surface 103-1 of the silicon substrate. The thermal conductivity of the through silicon via 104 should be greater than the thermal conductivity of the silicon substrate 103 and the insulating layer 102. Since heat will seek a path with the least resistance to heat transfer, in order to absorb heat through the through silicon via 104, the thermal conductivity of the through silicon via 104 should be greater than the thermal conductivity of the surrounding material. In some embodiments, the insulating layer 102 mainly contains silicon dioxide, and its thermal conductivity is generally around 1.4W / mK, which is lower than the thermal conductivity of the silicon substrate 103 and much lower than the thermal conductivity of the through silicon via 104. As a result, the heat generated by the heat generating device 101 will be transferred to the silicon substrate 103, and then absorbed by the through silicon via 104 and transferred to the heat dissipation mechanism, without being accumulated in the insulating layer.
[0048] In some embodiments, a wiring structure connected to the heating device 101 is provided in the insulating layer 102. The heating device 101 is usually a functional device in a semiconductor packaging structure or chip, and needs to transmit signals to other related devices. Therefore, the wiring structure can be used for signal transmission of the heating device 101. Figure 2 As shown, the wiring structure at least includes a connection line 201 and a via 202, and the connection line 201 is connected to the heating device via the via 202. In some embodiments, the connection line 201 is a copper wire, which has good conductive properties and is conducive to electrical signal transmission.
[0049] In some embodiments, Figure 2 As shown, the lateral dimension of the through silicon via 104 is greater than the lateral dimension of the heating device 101. In addition, the through silicon via 104 is as close to the heating device 101 as possible without affecting the performance of the semiconductor package structure, which will significantly reduce the temperature of the heating device 101, thereby reducing the hot spot temperature. Preferably, the distance between the through silicon via and the heating device is 20nm-500nm.
[0050] From the above description, it can be seen that the semiconductor packaging structure according to the utility model has a heat dissipation structure different from that of the prior art. In other words, the embodiment of the utility model provides a heat dissipation device for a semiconductor packaging structure, such as Figure 1 As shown, the semiconductor packaging structure includes a silicon substrate 103 and a heating device 101 located on one surface of the silicon substrate, and the heat dissipation device includes the silicon substrate 103, heat dissipation mechanisms 105, 106 and silicon through vias 104. The heat dissipation mechanism is arranged on the second surface 103-2 of the silicon substrate 103, and the silicon through via is arranged in the silicon substrate 103 to conduct the heat generated by the heating device 101 arranged on the first surface 103-1 of the silicon substrate to the heat dissipation mechanism.
[0051] In some embodiments, the heat dissipation mechanism includes a thermal interface material 105 and a heat sink 106. The thermal interface material 105 is disposed on the second surface 103-2 of the silicon substrate 103 and is thermally connected to the through silicon via 104; the heat sink 106 is disposed on the thermal interface material 105 and is thermally connected to the thermal interface material 105.
[0052] In some embodiments, the through silicon via 104 overlaps with a projection of the heat generating device 101 on the first surface 103 - 1 or the second surface 103 - 2 of the silicon substrate.
[0053] In some embodiments, a lateral dimension of the through silicon via 104 is greater than a lateral dimension of the heat generating device 101 .
[0054] In some embodiments, the thermal conductivity of the through silicon via 104 is greater than the thermal conductivity of the silicon substrate 103. In some embodiments, the through silicon via is filled with copper material.
[0055] In some embodiments, a plurality of through silicon vias 104 are dispersedly disposed in the silicon substrate 103. Although this structure is not shown in the figure, it should be understood that dispersing a plurality of through silicon vias in the silicon substrate can help reduce the overall temperature of the silicon substrate.
[0056] Those skilled in the art should understand that what is disclosed above is merely an example of the present invention and cannot be used to limit the scope of rights for which patent protection is requested. Equivalent changes made based on the examples of the present invention are still within the scope covered by the claims of the present invention.
Claims
1. A semiconductor packaging structure, characterized in that: include: A silicon substrate having a first surface and a second surface opposite to the first surface; A heating device, which is disposed in the first surface of the silicon substrate; as well as a heat dissipation mechanism, which is disposed on the second surface of the silicon substrate; The silicon substrate has a through silicon via for conducting the heat generated by the heat generating device to the heat dissipation mechanism.
2. The semiconductor package structure according to claim 1, wherein: The heat dissipation mechanism comprises: A thermal interface material, which is disposed on the second surface of the silicon substrate and is thermally connected to the through silicon via; A heat sink is disposed on the thermal interface material and is thermally connected to the thermal interface material.
3. The semiconductor package structure according to claim 1, wherein: The through silicon via overlaps with a projection of the heat generating device on the first surface or the second surface of the silicon substrate.
4. The semiconductor package structure according to claim 3, wherein: A lateral dimension of the through silicon via is greater than a lateral dimension of the heat generating device.
5. The semiconductor package structure according to any one of claims 1 to 4, characterized in that: The distance between the through silicon via and the heat generating device is 20nm-500nm.
6. The semiconductor package structure according to any one of claims 1 to 4, characterized in that: Also included is an insulating layer located below the first surface of the silicon substrate.
7. The semiconductor package structure according to claim 6, wherein: The thermal conductivity of the through silicon via is greater than the thermal conductivity of the silicon substrate and the insulating layer.
8. The semiconductor package structure according to claim 7, wherein: The through silicon via is filled with copper material.
9. The semiconductor package structure according to claim 8, wherein: A wiring structure connected to the heating device is provided in the insulating layer.
10. The semiconductor package structure as claimed in claim 1, wherein: A plurality of through silicon vias are dispersedly arranged in the silicon substrate.
11. A heat dissipation device, characterized in that: include: A silicon substrate having a first surface and a second surface opposite to the first surface, wherein the first surface is suitable for arranging a heating device; a heat dissipation mechanism disposed on the second surface of the silicon substrate; and A through silicon via is arranged in the silicon substrate to conduct the heat generated by the heat generating device to the heat dissipation mechanism.
12. The heat dissipation device according to claim 11, characterized in that: The heat dissipation mechanism comprises: A thermal interface material, which is disposed on the second surface of the silicon substrate and is thermally connected to the through silicon via; A heat sink is disposed on the thermal interface material and is thermally connected to the thermal interface material.
13. The heat dissipation device according to claim 11, characterized in that: The through silicon via overlaps with a projection of the heat generating device on the first surface or the second surface of the silicon substrate.
14. The heat dissipation device according to claim 11, characterized in that: A lateral dimension of the through silicon via is greater than a lateral dimension of the heat generating device.
15. The heat dissipation device according to any one of claims 11 to 14, characterized in that: The distance between the through silicon via and the heat generating device is 20nm-500nm.
16. The heat dissipation device according to claim 11, characterized in that: The thermal conductivity of the through silicon via is greater than the thermal conductivity of the silicon substrate.
17. The heat dissipation device according to claim 16, characterized in that: The through silicon via is filled with copper material.
18. The heat dissipation device according to claim 11, characterized in that: A plurality of through silicon vias are dispersedly arranged in the silicon substrate.