Salient point structure and chip

Abstract

The utility model provides a bump structure and a chip. The bump structure comprises a bonding pad, a metal adhesion layer and a bump, the bonding pad is located on the surface of the substrate, the metal adhesion layer is located above the bonding pad, the bump is located on the metal adhesion layer, and at least part of a bonding interface of the metal adhesion layer and the bump is wavy, so that the bump and the metal layer are tightly bonded, the heat resistance and vibration resistance of the bump structure can be improved, and the reliability of the bump structure is improved. The problem that the salient point structure cracks is solved, poor contact caused by the salient point cracks is reduced, the connection resistance and signal loss of the salient point structure are reduced, the connection reliability of the salient point structure is improved, and the reliability and the electrical performance of the chip are improved. The chip comprises a substrate and the bump structure located on the substrate.

Description

Technical Field

[0001] The utility model relates to the technical field of packaging, in particular to a convex point structure and a chip comprising the convex point structure. Background Art

[0002] With the rapid development of the semiconductor industry, the requirements for chip integration are getting higher and higher. Packaging technology is developing towards high density, thinness and miniaturization, and flip chip technology has emerged. Different from the previous chip packaging method, flip chip is interconnected with the substrate through bumps. This technology can make the ratio of chip area to packaging area closer to the ideal 1:1. As the chip is used for a longer time and the use environment becomes more severe, the traditional bump structure is prone to cracks in the bumps due to thermal shock and other effects, thus affecting the reliability of the product. Utility Model Content

[0003] One of the purposes of the utility model is to provide a bump structure and a chip, which can improve the heat resistance and vibration resistance of the bump structure, improve the problem of cracks in the bump structure, reduce the poor contact caused by the bump cracks, reduce the connection resistance and signal loss of the bump structure, improve the connection reliability of the bump structure, and improve the reliability and electrical performance of the chip.

[0004] In order to achieve the above-mentioned purpose, the utility model provides a bump structure, which includes a pad, a metal adhesion layer and a bump, wherein the pad is located on the surface of a substrate, the metal adhesion layer is located above the pad, and the bump is located on the metal adhesion layer, wherein at least a portion of the bonding interface between the metal adhesion layer and the bump is wavy.

[0005] Optionally, a first material layer and a second material layer are formed on the substrate, the first material layer and the second material layer surround the pad, the pad has a through hole, the through hole passes through the first material layer and the second material layer, a portion of the metal adhesion layer is filled in the through hole or the metal adhesion layer is located above the through hole.

[0006] Optionally, the metal adhesion layer fills the through hole and partially protrudes from the through hole, and the bump wraps the portion of the metal adhesion layer protruding from the through hole.

[0007] Optionally, the bump structure is a bump on the surface of the filter chip, the first material layer is a wall layer, and the second material layer is a cover layer; the wall layer has a first window corresponding to the position of the pad, and the first window serves as a part of the through hole; the cover layer has a second window corresponding to the position of the first window, and the second window serves as another part of the through hole; the wall layer also has a third window corresponding to the position of the resonator on the surface of the filter chip, and the cover layer covers the third window and constitutes a cavity required for the operation of the filter chip.

[0008] Optionally, the metal adhesion layer covers the bottom surface and side walls of the through hole and does not completely fill the through hole; the bump is partially filled in the through hole.

[0009] Optionally, the top surface of the portion of the metal adhesion layer covering the bottom surface of the through hole is wavy, or the surfaces of the metal adhesion layer in contact with the bump are both wavy.

[0010] Optionally, the bump structure also includes a bottom metal layer and an intermediate metal layer; the bottom metal layer conformally covers the inner surface of the through hole; the intermediate metal layer is located on the bottom metal layer, a portion of the intermediate metal layer fills the through hole, and another portion protrudes out of the through hole; the metal adhesion layer is located on the intermediate metal layer.

[0011] Optionally, the first material layer is a passivation layer, and the second material layer is a dielectric layer.

[0012] Optionally, a surface of the bump away from the metal adhesion layer is arc-shaped.

[0013] Another aspect of the present invention provides a chip, which includes a substrate and a bump structure located on the substrate.

[0014] In the bump structure and chip provided by the utility model, the bump structure includes a pad, a metal adhesion layer and a bump, the pad is located on the surface of the substrate, the metal adhesion layer is located above the pad, and the bump is located on the metal adhesion layer, wherein at least a portion of the bonding interface between the metal adhesion layer and the bump is wavy, so that the bump and the metal adhesion layer are tightly bonded, which can improve the heat resistance and vibration resistance of the bump structure, improve the problem of cracks in the bump structure, reduce poor contact caused by bump cracks, reduce the connection resistance and signal loss of the bump structure, improve the connection reliability of the bump structure, and improve the reliability and electrical performance of the chip. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figures 1 to 3 Schematic diagrams of bump structures provided in different embodiments of the present invention.

[0016] Figure 4It is a schematic diagram of the structure of a filter chip in one embodiment of the utility model.

[0017] Figure 5 It is a slice diagram of the bump structure in one embodiment of the utility model.

[0018] Explanation of the reference numerals: 100 - substrate; 101 - pad; 102 - bottom metal layer; 103 - wall layer; 104 - cover layer; 105 - metal adhesion layer; 106 - bump; 107 - passivation layer; 108 - dielectric layer; 110 - intermediate metal layer; 111 - through hole; 112 - resonator; 113 - cavity. DETAILED DESCRIPTION

[0019] The inventors have found that as the chip is used for a longer time and in more harsh environments, the traditional bump structure is prone to cracks due to thermal shock and other factors, and the probability of cracks forming between the solder bump and the metal layer in the bump is relatively high, affecting the reliability and electrical performance of the product.

[0020] To this end, in the bump structure and chip provided by the utility model, the bump structure includes a solder pad, a metal adhesion layer and a bump, the solder pad is located on the surface of the substrate, the metal adhesion layer is located above the solder pad, and the bump is located on the metal adhesion layer, wherein at least a portion of the bonding interface between the metal adhesion layer and the bump is wavy, so that the bump and the metal layer are tightly combined, which can improve the heat resistance and vibration resistance of the bump structure, improve the problem of cracks in the bump structure, reduce poor contact caused by bump cracks, reduce the connection resistance and signal loss of the bump structure, improve the connection reliability of the bump structure, and improve the reliability and electrical performance of the chip.

[0021] The bump structure and chip proposed by the utility model are further described in detail below in combination with the accompanying drawings and specific embodiments. According to the following description, the advantages and features of the utility model will be clearer. It should be noted that the accompanying drawings are all in a very simplified form and use non-precise proportions, which are only used to conveniently and clearly assist in explaining the purpose of the embodiments of the utility model.

[0022] As used in the present invention, the singular forms "a", "an", and "the" include plural objects, unless the content clearly indicates otherwise. As used in the present invention, the term "or" is generally used in a sense that includes "and / or", unless the content clearly indicates otherwise. The terms "first", "second", and "third" are used for descriptive purposes only and are not to be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, features defined as "first", "second", and "third" may explicitly or implicitly include one or at least two of the features, unless the content clearly indicates otherwise.

[0023] It should be understood that when an element or layer is referred to as being "on," "adjacent to," or "connected to" another element or layer, it may be directly on, adjacent to, or connected to the other element or layer, or there may be intervening elements or layers. Conversely, when an element is referred to as being "directly on," "directly adjacent to," "directly connected to," or "directly coupled to" another element or layer, there are no intervening elements or layers. Unless otherwise indicated, "upper / upper layer" and / or "lower / lower layer" and the like are merely for ease of description and are not limited to one position or one spatial orientation.

[0024] Figures 1 to 3 Schematic diagram of the bump structure provided by different embodiments of the utility model. Figures 1 to 3 As shown, the bump structure provided in the present application includes a pad 101, a metal adhesion layer 105 and a bump 106, wherein the pad 101 is located on the surface of the substrate 100, the metal adhesion layer 105 is located above the pad 101, and the bump 106 is located on the metal adhesion layer 105, wherein at least a portion of the bonding interface between the metal adhesion layer 105 and the bump 106 is wavy.

[0025] Exemplarily, the material of the bump 106 includes tin, for example, the bump 106 may be a pure tin solder ball or a tin alloy solder ball. Figures 1 to 3 As shown, the bump 106 is directly in contact with the metal adhesion layer 105, and the surface of the bump 106 away from the metal adhesion layer 105 may be arc-shaped. The material of the metal adhesion layer 105 includes copper and / or titanium, but is not limited thereto.

[0026] For example, Figures 1 to 3 As shown, at least a portion of the surface of the metal adhesion layer 105 away from the pad 101 is wavy, so that at least a portion of the bonding interface between the metal adhesion layer 105 and the bump 106 is wavy to improve the bonding force between the bump 106 and the metal adhesion layer 105 .

[0027] refer to Figures 1 to 3 As shown, a first material layer and a second material layer are formed on the substrate 100, the first material layer and the second material layer surround the pad 101, the pad 101 has a through hole 111, the through hole 111 passes through the first material layer and the second material layer, and the bottom surface of the through hole 111 is located on the surface of the pad 101. For example, in some embodiments, Figure 1 and Figure 2 As shown, part of the metal adhesion layer 105 is filled in the through hole 111, that is, the metal adhesion layer 105 adheres to the surface of the pad 101; or, in some embodiments, as Figure 3 As shown, the metal adhesion layer 105 is located above the through hole 111 .

[0028] In one embodiment of the present application, reference Figure 1 As shown, the metal adhesion layer 105 may fill the through hole 111 and partially protrude from the through hole 111, and the bump 106 may wrap the portion of the metal adhesion layer 105 protruding from the through hole 111. Exemplarily, the metal adhesion layer 105 may be a single layer of metal, and the top surface of the single layer of metal may be wavy; the metal adhesion layer 105 may also be a structure of stacking multiple metal layers, wherein the top surface of the top metal layer may be wavy.

[0029] Figure 4 Schematic diagram of the structure of the filter chip in one embodiment of the utility model. Figure 1 and Figure 4 As shown, the bump structure may be a bump on the surface of the filter chip, the first material layer may be a wall layer 103, and the second material layer may be a cover layer 104; the wall layer 103 has a first window corresponding to the position of the pad 101, and the first window serves as a part of the through hole 111, and the cover layer 104 has a second window corresponding to the position of the first window, and the second window serves as another part of the through hole 111. The wall layer 103 may also have a third window corresponding to the position of the resonator 112 on the surface of the filter chip, and the cover layer 104 covers the third window of the wall layer 103 and forms a cavity 113 required for the operation of the filter chip.

[0030] Among them, for the bump structure on the surface of the filter chip, the material of the wall layer 103 and the cover layer 104 can be the same, for example, the material of the wall layer 103 and the cover layer 104 can be epoxy resin dry film, but not limited to this. The substrate 100 can be a silicon substrate, a lithium tantalate substrate, a lithium niobate substrate, etc. The material of the pad 101 can include copper or aluminum, etc. The metal adhesion layer 105 can be formed by an electroplating process, that is, the metal adhesion layer 105 can be an electroplated metal layer, and the material of the metal adhesion layer 105 can include titanium and / or copper, etc. The material of the bump 106 includes tin, which can be a tin-based alloy, and the tin-based alloy can be, for example, a tin-silver alloy or a tin-silver-copper alloy, etc.

[0031] refer to Figure 1 As shown, the through hole 111 can be a through hole that is wide at the top and narrow at the bottom, so that it is easy to fill the through hole 111 to form a bump structure, and the filling quality of the through hole 111 is good, which is conducive to improving the reliability and electrical performance of the bump structure. Exemplarily, the through hole 111 can be formed by superimposing the openings of the wall layer 103 and the cover layer 104. Above the pad 101, the opening width of the wall layer 103 is smaller than the opening width of the cover layer 104, but it is not limited to this. In other embodiments, the through hole 111 can also be a through hole with uniform width.

[0032] Figure 2A bump structure on the chip surface is shown. Figure 2 As shown, the metal adhesion layer 105 can cover the bottom surface and sidewall of the through hole 111 and does not fill the through hole 111. The metal adhesion layer 105 serves as the bottom metal layer of the bump structure and is partially adhered to the pad 101; Figure 2 As shown, the metal adhesion layer 105 can extend from the through hole 111 to cover part of the surface of the second material layer, so that the metal adhesion layer 105 can completely carry the bump 106; the bump 106 is directly arranged on the metal adhesion layer 105, a part of the bump 106 is filled in the through hole 111, and the other part protrudes out of the through hole 111. Exemplarily, the material of the metal adhesion layer 105 includes but is not limited to titanium and / or copper; the material of the bump 106 includes but is not limited to pure tin.

[0033] refer to Figure 2 As shown, in some embodiments, the first material layer can be a passivation layer 107, and the second material layer can be a dielectric layer 108; the passivation layer 107 is formed on the surface of the substrate 100 to prevent the substrate surface from being contaminated and oxidized, the passivation layer 107 at least exposes a portion of the surface of the pad 101, and the material of the passivation layer 107 includes but is not limited to silicon oxide and / or silicon nitride, etc.; the dielectric layer 108 is formed on the passivation layer 107, and the dielectric layer 108 can also cover the side wall of the passivation layer 107 located on the pad 101, the through hole 111 can be defined by the dielectric layer 108, and the material of the dielectric layer 108 can be polyimide (PI), poly(p-phenylene benzobisoxazole) (PBO) and benzocyclobutene (BCB), etc.

[0034] like Figure 2 As shown, the top surface of the portion of the metal adhesion layer 105 covering the bottom surface of the through hole 111 may be wavy, and the upper surface of the portion of the metal adhesion layer 105 covering the side wall of the through hole 111 may be a flat surface. In other embodiments, the surfaces of the metal adhesion layer 105 contacting the bump 106 may both be wavy.

[0035] Figure 3 Another bump structure on the chip surface is shown in FIG. Figure 3 As shown, the bump structure may also include a bottom metal layer 102 and an intermediate metal layer 110; the bottom metal layer 102 conformally covers the inner surface of the through hole 111; the intermediate metal layer 110 is located on the bottom metal layer 102, a portion of the intermediate metal layer 110 fills the through hole 111, and another portion protrudes out of the through hole 111; the metal adhesion layer 105 is located on the intermediate metal layer 110.

[0036] refer to Figure 3As shown, the material of the bottom metal layer 102 includes titanium and / or copper, but is not limited thereto. The intermediate metal layer 110 may be columnar, and the width of the intermediate metal layer 110 may be equal to the width of the through hole 111, but is not limited thereto. The intermediate metal layer 110 may be formed by an electroplating process, and the material of the intermediate metal layer 110 includes but is not limited to copper. The metal adhesion layer 105 is attached to the top of the intermediate metal layer 110, and the material of the metal adhesion layer 105 includes but is not limited to copper.

[0037] like Figure 3 As shown, the bonding interface between the metal adhesion layer 105 and the bump 106 is wavy, so that the bonding force between the metal adhesion layer 105 and the bump 106 can be increased.

[0038] Figure 5 It is a slice diagram of the bump structure in one embodiment of the utility model. It should be noted that, referring to Figure 5 As shown, in the present application, although the wavy part of the bonding interface between the metal adhesion layer 105 and the bump 106 is uneven, the surface is still a smooth surface in terms of microscopic morphology. Exemplarily, the bonding interface between the metal adhesion layer 105 and the bump 106 is wavy and formed by an electroplating process.

[0039] The present application also provides a chip, which includes a substrate 100 and a bump structure located on the substrate 100, and the shape of the bump structure is as described above.

[0040] Exemplarily, the chip may be a flip chip, which is electrically connected to other components such as a circuit board via a bump structure on the surface.

[0041] In the bump structure and chip provided by the utility model, the bump structure includes a pad 101, a metal adhesion layer 105 and a bump 106, the pad 101 is located on the surface of the substrate 100, the metal adhesion layer 105 is located above the pad 101, and the bump 106 is located on the metal adhesion layer 105, wherein at least a portion of the bonding interface between the metal adhesion layer 105 and the bump 106 is wavy, so that the bump 106 and the metal adhesion layer 105 are tightly combined, which can improve the heat resistance and vibration resistance of the bump structure, improve the problem of cracks in the bump structure, reduce poor contact caused by bump cracks, reduce the connection resistance and signal loss of the bump structure, improve the connection reliability of the bump structure, and improve the reliability and electrical performance of the chip.

[0042] It should be noted that "one embodiment" or "some embodiments" mentioned throughout the specification means that the specific components, structures or features described together with the embodiment are included in at least one embodiment. Therefore, the phrases "one embodiment" or "some embodiments" appearing in various places throughout the specification do not necessarily refer to the same embodiment. Moreover, in one or more embodiments, specific components, structures or features can be combined in any suitable manner.

[0043] The above description is only a description of the preferred embodiment of the utility model, and is not any limitation on the scope of rights of the utility model. Any technical personnel in this field can make possible changes and modifications to the technical solution of the utility model by using the methods and technical contents disclosed above without departing from the spirit and scope of the utility model. Therefore, any simple modifications, equivalent changes and modifications made to the above embodiments based on the technical essence of the utility model without departing from the content of the technical solution of the utility model are within the protection scope of the technical solution of the utility model.

Claims

1. A bump structure, applied to a chip, characterized in that: The invention comprises a pad, a metal adhesion layer and a bump, wherein the pad is located on the surface of the substrate, the metal adhesion layer is located above the pad, and the bump is located on the metal adhesion layer, wherein at least a part of the bonding interface between the metal adhesion layer and the bump is wavy.

2. The bump structure according to claim 1, characterized in that: A first material layer and a second material layer are formed on the substrate, the first material layer and the second material layer surround the pad, the pad has a through hole, the through hole penetrates the first material layer and the second material layer, part of the metal adhesion layer is filled in the through hole or the metal adhesion layer is located above the through hole.

3. The bump structure according to claim 2, characterized in that: The metal adhesion layer fills the through hole and partially protrudes from the through hole, and the bump wraps the portion of the metal adhesion layer protruding from the through hole.

4. The bump structure according to claim 3, characterized in that: The bump structure is a bump on the surface of the filter chip, the first material layer is a wall layer, and the second material layer is a cover layer; the wall layer has a first window corresponding to the pad position, and the first window serves as a part of the through hole; the cover layer has a second window corresponding to the first window position, and the second window serves as another part of the through hole; the wall layer also has a third window corresponding to the resonator position on the surface of the filter chip, and the cover layer covers the third window and constitutes a cavity required for the operation of the filter chip.

5. The bump structure according to claim 2, characterized in that: The metal adhesion layer covers the bottom surface and sidewalls of the through hole and does not completely fill the through hole; the bump is partially filled in the through hole.

6. The bump structure according to claim 5, characterized in that: The top surface of the portion of the metal adhesion layer covering the bottom surface of the through hole is wavy, or the surfaces of the metal adhesion layer contacting the bump are both wavy.

7. The bump structure according to claim 2, characterized in that: The bump structure also includes a bottom metal layer and an intermediate metal layer; the bottom metal layer conformally covers the inner surface of the through hole; the intermediate metal layer is located on the bottom metal layer, a part of the intermediate metal layer fills the through hole, and the other part protrudes from the through hole; the metal adhesion layer is located on the intermediate metal layer.

8. The bump structure according to claim 5 or claim 7, characterized in that: The first material layer is a passivation layer, and the second material layer is a dielectric layer.

9. The bump structure according to claim 1, characterized in that: The surface of the bump away from the metal adhesion layer is arc-shaped.

10. A chip, characterized in that: The invention comprises a substrate and a bump structure as claimed in any one of claims 1 to 9 located on the substrate.

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