Electronic package

Abstract

An electronic package includes: a carrier structure; the electronic component is combined with the bearing structure; the heat conduction part is combined with the electronic component; the substrate is provided with a first surface, a second surface and an opening, the first surface is combined with the bearing structure, the second surface is lower than the top surface of the heat conduction part, and a surrounding body is formed around the opening; and the packaging material at least covers the peripheries of the electronic component and the heat conduction part. According to the embodiment of the invention, the packaging adhesive material can be prevented from overflowing to the top surface of the heat conduction piece to reduce the contact area of the packaging adhesive material and the air in the mould pressing process, or overflowing to the top surface of the substrate to shield the contact on the top surface, so that the electronic packaging piece can be prevented from losing efficacy due to poor heat dissipation or poor electrical contact; therefore, the reliability of the electronic package is improved.

Description

Technical Field

[0001] The present application relates to a semiconductor packaging structure, in particular to an electronic packaging component. Background Art

[0002] With the evolution of semiconductor packaging technology, semiconductor devices have developed different packaging types. In order to improve the electrical performance of semiconductor devices while saving packaging space, the industry has developed a package stacking structure (Package on Package, referred to as POP) formed by stacking multiple packages. This package stacking structure can achieve system integration by stacking electronic components with different functions, such as memory, central processing unit, graphics processor, image application processor, etc., and provide heterogeneous integrated system packaging (System in Package, referred to as SiP) characteristics, so it can be applied to various thin and short electronic products.

[0003] Figure 1A and Figure 1B FIG. 1 is a schematic diagram of a conventional electronic package during a molding process, wherein the mold is omitted and not drawn. Figure 1A and Figure 1B As shown, the electronic package 1 includes a chip 10, a first substrate 11, a second substrate 12, a plurality of solder balls 13, and a packaging colloid 14. The first substrate 11 has a circuit layer 111, the second substrate 12 has a circuit layer 121, and the second substrate 12 is combined and electrically connected to the first substrate 11 through the solder balls 13. The chip 10 is arranged on the first substrate 11 in a flip chip manner. The packaging colloid 14 covers the solder balls 13 and the chip 10. In order to provide a heat dissipation path for the chip 10, an opening 122 is provided in the center of the second substrate 12, and a heat sink 15 is provided on the chip 10, and the upper surface of the heat sink 15 is exposed from the opening 122, so that the heat generated by the chip 10 can be conducted to the external environment through the heat sink 15.

[0004] In the process of filling the adhesive material to form the packaging glue 14, the structure of the electronic package 1 needs to cover the upper surface of the heat sink 15 and the second substrate 12 with a release film 16 to prevent the uncured packaging glue 14 from overflowing from the opening 122. However, during the molding process, due to the height difference between the heat sink 15 and the second substrate 12, the release film 16 can only form a close fit with the top surface of the higher one, causing the uncured packaging glue 14 to overflow. If Figure 1AAs shown, if the top surface of the second substrate 12 is higher than the top surface of the heat sink 15, the release film 16 cannot be tightly attached to the heat sink 15, and the uncured encapsulating colloid 14 will overflow to the top surface of the heat sink 15, thereby reducing the contact area between the top surface of the heat sink 15 and the outside air, resulting in poor heat dissipation effect; on the contrary, if Figure 1B As shown, if the top surface of the heat sink 15 is higher than the top surface of the second substrate 12, the uncured encapsulation glue 14 will overflow to the top surface of the second substrate 12, causing the electrical contacts 123 on the top surface of the second substrate 12 to be covered by the glue, resulting in subsequent electrical contact or poor electrical connection problems.

[0005] Therefore, how to overcome the above-mentioned problems of the prior art has become a difficult problem that needs to be overcome urgently in the industry. Utility Model Content

[0006] In view of the various deficiencies of the above-mentioned prior art, the present application provides an electronic package, comprising: a supporting structure; an electronic component, which is combined on the supporting structure; a heat conductive member, which is combined on the electronic component; a substrate, which has a first surface and a second surface opposite to each other, and an opening connecting the first surface and the second surface and exposing the heat conductive member, and the first surface is combined on the supporting structure around the electronic component, and the second surface of the substrate is lower than the top surface of the heat conductive member, and a surrounding body is formed on the second surface around the opening; and a packaging material, which at least covers the electronic component and the surrounding of the heat conductive member, and its top surface is lower than the top surface of the heat conductive member and the top surface of the surrounding body.

[0007] The present application also provides a method for manufacturing an electronic package, comprising: providing an electronic module including a supporting structure, an electronic component, a heat-conducting component and a substrate, wherein the electronic component is combined on the supporting structure, the heat-conducting component is combined on the electronic component, the substrate has a first surface and a second surface opposite to each other, and an opening connecting the first surface and the second surface and exposing the heat-conducting component, and the first surface is combined on the supporting structure around the electronic component, and the second surface of the substrate is lower than the top surface of the heat-conducting component, and an enclosure is formed on the second surface around the opening; a mold set is sealed to the outside of the electronic module and molded to form a packaging material that at least covers the electronic component and the heat-conducting component, and the top surface of the packaging material is lower than the top surface of the heat-conducting component and the top surface of the enclosure; and removing the mold set.

[0008] In the aforementioned electronic packaging component and its manufacturing method, the mold set includes a sealing component which is closely connected to the heat conducting component, the substrate and the top surface of the enclosure.

[0009] In the aforementioned electronic packaging component and its manufacturing method, the sealing component is a release film.

[0010] In the aforementioned electronic packaging component and its manufacturing method, the heat conducting component is a dummy chip.

[0011] In the aforementioned electronic packaging component and its manufacturing method, the heat conducting component is bonded to the electronic element via a bonding layer.

[0012] In the aforementioned electronic package and its manufacturing method, the substrate is combined on the supporting structure through a plurality of conductive elements and is electrically connected to the supporting structure.

[0013] In the aforementioned electronic package and its manufacturing method, the substrate includes a solder mask material and at least one conductive trace and a thickened conductive trace disposed under the solder mask material, and the enclosure is formed by the thickened conductive trace and the solder mask material.

[0014] In the aforementioned electronic package and its manufacturing method, the enclosure is a continuous enclosure.

[0015] In the aforementioned electronic package and its manufacturing method, the enclosure is a discontinuous enclosure.

[0016] As can be seen from the above, the electronic package and its manufacturing method of the present application are designed to make the top surface of the heat-conducting part higher than the upper surface of the substrate, so that the chip-mounting film covering the heat-conducting part and the substrate and the top surface of the heat-conducting part will form a close fit during the molding process, and can avoid the glue used to form the packaging material overflowing to the top surface of the heat-conducting part and reducing the contact area between it and the air; in addition, by forming a surrounding body around the opening of the substrate, the glue overflows to the top surface of the substrate and covers the electrical contacts located on the top surface. Therefore, it can avoid the failure of the electronic package due to poor heat dissipation or poor contact, thereby improving the reliability of the electronic package. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1A and Figure 1B It is a schematic diagram of a conventional electronic package during a molding process.

[0018] FIG. 2A to FIG. 2C It is a cross-sectional schematic diagram of an embodiment of a method for manufacturing an electronic package of the present application.

[0019] Figure 2B-1 , Figure 2B-2 and Figure 2B-3 They are respectively top views of different embodiments of the enclosure of the electronic package of the present application.

[0020] Description of Reference Numerals

[0021] 1,2 Electronic packaging

[0022] 10 Chip

[0023] 11. First substrate

[0024] 111,121 Line layer

[0025] 12. Second substrate

[0026] 123 Electrical contacts

[0027] 13 Solder balls

[0028] 14 Encapsulation colloid

[0029] 15 Heat sink

[0030] 16 Release film

[0031] 2a Electronic Module

[0032] 20 Load-bearing structure

[0033] 21 First circuit layer

[0034] 22 Electrical connection pads

[0035] 30 Electronic components

[0036] 40 Heat Conductor

[0037] 50 substrate

[0038] 50a First surface

[0039] 50b Second surface

[0040] 51,122 Open

[0041] 52 Bounding Volume

[0042] 52m solder mask

[0043] 52a,52a',52a” line segment

[0044] 52b Gap

[0045] 53 Second circuit layer

[0046] 53a Conductive trace

[0047] 53b Thickened conductive traces

[0048] 55 Packaging materials

[0049] 60 Bonding layer

[0050] 70 Conductive element

[0051] M Die Set

[0052] M u Upper mold

[0053] M l Lower mold

[0054] S Closure. DETAILED DESCRIPTION

[0055] The following describes the implementation methods of the present application through specific embodiments. Those skilled in the art can easily understand other advantages and effects of the present application from the contents disclosed in this specification.

[0056] It should be noted that the structures, proportions, sizes, etc. illustrated in the drawings of this specification are only used to match the contents disclosed in the specification for the understanding and reading of those skilled in the art, and are not used to limit the limiting conditions for the implementation of this application, so they have no substantial technical significance. Any structural modification, change in the proportional relationship, or adjustment of the size should still fall within the scope of the technical content disclosed in this application without affecting the effects and purposes that can be achieved by this application. At the same time, the terms such as "on", "first", "second", "one", etc. cited in this specification are only for the convenience of narration, and are not used to limit the scope of the implementation of this application. The change or adjustment of their relative relationship should also be regarded as the scope of the implementation of this application without substantial changes in the technical content.

[0057] FIG. 2A to FIG. 2C It is a schematic diagram of an embodiment of a method for manufacturing an electronic package of the present application.

[0058] like Figure 2A As shown, the first step of the manufacturing method shown in this embodiment is to provide an electronic module 2a. The electronic module 2a includes: a supporting structure 20, an electronic component 30, a heat conducting member 40 and a substrate 50. The supporting structure 20 has at least one first circuit layer 21 formed therein.

[0059] The electronic component 30 is combined on the top surface of the supporting structure 20 and is electrically connected to the first circuit layer 21. The electronic component 30 can be a passive component, such as a resistor, capacitor or inductor, or an active component. In this embodiment, an active semiconductor chip is used as an example.

[0060] The heat conducting member 40 is combined with the top surface of the electronic component 30, so that the heat generated by the electronic component 30 can be transferred to the heat conducting member 40 to assist the electronic component 30 in dissipating heat. In this embodiment, the heat conducting member 40 is a dummy die made of semiconductor material, but the present invention is not limited thereto. Any material and component that can conduct heat and facilitate the electronic component 30 to dissipate heat can be used.

[0061] Preferably, the heat conducting member 40 is bonded to the electronic component 30 via a bonding layer 60. The bonding layer 60 is, for example, a die attach film (DAF), but may also be any other suitable adhesive film or colloid, and this embodiment has no particular limitation thereto.

[0062] The substrate 50 has a first surface 50a and a second surface 50b opposite to each other, and the substrate 50 includes a solder mask material 52m and a plurality of second circuit layers 53 disposed on the surface thereof, and the second circuit layer 53 located on the top side of the substrate 50 includes at least one conductive trace 53a located below the solder mask material 52m and a thickened conductive trace 53b thicker than the conductive trace 53a. The first surface 50a of the substrate 50 is its lower surface, and the second surface 50b is its upper surface, and the substrate 50 is connected to the supporting structure 20 around the electronic component 30 through a plurality of conductive elements 70 with its first surface 50a, and the second circuit layer 53 is electrically connected to part of the electrical connection pads 22 and the first circuit layer 21 in the supporting structure 20 through the conductive elements 70. The conductive elements 70 are, for example, conductive pillars, conductive bumps, etc., and in this embodiment, a plurality of solder balls are used as an example.

[0063] The substrate 50 also has an opening 51 connecting the first surface 50a and the second surface 50b, so that the top surface of the heat-conducting member 40 can be exposed from the opening 51, and the second surface 50b of the substrate 50 is lower than the top surface of the heat-conducting member 40, that is, the top surface of the heat-conducting member 40 is higher than the upper surface of the substrate 50. A surrounding body 52 is formed on the second surface 50b of the substrate 50 corresponding to the periphery of the opening 51. The surrounding body 52 is composed of a thickened conductive trace 53b and the solder mask 52m covering the thickened conductive trace 53b.

[0064] like Figure 2B As shown, a mold set M is then used to seal the electronic module 2a. The mold set M is, for example, composed of an upper mold M u With the lower mold M l The two are sealed together so that the electronic module 2a is in close contact with the inside of the mold set M. Preferably, the mold set M also includes an attached sealing member S, and the sealing member S is in close contact with the top surfaces of the heat conducting member 40, the substrate 50 and the enclosure 52. In this embodiment, the sealing member S is a release film, but it can also be a film or sheet of other suitable materials, and this embodiment has no special limitation on this.

[0065] Then, a material such as a packaging glue is filled into the space between the supporting structure 20, the electronic component 30, the heat conducting member 40, the substrate 50 and the sealing member S in the mold set M to perform a molding process, thereby forming a packaging material 55 around the electronic component 30 and the heat conducting member 40, and the top surface of the packaging material 55 is lower than the top surface of the heat conducting member 40 (the top surface of the heat conducting member 40 may be higher than the top surface of the solder mask material 52m, but not higher than the top surface of the surrounding body 52). At the same time, in the process of filling the packaging glue, due to the limitation of the surrounding body 52, even if the packaging glue is filled so that its top surface is slightly higher than the second surface 50b of the substrate 50, it will not overflow onto the second surface 50b outside the surrounding body 52, that is, the top surface of the formed packaging material 55 is also lower than the top surface of the surrounding body 52. ​​Therefore, if an electrical contact is provided on the second surface 50b of the substrate 50 (not shown in the figure), the electrical contact will not be covered by the packaging glue or the packaging material 55 to cause poor electrical contact or electrical connection in the subsequent process.

[0066] like Figure 2B-1 As shown, the shape of the surrounding body 52 can be a continuous surrounding body that continuously surrounds the opening 51, and it can be a closed ring. Figure 2B-2 As shown, the surrounding body 52 may also be a discontinuous surrounding body formed by four line segments 52a formed on each side around the opening 51, which may be a discontinuous ring, with a gap 52b formed between every two adjacent line segments 52a. Figure 2B-3 As shown, the enclosure 52 is another discontinuous ring formed by a C-shaped line segment 52a' and an inverted C-shaped line segment 52a", and a gap 52b is formed between the line segments 52a' and 52a". Since the encapsulating glue has considerable viscosity, as long as the width of the filling gap 52b is properly controlled, the encapsulating glue can still be effectively restricted even if the enclosure 52 is not a continuous ring, so that it will not overflow during the filling process. Therefore, as long as the encapsulating glue can be effectively restricted so that it does not overflow, this embodiment has no other unnecessary restrictions on the shape of the enclosure 52.

[0067] like Figure 2C As shown, after the packaging material 55 is formed, the entire mold assembly M, including the upper mold M u , lower mold M l The sealing member S is removed, and thus the electronic package 2 shown in this embodiment can be obtained.

[0068] The present embodiment also provides an electronic package 2, comprising: a supporting structure 20; an electronic component 30, which is combined on the top surface of the supporting structure 20; a heat conductive member 40, which is combined on the top surface of the electronic component 30; a substrate 50, which has a first surface 50a and a second surface 50b opposite to each other, and an opening 51 connecting the first surface 50a and the second surface 50b and exposing the heat conductive member 40, and the first surface 50a is combined on the supporting structure 20 around the electronic component 30, and the second surface 50b of the substrate 50 is lower than the top surface of the heat conductive member 40, and a surrounding body 52 is formed on the second surface 50b around the opening 51; and a packaging material 55, which at least covers the periphery of the electronic component 30 and the heat conductive member 40, and the top surface of which is lower than the top surface of the heat conductive member 40 and the top surface of the surrounding body 52. ​​The top surface of the heat conductive member 40 may be higher than the top surface of the solder mask 52m, but not higher than the top surface of the surrounding body 52.

[0069] In some embodiments, the heat conducting member 40 is a dummy chip.

[0070] In some embodiments, the thermal conductive element 40 is bonded to the electronic component 30 via a bonding layer 60 .

[0071] In some embodiments, the substrate 50 is bonded to the supporting structure 20 via a plurality of conductive elements 70 and is electrically connected to the supporting structure 20 .

[0072] In some embodiments, the substrate 50 includes a solder mask material 52m and at least one conductive trace 53a and a thickened conductive trace 53b disposed under the solder mask material 52m, and the enclosure 52 is formed by the thickened conductive trace 53b and the solder mask material 52m.

[0073] In some embodiments, the surrounding body 52 surrounds the opening 51 continuously or in sections.

[0074] In summary, the electronic package and its manufacturing method shown in the present embodiment are designed to make the top surface of the heat-conducting component higher than the upper surface of the substrate arranged on the supporting structure, so that during the molding process, the sealing component / chip-mounting film covering the heat-conducting component and the substrate will definitely be in close contact with the top surface of the heat-conducting component, thereby preventing the packaging glue used to form the packaging material from overflowing to the top surface of the heat-conducting component and reducing the contact area between it and the air; in addition, a surrounding body is formed around the opening of the substrate to prevent the packaging glue from overflowing to the top surface of the substrate and covering the electrical contacts located on its top surface to cause poor electrical contact, thereby preventing the electronic package from failing due to poor heat dissipation or poor contact, thereby improving the reliability of the electronic package.

[0075] The above embodiments are only used to illustrate the principles and effects of the present application, and are not used to limit the present application. Any person skilled in the art may modify the above embodiments without violating the spirit and scope of the present application. Therefore, the scope of protection of the present application should be as listed in the claims.

Claims

1. An electronic package, characterized in that: include: load-bearing structure; an electronic component coupled to the supporting structure; A heat conducting member, which is combined with the electronic component; A substrate having a first surface and a second surface opposite to each other, and an opening connecting the first surface and the second surface and exposing the heat-conducting member, and the first surface is combined with the supporting structure around the electronic component, and the second surface of the substrate is lower than the top surface of the heat-conducting member, and a surrounding body is formed on the second surface around the opening; as well as The packaging material at least covers the electronic component and the periphery of the heat-conducting member, and the top surface of the packaging material is lower than the top surface of the heat-conducting member and the top surface of the surrounding body.

2. The electronic package according to claim 1, wherein: The heat conducting member is a dummy chip.

3. The electronic package according to claim 1, wherein: The heat conducting member is combined on the electronic element through a combining layer.

4. The electronic package according to claim 1, wherein: The substrate is combined on the supporting structure through a plurality of conductive elements and is electrically connected to the supporting structure.

5. The electronic package according to claim 1, wherein: The substrate comprises a solder resist material and at least one conductive trace and a thickened conductive trace arranged under the solder resist material, and the surrounding body is formed by the thickened conductive trace and the solder resist material.

6. The electronic package according to claim 1, wherein: The bounding volume is a continuous bounding volume.

7. The electronic package according to claim 1, wherein: The bounding volume is a discontinuous bounding volume.

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