Packaging bonding pad of high-speed signal electrostatic protector and PCB

Abstract

The utility model relates to the technical field of servers, in particular to a packaging bonding pad of a high-speed signal electrostatic protector and a PCB (printed circuit board), which comprise a bonding pad area, the bonding pad area comprises a long bonding pad strip and a segmented bonding pad strip, the long bonding pad strip is rectangular, and the segmented bonding pad strip is rectangular and has the same length as the long bonding pad strip; long axes of the long bonding wire rod and the segmented bonding wire rod are parallel and two ends are aligned; the segmented bonding wire rod is uniformly divided into three segments, the middle segment is a hollow area, the other two segments are two short bonding wire rods with the same size, and the length of each short bonding wire rod is one third of the length of the long bonding wire rod; the plurality of bonding pad areas are regularly arranged on the PCB, and the plurality of rectangular bonding pad areas are used as packaging bonding pads of the electrostatic protector. The impedance abrupt change at the position of the bonding pad is effectively reduced, the impedance is continuous, signal reflection is reduced, and the signal quality of a high-speed signal is improved.

Description

Technical Field

[0001] The utility model belongs to the technical field of servers, and in particular relates to a packaging pad and a PCB board of a high-speed signal electrostatic protector. Background Art

[0002] In server design, the mainboard and external interfaces of various boards are often designed with electrostatic protectors (ESD devices). For precision integrated circuits (ICs), the large peak voltages and currents associated with ESD may cause serious failures. If there is no ESD protection in the system, the high-voltage ESD shock connected through the interface may cause a large amount of surge current to flow directly into the IC, causing damage. ESD protection devices are components used to prevent electronic equipment from being damaged by electrostatic discharge.

[0003] The ESD protector has two pins, so it is necessary to use two pads to package an ESD protector on the PCB. For example, pads PAD1 and PAD2 are the two pins of the device ESD1 package, and pads PAD3 and PAD4 are the two pins of the device ESD2 package. PAD2 and PAD3 are respectively connected to the two signal lines Dp and Dn of the differential signal on the PCB. The ESD will actually be soldered to the PADs of ESD1 and ESD2 to be fixed to the PCB.

[0004] The pad on the PCB is essentially copper foil, and there will be a dielectric between the metals to form parasitic capacitance. The pad as the surface copper foil will form a capacitive effect with the inner copper foil to form a parasitic capacitance. According to the capacitance formula C=εS / 4πkd, ε is a constant, S is the area facing the capacitor plate, d is the distance between the capacitor plates, and k is the electrostatic force constant. It can be seen from the capacitance formula that the larger the area, the greater the capacitance. The existing technical solution device package PIN foot area is large, which will form a large parasitic capacitance on the package pad, affecting the impedance at this position and causing impedance discontinuity problems. Utility Model Content

[0005] In view of the above-mentioned deficiencies in the prior art, the utility model provides a packaging pad and a PCB board of a high-speed signal electrostatic protector to solve the above-mentioned technical problems.

[0006] In a first aspect, the utility model provides a packaging pad of a high-speed signal electrostatic protector, comprising:

[0007] A pad area, wherein the pad area includes a long pad bar and a segmented pad bar, wherein the long pad bar is a rectangle, and the segmented pad bar is a rectangle with the same length as the long pad bar; the long pad bar is parallel to the long axis of the segmented pad bar and the two ends are aligned;

[0008] The segmented pad bar is evenly divided into three sections, the middle section is a hollowed-out area, and the remaining two sections are two short pad bars of the same size, and the length of the short pad bar is one third of the length of the long pad bar;

[0009] A plurality of pad areas are regularly arranged on the PCB board, and a plurality of rectangular pad areas are used as package pads of the electrostatic protector.

[0010] In an optional embodiment, the length of the long pad strip is 30 mil.

[0011] In an optional embodiment, the width of the long pad strip is 6 mil.

[0012] In an optional embodiment, the segmented pad strip has a length of 30 mil and a width of 5 mil.

[0013] In an optional embodiment, the short pad strip has a length of 10 mil and a width of 5 mil; and the middle section has a length of 10 mil.

[0014] In an optional embodiment, the spacing distance between the long pad bar and the segmented pad bar is 9 mil.

[0015] In an optional embodiment, the first pad area and the second pad area are regularly arranged on the PCB board, and the segmented pad strips of the first pad area are parallel to the segmented pad strips of the second pad area and the two ends are aligned;

[0016] The segmented pad strips in the first pad area are adjacent to the segmented pad strips in the second pad area, and the interval between the segmented pad strips in the first pad area and the segmented pad strips in the second pad area is 10 mil;

[0017] The first pad area is connected to the first pin of the first electrostatic protector, and the second pad area is connected to the second pin of the first electrostatic protector.

[0018] In an optional embodiment, the third pad area and the fourth pad area are regularly arranged on the PCB board, and the segmented pad strips of the third pad area are parallel to the segmented pad strips of the fourth pad area and the two ends are aligned;

[0019] The segmented pad strip in the third pad area is adjacent to the segmented pad strip in the fourth pad area, and the interval between the segmented pad strips belonging to the third pad area and the fourth pad area is 10 mil;

[0020] The third pad area is connected to the first pin of the second electrostatic protector, and the fourth pad area is connected to the second pin of the second electrostatic protector.

[0021] In an optional embodiment, the long pad bar in the second pad area is adjacent to the long pad bar in the third pad area; the high-speed signal line includes a first signal line and a second signal line, the first signal line is connected to the long pad bar in the second pad area, and the second signal line is connected to the long pad bar in the third pad area.

[0022] In a second aspect, the utility model provides a PCB board, comprising:

[0023] It comprises a high-speed signal line and a packaging pad of the high-speed signal electrostatic protector provided in the first aspect.

[0024] The beneficial effect of the utility model is that the packaging pad of the high-speed signal electrostatic protector provided by the utility model can reduce the parasitic capacitance of the pad while meeting the electrostatic protector packaging requirements by reducing the actual copper foil area of ​​the pad. The reduction of parasitic capacitance can improve the impedance of the pad position. By reducing the pad area, the parasitic capacitance of the pad can be effectively reduced, and the low impedance problem caused by the parasitic capacitance of the pad position can be improved, and the impedance mutation at the position can be effectively reduced, so that the impedance is continuous, the generation of signal reflection is reduced, and the signal quality of high-speed signals is improved.

[0025] In addition, the utility model has a reliable design principle, a simple structure and a very broad application prospect. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] In order to more clearly illustrate the technical solutions in the embodiments of the utility model or the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, for ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0027] Figure 1 The figure is a schematic structural diagram of a packaging pad of a high-speed signal electrostatic protector according to an embodiment of the utility model.

[0028] Figure 2 It is another schematic structural diagram of the packaging pad of the high-speed signal electrostatic protector of one embodiment of the utility model.

[0029] Figure 3 This is an impedance simulation diagram of an embodiment of the utility model. DETAILED DESCRIPTION

[0030] In order to enable those skilled in the art to better understand the technical solutions in the present invention, the following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0031] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art of the present invention. The terms used herein in the specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention.

[0032] The existing technical solution has a large device package PIN foot area, which will form a large parasitic capacitance on the package pad, affecting the impedance at this position and causing impedance discontinuity. According to the characteristic impedance formula Z= It can be seen that the larger the parasitic capacitance generated, the smaller the impedance at that location will be. Therefore, the impedance at the pad location will decrease, forming an impedance mutation point. Impedance discontinuity on high-speed links will cause signal reflection. This has a significant impact on signal quality, causing problems such as signal ringing and eye closure. Moreover, the larger the impedance mutation at the impedance discontinuity location, the more serious the signal reflection will be.

[0033] The technical solution to reduce the parasitic capacitance of the pad is to reduce the area of ​​the pad. According to the capacitance calculation formula mentioned above, by reducing the area of ​​the pad, the capacitance effect between the pad and the inner copper foil can be reduced. The reduction of parasitic capacitance can increase the impedance of the pad. Due to the size of the ESD device body, the outer size of the pad cannot be reduced. Therefore, it is necessary to hollow out the inner size of the pad to reduce the pad area.

[0034] Specifically, the packaging pad of the high-speed signal electrostatic protector includes:

[0035] The pad area includes a long pad bar and a segmented pad bar. The long pad bar is a rectangle, and the segmented pad bar is a rectangle with the same length as the long pad bar. The long pad bar is parallel to the long axis of the segmented pad bar and the two ends are aligned. The segmented pad bar is evenly divided into three sections, the middle section is a hollow area, and the remaining two sections are two short pad bars of the same size, and the length of the short pad bar is one third of the length of the long pad bar. Multiple pad areas are regularly arranged on the PCB board, and multiple rectangular pad areas are used as packaging pads for electrostatic protectors.

[0036] In order to further improve the signal quality, the pad area adopts the following dimensions: the length of the long pad bar is 30mil. The width of the long pad bar is 6mil. The length of the segmented pad bar is 30mil and the width is 5mil. The length of the short pad bar is 10mil and the width is 5mil; the length of the middle section is 10mil. The distance between the long pad bar and the segmented pad bar is 9mil. The first pad area and the second pad area are arranged regularly on the PCB board, and the segmented pad bar of the first pad area is parallel to the segmented pad bar of the second pad area and the two ends are aligned; the segmented pad bar of the first pad area is adjacent to the segmented pad bar of the second pad area, and the distance between the segmented pad bars belonging to the first pad area and the second pad area is 10mil; the first pad area is connected to the first pin of the first electrostatic protector, and the second pad area is connected to the second pin of the first electrostatic protector.

[0037] Specifically, Figure 1 As shown, the ESD protector package has 2 pins, which are composed of two parts of pads A and B. Part A consists of three parts, A1, A2, and A3, and part B consists of three parts, B1, B2, and B3. When the device is welded, one pin of the ESD protector pin is overlapped on the three parts of pin A, and the other pin is overlapped on the three parts of pad B. Parts A and B are respectively welded and fixed with the two pins of the device through tin. The size of A1 is consistent with that of B1, which is 6milx30mil, and the size of A2, B2, A3, and B3 is consistent with that of 5milx10mil. The spacing between A1 and A2, A3, B1 and B2, B3 is consistent, and the spacing between A2 and A3 is consistent with that between B2 and B3, which is 10mil. This size is just taken as an example, and it is not limited to this size in reality, and can be adjusted according to actual conditions.

[0038] When encapsulating the electrostatic protector and connecting the high-speed signal line, the first pad area and the second pad area are arranged regularly on the PCB board, the segmented pad strip of the first pad area is parallel to the segmented pad strip of the second pad area and the two ends are aligned; the segmented pad strip of the first pad area is adjacent to the segmented pad strip of the second pad area, and the interval between the segmented pad strips belonging to the first pad area and the second pad area is 10mil; the first pad area is connected to the first pin of the first electrostatic protector, and the second pad area is connected to the second pin of the first electrostatic protector. The third pad area and the fourth pad area are arranged regularly on the PCB board, the segmented pad strip of the third pad area is parallel to the segmented pad strip of the fourth pad area and the two ends are aligned; the segmented pad strip of the third pad area is adjacent to the segmented pad strip of the fourth pad area, and the interval between the segmented pad strips belonging to the third pad area and the fourth pad area is 10mil; the third pad area is connected to the first pin of the second electrostatic protector, and the fourth pad area is connected to the second pin of the second electrostatic protector. The long pad bar in the second pad area is adjacent to the long pad bar in the third pad area; the high-speed signal line includes a first signal line and a second signal line, the first signal line is connected to the long pad bar in the second pad area, and the second signal line is connected to the long pad bar in the third pad area.

[0039] like Figure 2 As shown, the two differential signal lines are connected to the two devices ESD1 and ESD2 respectively, where 1A and 1B are the two-pin PAD of ESD1, and 2A and 2B are the two-pin PAD of ESD2. 1B and 2A are connected to the differential signal respectively. 1A and 2B are connected to GND as the ground pins of the ESD device.

[0040] A PCB board is provided. The PCB board comprises a high-speed signal line. The packaging pad of the electrostatic protector of the high-speed signal line adopts the packaging pad of the high-speed signal electrostatic protector provided by the utility model.

[0041] The impedance test was performed on a PCB board using a rectangular pad and a PCB board using a package pad of a high-speed signal electrostatic protector provided by the utility model. The results are as follows: Figure 3 As shown, compared with the impedance curve Z1 of the original packaging solution, the impedance curve Z2 of the packaging pad of the high-speed signal electrostatic protector provided by the utility model obviously has better impedance continuity performance.

[0042] Although the present invention is described in detail by referring to the accompanying drawings and in combination with the preferred embodiments, the present invention is not limited thereto. Without departing from the spirit and essence of the present invention, a person skilled in the art may make various equivalent modifications or substitutions to the embodiments of the present invention, and these modifications or substitutions shall be within the scope of the present invention. Any person skilled in the art who is familiar with the present technical field may easily think of changes or substitutions within the technical scope disclosed in the present invention, and these shall be within the scope of protection of the present invention.

Claims

1. A packaging pad of a high-speed signal electrostatic protector, characterized in that: include: A pad area, wherein the pad area includes a long pad bar and a segmented pad bar, wherein the long pad bar is a rectangle, and the segmented pad bar is a rectangle with the same length as the long pad bar; the long pad bar is parallel to the long axis of the segmented pad bar and the two ends are aligned; The segmented pad strip is evenly divided into three sections, the middle section is a hollowed-out area, and the remaining two sections are two short pad strips of the same size, and the length of the short pad strip is one third of the length of the long pad strip; A plurality of pad areas are regularly arranged on the PCB board, and a plurality of rectangular pad areas are used as package pads of the electrostatic protector.

2. The packaging pad of the high-speed signal electrostatic protector according to claim 1, characterized in that: The length of the long pad strip is 30 mil.

3. The packaging pad of the high-speed signal electrostatic protector according to claim 2, characterized in that: The width of the long pad strip is 6 mil.

4. The packaging pad of the high-speed signal electrostatic protector according to claim 2, characterized in that: The segmented pad strip has a length of 30 mil and a width of 5 mil.

5. The packaging pad of the high-speed signal electrostatic protector according to claim 4, characterized in that: The length of the short pad strip is 10 mil and the width is 5 mil; the length of the middle section is 10 mil.

6. The packaging pad of the high-speed signal electrostatic protector according to claim 1 or 2, characterized in that: The spacing between the long pad bar and the segmented pad bar is 9 mil.

7. The packaging pad of the high-speed signal electrostatic protector according to claim 1, characterized in that: The first pad area and the second pad area are regularly arranged on the PCB board, and the segmented pad strips of the first pad area are parallel to the segmented pad strips of the second pad area and the two ends are aligned; The segmented pad strips in the first pad area are adjacent to the segmented pad strips in the second pad area, and the interval between the segmented pad strips in the first pad area and the segmented pad strips in the second pad area is 10 mil; The first pad area is connected to the first pin of the first electrostatic protector, and the second pad area is connected to the second pin of the first electrostatic protector.

8. The packaging pad of the high-speed signal electrostatic protector according to claim 7, characterized in that: The third pad area and the fourth pad area are regularly arranged on the PCB board, and the segmented pad strips of the third pad area are parallel to the segmented pad strips of the fourth pad area and the two ends are aligned; The segmented pad strip in the third pad area is adjacent to the segmented pad strip in the fourth pad area, and the interval between the segmented pad strips belonging to the third pad area and the fourth pad area is 10 mil; The third pad area is connected to the first pin of the second electrostatic protector, and the fourth pad area is connected to the second pin of the second electrostatic protector.

9. The packaging pad of the high-speed signal electrostatic protector according to claim 8, characterized in that: The long pad bar in the second pad area is adjacent to the long pad bar in the third pad area; the high-speed signal line includes a first signal line and a second signal line, the first signal line is connected to the long pad bar in the second pad area, and the second signal line is connected to the long pad bar in the third pad area.

10. A PCB board, characterized in that: include: A high-speed signal line and a packaging pad of a high-speed signal electrostatic protector as claimed in any one of claims 1 to 9.

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