Communication circuit and circuit breaker
By designing a communication circuit including a controller, a signal transmitting circuit, a signal receiving circuit and an RS485 chip, the automatic control problem of circuit breaker communication needs is solved, and the accurate data transmission and simplification of the circuit structure are achieved.
Patent Information
- Application Number
- CN202420907118.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-04-28
- Publication Date
- 2025-03-21
- Estimated Expiration
- 2034-04-28
AI Technical Summary
The prior art is difficult to effectively realize the communication needs of circuit breakers, especially in remote monitoring and control, and lacks automated data transmission and reception control.
A communication circuit is designed, including a controller, signal transmission circuit, signal reception circuit, RS485 chip and RS485 interface circuit. The transmission and reception status of the RS485 chip is automatically controlled through the TX signal to realize automatic transmission and reception of data.
The automatic communication of the circuit breaker is realized, ensuring the accuracy of data transmission, simplifying the control process of the RS485 chip, and reducing the complexity of the circuit structure.
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Figure CN222655168U_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the technical field of electronic circuits, and in particular to a communication circuit and a circuit breaker. Background Art
[0002] With the continuous development of the industrial field and the improvement of the level of intelligence, the interconnection between devices has become increasingly important. In modern industrial production, functions such as monitoring, control and remote management are no longer simple options, but have become a prerequisite for ensuring production efficiency, safety and reliability. Therefore, the demand for communication of devices such as circuit breakers has gradually increased.
[0003] As one of the commonly used electrical equipment in industrial production, the communication function of the circuit breaker has become crucial. Through data communication, the circuit breaker can be remotely monitored and controlled, as well as integrated with other equipment or systems. This not only helps to monitor the status and performance of the equipment in real time, and find and solve problems in time, but also adjust and optimize the equipment through remote management functions to improve production efficiency and energy saving. Therefore, how to realize the communication needs of equipment such as circuit breakers has become a problem that needs to be solved urgently. Utility Model Content
[0004] In view of this, the present application provides a communication circuit and a circuit breaker to meet the communication requirements of the circuit breaker and can automatically control the sending and receiving process.
[0005] Specifically, the present application is implemented through the following technical solutions:
[0006] In a first aspect, the present application provides a communication circuit, which includes a controller, a signal sending circuit, a signal receiving circuit, an RS485 chip and an RS485 interface circuit; wherein:
[0007] The controller is connected to the input end of the signal transmission circuit; the controller is used to send a TX signal to the signal transmission circuit; wherein, when the communication circuit is in the data transmission stage, the TX signal is the data to be transmitted, and when the communication circuit is in the data reception stage, the TX signal is a high-level control signal;
[0008] The output end of the signal transmission circuit is respectively connected to the receiver enable pin and the transmitter enable pin of the RS485 chip; the signal transmission circuit is used to generate a target control signal for controlling the transceiver state of the RS485 chip based on the TX signal; wherein, when the TX signal is at a high level, the transceiver state of the RS485 chip is a receiving state, and when the TX signal is at a low level, the transceiver state of the RS485 chip is a sending state;
[0009] The transmitter input pin of the RS485 chip is grounded, the receiver output pin of the RS485 chip is connected to the input end of the signal receiving circuit, and the A pin and the B pin of the RS485 chip are both connected to the RS485 interface circuit; the RS485 chip is used to control its own transceiver state according to the target control signal, and work according to its own transceiver state;
[0010] The output end of the signal receiving circuit is connected to the controller; the signal receiving circuit is used to convert the logic level signal output by the RS485 chip into an RX signal, and transmit the RX signal to the controller.
[0011] A second aspect of the present application provides a circuit breaker, wherein the circuit breaker comprises any one of the communication circuits provided in the first aspect of the present application.
[0012] The communication circuit provided by the present application, through the above-mentioned circuit structure, the control signal of the data to be sent or the high level is sent to the signal transmission circuit as the TX signal, the signal transmission circuit is based on the TX signal, and the target control signal for controlling the transceiver state of the RS485 chip is generated, when the TX signal is high, the transceiver state of the RS485 chip is the receiving state, when the TX signal is low, the transceiver state of the RS485 chip is the sending state, and the transmitter input pin of the RS485 chip is grounded, so that not only the transceiver of the data can be automatically controlled, the data can be correctly transceived, and the communication demand is realized. In addition, using the data to be sent as the TX signal, not only the transceiver state of the RS485 chip can be controlled by the TX signal, but also the process of sending data can be completed by the TX signal. In this way, the control process of the RS485 chip can be simplified and the circuit structure can be simplified under the premise of ensuring that the data transmission is accurate. BRIEF DESCRIPTION OF THE DRAWINGS
[0013] Figure 1 A schematic diagram of a first embodiment of a communication circuit provided in the present application;
[0014] Figure 2 A schematic diagram of a second embodiment of a communication circuit provided in the present application;
[0015] Figure 3 This is a schematic diagram of the third embodiment of the communication circuit provided in this application.
[0016] Description of reference numerals:
[0017] 1: Controller;
[0018] 2: Signal sending circuit;
[0019] 3: RS485 chip;
[0020] 4: RS485 interface circuit;
[0021] 5: Signal receiving circuit;
[0022] R1: first resistor;
[0023] R2: second resistor;
[0024] R3: the third resistor;
[0025] R4: the fourth resistor;
[0026] R5: the fifth resistor;
[0027] R6: the sixth resistor;
[0028] R7: seventh resistor;
[0029] Rs: pull-up resistor;
[0030] Rx: pull-down resistor;
[0031] Q1: the first transistor;
[0032] Q2: the second transistor;
[0033] Q3: The third transistor;
[0034] DC1: first voltage source;
[0035] DC2: Second voltage source. DETAILED DESCRIPTION
[0036] Here, exemplary embodiments are described in detail, and examples thereof are shown in the accompanying drawings. When the following description refers to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The implementations described in the following exemplary embodiments do not represent all implementations consistent with the present application.
[0037] The terms used in this application are only for the purpose of describing specific embodiments and are not intended to limit this application. The singular forms of "a", "said" and "the" used in this application are also intended to include plural forms, unless the context clearly indicates other meanings. It should also be understood that the term "and / or" used in this article refers to and includes any or all possible combinations of one or more associated listed items.
[0038] It should be understood that although the terms first, second, third, etc. may be used in the present application to describe various information, these information should not be limited to these terms. These terms are only used to distinguish the same type of information from each other. For example, without departing from the scope of the present application, the first information may also be referred to as the second information, and similarly, the second information may also be referred to as the first information. Depending on the context, the word "if" as used herein may be interpreted as "at the time of" or "when" or "in response to determining".
[0039] Specific embodiments are given below to introduce the technical solution of the present application in detail.
[0040] Figure 1 This is a schematic diagram of the first embodiment of the communication circuit provided by this application. Please refer to Figure 1 The communication circuit provided in this embodiment includes a controller 1, a signal sending circuit 2, a signal receiving circuit 5, an RS485 chip 3 and an RS485 interface circuit 4; wherein,
[0041] The controller 1 is connected to the input end of the signal sending circuit 2; the controller 1 is used to send a TX signal to the signal sending circuit 2; wherein, when the communication circuit is in the data sending stage, the TX signal is the data to be sent, and when the communication circuit is in the data receiving stage, the TX signal is a high-level control signal;
[0042] The output end of the signal transmission circuit 2 is respectively connected to the receiver enable pin and the transmitter enable pin of the RS485 chip 3; the signal transmission circuit 2 is used to generate a target control signal for controlling the transceiver state of the RS485 chip 3 based on the TX signal; wherein, when the TX signal is at a high level, the transceiver state of the RS485 chip 3 is a receiving state, and when the TX signal is at a low level, the transceiver state of the RS485 chip 3 is a sending state;
[0043] The transmitter input pin of the RS485 chip 3 is grounded, the receiver output pin of the RS485 chip 3 is connected to the input end of the signal receiving circuit 5, and the A pin and the B pin of the RS485 chip 3 are both connected to the RS485 interface circuit 4; the RS485 chip 3 is used to control its own transceiver state according to the target control signal, and works according to its own transceiver state;
[0044] The output end of the signal receiving circuit 5 is connected to the controller 1 ; the signal receiving circuit 5 is used to convert the logic level signal output by the RS485 chip 3 into an RX signal, and transmit the RX signal to the controller 1 .
[0045] Specifically, the controller 1 is the core of communication control and implementation, and completes data exchange by sending and receiving communication signals.
[0046] Specifically, the controller 1 is used to send a TX signal to the signal sending circuit. In specific implementation, when data needs to be sent to an external device, the data to be sent is sent as a TX signal to the signal sending circuit 2. When the data receiving stage arrives, the high-level control signal is sent as a TX signal to the signal sending circuit 2. It should be noted that the control signal is generated by the controller 1, and the control signal is always at a high level, that is, in the data receiving stage, the TX signal is always at a high level.
[0047] It should be noted that, in this embodiment, the data to be sent is sent as a TX signal to the signal sending circuit 2. That is, in the data sending stage, the TX signal is the data to be sent, and its level directly depends on the data to be sent.
[0048] Furthermore, the specific selection of the controller 1 is set according to actual needs, and is not limited in this embodiment. Optionally, in a possible implementation, the controller is any one of a CPU, an MCU, and an FPGA.
[0049] Furthermore, after receiving the TX signal, the signal sending circuit 2 generates a target control signal for controlling the transceiver state of the RS485 chip 3 based on the TX signal.
[0050] Please continue to refer to Figure 1 The RS485 chip 3 is an integrated circuit chip specially used to implement the RS485 communication standard, which usually includes a transmitter and a receiver, and is used for long-distance, high-noise serial data communication in an industrial environment. It should be noted that the RS485 chip 3 can select half-duplex communication according to actual needs to ensure the accuracy and flexibility of data transmission.
[0051] Please continue to refer to Figure 1 , the DE pin of RS485 chip 3 is the transmitter enable pin, The output end of the signal transmission circuit 2 is connected to the transmitter enable pin DE and the receiver enable pin of the RS485 chip 3 respectively. The RS485 chip 3 can be connected to the receiving and sending state through the target control signal.
[0052] It should be noted that when the TX signal is at a high level, the signal sending circuit 2 can generate a target control signal based on the TX signal to control the RS485 chip 3 to enter a receiving state; when the TX signal is at a low level, the signal sending circuit 2 can generate a target control signal based on the TX signal to control the RS485 chip to enter a sending state.
[0053] It can be understood that when the RS485 chip 3 is in the sending state, the transmitter is in the active state and the receiver is in the disabled state. The receiver is in the state where the A pin and the B pin are controlled by the transmitter, that is, the A pin and the B pin are controlled by the transmitter input pin DI, and the receiver output pin RO is in a high impedance state.
[0054] Similarly, when the RS485 chip 3 is in the receiving state, the receiver is in the active state, the transmitter is in the disabled state, the A pin and the B pin are in the high impedance state, the A pin and the B pin are controlled by the RS485 interface circuit 4, and the receiver output pin RO is controlled by the A pin and the B pin.
[0055] For details, please continue to refer to Figure 1 , the RS485 interface circuit 4 includes a pull-up resistor Rs, a pull-down resistor Rx, a 485A serial port and a 485B serial port, and the 485A serial port and the 485B serial port constitute the external interface of the RS485 interface circuit 4; wherein,
[0056] The first end of the pull-up resistor Rs is connected to the first voltage source DC1, and the second end of the pull-up resistor Ds is connected to the A pin and the 485A serial port respectively;
[0057] A first end of the pull-down resistor Rx is grounded, and a second end of the pull-down circuit is respectively connected to the B pin and the 485 serial port.
[0058] Specifically, the specific resistance values of the pull-up resistor Rs and the pull-down resistor Rx are set according to actual needs, and in the present embodiment, they are not limited. Further, the specific voltage value of the first voltage source DC1 is equal to the operating voltage of the RS485 chip. For example, in a possible implementation, the operating voltage of the RS485 chip 3 is equal to 5V, that is, the voltage value of the first voltage source is equal to 5V.
[0059] Combine the following Figure 1 , introduces in detail the implementation principle of communication circuit sending and receiving data:
[0060] (1) Sending data
[0061] Please continue to refer to Figure 1 , the transmitter input pin of RS485 chip 3 is grounded.
[0062] When the data to be sent is at a low level, that is, the TX signal is at a low level, the RS485 chip 3 is in a sending state. At this time, referring to the previous description, the A pin and the B pin of the RS485 chip 3 are controlled by the transmitter input pin DI; further, since the transmitter input pin DI of the RS485 chip 3 is grounded, the A pin and the B pin transmit the low-level data to be sent to the RS485 interface circuit.
[0063] Further, referring to the above description, when the RS485 chip 3 is in the sending state, the receiver output pin RO is in a high impedance state. At this time, the A pin and the B pin transmit the low-level data to be sent to the RS485 interface circuit to complete the data sending process. It can be understood that at this time, the RS485 chip 3 is in the sending state, and the receiver output pin RO is in a high impedance state.
[0064] Further, when data to be sent is a high level, i.e., when the TX signal is a high level, when the RS485 chip 3 is in a receiving state, at this moment, the transmitter is forbidden, and the receiver is active. Referring to the above description, the A pin and the B pin of the RS485 chip 3 are controlled by the RS485 interface circuit. In other words, the A pin and the B pin of the RS485 chip 3 are controlled by the external signal received by the external interface of the RS485 interface circuit and the RS485 interface circuit itself.
[0065] For further information, please refer to Figure 1 In the data transmission stage, since the external device does not send data to the communication circuit, the external interface of the RS485 interface circuit 4 is in a high impedance state. Further, when the A pin and the B pin are controlled by the RS485 interface circuit 4 and the external interface of the RS485 interface circuit 4 is in a high impedance state, the A pin and the B pin are controlled by the RS485 interface circuit 4 itself.
[0066] For further information, please refer to Figure 1 When the external interface is in a high impedance state, the A pin and the B pin are controlled by the RS485 interface circuit 4 itself, the A pin is pulled up to 5V by the pull-up resistor, the B pin is pulled down to ground by the pull-down resistor, and the A pin and the B pin transmit high-level data to be sent to the RS485 interface circuit 4.
[0067] At this time, since the RS485 chip 3 is in the receiving state, the receiver output pin RO is controlled by the A pin and the B pin. When the A pin and the B pin transmit high-level data to be sent to the RS485 interface circuit 4, the receiver output pin RO is at a high level.
[0068] As mentioned above, through such a setting, not only the correct transmission of the data to be sent can be achieved, but also in the data sending stage, no matter the data to be sent is at a high level or a low level, the receiver output pin RO can be placed in a high impedance state or a high level, which can prevent the serial port loopback and effectively prevent the erroneous transmission of data back to the controller 1, thus ensuring the accuracy of data transmission.
[0069] (2) Receiving data
[0070] For details, please continue to refer to Figure 1 In the data receiving stage, the controller 1 sends a high-level control signal as a TX signal to the signal sending circuit 2.
[0071] As mentioned above, when the TX signal is at a high level, the RS485 chip 3 is in a receiving state, at which time the transmitter is in a disabled state and the receiver is in an active state. The A pin and the B pin of the RS485 chip 3 are controlled by the RS485 interface circuit 4.
[0072] For further information, please refer to Figure 1 In the data receiving stage, since the external device sends external data to the communication circuit, that is, the external device sends external data to the communication circuit through the external interface of the RS485 interface circuit 4. At this time, the RS485 chip 3 is in a receiving state, and the external interface of the RS485 interface circuit 4 receives the external data. At this time, when the A pin and the B pin are controlled by the RS485 interface circuit 4 and the external interface of the RS485 interface circuit 4 receives the external data, the A pin and the B pin are controlled by the received external data.
[0073] Correspondingly, referring to the previous description, when the RS485 chip 3 is in the receiving state and the external interface of the RS485 interface circuit 4 receives an external signal, the RS485 chip 3 can convert it into a logic level signal and output the logic level signal to the signal receiving circuit 5 through the receiver output pin RO.
[0074] Further, after the signal receiving circuit 5 receives the logic level signal output by the RS485 chip, it converts it into an RX signal and transmits it to the controller, completing the process of receiving data. For example, in a possible implementation, the signal receiving circuit 5 includes a pull-up resistor, a first end of the pull-up resistor is connected to the receiver output pin RO of the RS485 chip, and the first end of the pull-up resistor constitutes the output end of the signal receiving circuit 5, and the first end of the pull-up resistor is connected to the first voltage source. In this way, through the effect of the pull-up resistor, the logic level signal output by the RS485 chip can be converted into an RX signal and transmitted to the controller.
[0075] The communication circuit provided by the present embodiment, through the above-mentioned circuit structure, sends the data to be sent or the control signal of high level as TX signal to the signal sending circuit, the signal sending circuit generates a target control signal for controlling the transceive state of the RS485 chip based on the TX signal, when the TX signal is high level, the transceive state of the RS485 chip is the receiving state, when the TX signal is low level, the transceive state of the RS485 chip is the sending state, and the transmitter input pin of the RS485 chip is grounded, so that not only the transceiver of data can be automatically controlled, the data can be correctly transceived, and the communication demand can be realized. In addition, using the data to be sent as the TX signal, not only the transceiver state of the RS485 chip can be controlled by the TX signal, but also the process of sending data can be completed by the TX signal. Under the premise of ensuring accurate data transmission, the control process of the RS485 chip can be simplified and the circuit structure can be simplified.
[0076] Optionally, the signal receiving circuit 2 is further used to perform voltage conversion on the RX signal to adapt to the controller 1 when the operating voltages of the RS485 chip 3 and the controller 1 are different.
[0077] Specifically, the RS485 chip 3 and the controller 1 may have different operating voltages, and the function of the signal receiving circuit 5 is to convert the voltage of the RX signal in this case to adapt to the operating voltage of the controller 1. It should be noted that the voltage value of the logic level signal can be converted into different voltage values according to actual conditions.
[0078] Optionally, in a possible implementation, the operating voltage of the controller 1 is any one of 3.3V and 5V, and the operating circuit of the RS485 chip 3 is the remaining one of 3.3V and 5V. For example, in a possible implementation, the operating voltage of the controller 1 is 3.3V, and the operating voltage of the RS485 chip 3 is 5V. At this time, the signal receiving circuit 5 can convert the voltage value of the RX signal from 5V to 3.3V to adapt the controller 1. For another example, in another possible implementation, the operating voltage of the controller 1 is 5V, and the operating voltage of the RS485 chip 3 is 3.3V. At this time, the signal receiving circuit 5 can convert the voltage value of the RX signal from 3.3V to 5V to adapt the controller 1.
[0079] The communication circuit provided in this embodiment can convert the voltage value of the RX signal into a voltage value compatible with the working voltage of the controller through the signal receiving circuit, can be adapted to common controllers, and improves the availability of the communication circuit.
[0080] Figure 2 This is a schematic diagram of the second embodiment of the communication circuit provided by this application. Please refer to Figure 2, the signal sending circuit 2 includes a first resistor R1, a second resistor R2 and a first transistor Q1; wherein,
[0081] The first end of the first resistor R1 is connected to the first voltage source DC1; wherein the voltage value of the first voltage source DC1 is equal to the working voltage of the RS485 chip 3;
[0082] The first end of the second resistor R2 constitutes the input end of the signal sending circuit 2;
[0083] The second end of the second resistor R2 is connected to the base of the first transistor Q1, and the emitter of the first transistor Q1 is grounded;
[0084] The collector of the first transistor Q1 is connected to the second end of the first resistor R1 to form the output end of the signal sending circuit 2 .
[0085] Combine the following Figure 2 , introduces the working principle of the signal transmission circuit 2. Specifically, when the TX signal is at a high level, the first transistor Q1 is turned on, the first voltage source DC1, the first resistor R1, and the branch from the first transistor Q1 to the ground are turned on, and the output end outputs a low-level target control signal. Further, refer to Figure 2 When the output terminal outputs a low-level target control signal, the transmitter enable pin DE receives a low level and the receiver enable pin When a high level is received, the transmitter in RS485 chip 3 is in a disabled state, the receiver is in an active state, and RS485 chip 3 enters a receiving state.
[0086] Similarly, when the TX signal is at a low level, the first transistor Q1 is turned off, the first voltage source DC1, the first resistor R1, and the branch from the first transistor Q1 to the ground are turned off, and the output terminal outputs a high-level target control signal. Figure 3 , when the output terminal outputs a high level target control signal,
[0087] At this time, the transmitter enable pin DE receives a high level and the receiver enable pin When a low level is received, the transmitter in RS485 chip 3 is in the active state, the receiver is in the disabled state, and RS485 chip 3 enters the active state.
[0088] The communication circuit provided in this embodiment provides a specific implementation circuit of a signal sending circuit, which can generate a target control signal based on a TX signal from a controller to control the receiving and sending state of the RS485 chip 3, thereby achieving the purpose of automatically controlling the receiving and sending.
[0089] Figure 3This is a schematic diagram of the third embodiment of the communication circuit provided by this application. Please refer to Figure 3 , the signal receiving circuit 5 includes a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a second transistor Q2 and a third transistor Q3; wherein,
[0090] The first end of the third resistor R3 and the first end of the fourth resistor R4 are connected to form the input end of the signal receiving circuit 5;
[0091] The second end of the third resistor R3 is connected to the first voltage source DC1, and the second end of the fourth resistor R4 is connected to the base of the second transistor Q2;
[0092] The first end of the fifth resistor R5 is connected to the first end of the sixth resistor R6 and then connected to the collector of the second transistor Q2, and the emitter of the second transistor Q2 is connected to the first voltage source DC1;
[0093] The second end of the fifth resistor R5 is connected to the base of the third transistor Q3, and the second end of the sixth resistor R6 is connected to the emitter of the third transistor Q3 and then grounded;
[0094] The first end of the seventh resistor R7 is connected to the second voltage source DC2, and the collector of the third transistor Q3 is connected to the second end of the seventh resistor R7 to form the output end of the signal receiving circuit 5; wherein the voltage value of the second voltage source DC2 is equal to the working voltage of the controller 1.
[0095] Specifically, the working principle of the signal receiving circuit 5 in the data receiving stage is described in detail below by taking the first voltage source DC1 as 5V and the second voltage source DC2 as 3.3V as an example:
[0096] Please refer to Figure 3 When the communication circuit is in the data receiving stage, the control signal is always kept at a high level, and the RS485 chip 3 is in a receiving state. Further, when the receiver output pin RO of the RS485 chip 3 transmits a high-level logic level signal, the second transistor Q2 and the third transistor Q3 are both turned off. At this time, the voltage value of the RX signal is pulled up to 3.3V (i.e., a high level) through the pull-up effect of the seventh resistor R7.
[0097] Similarly, when the receiver output pin RO of the RS485 chip 3 transmits a low-level logic level signal, the second transistor Q2 and the third transistor Q3 are both turned on, and at this time, the RX signal transmitted to the controller 1 is pulled down to a low level.
[0098] The communication circuit provided in this embodiment can not only ensure that the level of the RX signal received by the controller is consistent with the level of the logic level signal output by the receiver output pin RO through the signal receiving circuit, thereby correctly receiving data, but also achieve the purpose of voltage conversion.
[0099] Please refer to Figure 3 In the data sending stage of the communication circuit, refer to the previous description, when the TX signal is at a high level, the RS485 chip 3 enters the receiving state, and the receiver output pin RO is controlled by the A pin and the B pin. The A pin and the B pin transmit a high level to the RS485 interface circuit 4 because the external interface of the RS485 interface circuit 4 is in a high impedance state. At this time, the receiver output pin RO outputs a high level logic level signal. Further, refer to the previous description, when the receiver output pin RO outputs a high level logic level signal, the logic level signal received by the controller is also a high level.
[0100] Similarly, when the TX signal is at a low level, the RS485 chip 3 enters the sending state, and the receiver output pin RO is in a high impedance state. At this time, the second transistor Q2 and the third transistor Q3 in the signal receiving circuit 5 are both cut off, and the output end of the signal receiving circuit 5 is at a high level.
[0101] Referring to the previous description, through such a setting, when the communication circuit is sending data, no matter the data to be sent is at a low level or a high level, the output end of the signal receiving circuit can be in a high level state, thereby avoiding the occurrence of a serial port loop.
[0102] Optionally, the RS485 interface circuit 4 further includes a plurality of voltage-stabilizing diodes, and the plurality of voltage-stabilizing diodes are connected between the 485A serial port and the 485B serial port.
[0103] Specifically, the application of the voltage stabilizing diode in the RS485 interface circuit 4 is mainly to provide overvoltage protection and voltage stabilization functions, protect the RS485 interface circuit 4 from external interference and damage, and improve the reliability and stability of communication.
[0104] The above description is only a preferred embodiment of the present application and is not intended to limit the present application. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present application shall be included in the scope of protection of the present application.
Claims
1. A communication circuit, characterized in that: The communication circuit includes a controller, a signal sending circuit, a signal receiving circuit, an RS485 chip and an RS485 interface circuit; wherein, The controller is connected to the input end of the signal transmission circuit; the controller is used to send a TX signal to the signal transmission circuit; wherein, when the communication circuit is in the data transmission stage, the TX signal is the data to be transmitted, and when the communication circuit is in the data reception stage, the TX signal is a high-level control signal; The output end of the signal transmission circuit is respectively connected to the receiver enable pin and the transmitter enable pin of the RS485 chip; the signal transmission circuit is used to generate a target control signal for controlling the transceiver state of the RS485 chip based on the TX signal; wherein, when the TX signal is at a high level, the transceiver state of the RS485 chip is a receiving state, and when the TX signal is at a low level, the transceiver state of the RS485 chip is a sending state; The transmitter input pin of the RS485 chip is grounded, the receiver output pin of the RS485 chip is connected to the input end of the signal receiving circuit, and the A pin and the B pin of the RS485 chip are both connected to the RS485 interface circuit; the RS485 chip is used to control its own transceiver state according to the target control signal, and work according to its own transceiver state; The output end of the signal receiving circuit is connected to the controller; the signal receiving circuit is used to convert the logic level signal output by the RS485 chip into an RX signal, and transmit the RX signal to the controller.
2. The communication circuit according to claim 1, characterized in that: The signal receiving circuit is further used to perform voltage conversion on the RX signal to adapt to the controller when the operating voltages of the RS485 chip and the controller are different.
3. The communication circuit according to claim 1, characterized in that: The signal sending circuit includes a first resistor, a second resistor and a first transistor; wherein, The first end of the first resistor is connected to a first voltage source; wherein the voltage value of the first voltage source is equal to the operating voltage of the RS485 chip; The first end of the second resistor constitutes an input end of the signal sending circuit; The second end of the second resistor is connected to the base of the first transistor, and the emitter of the first transistor is grounded; The collector of the first transistor is connected to the second end of the first resistor to form the output end of the signal sending circuit.
4. The communication circuit according to claim 3, characterized in that: The signal receiving circuit includes a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, a second transistor and a third transistor; wherein, The first end of the third resistor and the first end of the fourth resistor are connected to form an input end of the signal receiving circuit; The second end of the third resistor is connected to the first voltage source, and the second end of the fourth resistor is connected to the base of the second transistor; The first end of the fifth resistor is connected to the first end of the sixth resistor and then connected to the collector of the second transistor, and the emitter of the second transistor is connected to the first voltage source; The second end of the fifth resistor is connected to the base of the third transistor, and the second end of the sixth resistor is connected to the emitter of the third transistor and then grounded; The first end of the seventh resistor is connected to the second voltage source, and the collector of the third transistor is connected to the second end of the seventh resistor to form the output end of the signal receiving circuit; wherein the voltage value of the second voltage source is equal to the operating voltage of the controller.
5. The communication circuit according to claim 3, characterized in that: The RS485 interface circuit includes a pull-up resistor, a pull-down resistor, a 485A serial port and a 485B serial port, and the 485A serial port and the 485B serial port constitute the external interface of the RS485 interface circuit; wherein, The first end of the pull-up resistor is connected to the first voltage source, and the second end of the pull-up resistor is connected to the A pin and the 485A serial port respectively; The first end of the pull-down resistor is grounded, and the second end of the pull-down resistor is connected to the B pin and the 485B serial port respectively.
6. The communication circuit according to claim 5, characterized in that: The RS485 interface circuit also includes a plurality of voltage-stabilizing diodes, and the plurality of voltage-stabilizing diodes are connected between the 485A serial port and the 485B serial port.
7. The communication circuit according to claim 4, characterized in that: The operating voltage of the controller is any one of 3.3V and 5V, and the working circuit of the RS485 chip is the remaining one of 3.3V and 5V.
8. The communication circuit according to claim 1, characterized in that: The controller is any one of a CPU, an MCU and an FPGA.
9. A circuit breaker, characterized in that: The circuit breaker includes the communication circuit according to any one of claims 1 to 8.
Citation Information
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