Asymmetric copper thickness laminated PCB structure

Abstract

The utility model provides an asymmetric copper thickness laminated PCB structure. The asymmetric copper thickness laminated PCB structure comprises a prepreg; the plurality of copper laminated layers and the plurality of prepregs are alternately attached to each other; wherein the copper laminated layer is divided into a thick copper layer and a thin copper layer according to different thicknesses, and the copper thickness value of the thick copper layer is larger than that of the thin copper layer; the copper laminated layer is divided into a circuit layer and a non-circuit layer according to whether a circuit exists or not, the thick copper layer is the non-circuit layer and is a power supply layer, and the thin copper layer is the circuit layer; the number of the copper laminations is one more than that of the prepregs, and the outermost copper layer in the copper laminations is a thin copper layer; the number of the thick copper layer is one, the copper thickness values of the thin copper layers are equal, and the difference value of the number of the thin copper layers on the two sides of the thick copper layer is one. Therefore, the thick copper layer is a circuit-free layer and a power supply layer, and can give full play to the high conduction and high heat dissipation capabilities of the thick copper layer.

Description

Technical Field

[0001] The present application relates to the field of printed circuit boards, and in particular to an asymmetric copper thick laminated PCB structure. Background Art

[0002] As the requirements for printed circuit boards in communications and other equipment continue to increase, the network speed and data volume will increase, forcing the number of layers and conduction capacity of printed circuit boards to continue to increase. Figure 1 A symmetrical copper thickness stack is presented, which includes eight copper stacks L1, L2, L3, L4, L5, L6, L7, and L8 arranged in sequence. The thickness of each copper stack can be 16um, of which L1, L3, L5, L7, and L8 are line layers, and L2, L4, and L6 are power layers. This symmetrical copper thickness stack cannot fully meet the design requirements of higher conductivity because each layer of copper is equal in thickness and relatively thin. Therefore, the research and development direction points to a more flexible asymmetric copper thickness stack.

[0003] The Chinese utility model patent with the announcement number "CN215581874U" discloses "an asymmetric blind buried via board". The asymmetric blind buried via board is designed with 1 ounce thick copper, yin and yang thick copper (i.e., 0.5 ounce thick copper), daughter board and mother board structure, and the total copper thickness reaches 20 ounces. The heat resistance of high-power electronic products is greatly improved, the product stability is good, and the high heat dissipation and high heat resistance requirements of high-power and high-current products are met.

[0004] For asymmetric copper thickness stacking design, the main goal is to achieve circuit layout with specific functions, while optimizing costs, improving production efficiency and ensuring product reliability. Therefore, there are more detailed and in-depth designs to be developed for asymmetric copper thickness stacking. Utility Model Content

[0005] This application is made in view of the above-mentioned state of the prior art. The purpose of this application is to provide an asymmetric copper thick laminated PCB structure.

[0006] The technical solution adopted by the present application to solve its technical problems includes: an asymmetric copper thick laminate PCB structure, including: a prepreg; a copper laminate, a plurality of the copper laminates and a plurality of the prepregs are alternately laminated with each other; wherein the copper laminate is divided into a thick copper layer and a thin copper layer according to different thicknesses, and the copper thickness value of the thick copper layer is greater than the copper thickness value of the thin copper layer; the copper laminate is divided into a circuit layer and a non-circuit layer according to whether there is a circuit, the thick copper layer is the non-circuit layer and the power supply layer, and the thin copper layer is the circuit layer; the number of the copper laminates is one more than the number of the prepregs, and the outermost layer in the copper laminate is the thin copper layer; the number of the thick copper layer is one, the copper thickness value of each thin copper layer is equal, and the difference in the number of the thin copper layers on both sides of the thick copper layer is one.

[0007] As a further improvement of the present application, the number of copper laminates is even, and the number of prepregs is odd.

[0008] As a further improvement of the present application, the number of copper laminates is six, and the number of prepregs is five.

[0009] As a further improvement of the present application, the copper thickness value of a single thick copper layer is more than twice the copper thickness value of a single thin copper layer.

[0010] As a further improvement of the present application, the copper thickness value range of each copper laminate is from 12 um to 70 um.

[0011] As a further improvement of the present application, the copper thickness value range of the thick copper layer is from 35 um to 39 um, and the copper thickness value range of the thin copper layer is from 14 um to 18 um.

[0012] As a further improvement of the present application, the copper thickness value of the thick copper layer is 37 um, and the line width value of the thick copper layer is 60 um; the copper thickness value of the thin copper layer is 16 um, and the line width value of the thin copper layer is 30 um.

[0013] As a further improvement of the present application, the cross-sectional profiles of the copper wires of the thick copper layer and the thin copper layer are both isosceles trapezoids.

[0014] As a further improvement of the present application, when observed from a perspective perpendicular to the plane where the copper laminate is located, at least a part of the copper laminate is provided with the thick copper layer, and SMT patch components are correspondingly arranged on the thick copper layer; within a unit area, the wiring density of the thick copper layer is greater than that of the thin copper layer.

[0015] As a further improvement of the present application, the thicknesses of the prepregs are equal.

[0016] The beneficial effects of the asymmetric copper thickness laminated PCB structure of the present application include: the copper laminates have different thicknesses, forming an asymmetric design. In this way, according to the actual requirements of the circuit, the copper thickness values of different copper laminates can be flexibly adjusted, as well as the mutual lamination relationship between the thick copper layer and the thin copper layer in the copper laminate, so as to achieve the best electrical performance and thermal stability. Compared with the symmetric design, the asymmetric design of the asymmetric copper thickness laminated PCB structure of the present application can better adapt to the layout of complex circuits, has good heat resistance stability, can meet the high heat dissipation and high heat resistance requirements of high-power and high-current products, and improves the integration and reliability of the circuit board. Compared with the existing asymmetric design, in the asymmetric copper thickness laminated PCB structure of the present application, the thick copper layer is bonded to the prepreg located in the middle layer, and the thick copper layer is a wireless layer and a power layer, which can give full play to its high conduction and high heat dissipation capabilities. The specific principle of the improved heat dissipation performance is that increasing the thickness of the copper laminate can improve its heat dissipation performance, because a thicker copper layer can better conduct heat, which helps to quickly dissipate the heat generated during the operation of the circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the technical solutions in the embodiments, the drawings of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0018] Figure 1 is a schematic diagram of an embodiment of a symmetric copper thickness laminated PCB structure;

[0019] Figure 2 is a schematic diagram of an embodiment of the asymmetric copper thickness laminated PCB structure of the present application;

[0020] Figure 3 is a process flow chart of an embodiment of the asymmetric copper thickness laminated PCB structure of the present application;

[0021] Figure 4 is a wiring comparison diagram of an embodiment of the asymmetric copper thickness laminated PCB structure of the present application and a related symmetric copper design;

[0022] Figure 5 is a power consumption comparison diagram of L4 of an embodiment of the asymmetric copper thickness laminated PCB structure of the present application and a related symmetric copper design.

[0023] DESCRIPTION OF THE REFERENCE NUMERALS

[0024] 1 - copper laminate; 2 - prepreg. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0025] The exemplary embodiments of the present application will be described below with reference to the accompanying drawings. It should be understood that these specific descriptions are only used to teach those skilled in the art how to implement the present application, rather than to exhaust all feasible ways of the present application, nor to limit the scope of the present application.

[0026] Referring to Figure 2 , an embodiment of the present application provides an asymmetric copper thickness laminated PCB structure. The PCB structure includes a plurality of prepregs 2 and copper laminates 1 that are alternately laminated with each other. Among them, the copper laminate 1 is divided into a thick copper layer and a thin copper layer according to different thicknesses, and the copper thickness value of the thick copper layer is greater than that of the thin copper layer; the copper laminate 1 is divided into a circuit layer and a non - circuit layer according to the presence or absence of circuits, the thick copper layer is a non - circuit layer and is a power layer, and the thin copper layer is a circuit layer; the number of copper laminates 1 is one more than the number of prepregs 2, and the thin copper layer is located on the outermost layer of the entire PCB structure; the number of thick copper layers is one, and the copper thickness values of each thin copper layer are equal. The number of thin copper layers on both sides of the thick copper layer is different, and the value obtained by subtracting the number of relatively fewer thin copper layers on one side of the thick copper layer from the number of relatively more thin copper layers on one side of the thick copper layer is one.

[0027] The non - circuit layer is mainly a power layer. When the power layer is thickened, the corresponding current - carrying capacity is improved. The advantages of increasing the copper thickness are as follows: first, it can carry large currents; second, it can reduce thermal strain; third, it can improve the heat dissipation performance. Since the PCB board has a relatively high requirement for carrying large currents, choosing a thicker copper thickness design can better realize the circuit function and improve the current - carrying capacity and stability of the circuit. There will also be no signal interference between the thick copper layer and the thin copper layer of different layers.

[0028] In one embodiment, the number of copper laminates 1 is an even number, and the number of prepregs 2 is an odd number. For example, the number of copper laminates 1 can be six, and the number of prepregs 2 is five.

[0029] Figure 2 The number of layers of the copper laminate 1 and the prepreg 2 is only an example. According to actual production requirements, the total number of layers of the copper laminate 1 can also be twelve layers, ten layers, eight layers, etc. The advantages of reducing the total number of layers of the copper laminate 1 include: first, it can carry large currents; second, it can reduce thermal strain; third, it can improve the heat dissipation performance; fourth, it can reduce production costs.

[0030] To ensure the precise alignment and lamination between the copper laminate 1 and the prepreg 2 of different layers. First, alignment is required. Since the deformation of the PCB board is different due to different copper thicknesses, the alignment methods of the thick copper layer and the thin copper layer are different. Second, lamination is required. As the copper thickness of the thick copper layer increases, the corresponding amount of resin to be filled increases to cope with the risk of resin voids.

[0031] In one embodiment, the copper thickness value range of the thick copper layer is from 30 um to 70 um.

[0032] In one embodiment, the copper thickness value of the thick copper layer is greater than twice the copper thickness value of a single thin copper layer. The range of each copper thickness value of the copper stack 1 can be from 12 um to 70 um.

[0033] In one embodiment, the copper thickness value range of the thick copper layer is from 35 um to 39 um, and the copper thickness value range of the thin copper layer is from 14 um to 18 um. As Figure 4 shown, the copper thickness value of the thick copper layer can be 37 um, and the line width value of the thick copper layer is 60 um; the copper thickness value of the thin copper layer can be 16 um, and the line width value of the thin copper layer is 30 um. The line width values of the thick copper layer and the thin copper layer are for illustrative purposes. The technical connotation they embody is that the number of power layers is reduced and combined into one layer, corresponding to an increase in the copper thickness value of this layer, thereby reducing the total number of layers of the copper stack 1, and then also reducing some power layers or ground layers (also known as: grounding layer, GND layer) in the circuit layer, achieving an increase in circuit density.

[0034] As Figure 4 、 Figure 5 shown, in one embodiment, the cross-sectional profiles of the copper wires of the thick copper layer and the thin copper layer can both be isosceles trapezoids. As Figure 5 shown, if the line width values of the thick copper layer and the thin copper layer are equal, the wire arrangement density of the thick copper layer and the thin copper layer in the PCB board is the same, but the cross-sectional area of the thick copper layer must be greater than that of the thin copper layer. As Figure 4 shown, if the line width value of the thick copper layer is less than that of the thin copper layer, the wire arrangement density of the thick copper layer in the PCB board must be greater than that of the thin copper layer in the PCB board. Moreover, when the line width value of the thick copper layer and the thin copper layer is not too different, the thick copper layer can take into account both the advantages of a large cross-sectional area and a high wire arrangement density in the PCB board.

[0035] As Figure 2 shown, an embodiment of the asymmetric copper thickness stacked PCB structure of the present application can include six copper stacks 1, namely L1, L2, L3, L4, L5, and L6 arranged in sequence, where L1, L2, L3, L5, and L6 are thin copper layers and are circuit layers, and the copper thickness of each is 16 um, while L4 is a thick copper layer and is a power layer. In one example, the copper thickness range of L4 can be from 30 um to 70 um.

[0036] As Figure 4The comparison diagram shown. In the comparative example, the copper thickness value of (usually) L4 is 16 μm, but in this embodiment, the copper thickness value of L4 is changed to 37 μm. Without changing L3 and L5, the density that can be arranged for L4 with a copper thickness value of 37 μm is significantly higher. Specifically, in a non-limiting example, in the symmetric copper stack wiring design, the line width of the L3 copper layer and the L5 copper layer is 60 μm and the copper thickness value is 16 μm, while the line width of the L4 copper layer is 100 μm and the copper thickness value is 16 μm. In the asymmetric copper stack wiring design, the line width of the L3 copper layer and the L5 copper layer is 30 μm and the copper thickness value is 16 μm, while the line width of the L4 copper layer is 60 μm and the copper thickness value is 37 μm. By comparing Figure 4 the distribution of the single-layer line width, since the copper thickness increases and the wiring width can be reduced, the wiring density can be increased.

[0037] To specifically illustrate the power consumption advantage brought by the thick copper layer, as Figure 5 shown in the comparison diagram, let the upper base length of the trapezoid of the power supply layer cross-section be B, and the lower base length be C. Among them, the height of the symmetric copper design in the comparative example is A, and the height of the asymmetric copper design in the embodiment is A + a.

[0038] According to the DC resistance formula where R is the resistance, ρ is the resistivity, L is the wire length, and S is the wire cross-sectional area. The actual resistance of the symmetric copper design in the comparative example while the actual resistance of the asymmetric copper design in the embodiment

[0039] According to the power consumption formula W = I 2 Rt, where W is the power consumption heat generation, I is the current, R is the resistance, and t is the time. The actual power consumption of the symmetric copper design in the comparative example while the actual resistance of the asymmetric copper design in the embodiment

[0040] Finally, the obtained power consumption ratio is indicating that the power consumption is directly related to the copper thickness, and the power consumption of the embodiment is small.

[0041] To further illustrate the relationship between different copper thicknesses and power consumption in the thick copper layer, five different copper thickness values as shown in the following table are now taken. Among them, variables such as copper resistivity, wire length, top line width, bottom line width, current, and time are controlled, and the five copper thickness values are different, and then the copper cross-sectional area, resistance, and power consumption are all different. The final results are also shown in the following table:

[0042]

[0043] As Figure 5As shown, after adopting the asymmetric copper thickness laminated PCB structure of the present application, it is set that the resistance of the thick copper layer becomes smaller than that of the thin copper, and the power consumption is lower under the same current and time. Similarly, the lower the power consumption, the better the heat dissipation performance.

[0044] In one embodiment, when observing from a perspective perpendicular to the plane where the copper laminate 1 is located, at least a part of the copper laminate 1 is provided with a thick copper layer, and SMT (Surface Mount Technology) patch components are correspondingly arranged on the thick copper layer (that is, when projected in the direction perpendicular to the plane where the copper laminate 1 is located, the SMT patch components will intersect with the thick copper layer). Within a unit area, the wiring density of the thick copper layer is greater than that of the thin copper layer. The thick copper layer has excellent conduction and heat dissipation capabilities, which is just suitable for the nearby assembly of SMT patch components. The wiring line density increases, and the thick copper layer is a wireless layer or a power supply layer, which can fully exert its high conduction and high heat dissipation capabilities.

[0045] In one embodiment, as Figure 2 shown, the thicknesses of the respective prepregs 2 are equal. In this way, the respective prepregs 2 have a unified specification, which is convenient for manufacturing.

[0046] In terms of the manufacturing process of the asymmetric copper thickness laminated PCB structure of the present application, it mainly involves processes such as etching, lamination, electroplating, and drilling. These processes require precise parameter control to ensure that the copper thickness and laminated structure of different layers meet the design requirements. For example, during the etching process, it is necessary to select appropriate etching solutions, etching parameters, and processes according to the complexity and precision requirements of the circuit pattern; during the lamination process, it is necessary to control parameters such as pressure, temperature, and time to ensure the tight bonding between different layers; during the electroplating process, it is necessary to control parameters such as current, speed, and temperature to achieve the goal of asymmetric copper thickness.

[0047] Figure 3The process for manufacturing the asymmetric copper-thick laminated PCB structure shown is carried out in sequence as starting, electroless copper plating, electroplating, laminating a film, exposure, stripping the film, and etching. Among them, the thickening of the thick copper layer of the asymmetric copper-thick laminated PCB structure is carried out in the above electroplating step. The starting step in the method for preparing the asymmetric copper-thick laminated PCB of the present application refers to the preparation of the raw materials required for manufacturing the PCB structure; electroless copper plating refers to depositing a layer of electroless copper on the surface of a non-conductive substrate through a chemical reaction, that is, depositing a layer of electroless copper on the surface of the outermost copper laminate 1; the electroplating step refers to covering a layer of electroplated copper on the surface of the electroless copper layer, and the copper thickening value of the copper laminate 1 is increased in the electroplating step; the laminating step refers to precisely laminating a photosensitive dry film on the surface of the electroplated copper layer, and laminating the photosensitive dry film on the side of the electroplated layer away from the copper laminate 1; the exposure step, that is, the exposure step, is to place the PCB board with the photosensitive dry film on it under ultraviolet light irradiation, so that the photosensitive material on the photosensitive dry film undergoes a chemical reaction to form the required circuit pattern; the stripping step is to remove the unnecessary part of the photosensitive dry film on the PCB board after exposure and development. The purpose of stripping the film is to expose the part of the copper layer that needs to be etched for subsequent etching process; the etching step is to remove the unnecessary part of the copper layer on the PCB board, so as to form the required circuit pattern and circuit with the remaining copper layer, and partially etch the electroless copper, electroplated layer, and copper laminate 1, and the remaining part of the electroless copper, electroplated layer, and copper laminate 1 forms a circuit matching the circuit pattern.

[0048] In the process of manufacturing the asymmetric copper-thick laminated PCB structure itself, it is necessary to ensure precise alignment and lamination between different layers, which requires precise equipment and process control. At the same time, due to the complexity of the asymmetric design, it is also necessary to consider optimizing the circuit layout, reducing production costs, and improving production efficiency. While ensuring the copper thickness value, the power line layer needs to meet the design specification requirements after completion, and the impedance also needs to meet the requirements.

[0049] In the process of manufacturing the asymmetric copper-thick laminated PCB structure itself, the process for forming the pattern can either adopt the MSAP process (i.e., the modified semi-additive process) or the Tenting process (i.e., the dry film cover hole process). Among them, MSAP is the abbreviation of Modified Semi-Additive Process. The Tenting process is a method of making circuit shielding in the way of a tent. More precisely, it refers to making a protective cover with a dry film above the through holes on the circuit board to prevent the etching solution from eroding the copper in the holes.

[0050] The overall beneficial effects of adopting the asymmetric copper-thick laminated PCB structure of the present application include:

[0051] First, the signal transmission quality is improved. Through the asymmetric design, the thickness of the copper laminate 1 located in the inner layer and the impedance control ability of signal transmission can be more effectively controlled, which is crucial for improving the transmission quality of high-speed digital signals and radio frequency (RF) signals. Precise impedance control helps reduce signal loss and distortion, ensuring reliable data transmission on the PCB board.

[0052] Second, the heat dissipation performance is enhanced. The asymmetric copper design usually includes using thicker copper layers in key areas, which can significantly improve the heat dissipation performance of the PCB board. When using high-power surface mounted technology (SMT) patch components, this design can significantly reduce the temperature inside the PCB board, thereby improving the stability and reliability of the system.

[0053] Third, the wiring density and flexibility are improved. The asymmetric design allows for an increase in the wiring density and flexibility in the structure of the PCB board, and it can easily create a structure with a smaller spacing between the power layer and the signal layer. This means that more wiring space can be achieved through PCB board design or flip-chip design, further meeting the wiring requirements of complex electronic products.

[0054] Finally, the cost-effectiveness is optimized. Although the asymmetric copper design may increase the manufacturing cost to some extent. The thicker copper layer increases the electroplating time and the number of electroplating times, and the amount of etched copper is different for different copper thicknesses on both sides. The cost of the thicker copper layer increases by 20%. However, Figure 2 compared with Figure 1 that, after the total number of layers is reduced by two layers, the total cost is reduced by 19%. Considering the performance improvement and reliability enhancement it brings, this design can bring higher cost-effectiveness.

[0055] The above embodiments are only used to illustrate the technical concept and features of the present application, and their purpose is to enable those familiar with this technology to understand the content of the present application and implement it. It should not be used to limit the protection scope of the present application. Any equivalent changes or modifications made according to the spirit and essence of the present application should be covered within the protection scope of the present application.

Claims

1. An asymmetric copper-thickness laminated PCB structure, characterized in that Including: Prepreg Copper laminates, and a plurality of the copper laminates and a plurality of the prepregs are alternately laminated with each other Among them, the copper laminates are divided into thick copper layers and thin copper layers according to different thicknesses, and the copper thickness value of the thick copper layer is greater than that of the thin copper layer; the copper laminates are divided into circuit layers and non - circuit layers according to the presence or absence of circuits, the thick copper layer is the non - circuit layer and is the power supply layer, and the thin copper layer is the circuit layer; the number of copper laminates is one more than the number of prepregs, and the outermost copper laminate is the thin copper layer; the number of thick copper layers is one, the copper thickness values of each thin copper layer are equal, and the difference in the number of thin copper layers on both sides of the thick copper layer is one 2. The asymmetric copper thickness laminated PCB structure according to claim 1, characterized in that: The number of copper laminates is an even number, and the number of prepregs is an odd number 3. The asymmetric copper thickness laminated PCB structure according to claim 1, characterized in that: The number of copper laminates is six, and the number of prepregs is five 4. The asymmetric copper thickness laminated PCB structure according to claim 1, wherein: The copper thickness value of a single thick copper layer is more than twice that of a single thin copper layer 5. The asymmetric copper thickness laminated PCB structure according to claim 1, wherein: The copper thickness values of each copper laminate range from 12um to 70um 6. The asymmetric copper thickness laminated PCB structure according to claim 1, characterized in that: The copper thickness value of the thick copper layer ranges from 35um to 39um, and the copper thickness value of the thin copper layer ranges from 14um to 18um 7. The asymmetric copper thickness laminated PCB structure according to claim 6, wherein: The copper thickness value of the thick copper layer is 37um, and the line width value of the thick copper layer is 60um; the copper thickness value of the thin copper layer is 16um, and the line width value of the thin copper layer is 30um 8. The asymmetric copper thickness laminated PCB structure according to claim 1, characterized in that: The cross - sectional profiles of the copper wires of the thick copper layer and the thin copper layer are both isosceles trapezoids 9. The asymmetric copper thickness laminated PCB structure according to claim 1, wherein: Viewed from a perspective perpendicular to the plane where the copper laminates are located, at least part of the thick copper layer is provided in the copper laminates, and SMT patch components are correspondingly arranged on the thick copper layer; within a unit area, the wiring density of the thick copper layer is greater than that of the thin copper layer 10. The asymmetric copper thickness laminated PCB structure according to claim 1, wherein: The thicknesses of each prepreg are equal

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