Packaging structure

Abstract

The utility model discloses a packaging structure, and the structure comprises a DBC substrate which is provided with a first surface and a second surface, the power device is located on the second surface of the DBC substrate; the plastic package body wraps the DBC substrate and the power device, the plastic package body comprises a first side edge and a second side edge which are opposite to each other, and a third side edge and a fourth side edge which are opposite to each other, and the first side edge is perpendicular to the third side edge; one end of each pin extends out of the side edge of the plastic package body; wherein the DBC substrate is located at the top of the plastic package body, at least part of the first surface of the DBC substrate is exposed out of the plastic package body, and the multiple pins are led out from the first side edge and the second side edge of the plastic package body respectively. By internally integrating the insulated gate bipolar transistor and the fast recovery diode and connecting the insulated gate bipolar transistor and the fast recovery diode in the packaging structure, the occupied area is reduced, the placement is more flexible, and the copper-clad layer is insulated from the interior, so that when the packaging structure is connected with the radiator, an insulating spacer does not need to be arranged between the packaging structure and the radiator, and a better radiating effect can be obtained.

Description

TECHNICAL FIELD

[0001] The utility model relates to the technical field of semiconductor packaging, more particularly to a power device packaging structure. BACKGROUND

[0002] In modern air conditioning systems, the air conditioner outdoor unit controller as a core component plays a key role in the stable operation and performance of the air conditioner. The installation and connection process of many key electronic devices on its electronic control board directly affects production efficiency and product quality.

[0003] At present, the intelligent power module, insulated gate bipolar transistor, fast recovery diode and rectifier bridge on the traditional air conditioner outdoor unit electronic control board all adopt straight insertion packaging form. These straight insertion packaged devices need to be supported and fixed by a support frame. During the processing of the electronic control board, these straight insertion packaged devices need to be inserted one by one on the circuit board by manual operation, and then the welding process is completed by wave soldering.

[0004] However, this traditional process has significant drawbacks. On the one hand, the process involves high manual participation, requiring more manpower, which not only increases production costs but also limits the improvement of production efficiency to some extent. On the other hand, since the operator directly contacts these straight insertion packaged devices during operation, which are sensitive to static electricity, there is inevitably a certain risk of static breakdown. Once static breakdown occurs, the device will be damaged, thereby affecting the performance and quality of the entire air conditioner outdoor unit, increasing the product failure rate, and causing economic losses to the production enterprise. Further, the insulated gate bipolar transistor and fast recovery diode are designed as single units, which occupy a large space and are difficult to meet the requirements of miniaturization.

[0005] Therefore, it is urgent to develop a new circuit packaging structure with power factor correction function to solve the problems faced by the traditional design and improve product stability and quality. UTILITY MODEL CONTENTS

[0006] In view of the above problems, the purpose of the utility model is to provide a packaging structure of air conditioner power device to improve the performance and reliability of the product, reduce the area occupation, and improve the heat dissipation capacity and integration of the product.

[0007] The utility model provides a kind of packaging structure, comprising: DBC substrate, with opposite first surface and second surface;Lead frame, located the second surface of the DBC substrate;Power device, on the lead frame on the DBC substrate;Plastic package, the DBC substrate, lead frame and the power device are covered, the plastic package includes opposite first side and second side;The one end of multiple pins is electrically connected with the power device, and the other end of the multiple pins extends from the side of the plastic package;Wherein, the DBC substrate is located at the top of the plastic package, at least part of the first surface of the DBC substrate is exposed from the plastic package, and the multiple pins include input pin, output pin, gate pin and emitter pin.

[0008] Optionally, the multiple pins are respectively led out from the first side and the second side of the plastic package.

[0009] The packaging structure described above, the DBC substrate includes the ceramic substrate and the copper clad layer which are stacked up and down.

[0010] Optionally, the power device includes a first fast recovery diode, a second fast recovery diode and an insulated gate bipolar transistor, the collector of the insulated gate bipolar transistor is electrically connected with the negative electrode of the second fast recovery diode and the positive electrode of the first fast recovery diode, and the emitter of the insulated gate bipolar transistor is electrically connected with the positive electrode of the second fast recovery diode.

[0011] Optionally, the gate of the insulated gate bipolar transistor is electrically connected with the gate pin, the positive electrode of the first fast recovery diode is electrically connected with the input pin, the negative electrode of the first fast recovery diode is electrically connected with the output pin, and the emitter of the insulated gate bipolar transistor is electrically connected with the emitter pin.

[0012] The packaging structure described above, the lead frame includes multiple base islands, the multiple base islands include a first base island, a second base island, a third base island and a fourth base island, the second fast recovery diode and the insulated gate bipolar transistor are located on the first base island, the first fast recovery diode is located on the second base island, at least part of the first base island and at least part of the second base island extend to the side of the plastic package, and the third base island and the fourth base island are both arranged close to the side of the plastic package.

[0013] Optionally, the first island is close to the first side edge, the second island is close to the second side edge, the third island is close to the first side edge of the plastic package, and the fourth island is close to the second side edge of the plastic package; the gate of the insulated gate bipolar transistor is connected to the third island through a bonding wire, the gate pin is connected to the third island, and the gate pin is led out from the first side edge of the plastic package; the collector of the insulated gate bipolar transistor is connected to the first island, the first island is connected to the negative electrode of the second fast recovery diode, and the first island is connected to the input pin; the emitter of the insulated gate bipolar transistor is connected to the positive electrode of the second fast recovery diode and the fourth island respectively through bonding wires, the fourth island is connected to the emitter pin, and the emitter pin is led out from the second side edge of the plastic package; the positive electrode of the first fast recovery diode is connected to the first island through a bonding wire, and the input pin is led out from the first side edge of the plastic package; the negative electrode of the first fast recovery diode is connected to the second island, the second island is connected to the output pin, and the output pin is led out from the second side edge of the plastic package; wherein the emitter pin is arranged opposite to the gate pin, and the output pin is arranged opposite to the input pin.

[0014] Optionally, the first island is close to the third side edge, the second island is close to the fourth side edge, the third island is close to the second side edge of the plastic package, and the fourth island is close to the first side edge of the plastic package; the gate of the insulated gate bipolar transistor is connected to the third island through a bonding wire, the gate pin is connected to the third island, and the gate pin is led out from the second side edge of the plastic package; the collector of the insulated gate bipolar transistor is connected to the first island, the first island is connected to the negative electrode of the second fast recovery diode, the first island is connected to the input pin, and the input pin is led out from the first side edge of the plastic package; the emitter of the insulated gate bipolar transistor is connected to the positive electrode of the second fast recovery diode and the fourth island respectively through bonding wires, the fourth island is connected to the emitter pin, and the emitter pin is led out from the first side edge of the plastic package; the positive electrode of the first fast recovery diode is connected to the first island through a bonding wire, and the input pin is led out from the first side edge of the plastic package; the negative electrode of the first fast recovery diode is connected to the second island, the second island is connected to the output pin, and the output pin is led out from the second side edge of the plastic package; wherein the second fast recovery diode is located between the insulated gate bipolar transistor and the first fast recovery diode, the gate pin is arranged opposite to the input pin, and the output pin is arranged opposite to the emitter pin.

[0015] Optionally, the first base island is adjacent to the third side edge, the second base island is adjacent to the fourth side edge, the fourth base island is adjacent to the second side edge of the plastic package, and the third base island is adjacent to the first side edge of the plastic package; the gate of the insulated gate bipolar transistor is connected to the third base island by a bonding wire, the gate pin is connected to the third base island, and the gate pin is led out from the first side edge of the plastic package; the collector of the insulated gate bipolar transistor is connected to the first base island, the first base island is connected to the negative electrode of the second fast recovery diode, the first base island is connected to the input pin, and the input pin is led out from the second side edge of the plastic package; the emitter of the insulated gate bipolar transistor is connected to the positive electrode of the second fast recovery diode and the fourth base island respectively by bonding wires, the fourth base island is connected to the emitter pin, and the emitter pin is led out from the second side edge of the plastic package; the positive electrode of the first fast recovery diode is connected to the first base island by a bonding wire, and the input pin is led out from the second side edge of the plastic package; the negative electrode of the first fast recovery diode is connected to the second base island, the second base island is connected to the output pin, and the output pin is led out from the first side edge of the plastic package; wherein the second fast recovery diode is located between the insulated gate bipolar transistor and the first fast recovery diode, the gate pin is arranged opposite to the input pin, and the output pin is arranged opposite to the emitter pin.

[0016] Optionally, the width of the gate pin, the collector pin, the emitter pin, the positive electrode pin and the negative electrode pin is 0.6mm-2.6mm.

[0017] Optionally, the minimum distance between the end of each pin away from the plastic package and the plastic package is 0.2mm-3mm.

[0018] Optionally, the gap between the gate pin and the input pin is 3mm-8mm.

[0019] Optionally, the gap between the emitter pin and the output pin is 3mm-8mm.

[0020] Optionally, the length of the plastic package is 10mm-20mm, the width of the plastic package is 8mm-18mm, and the thickness of the plastic package is 3.4mm-6mm.

[0021] Optionally, the longitudinal distance between the top surface of the plastic package and the end of the plurality of pins is 1-3mm.

[0022] The packaging structure is integrated with an insulated gate bipolar transistor and a fast recovery diode, and the two are connected internally, compared with the insulated gate bipolar transistor and the fast recovery diode which are separately packaged on a circuit board, the packaging structure occupies a smaller area, is placed more flexibly, has appropriate electrical clearance between pins, and can effectively save the area of the circuit board and the area of the heat sink.

[0023] The packaging structure is a patch type packaging, can be mounted on a circuit board by using surface mount technology (SMT), does not need to be pre-processed by bending, length trimming and the like, no longer needs manual plug-in operation, can reduce production cost, can reduce electrostatic failure risk, and can improve yield rate of a production line.

[0024] Further, the copper layer of the packaging structure is insulated from the inside, so that when the packaging structure is connected with the heat sink, no insulating gasket needs to be arranged between the two, the copper layer at the top of the packaging structure can be directly in contact with the heat sink, so that better heat dissipation effect is obtained, and the power specification of the power device inside the packaging structure is further reduced. BRIEF DESCRIPTION OF DRAWINGS

[0025] The above and other objects, features and advantages of the present application will become more apparent from the following description of embodiments of the present application with reference to the attached drawings, in which:

[0026] Figure 1 A circuit schematic diagram of the packaging structure of the first embodiment of the present application is shown;

[0027] Figure 2 A top view of the packaging structure of the first embodiment of the present application is shown;

[0028] Figure 3 A longitudinal arrangement inside the packaging structure of the first embodiment of the present application is shown;

[0029] Figure 4 A bottom view of the inside of the packaging structure of the first embodiment of the present application is shown;

[0030] Figure 5 A bottom view of the inside of the packaging structure of the second embodiment of the present application is shown;

[0031] Figure 6 A bottom view of the inside of the packaging structure of the third embodiment of the present application is shown. DETAILED DESCRIPTION

[0032] The present application will be described in greater detail below with reference to the drawings. For the sake of clarity, the parts of the drawings are not drawn to scale. In addition, certain known elements can not be shown. Many specific details of the present application are described below; however, as would be understood by one skilled in the art, the application can be embodied without these specific details.

[0033] The present application can be presented in various forms, some examples of which will be described below.

[0034] Figure 1 A circuit schematic diagram of a packaging structure of a first embodiment of the present application is shown; the packaging structure comprises a first fast recovery diode FRD1, an insulated gate bipolar transistor Q1 and a second fast recovery diode FRD2, wherein the anode of the first fast recovery diode FRD1 is connected to an input pin Vin, the cathode of the first fast recovery diode FRD1 is connected to an output pin Vout, the anode of the second fast recovery diode FRD2 is connected to the emitter of the insulated gate bipolar transistor Q1, and the cathode of the second fast recovery diode FRD2 is connected to the collector of the insulated gate bipolar transistor Q1; the gate of the insulated gate bipolar transistor Q1 is connected to a gate pin G, the collector of the insulated gate bipolar transistor Q1 is connected to the anode of the first fast recovery diode FRD1 and to the input pin Vin, and the emitter of the insulated gate bipolar transistor Q1 is connected to an emitter pin E. The anode of the first fast recovery diode FRD1 is connected to the collector of the insulated gate bipolar transistor Q1 inside the packaging structure.

[0035] Figure 2 A top view of the packaging structure of the first embodiment of the present application is shown; from Figure 2DBC substrate 100, a plastic package 200 and a plurality of pins, the first fast recovery diode FRD1, the insulated gate bipolar transistor Q1 and the second fast recovery diode FRD2 of the packaging structure are located in the plastic package 200, specifically, the above-mentioned devices are located on the second surface of the DBC substrate 100, at least part of the first surface of the DBC substrate 100 is exposed from the top surface of the plastic package 200 to obtain better heat dissipation effect, the plastic package 200 is, for example, rectangular, including a first side edge 201 and a second side edge 202 opposite to the first side edge 201, and a third side edge 203 and a fourth side edge 204 opposite to the third side edge, the third side edge 203 is perpendicular to the first side edge 201, the input pin Vin and the gate pin G are, for example, extended from the first side edge 201 of the plastic package 200, the output pin Vout and the emitter pin E are extended from the second side edge 202 of the plastic package 200, the input pin Vin and the output pin are oppositely arranged, and the gate pin G and the emitter pin E are oppositely arranged. The length a of the plastic package 200 is 10mm-20mm, preferably 14mm; the width b of the plastic package 200 is 8mm-18mm, preferably 12mm.

[0036] Figure 3 The internal longitudinal arrangement schematic view of the packaging structure of the first embodiment of the utility model is shown; Figure 3 As can be seen, the DBC substrate 100 includes a ceramic substrate 101, a copper layer 102 on the upper surface of the ceramic substrate 101 and a lead frame 103 on the lower surface of the ceramic substrate 101, wherein the lead frame 103 is provided with a plurality of base islands, the first fast recovery diode FRD1, the insulated gate bipolar transistor Q1 and the second fast recovery diode FRD2 are located on the corresponding base islands, one end of the pin 300 extended from the side edge of the plastic package 200 is connected with the base island of the lead frame 103, and the other end is extended from the side edge of the plastic package 200. The devices in the plastic package 200 and between the devices, and between the devices and the base islands are, for example, also provided with a bonding wire 104, and the electrical connection is realized through the bonding wire 104. Specifically, the thickness H of the plastic package 200 is, for example, 3.4mm-6mm, preferably, the thickness H of the plastic package 200 is 4mm. The transverse distance D between the edge of the plastic package 200 and the outermost end of the pin 300 is 0.2mm-3mm, preferably, D is 1mm; the longitudinal distance h1 between the top surface of the plastic package 200 and the end of the pin 300 is 1mm-3mm.

[0037] Figure 4 The internal bottom view schematic view of the packaging structure of the first embodiment of the utility model is shown; Figure 4As can be seen, the lead frame 103 of the package structure includes a first base island 1031, a second base island 1032, a third base island 1033, and a fourth base island 1034. The first base island 1031 is, for example, L-shaped, and the second base islands 1033 to 1034 are, for example, rectangular. The third base island 1033 and the first base island 1031 are located near the first side 201 of the molding compound 200, and the fourth base island 1034 and the second base island 1032 are located near the second side 202. The insulated gate bipolar transistor Q1 and the second fast recovery diode FRD2 are located on the first base island 1031, and the first fast recovery diode FRD1 is located on the second base island 1032. The first base island 1031 is connected to the input pin Vin, the second base island 1032 is connected to the output pin Vout, the third base island 1033 is connected to the gate pin G, and the fourth base island 1034 is connected to the emitter pin E. There are gaps between different base islands and they are filled with a molding compound 200. The base islands are bonded to the DBC substrate and dissipate heat outward through the copper cladding layer on the opposite side of the ceramic substrate.

[0038] The gate of the insulated-gate bipolar transistor Q1 is connected to the third base island 1033 via a bonding wire, and the gate pin G is connected to the third base island 1033. The gate pin G is led out from the first side 201 of the plastic package. The collector of the insulated-gate bipolar transistor Q1 is connected to the first base island 1031. The first base island 1031 is connected to the negative terminal of the second fast recovery diode FRD2 and to the input pin Vin. The emitter of the insulated-gate bipolar transistor Q1 is connected to the positive terminal of the second fast recovery diode FRD2 and the fourth base island 1034 via bonding wires. The fourth base island 1034 is connected to the emitter pin E, and the emitter pin E is led out from the second side 202 of the plastic package.

[0039] The positive terminal of the first fast recovery diode FRD1 is connected to the first base island 1031 via a bonding wire, and the input pin Vin is led out from the first side 201 of the plastic package 200; the negative terminal of the first fast recovery diode FRD1 is connected to the second base island 1032, the second base island 1032 is connected to the output pin Vout, and the output pin Vout is led out from the second side 202 of the plastic package 200;

[0040] The emitter pin E is set relative to the gate pin G, and the output pin Vout is set relative to the input pin Vin.

[0041] The width d1 of the gate pin G is for example 0.6mm-2.6mm, preferably 2mm; the width of the input pin Vin, the output pin Vout and the emitter pin E is for example 1.2mm-2.6mm, preferably 2mm; the gap d3 between the gate pin G and the input pin Vin is for example 3mm-8mm, preferably 8mm; the gap d4 between the emitter pin E and the output pin Vout is for example 3mm-8mm, preferably 8mm.

[0042] Figure 5 The internal bottom view schematic diagram of the packaging structure of the second embodiment of the utility model is shown; the packaging structure comprises a first base island 1031, a second base island 1032, a third base island 1033 and a fourth base island 1034, the first base island 1031 is for example L-shaped, and the second base island 1032 to the fourth base island 1034 are for example rectangular; the third base island 1033 is close to the second side edge 202 of the plastic package 200, the fourth base island 1034 is close to the first side edge 201 of the plastic package 200, the first base island 1031 is close to the third side edge 203, and the second base island 1032 is close to the fourth side edge 204. The insulated gate bipolar transistor Q1 and the second fast recovery diode FRD2 are located in the first base island 1031, the first fast recovery diode FRD1 is located in the second base island 1032, the first base island 1031 is connected with the input pin Vin, the second base island 1032 is connected with the output pin Vout, the third base island 1033 is connected with the gate pin G, and the fourth base island 1034 is connected with the emitter pin E. There is a gap between different base islands and the plastic package 200 fills, the base island is bonded with the DBC substrate and radiates heat outward through the copper layer on the opposite side of the ceramic substrate. The second fast recovery diode FRD2 is located between the first fast recovery diode FRD1 and the insulated gate bipolar transistor Q1.

[0043] The gate of the insulated gate bipolar transistor Q1 is connected with the third base island 1033 through a bonding wire, the gate pin G is connected with the third base island 1033, and is led out from the second side edge 202 of the plastic package 200 through the gate pin G;

[0044] The collector of the insulated gate bipolar transistor Q1 is connected with the first base island 1031, the first base island 1031 is connected with the negative electrode of the second fast recovery diode FRD2, the first base island 1031 is connected with the input pin Vin, and the input pin Vin is led out from the first side edge 201 of the plastic package 200;

[0045] The emitter of the insulated gate bipolar transistor Q1 is connected with the positive electrode of the second fast recovery diode FRD2 and the fourth base island 1034 respectively through a bonding wire, the fourth base island 1034 is connected with the emitter pin E, and the emitter pin E is led out from the first side 201 of the plastic package 200;

[0046] The positive electrode of the first fast recovery diode FRD1 is connected with the first base island 1031 through a bonding wire, and the input pin Vin is led out from the first side edge 201 of the plastic package body 200.

[0047] The negative electrode of the first fast recovery diode FRD1 is connected with the second base island 1032, and the second base island 1032 is connected with the output pin Vout, and the output pin Vout is led out from the second side edge 202 of the plastic package body 200.

[0048] The second fast recovery diode FRD2 is located between the insulated gate bipolar transistor Q1 and the first fast recovery diode FRD1, the gate pin G is oppositely arranged with the input pin Vin, and the output pin Vout is oppositely arranged with the emitter pin E.

[0049] Figure 6 The internal bottom view schematic diagram of the packaging structure of the third embodiment of the utility model is shown, the third embodiment is similar to the second embodiment, the third embodiment is similar to the structure of the second embodiment along Figure 5 The mirror image after the middle point line left and right, and the devices and base islands in the internal are not repeated, and can be adjusted according to requirements.

[0050] According to the packaging structure, the insulated gate bipolar transistor and the fast recovery diode are integrated in the internal, and the two are connected in the internal, compared with the insulated gate bipolar transistor and the fast recovery diode arranged in the circuit board, the occupied area is smaller, the placement is more flexible, the electrical gap between the pins is appropriate, and the area of the circuit board and the radiator area can be effectively saved.

[0051] The packaging structure is a patch type packaging, can be mounted on the circuit board using surface mount technology (Surface Mount Technology, SMT), without pretreatment such as bending and length trimming of the pin, no longer needs manual plug-in operation, not only can reduce production cost, but also can reduce electrostatic failure risk and improve yield.

[0052] Further, the copper layer of the packaging structure is insulated from the internal, so that when the packaging structure is connected with the radiator, the insulating gasket between the two is no longer needed, the copper layer at the top of the packaging structure can be directly in contact with the radiator to obtain better heat dissipation effect, and further reduce the power specification of the power device in the packaging structure.

[0053] It should be noted that, in this document, the terms "first" and "second" and the like are used merely as identifiers to distinguish one entity from another, and are not necessarily intended to "indicate" or "imply" such a relationship between these entities. Furthermore, the terms "comprise", "comprising", or any other variation thereof are intended to cover a non-exclusive inclusion, such that processes, methods, articles, or apparatuses that comprise a list of elements are not necessarily limited to those elements, but can include other elements not expressly listed or inherent to such processes, methods, articles, or apparatuses. Without further limitation, an element preceded by "comprises a" does not, without more constraints, foreclose the existence of additional identical elements in the process, method, article, or apparatus that comprises the recited element.

[0054] In accordance with the embodiments of the present application as described above, these embodiments do not describe all the details of the application, nor limit the application to the specific embodiments described. Obviously, many modifications and variations are possible in light of the above teachings. The embodiments were chosen and described in order to explain the principles of the application and its practical application, to thereby enable others skilled in the art to best utilize the application and various implementations and with modifications as suitable to the particular use contemplated. The application is only limited by the claims and the full scope of equivalents thereof.

Claims

1. A package structure, characterized by, The application relates to a power device, comprising: a DBC substrate having opposite first and second surfaces; a lead frame on the second surface of the DBC substrate; a power device on the lead frame on the DBC substrate; a plastic package covering the DBC substrate, the lead frame and the power device, the plastic package comprising opposite first and second sides; a plurality of pins electrically connected to the power device at one end and extending from the sides of the plastic package at the other end; wherein the DBC substrate is on top of the plastic package, at least part of the first surface of the DBC substrate is exposed from the plastic package, and the plurality of pins comprises input pins, output pins, gate pins and emitter pins.

2. The package structure of claim 1, wherein, The plurality of pins extend from the first and second sides of the plastic package, respectively.

3. The package structure of claim 1, wherein, The DBC substrate comprises a ceramic substrate and a copper clad layer stacked one on top of the other.

4. The package structure of claim 3, wherein, The power device comprises a first fast recovery diode, a second fast recovery diode and an insulated gate bipolar transistor, the collector of the insulated gate bipolar transistor is electrically connected to the negative electrode of the second fast recovery diode and to the positive electrode of the first fast recovery diode, and the emitter of the insulated gate bipolar transistor is electrically connected to the positive electrode of the second fast recovery diode.

5. The package structure of claim 4, wherein, The gate of the insulated gate bipolar transistor is electrically connected to the gate pin, the positive electrode of the first fast recovery diode is electrically connected to the input pin, the negative electrode of the first fast recovery diode is electrically connected to the output pin, and the emitter of the insulated gate bipolar transistor is electrically connected to the emitter pin.

6. The package structure of claim 4 or 5, wherein, The lead frame comprises a plurality of base islands, the plurality of base islands comprises a first base island, a second base island, a third base island and a fourth base island, the second fast recovery diode and the insulated gate bipolar transistor are on the first base island, the first fast recovery diode is on the second base island, at least part of the first base island and at least part of the second base island are close to the sides of the plastic package, the third base island and the fourth base island are both arranged close to the sides of the plastic package, the plastic package further comprises opposite third and fourth sides, and the third side is perpendicular to the first side.

7. The package structure of claim 6, wherein, The first base island is close to the first side, the second base island is close to the second side, the third base island is close to the first side of the plastic package, and the fourth base island is close to the second side of the plastic package. The gate of the insulated gate bipolar transistor is connected to the third base island through a bonding wire, the gate pin is connected to the third base island, and the gate pin extends from the first side of the plastic package. The collector of the insulated gate bipolar transistor is connected to the first base island, the first base island is connected to the negative electrode of the second fast recovery diode, and the first base island is connected to the input pin. The emitter of the insulated gate bipolar transistor is connected to the positive electrode of the second fast recovery diode and the fourth base island through a bonding wire, respectively, the fourth base island is connected to the emitter pin, and the emitter pin extends from the second side of the plastic package. The positive electrode of the first fast recovery diode is connected with the first base island through a bonding wire, and the input pin is led out from the first side of the plastic package body; The negative electrode of the first fast recovery diode is connected with the second base island, the second base island is connected with the output pin, and the output pin is led out from the second side of the plastic package body; The emitter pin is arranged opposite to the gate pin, and the output pin is arranged opposite to the input pin.

8. The package structure of claim 6, wherein, The first base island is close to the third side, the second base island is close to the fourth side, the fourth base island is close to the second side of the plastic package body, and the third base island is close to the first side of the plastic package body; The gate of the insulated gate bipolar transistor is connected with the third base island through a bonding wire, the gate pin is connected with the third base island, and the gate pin is led out from the second side of the plastic package body; The collector of the insulated gate bipolar transistor is connected with the first base island, the first base island is connected with the negative electrode of the second fast recovery diode, the first base island is connected with the input pin, and the input pin is led out from the first side of the plastic package body; The emitter of the insulated gate bipolar transistor is connected with the positive electrode of the second fast recovery diode and the fourth base island through bonding wires respectively, the fourth base island is connected with the emitter pin, and the emitter pin is led out from the first side of the plastic package body; The positive electrode of the first fast recovery diode is connected with the first base island through a bonding wire, and the input pin is led out from the first side of the plastic package body; The negative electrode of the first fast recovery diode is connected with the second base island, the second base island is connected with the output pin, and the output pin is led out from the second side of the plastic package body; The second fast recovery diode is located between the insulated gate bipolar transistor and the first fast recovery diode, the gate pin is arranged opposite to the input pin, and the output pin is arranged opposite to the emitter pin.

9. The package structure of claim 6, wherein, The first base island is close to the third side, the second base island is close to the fourth side, the fourth base island is close to the second side of the plastic package body, and the third base island is close to the first side of the plastic package body; The gate of the insulated gate bipolar transistor is connected with the third base island through a bonding wire, the gate pin is connected with the third base island, and the gate pin is led out from the first side of the plastic package body; The collector of the insulated gate bipolar transistor is connected with the first base island, the first base island is connected with the negative electrode of the second fast recovery diode, the first base island is connected with the input pin, and the input pin is led out from the second side of the plastic package body; The emitter of the insulated gate bipolar transistor is connected with the positive electrode of the second fast recovery diode and the fourth base island through bonding wires respectively, the fourth base island is connected with the emitter pin, and the emitter pin is led out from the second side of the plastic package body; The positive electrode of the first fast recovery diode is connected with the first base island through a bonding wire, and the input pin is led out from the second side of the plastic package body; The negative electrode of the first fast recovery diode is connected with a second base island, the second base island is connected with an output pin, and the output pin is led out from a first side edge of the plastic package body; The second fast recovery diode is located between the insulated gate bipolar transistor and the first fast recovery diode, the gate pin is arranged opposite to the input pin, and the output pin is arranged opposite to the emitter pin.

10. The package structure of claim 6, wherein, The width of the gate pin, the collector pin, the emitter pin, the positive electrode pin and the negative electrode pin is 0.6mm-2.6mm.

11. The package structure of claim 6, wherein, The minimum distance between the end of each pin away from the plastic package body and the plastic package body is 0.2mm-3mm.

12. The package structure of claim 6, wherein, The gap between the gate pin and the input pin is 3mm-8mm.

13. The package structure of claim 6, wherein, The gap between the emitter pin and the output pin is 3mm-8mm.

14. The package structure of claim 1, wherein, The length of the plastic package body is 10mm-20mm, the width of the plastic package body is 8mm-18mm, and the thickness of the plastic package body is 3.4mm-6mm.

15. The package structure of claim 1, wherein, The longitudinal distance between the top surface of the plastic package body and the end of the plurality of pins is 1-3mm.

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