Multi-channel driving chip testing device

Abstract

The utility model provides a multichannel driving chip testing device. The multichannel driving chip testing device comprises M testing modules and a driving chip with N output channels, n is an integer greater than or equal to 2; m is an integer greater than or equal to 1 and less than N; each output channel is correspondingly connected with an input port of one test module; wherein each test module comprises an optical test unit; the first end of the optical test unit is connected with the voltage supply end of the driving chip, and the second end is connected with the corresponding output channel. The multi-channel driving chip is subjected to channel merging detection, so that the time complexity and the connection complexity brought by multi-channel testing are simplified, the use of hardware components is simplified, the cost is saved, and new convenience is provided for testing verification.

Description

Technical Field

[0001] This utility model relates to the field of semiconductor circuit applications, and in particular to a multi-channel driver chip testing device. Background Technology

[0002] With the continuous development of technology, automotive radar and AR / VR products are advancing rapidly, and their applications in multiple fields are constantly expanding and deepening. Optical devices such as vertical-cavity surface-emitting lasers (VCSELs) play a crucial role in the development of these advanced technologies. In automotive radar systems, VCSEL devices, with their high precision, high reliability, and compact size, have become the core light source of LiDAR systems, providing vehicles with accurate environmental perception, thereby ensuring the safety and stability of autonomous driving.

[0003] With the continuous evolution of technology, the demand for high-power, high-current, multi-channel transmitter chips is increasing. These chips can significantly improve system performance and efficiency, meeting market demands for high-performance automotive radar and AR / VR devices. However, researchers face numerous challenges in developing these chips, especially in the testing phase. When high-power, multi-channel driver chips are combined with high-power lasers, the complexity and difficulty of testing increase dramatically. This requires not only more precise testing equipment and more complex testing procedures, but also higher levels of professional expertise and extensive experience from testing personnel to ensure the accuracy and reliability of test results.

[0004] However, existing testing devices only test each output channel of the transmitting chip separately and simultaneously. This testing method not only makes it difficult to test chips with different numbers of output channels, but also makes the testing hardware more complex, the testing process more complicated, and the testing energy consumption higher.

[0005] It should be noted that the above introduction to the technical background is only for the purpose of providing a clear and complete explanation of the technical solutions of this application and facilitating understanding by those skilled in the art. It should not be assumed that these technical solutions are known to those skilled in the art simply because they have been described in the background section of this application. Utility Model Content

[0006] In view of the shortcomings of the prior art described above, the purpose of this utility model is to provide a multi-channel driver chip testing device to solve the problems in the prior art that make it difficult to test chips with different numbers of output channels, and also make the test hardware more complex, the test process more steps, and the test energy consumption higher.

[0007] To achieve the above and other related objectives, this utility model provides a multi-channel driver chip testing device, comprising: M testing modules and a driver chip having N output channels; N is an integer greater than or equal to 2; M is an integer greater than or equal to 1 and less than N;

[0008] Each of the output channels is connected to one of the input ports of the test module;

[0009] Each of the aforementioned test modules includes an optical test unit; the first end of the optical test unit is connected to the power supply terminal of the driver chip, and the second end is connected to the corresponding output channel.

[0010] Optionally, when N / M is set to an integer and each output channel is arranged along the first direction, the output channels are divided into M groups along the first direction; each N / M output channels form a bundle and output to the input port of the corresponding test module.

[0011] Optionally, the driver chip further includes N circuits and M channel selection modules; each circuit is configured to correspond one-to-one with each output channel; each channel selection module is configured to correspond one-to-one with each test module.

[0012] Each of the channel selection modules includes a control circuit and N / M switches; each switch is sequentially arranged between the circuit and the output channel; the output terminal of the control circuit is connected to the control terminal of each switch.

[0013] Optionally, the optical testing unit includes at least one diode selected from light-emitting diodes and laser diodes.

[0014] Optionally, each of the test modules further includes a resistor; the resistor is configured in a one-to-one correspondence with the optical test unit; the first end of the resistor is connected to the input port of the test module, and the second end is connected to the optical test unit.

[0015] Optionally, the multi-channel driver chip testing device further includes a control chip; the input ports of the driver chip include a serial clock signal receiving port, a first serial data transmission port, a chip select signal receiving port, a reset signal receiving port, a first input / output pin port, a first low-voltage differential signal receiving port, and a second low-voltage differential signal receiving port; the output ports of the control chip include a serial clock signal transmitting port, a second serial data transmission port, a chip select signal transmitting port, a reset signal transmitting port, a second input / output pin port, a first low-voltage differential signal transmitting port, and a second low-voltage differential signal transmitting port, and the output ports of the control chip are connected one-to-one with the input ports of the driver chip.

[0016] Optionally, the multi-channel driver chip testing device further includes a filtering module; the first end of the filtering module is connected to the voltage supply terminal of the driver chip, and the second end is connected to a reference ground.

[0017] Optionally, the filtering module includes a first capacitor, a second capacitor, and a third capacitor; the first capacitor, the second capacitor, and the third capacitor are connected in parallel to form a parallel structure, and the parallel structure is located between the voltage supply terminal of the driving chip and the reference ground.

[0018] Optionally, the multi-channel driver chip testing device further includes M electrical signal testing devices; each of the electrical signal testing devices is configured in a one-to-one correspondence with each of the optical testing units, and each of the electrical signal testing devices is connected in series with its corresponding optical testing unit.

[0019] Optionally, the multi-channel driver chip testing device further includes M electrical signal testing devices. When each testing module also includes a resistor, each electrical signal testing device is configured in a one-to-one correspondence with each resistor, and each electrical signal testing device is connected in parallel with its corresponding resistor.

[0020] As described above, the multi-channel driver chip testing device of this invention has the following beneficial effects:

[0021] This invention performs channel merging testing on multi-channel driver chips, thereby simplifying the time and connection complexity of multi-channel testing, and reducing costs by simplifying the use of hardware components, providing new convenience for testing and verification. Furthermore, this multi-channel driver chip testing device has a wider range of applications for driver chips with different numbers of output channels, showing good application results for driver chips with even larger numbers of output channels; and for driver chips with fewer channels, the hardware cost is relatively lower. Attached Figure Description

[0022] Figure 1 The diagram shown is a schematic of a driver chip testing device.

[0023] Figure 2 The diagram shown is a structural schematic of the multi-channel driver chip testing device of this utility model.

[0024] Figure 3 The diagram shown is a structural schematic of the driver chip of this utility model, including the channel selection module.

[0025] Figure 4 The waveform diagram shows the test results of the test module of this utility model.

[0026] Component designation explanation

[0027] 1 Driver chip testing device

[0028] 11 Driver Chips

[0029] 12 Light Emitting Diodes

[0030] 2 Multi-channel driver chip testing device

[0031] 21 Driver Chips

[0032] 210 Output Channel

[0033] 211 Circuit

[0034] 212 Channel Selection Module

[0035] 22 Test Module

[0036] 221 Optical Test Unit

[0037] 23 Control Chip

[0038] 24 Filtering Module Detailed Implementation

[0039] The following specific examples illustrate the implementation of this utility model. Those skilled in the art can easily understand other advantages and effects of this utility model from the content disclosed in this specification. This utility model can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of this utility model.

[0040] Please see Figures 1-4 It should be noted that the illustrations provided in this embodiment are only schematic representations of the basic concept of this utility model. Therefore, the drawings only show the components related to this utility model and are not drawn according to the actual number, shape and size of the components. In actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.

[0041] like Figure 1A driver chip testing device 1 is provided, including a driver chip 11 and 16 light-emitting diodes (LEDs) 12. The driver chip 11 has 16 output ports. To test the driving capability of the driver chip 11, each of the 16 output ports is connected to a different LED 12. Testing is performed by setting the driver chip 11 to its normal operating state and combining it with the LEDs 12. However, this circuit is complex and the hardware cost is high. Furthermore, this driver chip testing device 1 is only applicable to driver chips with 16 or fewer output ports. Testing driver chips with fewer than 16 ports using this device results in unused hardware, leading to wasted hardware. Additionally, this driver chip testing device 1 cannot be directly applied to driver chips with more than 16 output ports. If testing is required, multiple tests may be necessary, making the operation complex and reducing the accuracy of the tests. Moreover, the simultaneous high-power testing of each output port of the driver chip 11 leads to a rapid increase in energy consumption.

[0042] Based on this, this embodiment provides a new multi-channel driver chip testing device 2, such as... Figure 2 As shown, the system includes M test modules 22 and a driver chip 21 with N output channels 210; N is an integer greater than or equal to 2; M is an integer greater than or equal to 1 and less than N. Each output channel 210 is connected to the input port of one test module 22. In this embodiment, M is set to 2 and N is set to 16, which means that 16 output channels 210 are each connected to one test channel 22.

[0043] Specifically, when N / M is set to an integer (8 in this embodiment) and each output channel 210 is arranged along the first direction (along the vertical side of the driver chip 21 in this embodiment), the output channels are divided into M groups (2 groups) along the first direction; every N / M (8 in this embodiment) output channels are bundled and output to the input port of the corresponding test module. In this embodiment, as... Figure 2 As shown, the first 8 output channels are combined and connected to one test channel 22, and the last 8 output channels are combined and connected to another test channel 22.

[0044] It should be noted that the actual merging and grouping methods are not limited to this embodiment. For example, in another embodiment, the first four output channels are merged and connected to one test channel 22, and the last 12 output channels are merged and connected to another test channel 22. As long as the total number of test modules 22 is less than the total number of output channels 210, that is, one output channel 210 is avoided from corresponding to one test module 22, this embodiment is within the scope of protection.

[0045] As an example, such as Figure 3As shown, the driver chip 21 also includes N circuits 211 and M channel selection modules 212; each circuit 211 is configured in a one-to-one correspondence with each output channel 210; each channel selection module 212 is configured in a one-to-one correspondence with each test module 22; each channel selection module 212 includes a control circuit (not shown for simplicity) and N / M switches (8 in this embodiment); each switch is sequentially arranged between the circuit 211 and the output channel 210; the output terminal of the control circuit is connected to the control terminal of each switch, and any one of the N / M switches is selected to be turned on for testing based on the selection signal output by the control circuit.

[0046] like Figure 2 As shown, each test module 22 includes an optical test unit 221; the first end of the optical test unit 221 is connected to the voltage supply terminal LDVCC of the driver chip 21, and the second end is connected to the corresponding output channel 210. In this embodiment, the optical test unit 221 is used to test whether the conductive output channel is working properly.

[0047] Specifically, as an example, the optical testing unit 221 includes at least one diode selected from light-emitting diodes and laser diodes. In practice, the optical testing unit may also include other testing components; any component that converts electrical signals into optical signals is within the scope of this embodiment. The optical testing unit 221 allows for direct testing of the driving capabilities of high-power, high-current, multi-channel driver chips used in automotive radar and AR / VR products, thus better ensuring the accuracy of testing scenarios. However, the testing device of this embodiment can also be directly used for low-power driver chips and is not limited to this embodiment.

[0048] Specifically, each test module 22 also includes a resistor R; the resistor R is set in a one-to-one correspondence with the optical test unit 221; the first end of the resistor is connected to the input port of the test module 210, and the second end is connected to the optical test unit 221. In this embodiment, the resistor R is set to convert the working current of the branch into voltage for test representation, making the test simpler; at the same time, setting the resistor R for testing can make the detection results more accurate and stable.

[0049] The multi-channel driver chip testing device 2 also includes a control chip 23; the input ports of the driver chip 21 include a serial clock signal receiving port SCLK, a first serial data transmission port SDIO, a chip select signal receiving port NCS, a reset signal receiving port RST_N, a first input / output pin port GPIO, a first low-voltage differential signal receiving port LVDS_P, and a second low-voltage differential signal receiving port LVDS_N; the output ports of the control chip 23 include a serial clock signal transmitting port SCLK', a second serial data transmission port SDIO', a chip select signal transmitting port NCS', a reset signal transmitting port RST_N', a second input / output pin port GPIO', a first low-voltage differential signal transmitting port LVDS_P', and a second low-voltage differential signal transmitting port LVDS_N', and the output ports of the control chip 23 are connected one-to-one with the input ports of the driver chip 21, that is, connected sequentially to transmit the serial clock signal, serial data, chip select signal, reset signal, input / output signal, and low-voltage differential signal respectively.

[0050] It should be noted that the ports connecting the control chip 23 and the driver chip 21 in the multi-channel driver chip testing device 2 can be set according to the actual chip design scenario, and are not limited to this embodiment.

[0051] Specifically, the multi-channel driver chip testing device 2 also includes a filtering module 24; the first end of the filtering module 24 is connected to the voltage supply terminal LDVCC of the driver chip 21, and the second end is connected to the reference ground.

[0052] As an example, the filter module 24 includes a first capacitor C1, a second capacitor C2, and a third capacitor C3. The first capacitor C1, the second capacitor C2, and the third capacitor C3 are connected in parallel to form a parallel structure, and the parallel structure is set between the power supply terminal LDVCC of the driver chip 21 and the reference ground. By setting the filter module, the noise generated by the power supply output can be filtered to avoid test interference, making the test more accurate and stable.

[0053] Specifically, as a first example, the multi-channel driver chip testing device 2 further includes M electrical signal testing devices (not shown in the figure); each electrical signal testing device is configured in a one-to-one correspondence with each optical testing unit 221, and each electrical signal testing device is connected in series with its corresponding optical testing unit 221. In some embodiments, the operating current of the branch where the optical testing unit 221 is located is detected by an ammeter, but relying solely on an ammeter for detection is complex and prone to introducing measurement errors.

[0054] Specifically, as a second example, the multi-channel driver chip test device 2 also includes M electrical signal test devices (not shown in the figure). When the test module 22 also includes resistors R, each electrical signal test device is set up in one-to-one correspondence with each resistor R and each electrical signal test device is connected in parallel with the corresponding resistor R. The voltage of the resistor E is obtained through parallel testing to convert and obtain the operating current of the branch. Therefore, considering that the high-power operating current may cause the resistance value to change due to the temperature rise, temperature-insensitive resistors are given priority.

[0055] It should be noted that the actual testing device does not necessarily need to be equipped with an electrical signal testing device. In fact, setting up only the optical testing unit 221 is enough to preliminarily determine whether a certain circuit in the driver chip 21 or the corresponding output channel 210 of a certain circuit is working normally. However, the electrical signal testing device can further determine whether the working circuit has reached the preset value.

[0056] It should be further explained that this embodiment employs a specially structured hardware testing scheme. While ensuring the safety and accuracy of the test items, it simplifies the multi-channel testing scheme to a two-channel or even a single-channel testing scheme. This simplifies the time and connection complexity associated with multi-channel testing, reduces the cost by simplifying the use of hardware components, and provides new convenience for testing and verification. Furthermore, the multi-channel driver chip testing device 2 of this embodiment has a wider range of applications for driver chips with different numbers of output channels, showing good application results for driver chips with a large number of output channels; and for driver chips with fewer channels, the hardware cost is relatively lower.

[0057] like Figure 4 The test results of the provided test module 22 show that the input pulse signal output from the output channel 210 is input into the test module 22, causing the optical test unit 221 to work. This results in different voltages at the first and second ends of the resistor R. By calculating the voltage of the resistor R, information such as the operating current on the branch can be calculated, making the detection more accurate and convenient. Compared to previous testing methods that required more physical contact, more test endpoints, and a correspondingly large number of test devices, this embodiment greatly reduces the number of physical contact points, endpoints, and devices required, significantly improving the convenience of testing.

[0058] In summary, this invention provides a multi-channel driver chip testing device, comprising: M test modules and a driver chip with N output channels; N is an integer greater than or equal to 2; M is an integer greater than or equal to 1 and less than N; each output channel is connected to the input port of a test module; wherein each test module includes an optical test unit; the first end of the optical test unit is connected to the voltage supply terminal of the driver chip, and the second end is connected to the corresponding output channel. This invention performs channel merging testing on the multi-channel driver chip, thereby simplifying the time and connection complexity brought about by multi-channel testing, and simplifying the use of hardware components to save costs, providing new convenience for testing and verification. Therefore, this invention effectively overcomes the various shortcomings of the prior art and has high industrial application value.

[0059] The above embodiments are merely illustrative of the principles and effects of this utility model and are not intended to limit the scope of this utility model. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of this utility model. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in this utility model should still be covered by the claims of this utility model.

Claims

1. A multi-channel driver chip testing device, characterized in that, The multi-channel driver chip testing device includes at least: M test modules and a driver chip with N output channels; N is an integer greater than or equal to 2; M is an integer greater than or equal to 1 and less than N; Each of the output channels is connected to one of the input ports of the test module; Each of the aforementioned test modules includes an optical test unit; the first end of the optical test unit is connected to the power supply terminal of the driver chip, and the second end is connected to the corresponding output channel.

2. The multi-channel driver chip testing device according to claim 1, characterized in that: When N / M is set to an integer and each output channel is arranged along the first direction, the output channels are divided into M groups along the first direction; each N / M output channels form a bundle and output to the corresponding test module's input port.

3. The multi-channel driver chip testing device according to claim 2, characterized in that: The driver chip also includes N circuits and M channel selection modules; each circuit is configured to correspond one-to-one with each output channel; each channel selection module is configured to correspond one-to-one with each test module. Each of the channel selection modules includes a control circuit and N / M switches; each switch is sequentially arranged between the circuit and the output channel; the output terminal of the control circuit is connected to the control terminal of each switch.

4. The multi-channel driver chip testing device according to claim 1, characterized in that: The optical testing unit includes at least one diode selected from light-emitting diodes and laser diodes.

5. The multi-channel driver chip testing device according to claim 1, characterized in that: Each test module also includes a resistor; the resistor is configured in a one-to-one correspondence with the optical test unit; the first end of the resistor is connected to the input port of the test module, and the second end is connected to the optical test unit.

6. The multi-channel driver chip testing device according to claim 1, characterized in that: The multi-channel driver chip testing device also includes a control chip; the input ports of the driver chip include a serial clock signal receiving port, a first serial data transmission port, a chip select signal receiving port, a reset signal receiving port, a first input / output pin port, a first low-voltage differential signal receiving port, and a second low-voltage differential signal receiving port; the output ports of the control chip include a serial clock signal transmitting port, a second serial data transmission port, a chip select signal transmitting port, a reset signal transmitting port, a second input / output pin port, a first low-voltage differential signal transmitting port, and a second low-voltage differential signal transmitting port, and the output ports of the control chip are connected one-to-one with the input ports of the driver chip.

7. The multi-channel driver chip testing device according to claim 1, characterized in that: The multi-channel driver chip testing device also includes a filtering module; the first end of the filtering module is connected to the voltage supply terminal of the driver chip, and the second end is connected to the reference ground.

8. The multi-channel driver chip testing device according to claim 7, characterized in that: The filtering module includes a first capacitor, a second capacitor, and a third capacitor; the first capacitor, the second capacitor, and the third capacitor are connected in parallel to form a parallel structure, and the parallel structure is located between the voltage supply terminal of the driver chip and the reference ground.

9. The multi-channel driver chip testing apparatus according to any one of claims 1 to 8, characterized in that: The multi-channel driver chip testing device further includes M electrical signal testing devices; each electrical signal testing device is configured in a one-to-one correspondence with each optical testing unit, and each electrical signal testing device is connected in series with its corresponding optical testing unit.

10. The multi-channel driver chip testing apparatus according to any one of claims 1 to 8, characterized in that: The multi-channel driver chip testing device further includes M electrical signal testing devices. When each testing module also includes a resistor, each electrical signal testing device is configured in a one-to-one correspondence with each resistor, and each electrical signal testing device is connected in parallel with its corresponding resistor.

Images