Embedded 5G edge computing controller

Abstract

The utility model provides an embedded 5G edge computing controller, which comprises a central processing unit CPU, a 5G module, an ADC module, a DAC module, a WIFI module and a DDR4 memory, and is characterized in that the central processing unit CPU is connected with the 5G module through a miniPCIE interface, the central processing unit CPU is connected with the ADC module and the DAC module through SPI interfaces, the central processing unit CPU is connected with the WIFI module through an SDIO interface, and the central processing unit CPU is connected with the DDR4 memory through a DDR interface. A core chip and an operating system of the equipment are all localized, domestic replacement and autonomous controllability are really achieved, meanwhile, the safety of data transmission is considered, the bandwidth is improved, delay is reduced, multiple interfaces are expanded, convenient secondary development is provided, and the requirements of multiple aspects such as data collection, data calculation and data secure transmission in the power field can be met.

Description

Technical Field

[0001] This invention relates to the fields of communications, the Internet of Things, and power, and specifically to an embedded 5G edge computing controller. Background Technology

[0002] In the current power sector, data transmission demands high bandwidth, low latency, high reliability, closed-loop security, and protection against external attacks and data leakage. Data acquisition requires on-site collection and compatibility with multiple interfaces and protocols such as RS232 / RS485, MQTT, and MODBUS (RTU / TCP). In power 5G network scenarios, edge UPFs need to be deployed closer to power users or distributed energy devices (referring to the relocation of functions and equipment originally implemented at higher levels of the power grid). This offers several advantages: 1) data is localized and closed-loop within the power grid; 2) high-bandwidth applications are smooth and lag-free; 3) control real-time feedback has low latency. These factors place new demands on the functionality and performance of 5G edge computing controllers. Furthermore, in the context of domestic substitution and independent control, the development of 5G edge computing controllers also presents new challenges, requiring the localization of key chips and operating systems.

[0003] Currently, embedded 5G edge computing controllers typically use foreign CPUs such as Intel and operating systems like Linux / COS, providing a limited number of interfaces and using C / C++ as the secondary development language. They suffer from the following defects and drawbacks: 1) Key chips such as CPUs / 5G modules and operating systems are not domestically produced, which obviously raises data security issues; 2) They do not support VPN (Virtual Private Network) technology, posing a potential data leakage risk; 3) Secondary development is not user-friendly, requiring the use of relatively complex programming languages ​​such as C / C++; 4) Communication interfaces are insufficient, failing to simultaneously support 5G, RS232 / RS485, WIFI, USB, etc.; 5) Data acquisition interfaces cannot simultaneously support AI, AO, DI, and DO interfaces; 6) There is no video interface. Summary of the Invention

[0004] To address the aforementioned issues, this invention discloses an embedded 5G edge computing controller, which serves as a 5G edge computing gateway in the four-layer architecture of the 5G power Internet of Things (IoT) “cloud-pipe-edge-device”, and has the functions of data aggregation, edge computing, and data transmission.

[0005] The specific plan is as follows:

[0006] An embedded 5G edge computing controller includes: a central processing unit (CPU), a 5G module, an ADC module, a DAC module, a WIFI module, and DDR4 memory. The CPU is connected to the 5G module via a miniPCIE interface, the CPU is connected to both the ADC and DAC modules via SPI interfaces, the CPU is connected to the WIFI module via an SDIO interface, and the CPU is connected to the DDR4 memory via a DDR interface.

[0007] The central processing unit (CPU) has multiple USB 3.0, USB 2.0, GEI, UART, DI, and DO interfaces, and can interact with SIM cards and SD cards. The 5G module is used for 5G communication. The ADC module has multiple AI interfaces. The DAC module has multiple A0 interfaces. The WIFI module is used for WIFI communication.

[0008] The central processing unit (CPU) features high computing power, low power consumption, powerful multimedia capabilities, and rich data interfaces. Its core configuration consists of four A76 cores and four A55 cores, with an instruction set of ARM G610MP4 GPU and clock speeds of 2.4GHz for the A76 cores and 1.8GHz for the A55 cores. It is suitable for industrial tablets, power, rail transportation, server BMCs, network equipment, and intelligent control. It also features high security, high reliability, and low power consumption, supporting both commercial and industrial applications.

[0009] The 5G module supports the four major domestic telecom operators, features a rich set of built-in network protocols, integrates multiple industrial standard interfaces, and supports various drivers and software functions. It can be widely applied in vertical industries such as smart energy, connected vehicles, industrial internet, telemedicine, smart education, high-definition video, smart cities, and home entertainment. Specifically designed for IoT / eMBB / URLLC applications, the 5G Sub-6GHz module boasts high performance and cost-effectiveness, is backward compatible with 4G / 3G networks, supports NSA and SA modes, and supports DFOTA upgrades.

[0010] The ADC module is the CL1606 chip from Core Interconnect (a domestic company), which is a channel synchronous sampling analog-to-digital data acquisition system; it has a built-in second-order anti-aliasing filter, a tracking and holding amplifier, a 16-bit charge redistribution successive approximation analog-to-digital converter, a flexible digital filter, a 2.5V reference voltage source, a reference voltage buffer, and high-speed serial and parallel interfaces.

[0011] The DAC module uses the CL4668 chip from Core Interconnect (a domestic company), which is an eight-channel, 16-bit high-precision, bipolar voltage output device with a voltage output range of 4xVREF. The gain and offset errors of each channel can be calibrated individually. The eight channels are divided into two groups, and the voltage output of each group can also be calibrated individually by its respective offset DAC. The rated supply voltage is VSS=-15V and VDD=+15V.

[0012] The WIFI module is an N200AK-SR or Fn-Link low-cost, low-power module; it provides a 20MHz / 40MHz coexistence mechanism to ensure backward and network compatibility; the physical rate can reach RX229Mbps and TX286.8Mbps; it complies with IEEE802.11a / b / g / n / ac / ax standards; it supports 2.4G+5G dual-band, 20 / 40MHz bandwidth; Wi-Fi security: WEP / WPA / WPA2 / WPA3-SAE personal version, MFP; it supports simultaneous use of STA, SoftAP, and Wi-FiDirect modes; it supports STBC and beamforming; it supports Wi-Fi 6TWT; the maximum physical rate at 40MHz is RX229Mbps and TX286.8Mbps; it supports SDIO2.0, UART, or USB2.0; and it supports WLAN-Bluetooth collaborative operation.

[0013] The beneficial effects of this invention are as follows:

[0014] The core chips and operating system of this equipment are all domestically produced, truly achieving domestic substitution and independent control. At the same time, it takes into account the security of data transmission, improves bandwidth, reduces latency, expands multiple interfaces, and provides convenient secondary development, which can meet the needs of data acquisition, data calculation, and secure data transmission in the power industry. Attached Figure Description

[0015] Figure 1 This is a system block diagram of the present invention. Detailed Implementation

[0016] The present invention will be further illustrated below with reference to the accompanying drawings and specific embodiments. It should be understood that the following specific embodiments are for illustrative purposes only and are not intended to limit the scope of the invention.

[0017] As shown in the figure, the present invention provides an embedded 5G edge computing controller, including: a central processing unit (CPU), a 5G module, an ADC module, a DAC module, a WIFI module, and DDR4 memory. The CPU is connected to the 5G module via a miniPCIE interface, the CPU is connected to the ADC module and the DAC module via SPI interfaces, the CPU is connected to the WIFI module via an SDIO interface, and the CPU is connected to the DDR4 memory via a DDR interface.

[0018] In this embodiment, the central processing unit (CPU) has multiple USB 3.0, USB 2.0, GEI, UART, DI, and DO interfaces, and can interact with SIM cards and SD cards. The 5G module is used for 5G communication, the ADC module has multiple AI interfaces, the DAC module has multiple A0 interfaces, and the WIFI module is used for WIFI communication.

[0019] In this embodiment, the central processing unit (CPU) features high computing power, low power consumption, powerful multimedia capabilities, and rich data interfaces. Its core configuration consists of four A76 cores and four A55 cores, with an instruction set of ARMG610MP4 GPU and clock speeds of 2.4GHz for the A76 cores and 1.8GHz for the A55 cores. It is suitable for industrial tablets, power systems, rail transportation, server BMCs, network equipment, and intelligent control. It also features high security, high reliability, and low power consumption, supporting both commercial and industrial applications.

[0020] In this embodiment, the 5G module supports the four major domestic telecom operators, has a rich set of built-in network protocols, integrates multiple industrial standard interfaces, and supports various driver and software functions. It can be widely used in vertical industries such as smart energy, connected vehicles, industrial internet, telemedicine, smart education, high-definition video, smart cities, and home entertainment. It is a 5G Sub-6GHz module specifically designed for IoT / eMBB / URLLC applications, featuring high performance and cost-effectiveness, backward compatibility with 4G / 3G networks, support for NSA and SA modes, and DFOTA upgrades.

[0021] In this embodiment, the ADC module is the CL1606 chip from Core Interconnect (a domestic company), which is a channel synchronous sampling analog-to-digital data acquisition system; it has a built-in second-order anti-aliasing filter, a track-and-hold amplifier, a 16-bit charge redistribution successive approximation analog-to-digital converter, a flexible digital filter, a 2.5V reference voltage source, a reference voltage buffer, and high-speed serial and parallel interfaces.

[0022] In this embodiment, the DAC module is the CL4668 chip from Core Interconnect (a domestic company), which is an eight-channel, 16-bit high-precision, bipolar voltage output device with a voltage output range of 4xVREF. The gain error and offset error of each channel can be calibrated individually. The eight channels are divided into two groups, and the voltage output of each group can also be calibrated individually by its respective offset DAC. The rated power supply voltage is VSS=-15V and VDD=+15V.

[0023] In this embodiment, the WIFI module is an N200AK-SR or Fn-Link low-cost, low-power module; it provides a 20MHz / 40MHz coexistence mechanism to ensure backward compatibility and network compatibility; the physical rate can reach RX229Mbps and TX286.8Mbps; it complies with IEEE802.11a / b / g / n / ac / ax standards; it supports 2.4G+5G dual-band, 20 / 40MHz bandwidth; Wi-Fi security: WEP / WPA / WPA2 / WPA3-SAE personal version, MFP; it supports simultaneous use of STA, SoftAP, and Wi-FiDirect modes; it supports STBC and beamforming; it supports Wi-Fi 6TWT; the maximum physical rate of RX is 229Mbps and TX is 286.8Mbps at 40MHz; it supports SDIO2.0, UART, or USB2.0; and it supports WLAN-Bluetooth collaborative operation.

[0024] Furthermore, the CPU processor in this solution can be Qualcomm QCS8250 (non-domestic), RK3576, etc.; the 5G module can be replaced by Qualcomm QCM6490, Huawei MH5000, MediaTek T750; the CL1606 chip can be replaced by Dixin Technology GAD7689, Chipsea CS1259B; the CL4668 chip can be replaced by TI's DAC8568, ADI's AD5768; the WIFI module can be replaced by Qualcomm QCA9377, Broadcom BCM4331, MediaTek MT7621A, Realtek RTL8188EUS; and the secondary development language can be C / C++ / Python, etc.

[0025] Those skilled in the art can also implement this using other CPUs and other main chips, along with a Linux operating system and corresponding software. This allows for adjustments to transmission bandwidth and latency based on requirements, and provides languages ​​such as C / C++ / Python for secondary development, flexibly balancing needs and costs. Alternatively, those skilled in the art can use non-domestic chips and operating systems, but this may present certain security challenges.

[0026] This invention achieves localization of the 5G edge computing controller by employing a domestically produced main processor (Rockchip Electronics), a power HarmonyOS, a 5G chip (Unisoc), an analog signal acquisition and control chip (Core Interconnect), and a WIFI chip (Aike Micro Semiconductor Co., Ltd.). It enhances data transmission security by using IPSec (Internet Protocol Security) VPN, L2TP (Layer 2 Tunneling Protocol) VPN, and Open VPN (an open-source VPN solution based on SSL / TLS encryption). The use of high-performance hardware and software increases transmission bandwidth, reduces latency, expands various interfaces, and provides convenient secondary development, thereby meeting the diverse needs of the power sector in data acquisition, data computation, and secure data transmission.

[0027] The technical means disclosed in this invention are not limited to those disclosed in the above embodiments, but also include technical solutions composed of any combination of the above technical features. It should be noted that those skilled in the art can make various improvements and modifications without departing from the principles of this invention, and these improvements and modifications are also considered within the scope of protection of this invention.

Claims

1. An embedded 5G edge computing controller, characterized in that: It includes a central processing unit (CPU), a 5G module, an ADC module, a DAC module, a WIFI module, and DDR4 memory. The CPU is connected to the 5G module, ADC module, DAC module, WIFI module, and DDR4 memory.

2. The embedded 5G edge computing controller according to claim 1, characterized in that: The CPU is connected to the 5G module via a miniPCIE interface, the CPU is connected to the ADC module and the DAC module via SPI interfaces, the CPU is connected to the WIFI module via an SDIO interface, and the CPU is connected to the DDR4 memory via a DDR interface.

3. An embedded 5G edge computing controller according to claim 1, characterized in that: The central processing unit (CPU) has multiple USB 3.0, USB 2.0, GEI, UART, DI, and DO interfaces, and can exchange information with SIM cards and SD cards.

4. An embedded 5G edge computing controller according to claim 1, characterized in that: The 5G module is used for 5G communication, and the WIFI module is used for WIFI communication.

5. An embedded 5G edge computing controller according to claim 1, characterized in that: The ADC module has multiple AI interfaces, and the DAC module has multiple A0 interfaces.

6. An embedded 5G edge computing controller according to claim 1, characterized in that: The central processing unit (CPU) has the following core configuration: quad-core A76 + quad-core A55, instruction set: ARMG610MP4 GPU, and clock speed parameters: A76 core clock speed 2.4GHz, A55 core clock speed 1.8GHz; it is suitable for industrial tablets, power, rail transportation, server BMC, network equipment and intelligent control; it supports commercial and industrial classifications.

7. An embedded 5G edge computing controller according to claim 1, characterized in that: The 5G module supports the four major domestic operators and is a 5G Sub-6GHz module specifically designed for IoT / eMBB / URLLC applications. It is backward compatible with 4G / 3G networks, supports NSA and SA modes, and supports DFOTA upgrades.

8. An embedded 5G edge computing controller according to claim 1, characterized in that: The ADC module chip integrates a second-order anti-aliasing filter, a track-and-hold amplifier, a 16-bit charge redistribution successive approximation analog-to-digital converter, a flexible digital filter, a 2.5V reference voltage source, a reference voltage buffer, and high-speed serial and parallel interfaces.

9. An embedded 5G edge computing controller according to claim 1, characterized in that: The DAC module has eight channels, 16-bit high precision, bipolar voltage output devices; the voltage output range is 4xVREF; the gain error and offset error of each channel can be calibrated individually; the eight channels are divided into two groups, and the voltage output of each group can also be calibrated individually by their respective offset DACs; the rated supply voltage is VSS=-15V, VDD=+15V.

10. An embedded 5G edge computing controller according to claim 1, characterized in that: The WIFI module provides a 20MHz / 40MHz coexistence mechanism; the physical speed can reach RX229Mbps and TX286.8Mbps; it complies with IEEE802.11a / b / g / n / ac / ax standards; it supports 2.4G+5G dual-band, 20 / 40MHz bandwidth; Wi-Fi security: WEP / WPA / WPA2 / WPA3-SAE Personal Edition, MFP; Supports simultaneous use of STA, SoftAP, and Wi-FiDirect modes; supports STBC and beamforming; supports Wi-Fi 6TWT; RX up to 229Mbps and TX up to 286.8Mbps physical rate at 40MHz; supports SDIO 2.0, UART, or USB 2.0; supports WLAN-Bluetooth collaborative operation.

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