Signal output circuit, chip and vehicle
By setting up a selection unit and an instruction input unit within the chip, multiple monitoring units can share a single pin, solving the problem of increased chip pin count, reducing chip size, and supporting fault location.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- NANJING ZIJING SEMICONDUCTOR CO LTD
- Filing Date
- 2025-04-30
- Publication Date
- 2026-05-08
AI Technical Summary
Chips are prone to failure under extreme temperatures or when subjected to strong electromagnetic interference. In existing technologies, multiple monitoring units need to be connected to multiple pins of the chip, resulting in an increase in the number of pins and chip size.
A first selection unit and an instruction input unit are set in the chip. The instruction input unit controls the first selection unit to output signals from multiple monitoring units to a chip pin. A multiplexer switch is used to enable multiple monitoring units to share a single pin.
This reduces the number of chip pins used, helping to reduce chip size, and enables fault location by reading pin signals.
Smart Images
Figure CN224217094U_ABST
Abstract
Description
Technical Field
[0001] This application belongs to the field of chip design technology, and in particular relates to a signal output circuit, a chip, and a vehicle. Background Technology
[0002] Chips can malfunction under certain conditions, such as extreme temperatures or strong electromagnetic interference. Some chips currently incorporate multiple monitoring units to monitor various functional modules. When a module malfunctions, the corresponding monitoring unit can output an alarm signal. To enable these alarm signals to be output externally, each monitoring unit needs to be connected to a pin on the chip, thus increasing the number of pins on the chip. Utility Model Content
[0003] This application provides a signal output circuit, a chip, and a vehicle, which can solve the problem of multiple monitoring units needing to use multiple pins of the chip, resulting in an increase in the number of pins on the chip.
[0004] In a first aspect, embodiments of this application provide a signal output circuit, including a first selection unit disposed within a chip and an instruction input unit disposed within the chip. The instruction input unit is connected to the control terminal of the first selection unit. Multiple input terminals of the first selection unit are used to be connected to the output terminals of multiple monitoring units within the chip, and the output terminal of the first selection unit is used to be connected to a pin of the chip.
[0005] The instruction input unit is used to receive a first selection instruction and transmit the first selection instruction to the first selection unit; the first selection unit is used to output the signal output by the first target monitoring unit among the multiple monitoring units to the pin of the chip according to the first selection instruction.
[0006] In one possible implementation of the first aspect, the first selection unit includes a first selection switch, the control terminal of the first selection switch is connected to the instruction input unit, a plurality of input terminals of the first selection switch are used to be connected to the output terminals of a plurality of monitoring units within the chip, and the output terminal of the first selection switch is used to be connected to a pin of the chip.
[0007] In one possible implementation of the first aspect, the signal output circuit further includes a second selection unit, the control terminal of the second selection unit is connected to the instruction input unit, a plurality of input terminals of the second selection unit are used to be connected to the output terminals of a plurality of monitoring units in the chip, and the output terminal of the second selection unit is connected to one input terminal of the first selection switch.
[0008] The instruction input unit is further configured to receive a second selection instruction and transmit the second selection instruction to the second selection unit; the second selection unit is configured to output the signal output by the second target monitoring unit among the plurality of monitoring units to the first selection switch according to the second selection instruction.
[0009] In one possible implementation of the first aspect, the second selection unit includes at least one second selection switch, the control terminal of each second selection switch is connected to the instruction input unit, the plurality of input terminals of each second selection switch are connected to the output terminals of a plurality of monitoring units within the chip, and the output terminal of each second selection switch is connected to one input terminal of the first selection switch.
[0010] In one possible implementation of the first aspect, the signal output circuit further includes a third selection unit, the control terminal of the third selection unit being connected to the instruction input unit, the plurality of input terminals of the third selection unit being used to be connected to the output terminals of the plurality of monitoring units within the chip, and the output terminal of the third selection unit being connected to the input terminal corresponding to the second selection switch.
[0011] The instruction input unit is further configured to receive a third selection instruction and transmit the third selection instruction to the third selection unit; the third selection unit is configured to output the signal output by the third target monitoring unit among the multiple monitoring units to the second selection switch according to the third selection instruction.
[0012] In one possible implementation of the first aspect, the third selection unit includes at least one third selection switch, the control terminal of each third selection switch is connected to the instruction input unit, the plurality of input terminals of each third selection switch are connected to the output terminals of a plurality of monitoring units within the chip, and the output terminal of each third selection switch is connected to one input terminal of a corresponding second selection switch.
[0013] In one possible implementation of the first aspect, the first selection switch is connected to a monitoring unit in a first region of the chip, the second selection switch is connected to a monitoring unit in a second region of the chip, and the third selection switch is connected to a monitoring unit in a third region of the chip, wherein the first region, the second region, and the third region do not overlap.
[0014] In one possible implementation of the first aspect, the instruction input unit includes a register connected to a bus within the chip, and the register is connected to the control terminals of the first selection switch, all the second selection switches, and all the third selection switches, respectively.
[0015] Secondly, embodiments of this application provide a chip including the signal output circuit described in any one of the first aspects.
[0016] Thirdly, embodiments of this application provide a vehicle that includes the chip described in the second aspect.
[0017] The beneficial effects of the embodiments in this application compared with the prior art are:
[0018] The signal output circuit provided in this application includes a first selection unit and an instruction input unit disposed within the chip. The instruction input unit is connected to the control terminal of the first selection unit. Multiple input terminals of the first selection unit are connected to the output terminals of multiple monitoring units within the chip, and the output terminal of the first selection unit is connected to a pin of the chip. Multiple monitoring units can monitor multiple functional modules within the chip respectively and output alarm signals when a functional module malfunctions. When the chip is tested, a first selection instruction is sent to the instruction input unit. The instruction input unit receives the first selection instruction and transmits it to the first selection unit. The first selection unit outputs the signal from a first target monitoring unit among the multiple monitoring units to a pin of the chip according to the first selection instruction. By reading the signal output from the pin, it is possible to determine whether the corresponding functional module has malfunctioned. By connecting the multiple input terminals of the first selection unit to multiple monitoring units respectively and connecting the output terminal of the first selection unit to a pin of the chip, multiple monitoring units share a single chip pin, reducing the use of chip pins and helping to reduce the chip size. Attached Figure Description
[0019] To more clearly illustrate the technical solutions in the embodiments of this application, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0020] Figure 1 This is a schematic diagram of a signal output circuit provided in an embodiment of this application;
[0021] Figure 2 This is a schematic diagram of a signal output circuit provided in another embodiment of this application;
[0022] Figure 3 This is a schematic diagram of a signal output circuit provided in another embodiment of this application.
[0023] In the diagram: 10, chip; 20, pin; 100, first selection unit; 101, first selection switch; 200, instruction input unit; 300, monitoring unit; 400, second selection unit; 401, second selection switch; 500, third selection unit; 501, third selection switch. Detailed Implementation
[0024] In the following description, specific details such as particular system architectures and techniques are set forth for illustrative purposes and not for limitation, in order to provide a thorough understanding of the embodiments of this application. However, those skilled in the art will understand that this application may also be implemented in other embodiments without these specific details. In other instances, detailed descriptions of well-known systems, apparatuses, circuits, and methods have been omitted so as not to obscure the description of this application with unnecessary detail.
[0025] It should be understood that, when used in this application specification and the appended claims, the term "comprising" indicates the presence of the described features, integrals, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components and / or a collection thereof.
[0026] It should also be understood that the term “and / or” as used in this application specification and the appended claims means any combination of one or more of the associated listed items and all possible combinations, and includes such combinations.
[0027] As used in this application specification and the appended claims, the term "if" may be interpreted, depending on the context, as "when," "once," "in response to determination," or "in response to detection." Similarly, the phrase "if determined" or "if [the described condition or event] is detected" may be interpreted, depending on the context, as "once determined," "in response to determination," "once [the described condition or event] is detected," or "in response to detection of [the described condition or event]."
[0028] Furthermore, in the description of this application and the appended claims, the terms "first," "second," "third," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance.
[0029] References to "one embodiment" or "some embodiments" as described in this specification mean that one or more embodiments of this application include a specific feature, structure, or characteristic described in connection with that embodiment. Therefore, the phrases "in one embodiment," "in some embodiments," "in other embodiments," "in still other embodiments," etc., appearing in different parts of this specification do not necessarily refer to the same embodiment, but rather mean "one or more, but not all, embodiments," unless otherwise specifically emphasized. The terms "comprising," "including," "having," and variations thereof mean "including but not limited to," unless otherwise specifically emphasized.
[0030] Chips can malfunction under certain conditions, such as extreme temperatures or strong electromagnetic interference. Currently, some chips incorporate multiple monitoring units (e.g., various power supply monitoring units, signal monitoring units, and grounding monitoring units) to monitor different functional modules. When a functional module malfunctions, the corresponding monitoring unit can output an alarm signal. To enable these alarm signals to be output externally, each monitoring unit needs to be connected to a pin on the chip. When multiple monitoring units are used, a corresponding number of pins are required, meaning each monitoring unit occupies one pin. This increases the number of pins on the chip, leading to a larger chip size and hindering miniaturization design.
[0031] Based on the above problems, embodiments of this application provide a signal output circuit, such as... Figure 1As shown, the signal output circuit includes a first selection unit 100 and an instruction input unit 200 disposed within the chip 10. The instruction input unit 200 is connected to the control terminal of the first selection unit 100. Multiple input terminals of the first selection unit 100 are connected to the output terminals of multiple monitoring units 300 within the chip 10, and the output terminal of the first selection unit 100 is connected to a pin 20 of the chip 10. The multiple monitoring units 300 can monitor multiple functional modules within the chip 10 respectively and output alarm signals when a functional module malfunctions. When testing the chip 10, after determining the first target functional module to be tested, a first selection instruction corresponding to the first target functional module is sent to the instruction input unit 200. The instruction input unit 200 receives the first selection instruction and transmits it to the first selection unit 100. The first selection unit 100 is used to output the signal from the first target monitoring unit (electrically connected to the first target functional module and used to monitor the first target functional module) among the multiple monitoring units 300 to pin 20 of the chip 10 according to the first selection instruction. By reading the signal output from pin 20, it can be determined whether the first functional module has malfunctioned. Therefore, in this application, by connecting the multiple input terminals of the first selection unit 100 to the multiple monitoring units 300 respectively, and connecting the output terminal of the first selection unit 100 to one pin 20 of the chip 10, that is, multiple monitoring units 300 share one chip pin 20, the use of chip pin 20 is reduced, which helps to reduce the size of the chip.
[0032] For example, the first selection unit 100 includes a first selection switch 101. The control terminal of the first selection switch 101 is connected to the instruction input unit 200. Multiple input terminals of the first selection switch 101 are used to connect to the output terminals of multiple monitoring units 300 in the chip 10. The output terminal of the first selection switch 101 is used to connect to a pin 20 of the chip 10.
[0033] Specifically, when testing chip 10, the testing equipment can be pre-connected to pin 20 of chip 10, which is the pin 20 connected to the first selection switch 101. After determining the first functional module to be tested, a first selection command corresponding to the first functional module is sent to the command input unit 200. The command input unit 200 receives the first selection command and transmits it to the control terminal of the first selection switch 101. The first selection unit 100 is used to control the target input terminal and output terminal to be turned on according to the first selection command. At this time, the signal output by the first target monitoring unit connected to the target input terminal will be transmitted to a pin 20 of chip 10. Thus, when chip 10 fails, by reading the signal of pin 20 of chip 10 through the testing equipment, it can be known whether the first target functional module connected to the first target monitoring unit is faulty, thereby realizing the fault location inside chip 10. Meanwhile, since multiple input terminals of the first selection switch 101 are respectively connected to multiple monitoring units 300, and the output terminal of the first selection switch 101 is connected to one pin 20 of the chip 10, multiple monitoring units 300 only need to occupy one pin 20 of the chip 10, reducing the number of pins 20 used in the chip 10 and helping to reduce the size of the chip 10.
[0034] In some embodiments, such as Figure 2 As shown, the signal output circuit also includes a second selection unit 400. The control terminal of the second selection unit 400 is connected to the instruction input unit 200. Multiple input terminals of the second selection unit 400 are used to connect to the output terminals of multiple monitoring units 300 in the chip 10. The output terminal of the second selection unit 400 is connected to one input terminal of the first selection switch 101.
[0035] Specifically, some chips 10 may contain a large number of functional modules, thus requiring a large number of monitoring units 300 to monitor these modules. Using only a first selection switch 101 may not be able to connect to all monitoring units 300, thus failing to achieve the effect of all functional modules within chip 10 sharing a single pin. Therefore, the signal output circuit provided in this embodiment also includes a second selection unit 400. The control terminal of the second selection unit 400 is connected to the instruction input unit 200, and multiple input terminals of the second selection unit 400 are used to connect correspondingly to the output terminals of multiple monitoring units 300 within chip 10. The output terminal of the second selection unit 400 is connected to one input terminal of the first selection switch 101.
[0036] When testing chip 10, after determining the second target functional module to be tested, a first selection instruction and a second selection instruction corresponding to the second target functional module are input to the instruction input unit 200. Upon receiving the first selection instruction and the second selection instruction, the instruction input unit 200 sends the first selection instruction to the first selection switch 101 and the second selection instruction to the second selection unit 400.
[0037] When the second target monitoring unit corresponding to the second target function module is connected to the second selection unit 400, the second selection unit 400 outputs the signal from the second target monitoring unit among the multiple monitoring units 300 to the first selection switch 101 according to the second selection instruction. The first selection switch 101 controls the input terminal and output terminal connected to the second selection unit 400 to be connected according to the first selection instruction. At this time, the signal output by the second target monitoring unit can be transmitted to pin 20 of the chip 10 through the second selection unit 400 and the first selection switch 101.
[0038] When the second target monitoring unit corresponding to the second target function module is connected to the first selection switch 101, the second selection unit 400 controls all monitoring units 300 connected to the second selection unit 400 to disconnect from the first selection switch 101 according to the second selection instruction. All monitoring units 300 connected to the second selection unit 400 will be unable to output signals to the first selection switch 101. The first selection switch 101 controls the input and output terminals connected to the second target monitoring unit to be turned on according to the first selection instruction. At this time, the signal output by the second target monitoring unit can be transmitted to pin 20 of the chip 10 through the first selection switch 101.
[0039] When chip 10 malfunctions, the signal from pin 20 of chip 10 can be read by a testing device to determine whether the second target functional module connected to the second target monitoring unit is faulty, thus enabling fault location within chip 10. Therefore, by adding a second selection unit 400 to the first selection switch 101 within chip 10, the number of connected monitoring units 300 can be increased. This ensures that both the first selection switch 101 and the second selection unit 400 can connect to all monitoring units 300 within chip 10, and only requires one pin 20 of chip 10, reducing the number of pins used and helping to reduce the size of chip 10.
[0040] For example, the second selection unit 400 includes at least one second selection switch 401. The control terminal of each second selection switch 401 is connected to the instruction input unit 200. Multiple input terminals of each second selection switch 401 are used to connect to the output terminals of multiple monitoring units 300 in the chip 10. The output terminal of each second selection switch 401 is connected to one input terminal of the first selection switch 101.
[0041] Specifically, during the testing of chip 10, after determining the second target functional module to be tested, a first selection instruction corresponding to the second target functional module and multiple different second selection instructions are input to the instruction input unit 200. Upon receiving the first and second selection instructions, the instruction input unit 200 sends the first selection instruction to the first selection switch 101 and sends the multiple different second selection instructions to the multiple second selection switches 401 respectively.
[0042] When the second target monitoring unit corresponding to the second target function module is connected to a second selection switch 401, the second selection switch 401 outputs the signal from the second target monitoring unit among the multiple monitoring units 300 to the first selection switch 101 according to the second selection instruction. The first selection switch 101 controls the input terminal and output terminal connected to the second selection switch 401 to be connected according to the first selection instruction. At this time, the signal output by the second target monitoring unit can be transmitted to pin 20 of the chip 10 through the second selection switch 401 and the first selection switch 101.
[0043] When the second target monitoring unit corresponding to the second target function module is connected to the first selection switch 101, the second selection switch 401 controls all monitoring units 300 connected to the second selection switch 401 to disconnect from the first selection switch 101 according to the second selection command. All monitoring units 300 connected to the second selection switch 401 will be unable to output signals to the first selection switch 101. The first selection switch 101 controls the input and output terminals connected to the second target monitoring unit to be turned on according to the first selection command. At this time, the signal output by the second target monitoring unit can be transmitted to pin 20 of the chip 10 through the first selection switch 101.
[0044] When chip 10 malfunctions, the signal from pin 20 of chip 10 can be read by a testing device to determine whether the second target functional module connected to the second target monitoring unit is faulty, thus enabling fault location within chip 10. Therefore, by adding at least one second selection switch 401 to the existing first selection switch 101 within chip 10, the number of connected monitoring units 300 can be increased. This ensures that both the first and second selection switches 101 can connect to all monitoring units 300 within chip 10, and only requires one pin 20 of chip 10, reducing the number of pins used and contributing to a smaller chip size.
[0045] For some large chips, there are a large number of functional modules. To monitor each functional module, a corresponding monitoring unit needs to be set up within the chip for each module. This results in a large number of monitoring units within the chip. Using only a first selection switch 101 and at least one second selection switch 401 may not be able to connect to all monitoring units 300, thus preventing the chip from achieving the effect of all functional modules sharing a single pin. Based on the above reasons, as... Figure 3 As shown, the signal output circuit provided in this application embodiment further includes a third selection unit 500. The control terminal of the third selection unit 500 is connected to the instruction input unit 200. Multiple input terminals of the third selection unit 500 are used to be connected to the output terminals of multiple monitoring units 300 in the chip 10. The output terminal of the third selection unit 500 is connected to the input terminal of the corresponding second selection switch 401.
[0046] Specifically, during the testing of chip 10, after determining the third target functional module to be tested, a first selection instruction, a second selection instruction, and a third selection instruction corresponding to the third target functional module are input to the instruction input unit 200. Upon receiving the first selection instruction, the second selection instruction, and the third selection instruction, the instruction input unit 200 sends the first selection instruction to the first selection switch 101, the second selection instruction to the second selection switch 401, and the third selection instruction to the third selection unit 500.
[0047] When the third target monitoring unit corresponding to the third target function module is connected to the third selection unit 500, the third selection unit 500 outputs the signal from the third target monitoring unit among the multiple monitoring units 300 to the second selection switch 401 according to the third selection instruction. The second selection switch 401 controls the input terminal and output terminal connected to the third selection unit 500 to be connected according to the second selection instruction, and the first selection switch 101 controls the input terminal and output terminal connected to the second selection unit 400 to be connected according to the first selection instruction. At this time, the signal output by the third target monitoring unit can be transmitted to pin 20 of the chip 10 through the third selection unit 500, the second selection switch 401 and the first selection switch 101.
[0048] When the third target monitoring unit corresponding to the third target function module is connected to the second selection switch 401, the third selection unit 500 controls all monitoring units 300 connected to the third selection unit 500 to disconnect according to the third selection instruction. All monitoring units 300 connected to the third selection unit 500 will be unable to output signals to the second selection switch 401. The second selection switch 401 outputs the signal from the third target monitoring unit among the multiple monitoring units 300 to the first selection switch 101 according to the second selection instruction. The first selection switch 101 controls the input and output terminals connected to the second selection unit 400 to be connected according to the first selection instruction. At this time, the signal output by the second target monitoring unit can be transmitted to pin 20 of the chip 10 through the second selection unit 400 and the first selection switch 101.
[0049] When the third target monitoring unit corresponding to the third target function module is connected to the first selection switch 101, the third selection unit 500 controls all monitoring units 300 connected to the third selection unit 500 to disconnect according to the third selection instruction. All monitoring units 300 connected to the third selection unit 500 will be unable to output signals to the second selection switch 401. The second selection unit 400 controls all monitoring units 300 connected to the second selection unit 400 to disconnect from the first selection switch 101 according to the second selection instruction. All monitoring units 300 connected to the second selection unit 400 will be unable to output signals to the first selection switch 101. The first selection switch 101 controls the input and output terminals connected to the third target monitoring unit to be turned on according to the first selection instruction. At this time, the signal output by the third target monitoring unit can be transmitted to pin 20 of the chip 10 through the first selection switch 101.
[0050] When chip 10 malfunctions, the signal from pin 20 of chip 10 can be read by a testing device to determine whether the functional module connected to the third target monitoring unit is faulty, thus enabling fault location within chip 10. Therefore, by adding a third selection unit 500 to the existing first selection switch 101 and second selection switch 401 within chip 10, more monitoring units 300 can be connected. This ensures that the first selection switch 101, second selection switch 401, and third selection unit 500 can connect all monitoring units 300 within chip 10, and only requires one pin 20 of chip 10, reducing the number of pins 20 used and contributing to a smaller chip size.
[0051] For example, the third selection unit 500 includes at least one third selection switch 501. The control terminal of each third selection switch 501 is connected to the instruction input unit 200. Multiple input terminals of each third selection switch 501 are used to connect to the output terminals of multiple monitoring units 300 in the chip 10. The output terminal of each third selection switch 501 is connected to one input terminal of a corresponding second selection switch 401.
[0052] Specifically, during the testing of chip 10, after determining the third target functional module to be tested, a first selection instruction, a second selection instruction, and a third selection instruction are input to the instruction input unit 200. Upon receiving the first selection instruction, the second selection instruction, and the third selection instruction, the instruction input unit 200 sends the first selection instruction to the first selection switch 101, the second selection instruction to the second selection switch 401, and the third selection instruction to the third selection switch 501.
[0053] When the third target monitoring unit corresponding to the third target function module is connected to the third selection switch 501, the third selection switch 501 outputs the signal from the third target monitoring unit among the multiple monitoring units 300 to the second selection switch 401 according to the third selection instruction. The second selection switch 401 controls the input terminal and output terminal connected to the third selection switch 501 to be connected according to the second selection instruction, and the first selection switch 101 controls the input terminal and output terminal connected to the second selection switch 401 to be connected according to the first selection instruction. At this time, the signal output by the third target monitoring unit can be transmitted to pin 20 of the chip 10 through the third selection switch 501, the second selection switch 401 and the first selection switch 101.
[0054] If the third target monitoring unit corresponding to the third target function module is connected to the second selection switch 401, the third selection switch 501 controls all monitoring units 300 connected to the third selection switch 501 to disconnect according to the third selection instruction. All monitoring units 300 connected to the third selection switch 501 will be unable to output signals to the second selection switch 401. The second selection switch 401 outputs the signal from the third target monitoring unit among the multiple monitoring units 300 to the first selection switch 101 according to the second selection instruction. The first selection switch 101 controls the input and output terminals connected to the second selection switch 401 to be connected according to the first selection instruction. At this time, the signal output by the second target monitoring unit can be transmitted to pin 20 of the chip 10 through the second selection switch 401 and the first selection switch 101.
[0055] When the third target monitoring unit corresponding to the third target function module is connected to the first selection switch 101, the third selection switch 501 controls all monitoring units 300 connected to the third selection switch 501 to disconnect according to the third selection command. All monitoring units 300 connected to the third selection switch 501 will be unable to output signals to the second selection switch 401. The second selection switch 401 controls all monitoring units 300 connected to the second selection switch 401 to disconnect from the first selection switch 101 according to the second selection command. All monitoring units 300 connected to the second selection switch 401 will be unable to output signals to the first selection switch 101. The first selection switch 101 controls the input and output terminals connected to the second target monitoring unit to be turned on according to the first selection command. At this time, the signal output by the second target monitoring unit can be transmitted to pin 20 of the chip 10 through the first selection switch 101.
[0056] When chip 10 malfunctions, the signal from pin 20 of chip 10 can be read by a testing device to determine whether the functional module connected to the third target monitoring unit is faulty, thus enabling fault location within chip 10. Therefore, by adding a third selector switch 501 to the existing first selector switch 101 and second selector switch 401 within chip 10, more monitoring units 300 can be connected. This ensures that the first selector switch 101, second selector switch 401, and third selector switch 501 can connect all monitoring units 300 within the large chip 10, and only requires one pin 20 of chip 10, reducing the number of pins 20 used and contributing to a smaller chip size.
[0057] For example, the first selection switch 101, the second selection switch 401 and the third selection switch 501 can all be multiplexers (MUX).
[0058] In some embodiments, since the functional modules in chip 10 are distributed in different locations, the monitoring units 300 corresponding to each functional module are distributed in different locations within chip 10. To reduce the length of the connection lines between the monitoring units 300 and the selector switches, chip 10 is divided into a first region, a second region, and a third region, and these regions do not overlap. The monitoring units 300 in the first region are connected to the first selector switch 101, the monitoring units 300 in the second region are connected to the second selector switch 401, and the monitoring units 300 in the third region are connected to the third selector switch 501. The first region is closest to pin 20 of chip 10, while the third region is furthest from pin 20. The third region lies between the first and second regions. Signals output from the monitoring unit 300 in the third region can be sequentially output to pin 20 via the third selection switch 501, the second selection switch 401, and the first selection switch 101. Similarly, signals output from the monitoring unit 300 in the second region can be sequentially output to pin 20 via the second selection switch 401 and the first selection switch 101, and signals output from the monitoring unit 300 in the first region can be output to pin 20 via the first selection switch 101. Therefore, all monitoring units 300 within chip 10 can be connected using the first selection switch 101, the second selection switch 401, and the third selection switch 501, reducing the length of the connection lines between the selection switches and the monitoring units 300 and simplifying the design of chip 10.
[0059] In some embodiments, the multiple monitoring units 300 within the chip 10 are classified into a first functional type, a second functional type, and a third functional type according to their functions. Multiple input terminals of the first selection switch 101 are connected to multiple monitoring units 300 of the first functional type, multiple input terminals of the second selection switch 401 are connected to multiple monitoring units 300 of the second functional type, and multiple input terminals of the third selection switch 501 are connected to multiple monitoring units 300 of the third functional type.
[0060] Specifically, chip 10 contains various functional modules with different functions. Therefore, the monitoring units 300 used to monitor these modules also have different functions. For example, monitoring units 300 can be classified according to function as power monitoring units 300, signal monitoring units 300, and grounding monitoring units 300, etc. Thus, the multiple monitoring units 300 within chip 10 are classified into first functional types, second functional types, and third functional types. Multiple input terminals of the first selection switch 101 are connected to multiple monitoring units 300 of the first functional type, multiple input terminals of the second selection switch 401 are connected to multiple monitoring units 300 of the second functional type, and multiple input terminals of the third selection switch 501 are connected to multiple monitoring units 300 of the third functional type. In this way, monitoring units 300 with the same function are connected to the same selection switch, realizing the functional division of the monitoring units 300. When testing multiple monitoring units 300 with the same function, the tester only needs to change the control command of the corresponding selection switch, without needing to change the control commands of other selection switches. This reduces the operational difficulty for the tester and helps improve testing efficiency.
[0061] In some embodiments, the instruction input unit 200 includes a register connected to a bus within the chip 10, and the register is connected to the control terminals of the first selection switch 101, all the second selection switches 401, and all the third selection switches 501, respectively.
[0062] Specifically, when testing chip 10, the tester can send a selection command to chip 10 through the test equipment. The register can obtain the selection command through the bus inside chip 10, and then send the selection command to the corresponding first selection switch 101, second selection switch 401 and third selection switch 501 respectively, so as to transmit the signal output by the target monitoring unit among the multiple monitoring units 300 to the pin 20 of chip 10, thereby realizing the testing of chip 10.
[0063] This application also provides a chip including the signal output circuit described above. The signal output circuit includes a first selection unit and an instruction input unit disposed within the chip. The instruction input unit is connected to the control terminal of the first selection unit. Multiple input terminals of the first selection unit are connected to the output terminals of multiple monitoring units within the chip, and the output terminal of the first selection unit is connected to a pin of the chip. Multiple monitoring units can monitor multiple functional modules within the chip respectively and output alarm signals when a functional module malfunctions. When the chip is tested, a first selection instruction is sent to the instruction input unit. The instruction input unit receives the first selection instruction and transmits it to the first selection unit. The first selection unit is used to output the signal output by a first target monitoring unit among the multiple monitoring units to a pin of the chip according to the first selection instruction. By reading the signal output from the pin, it is possible to determine whether the corresponding functional module has malfunctioned. By connecting the multiple input terminals of the first selection unit to multiple monitoring units respectively and connecting the output terminal of the first selection unit to a pin of the chip, only one chip pin is needed, reducing the number of chip pins and helping to reduce the chip size.
[0064] This application also provides a vehicle including the aforementioned chip. The signal output circuit in the chip includes a first selection unit and an instruction input unit disposed within the chip. The instruction input unit is connected to the control terminal of the first selection unit. Multiple input terminals of the first selection unit are used to connect correspondingly to the output terminals of multiple monitoring units within the chip, and the output terminal of the first selection unit is used to connect to a pin of the chip. Multiple monitoring units can monitor multiple functional modules within the chip respectively and output alarm signals when a functional module malfunctions. When testing the chip, a first selection instruction is sent to the instruction input unit. The instruction input unit receives the first selection instruction and transmits it to the first selection unit. The first selection unit is used to output the signal output by a first target monitoring unit among the multiple monitoring units to the pin of the chip according to the first selection instruction. By reading the signal output from the pin, it is possible to know whether the corresponding functional module has malfunctioned. By connecting the multiple input terminals of the first selection unit to multiple monitoring units respectively and connecting the output terminal of the first selection unit to a pin of the chip, only one chip pin is needed, reducing the number of chip pins and helping to reduce the chip size.
[0065] The above-described embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be included within the protection scope of this application.
Claims
1. A signal output circuit, characterized in that, It includes a first selection unit disposed within the chip and an instruction input unit disposed within the chip. The instruction input unit is connected to the control terminal of the first selection unit. Multiple input terminals of the first selection unit are used to be connected to the output terminals of multiple monitoring units within the chip, and the output terminal of the first selection unit is used to be connected to a pin of the chip. The instruction input unit is used to receive a first selection instruction and transmit the first selection instruction to the first selection unit; the first selection unit is used to output the signal output by the first target monitoring unit among the multiple monitoring units to the pin of the chip according to the first selection instruction.
2. The signal output circuit according to claim 1, characterized in that, The first selection unit includes a first selection switch. The control terminal of the first selection switch is connected to the instruction input unit. Multiple input terminals of the first selection switch are used to connect to the output terminals of multiple monitoring units within the chip. The output terminal of the first selection switch is used to connect to a pin of the chip.
3. The signal output circuit according to claim 2, characterized in that, The signal output circuit further includes a second selection unit. The control terminal of the second selection unit is connected to the instruction input unit. Multiple input terminals of the second selection unit are used to be connected to the output terminals of multiple monitoring units in the chip. The output terminal of the second selection unit is connected to one input terminal of the first selection switch. The instruction input unit is further configured to receive a second selection instruction and transmit the second selection instruction to the second selection unit; the second selection unit is configured to output the signal output by the second target monitoring unit among the plurality of monitoring units to the first selection switch according to the second selection instruction.
4. The signal output circuit according to claim 3, characterized in that, The second selection unit includes at least one second selection switch. The control terminal of each second selection switch is connected to the instruction input unit. Multiple input terminals of each second selection switch are used to connect to the output terminals of multiple monitoring units in the chip. The output terminal of each second selection switch is connected to one input terminal of the first selection switch.
5. The signal output circuit according to claim 4, characterized in that, The signal output circuit further includes a third selection unit. The control terminal of the third selection unit is connected to the instruction input unit. Multiple input terminals of the third selection unit are used to be connected to the output terminals of multiple monitoring units in the chip. The output terminal of the third selection unit is connected to the input terminal of the corresponding second selection switch. The instruction input unit is further configured to receive a third selection instruction and transmit the third selection instruction to the third selection unit; the third selection unit is configured to output the signal output by the third target monitoring unit among the multiple monitoring units to the second selection switch according to the third selection instruction.
6. The signal output circuit according to claim 5, characterized in that, The third selection unit includes at least one third selection switch. The control terminal of each third selection switch is connected to the instruction input unit. Multiple input terminals of each third selection switch are used to connect to the output terminals of multiple monitoring units in the chip. The output terminal of each third selection switch is connected to one input terminal of the corresponding second selection switch.
7. The signal output circuit according to claim 6, characterized in that, The first selection switch is connected to a monitoring unit in a first region of the chip, the second selection switch is connected to a monitoring unit in a second region of the chip, and the third selection switch is connected to a monitoring unit in a third region of the chip. The first region, the second region, and the third region do not overlap.
8. The signal output circuit according to claim 6, characterized in that, The instruction input unit includes a register, which is connected to the bus within the chip. The register is connected to the control terminals of the first selection switch, all the second selection switches, and all the third selection switches, respectively.
9. A chip, characterized in that, Includes the signal output circuit as described in any one of claims 1 to 8.
10. A vehicle, characterized in that, Includes the chip described in claim 9.