Line structure

Abstract

The present application provides a circuit structure, which includes: a plurality of insulating layers; a plurality of circuit layers, respectively combined with the plurality of insulating layers; a via structure, formed through the plurality of insulating layers and the plurality of circuit layers; and a filling material, disposed in the via structure, to avoid contact bridging between the plurality of circuit layers.

Description

Technical Field

[0001] This application relates to a circuit structure, and more particularly to a circuit structure that can avoid contact bridging between circuit layers. Background Technology

[0002] With the evolution of semiconductor packaging technology, different packaging types have been developed for semiconductor devices. In order to improve electrical functions and save packaging space, different three-dimensional packaging technologies have been developed, such as fan-out package on package (FO PoP), to accommodate the significantly increased number of input / output ports on various chips, thereby integrating integrated circuits with different functions into a single package structure. This packaging method can leverage the heterogeneous integration characteristics of system-in-package (SiP), and can integrate electronic components with different functions, such as memory, central processing unit, graphics processor, and image application processor, through stacking design to achieve system integration. It is suitable for use in various thin and light electronic products.

[0003] The aforementioned fan-out package stacks sometimes require marking or marking on the package structure, which is achieved using laser engraving technology. For example... Figure 1 As shown, the existing circuit structure 1 includes multiple insulating layers 10 and multiple circuit layers 11 respectively disposed on the multiple insulating layers 10. When using laser L to mark or mark the circuit structure 1, the laser energy of the laser L in the laser marking technology may be too strong, causing multiple circuit layers 11 to melt, resulting in contact bridging 12 between multiple circuit layers 11 of different layers, which may lead to short circuit risk.

[0004] Therefore, how to overcome the shortcomings of existing technologies is a technical problem that all sectors urgently need to solve. Utility Model Content

[0005] This application provides a circuit structure, including: a plurality of insulating layers; a plurality of circuit layers respectively bonded to the plurality of insulating layers; a through-hole structure formed through the plurality of insulating layers and the plurality of circuit layers; and a filler material disposed in the through-hole structure.

[0006] As described above, the through-hole structure is formed in the open space between the multiple circuit layers.

[0007] As described above, the through-hole structure has a single opening.

[0008] As described above, the through-hole structure consists of multiple perforations spaced apart from each other.

[0009] As described above, the circuit structure defines a laser-etched area, and the via structure is located within the laser-etched area.

[0010] This application also provides a method for manufacturing a circuit structure, including: providing a plurality of insulating layers and a plurality of circuit layers respectively bonded to the plurality of insulating layers; forming a through-hole structure that penetrates the plurality of insulating layers and the plurality of circuit layers; and providing a filler material in the through-hole structure.

[0011] As described above in the fabrication method of the circuit structure, the through-hole structure is formed in the open space between the multiple circuit layers.

[0012] As described above regarding the fabrication method of the circuit structure, this through-hole structure has a single opening.

[0013] As described above, the through-hole structure consists of multiple perforations spaced apart from each other.

[0014] As described above, the circuit structure defines a laser-etched area, and the via structure is located within the laser-etched area.

[0015] In summary, the circuit structure of this application forms through-hole structures in the open spaces between multiple circuit layers, and filler material is placed in the through-hole structures. When laser etching technology is subsequently used, the filler material can prevent bridging of the contacts caused by the melting of multiple circuit layers due to excessive laser energy, thereby avoiding the short circuit risk of the circuit structure of this application. In addition, the circuit structure of this application does not require the addition of new processes and materials or the purchase of equipment. Existing materials, existing processes and equipment can solve the existing technical problems in the industry, so there will be no large additional cost expenditure. Attached Figure Description

[0016] Figure 1 This is a cross-sectional schematic diagram of the existing line structure.

[0017] Figures 2A to 2B This is a cross-sectional schematic diagram of the manufacturing method of the circuit structure of this application.

[0018] Figure 3 This is a top view of one embodiment of the circuit structure of this application.

[0019] Figure 4 This is a top view of one embodiment of the circuit structure of this application.

[0020] Explanation of reference numerals in the attached figures

[0021] 1,2 Circuit Structure

[0022] 10,20 insulation layers

[0023] 11,21 Line Layer

[0024] 12-Point Bridging

[0025] 22 Through-hole structure

[0026] 221 Perforation

[0027] 222 Opening

[0028] 23. Filler material

[0029] 24 Laser Engraving Area

[0030] L-type laser. Detailed Implementation

[0031] The following specific embodiments illustrate the implementation of this application. Those skilled in the art can easily understand other advantages and effects of this application from the content disclosed in this specification.

[0032] It should be understood that the structures, proportions, sizes, etc., depicted in the accompanying drawings are merely for illustrative purposes to aid those skilled in the art in understanding and reading the content disclosed herein, and are not intended to limit the scope of this application. Therefore, they have no substantial technical significance. Any modifications to the structure, changes in proportions, or adjustments to size, without affecting the effects and objectives of this application, should still fall within the scope of the technical content disclosed herein. Furthermore, the terms such as "first," "second," and "a" used in this specification are merely for clarity of description and are not intended to limit the scope of this application. Changes or adjustments to their relative relationships, without substantially altering the technical content, should also be considered within the scope of this application's implementation.

[0033] Figures 2A to 2B This is a cross-sectional schematic diagram of the manufacturing method of circuit structure 2 in this application.

[0034] like Figure 2A As shown, a plurality of insulating layers 20 and a plurality of circuit layers 21 respectively bonded to the plurality of insulating layers 20 are provided.

[0035] In this embodiment, multiple circuit layers 21 are arranged in a redistribution layer (RDL) configuration and are embedded between different insulating layers 20. In other embodiments, the outermost insulating layer 20 may serve as a solder resist layer, and a portion of the outermost circuit layer 21 may be exposed above the solder resist layer to serve as an electrical contact pad, but this application is not limited thereto.

[0036] In one embodiment, the material forming the insulating layer 20 is, for example, a dielectric material such as polybenzoxazole (PBO), polyimide (PI), or prepreg (PP), or a solder resist such as green paint or ink. The material forming the circuit layer 21 is, for example, copper.

[0037] Next, a through-hole structure 22 is formed by drilling, penetrating multiple insulation layers 20 and multiple circuit layers 21. Please refer to the accompanying documentation. Figure 3 and Figure 4 The through-hole structure 22 can be formed in the open space between multiple circuit layers 21, that is, mainly by drilling holes in the insulating layer 20 between multiple circuit layers 21 to form the through-hole structure 22, and the through-hole structure 22 consists of multiple through holes 221 spaced apart from each other. Figure 3 ), or for a single opening 222 ( Figure 4 Alternatively, multiple single perforations may be stacked together to form a single elongated opening (not shown). In one embodiment, the through-hole structure 22 may be formed only on the insulating layer 20, or it may be formed simultaneously on the insulating layer 20 and a portion of the circuit layer 21 connected to the insulating layer 20.

[0038] like Figure 2B As shown, filler material 23 is provided in the through-hole structure 22 to obtain the circuit structure 2 of this application. The circuit structure 2 of this application can be used in a fan-out package on package (FO PoP) structure.

[0039] In this embodiment, the filler 23 is an insulating material, such as polyimide (PI), dry film, or an encapsulating colloid or molding compound such as epoxy resin. It is flush with the surface of the outermost insulating layer 20 and can contact the circuit layer 21 exposed in the insulating layer 20 in the through-hole structure 22.

[0040] When using laser marking technology, the area where the circuit structure 2 is to be marked or labeled can be defined as a laser marking area 24, and the through-hole structure 22 can be placed within the laser marking area 24. Figure 3 and Figure 4 As shown. Since the through-hole structure 22 is provided with filler material 23, when laser engraving technology is used subsequently, the filler material 23 can prevent the connection bridging caused by the melting of different circuit layers 21 due to excessive laser energy. Therefore, the circuit structure 2 of this application will not have the risk of short circuit.

[0041] This application also provides a circuit structure 2, including multiple insulating layers 20, multiple circuit layers 21, a through-hole structure 22, and a filler material 23.

[0042] Multiple line layers 21 are respectively bonded to multiple insulation layers 20, and the line layers 21 adopt the redistribution layer (RDL) specification and are embedded between different insulation layers 20.

[0043] In one embodiment, the material forming the insulating layer 20 is, for example, a dielectric material such as polybenzoxazole (PBO), polyimide (PI), or prepreg (PP), or a solder resist such as green paint or ink. The material forming the circuit layer 21 is, for example, copper.

[0044] The through-hole structure 22 is formed through multiple insulating layers 20 and multiple circuit layers 21. In this embodiment, the through-hole structure 22 may be formed in the open space between multiple circuit layers 21, for example, only in the insulating layer 20 between multiple circuit layers 21, or it may be formed simultaneously in the insulating layer 20 and the part of the circuit layer 21 connected to the insulating layer 20.

[0045] In one embodiment, the through-hole structure consists of a plurality of perforations 221 spaced apart from each other. Figure 3 ), or for a single opening 222 ( Figure 4 ).

[0046] The filler 23 is disposed in the through-hole structure 22. In this embodiment, the filler 23 is an insulating material, such as polyimide (PI), dry film, encapsulating colloid or molding compound such as epoxy resin, which is flush with the surface of the outermost insulating layer 20 and can contact the circuit layer 21 exposed in the insulating layer 20 in the through-hole structure 22.

[0047] In this embodiment, the circuit structure 2 defines a laser marking area 24, and the through-hole structure 22 is located within the laser marking area 24.

[0048] In summary, the circuit structure of this application forms through-hole structures in the open spaces between multiple circuit layers, and filler material is placed in the through-hole structures. When laser etching technology is subsequently used, the filler material can prevent bridging of the contacts caused by the melting of multiple circuit layers due to excessive laser energy, thereby avoiding the short circuit risk of the circuit structure of this application. In addition, the circuit structure of this application does not require the addition of new processes and materials or the purchase of equipment. Existing materials, existing processes and equipment can solve the existing technical problems in the industry, so there will be no large additional cost expenditure.

[0049] The above embodiments are used to illustrate the principles and effects of this application, and are not intended to limit this application. Those skilled in the art can modify the above embodiments without departing from the spirit and scope of this application. Therefore, the scope of protection of this application should be as set forth in the claims.

Claims

1. A circuit structure, characterized in that, include: Multiple insulating layers; Multiple circuit layers are bonded to the multiple insulating layers respectively; A through-hole structure is formed throughout the plurality of insulating layers and the plurality of circuit layers; as well as A filler material is provided in the through-hole structure.

2. The circuit structure as described in claim 1, characterized in that, The through-hole structure is formed in the open space between the multiple circuit layers.

3. The circuit structure as described in claim 1, characterized in that, The through-hole structure has a single opening.

4. The circuit structure as described in claim 1, characterized in that, The through-hole structure consists of multiple perforations spaced apart from each other.

5. The circuit structure as described in claim 1, characterized in that, The circuit structure defines a laser-etched area, and the via structure is located within the laser-etched area.

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