A new liquid cooling data acquisition system

Abstract

The utility model provides a novel liquid cooling data acquisition system, including main module and a plurality of cascade module. The main module includes signal input module, signal processing module and output module. The utility model discloses a input interface and intelligent interface unit, can realize the access of a variety of types sensor data, make more channel number of unit volume, save the installation space of power distribution cabinet, single module can support 4-20mA's input and output simultaneously, can also provide 21VDC and 5VDC's external power supply through voltage output unit, not only make the power supply of sensor more flexible, can also power supply for cascade module, expand more acquisition channel, in addition, still can through the communication control 21V output voltage's delay power -on time, provide more possibility and flexibility for the power -on time sequence control of liquid cooling system.

Description

Technical Field

[0001] This utility model relates to the field of refrigeration control, and in particular to a novel liquid-cooled data acquisition system. Background Technology

[0002] With the explosive growth of AI, cloud computing, and edge computing, data center power density continues to rise. Traditional air-cooling technology can no longer meet the demand for efficient heat dissipation. Meanwhile, under the "dual-carbon" strategy, energy-saving requirements for data centers are becoming increasingly stringent, with PUE (Power Usage Effectiveness) becoming a core performance indicator. Currently, newly built data centers need a PUE of less than 1.3, with first-tier cities strictly controlling it to below 1.25. Traditional air-cooling systems generally have a PUE of around 1.5, while liquid cooling technology can reduce the PUE to the 1.1-1.2 range, resulting in significant energy savings.

[0003] Current control methods for data center liquid cooling systems rely on sensor data for system adjustment. This requires the acquisition of key parameters such as temperature, pressure, and flow rate, and often involves the extensive use of current-type (4-20mA) output sensors. However, current multi-channel 4-20mA data acquisition modules typically have the following technical shortcomings: • Larger size, taking up more installation space; • It does not have a 4-20mA current output function and requires an additional dedicated 4-20mA output expansion module; • The data acquisition module itself does not have a power supply function; the sensor requires an external power supply. • Input channels typically only support 4-20mA type acquisition and do not support other types (such as NTC, 0-5V, 0-10V). Summary of the Invention

[0004] To address the aforementioned problems, this invention proposes a novel liquid-cooled data acquisition system.

[0005] The main contents of this utility model include: A novel liquid-cooled data acquisition system includes a main module, which comprises a signal input module, a signal processing module, and an output module. The signal input module includes an input interface and an intelligent interface unit. The signal processing module includes a signal conditioning unit and a main control MCU. The output module includes a current output unit and a voltage output unit. The input interface is used to connect to an external sensor and is connected to the signal conditioning unit through the intelligent interface unit. The intelligent interface unit and the signal conditioning unit are connected to the main control MCU. The current output unit is connected to the main control MCU and outputs a constant current. The voltage output power supply is connected to the main control MCU and the main control power supply, and outputs a set voltage value.

[0006] Preferably, the intelligent interface unit includes an NTC switching subunit, a current switching subunit, a first voltage switching subunit, and a second voltage switching subunit; the NTC switching subunit, the current switching subunit, the first voltage switching subunit, and the second voltage switching subunit are respectively connected to the main control MCU through corresponding enable interfaces; and have switch access points; The input interface is connected to the signal conditioning unit via an access line; the access line includes a first access resistor, a second access resistor, and a third access resistor connected in series.

[0007] Preferably, the NTC switching subunit includes a P-type first MOSFET and a first switching resistor; the source (S) of the first MOSFET is connected to the digital power supply 3V3, its gate (G) is connected to its enable interface and to the digital power supply 3V3 through the second switching resistor, and its drain (D) is connected between the input interface and the first access resistor through the first switching resistor and the switch access point.

[0008] Preferably, the current switching subunit includes an N-type second MOSFET and a third switching resistor. The gate (G) of the second MOSFET is connected to the enable interface of the current switching subunit. The source (S) of the second MOSFET is grounded, and its drain (D) is connected between the input interface and the first access resistor through a fourth switching resistor and a first switching diode connected in parallel and a corresponding switch access point. The third switching resistor is connected between the gate (G) and source (S) of the second MOSFET.

[0009] Preferably, the switch access point of the first voltage switching subunit is connected between the first access resistor and the second access resistor; the switch access point of the second voltage switching subunit is connected between the second access resistor and the third access resistor. The first voltage switching subunit includes an N-type third MOSFET, a fifth switching resistor, and a sixth switching resistor; the gate (G) of the third MOSFET is connected to the enable interface of the first voltage switching subunit, its source (S) is grounded, and its drain (D) is connected to its switching access point through the sixth switching resistor; the fifth switching resistor is connected between the gate (G) and source (S) of the third MOSFET. The second voltage switching subunit includes an N-type fourth MOSFET, a seventh switching resistor, and an eighth switching resistor; the gate (G) of the fourth MOSFET is connected to the enable interface of the second voltage switching subunit, its source (S) is grounded, and its drain (D) is connected to its switching access point through the eighth switching resistor; the seventh switching resistor is connected between the gate (G) and source (S) of the fourth MOSFET.

[0010] Preferably, the signal conditioning unit includes an instrumentation amplifier, the positive input pin +IN of the signal conditioning unit is connected to the input interface via an access line, and its output interface OUT is connected to the main control MCU.

[0011] Preferably, the voltage output unit includes a first voltage output subunit and a second voltage output subunit. The first voltage output subunit includes a first synchronous buck DC / DC converter IC2. The input pin VIN of the first synchronous buck DC / DC converter is connected to the power supply, and its switching node pin SW is connected to the cascade interface and the first voltage output interface. The second voltage output subunit includes a second synchronous buck DC / DC converter. The input pin VIN of the second synchronous buck DC / DC converter IC3 is connected to the power supply, its enable pin is connected to the main control MCU, and its switching node pin SW is connected to the second voltage output interface.

[0012] Preferably, it further includes several cascaded modules, each including a cascaded processing module, a cascaded input interface, and a cascaded power supply interface; the cascaded input interface connects to an external sensor and the cascaded processing module, and the cascaded power supply interface is connected to the cascaded interface of the first voltage output subunit through a corresponding LDO module.

[0013] Preferably, the current output unit includes a control interface, an analog switch, a filter subunit, and a constant current source unit; the control signal of the main control MCU is connected to the S pin of the analog switch through the control interface, and the A pin of the analog switch is connected to the constant current source unit through the filter subunit. The filter subunit includes a first-order filter circuit and a second-order filter circuit connected in series; the constant current source unit includes a first operational amplifier, a first constant current resistor, and a second operational amplifier. The positive input interface of the first operational amplifier is connected to the second-order filter circuit, and its output terminal is connected to the positive input interface of the second operational amplifier through the first constant current resistor. The output terminal of the second operational amplifier is connected to the base of a constant current transistor through a second constant current resistor. The collector of the constant current transistor is connected to the second voltage output interface, and its emitter is connected to the current output interface through a third constant current resistor and a constant current diode.

[0014] The beneficial effects of this utility model are as follows: This utility model proposes a novel liquid-cooled data acquisition system, which can realize the access of data from multiple types of sensors through an input interface and an intelligent interface unit, resulting in more channels per unit volume and saving installation space in the power distribution cabinet; a single module can simultaneously support 4-20mA input and output, and can also provide external power supply of 21VDC and 5VDC through a voltage output unit, which not only makes the power supply of sensors more flexible, but also provides power to cascaded modules and expands more acquisition channels; in addition, it can control the delayed power-on time of the 21V output voltage through communication, providing more possibilities and flexibility for the power-on timing control of the liquid-cooled system. Attached Figure Description

[0015] Figure 1 This is a schematic diagram of the overall structure of this utility model; Figure 2 This is the circuit diagram for the signal input module; Figure 3 This is the circuit diagram for the current output module; Figure 4 The circuit diagram for the first voltage output subunit; Figure 5 This is the circuit diagram for the second voltage output subunit. Detailed Implementation

[0016] The technical solution protected by this utility model will be described in detail below with reference to the accompanying drawings.

[0017] Please see Figure 1 This invention proposes a novel liquid-cooled data acquisition system, comprising a main module and several cascaded modules. The main module includes a signal input module, a signal processing module, and an output module. The signal input module includes an input interface and an intelligent interface unit. The input interface connects to external sensors to receive data transmitted from them. The intelligent interface unit, under the control of the signal processing module, selects and activates the corresponding input lines according to the sensor type, ensuring accurate acquisition of the corresponding signals. Specifically, through the intelligent interface unit, this acquisition system can acquire data from NTC sensors, 4-20mA current signals, and 0-5V signals. In addition to the existing data acquisition functions, the output module of this acquisition system includes a current output unit and a voltage output unit. The current output unit can output a current of 4-20mA. The voltage output unit includes a first voltage output subunit and a second voltage output subunit capable of powering the load. The first voltage output subunit can output 5V, while the second voltage output subunit can output 21V. Furthermore, the first voltage output subunit can also power the existing acquisition module (cascaded module), while the second voltage output subunit provides power to the current output unit. Overall, this acquisition system has more acquisition channels, a smaller size, and can also supply power externally.

[0018] Please combine Figures 1 to 2The signal processing module includes a signal conditioning unit and a main control MCU. The input interface is connected to the signal conditioning unit via an access line. The signal conditioning unit is used to perform corresponding conditioning according to different input signal types. For example, for a 4-20mA current sensor, after I / V conversion using a precision shunt resistor, the 0.4-2V voltage is amplified to 0.8-4V, then transmitted to the main control MCU after digital-to-analog conversion. The main control MCU then outputs the temperature value corresponding to the NTC voltage using a lookup table method. For other types of input signals, the main control MCU uses corresponding processing methods to output the corresponding sensor data. The types of input signals are all existing types, and the main control MCU can process them accordingly, which will not be elaborated further here. The main control MCU model can be STM32F407VGT6 or NXP LPC55S69JBD100.

[0019] One inventive point of this utility model is the switching of several input types. The intelligent interface unit includes an NTC switching subunit, a current switching subunit, a first voltage switching subunit, and a second voltage switching subunit. The NTC switching subunit, the current switching subunit, the first voltage switching subunit, and the second voltage switching subunit are respectively connected to the main control MCU through corresponding enable interfaces (NTC_EN_1, 4-20mA_EN_1, 0-10V_EN_1, 0-5V_EN_1); and are respectively connected to the access line through their respective switch access points.

[0020] like Figure 2 As shown, the access line includes a first access resistor R49, a second access resistor R59, and a third access resistor R63 connected in series. The NTC switching subunit includes a P-type first MOSFET Q5 and a first switching resistor R43. The source (S) of the first MOSFET Q5 is connected to the digital power supply 3V3, its gate (G) is connected to its enable interface NTC_EN_1 and also to the digital power supply 3V3 via the second switching resistor R50, and its drain (D) is connected between the input interface and the first access resistor R49 via the first switching resistor R43 and the switch access point.

[0021] The current switching subunit includes an N-type second MOSFET Q3 and a third switching resistor R45. The gate (G) of the second MOSFET Q3 is connected to the enable interface 4-20mA_EN_1 of the current switching subunit. The source (S) of the second MOSFET Q3 is grounded, and its drain (D) is connected between the input interface and the first access resistor R49 through a parallel fourth switching resistor R46, a first switching diode DZ1, and a corresponding switch access point. The third switching resistor R45 is connected between the gate (G) and source (S) of the second MOSFET Q3.

[0022] The switching access point of the first voltage switching subunit is connected between the first access resistor R49 and the second access resistor R59; the switching access point of the second voltage switching subunit is connected between the second access resistor R59 and the third access resistor R63; wherein, the first voltage switching subunit includes an N-type third MOSFET Q7 and a fifth switching resistor R55 and a sixth switching resistor R53; the gate (G) of the third MOSFET Q7 is connected to the enable interface 0-10V_EN_1 of the first voltage switching subunit, its source (S) is grounded, and its drain (D) is connected to its switching access point through the sixth switching resistor R53; the fifth switching resistor R55 is connected between the gate (G) and source (S) of the third MOSFET.

[0023] The second voltage switching subunit includes an N-type fourth MOSFET Q9, a seventh switching resistor R61, and an eighth switching resistor R57. The gate (G) of the fourth MOSFET Q9 is connected to the enable interface of the second voltage switching subunit, its source (S) is grounded, and its drain (D) is connected to its switch access point through the eighth switching resistor R57. The seventh switching resistor R61 is connected between the gate (G) and source (S) of the fourth MOSFET Q9.

[0024] The signal conditioning unit includes an instrumentation amplifier IC7. The positive input pin +IN of the signal conditioning unit is connected to the input interface via an access line, and its output interface OUT is connected to the main control MCU.

[0025] Please see Figure 4 and Figure 5 The voltage output unit includes a first voltage output subunit and a second voltage output subunit. The first voltage output subunit includes a first synchronous buck DC / DC converter IC2. The input pin VIN of the first synchronous buck DC / DC converter IC2 is connected to the power supply +Vdc, and its switching node pin SW is connected to the cascade interface 5V_SW and the first voltage output interface. The first voltage output interface outputs a 5V voltage, which can be connected to an external load to supply power to the external load.

[0026] The cascade module includes a cascade processing module, a cascade input interface, and a cascade power supply interface. The cascade input interface connects to external sensors and the cascade processing module. The cascade power supply interface connects to the 5V_SW cascade interface of the first voltage output subunit via a corresponding LDO module. This means the cascade processing module can convert 5V to 3.3V for its MCU via the LDO module, eliminating the need for an additional power supply and saving space. The cascade module model can be GD32F407VKT6.

[0027] The second voltage output subunit includes a second synchronous buck DC / DC converter IC3. The input pin VIN of the second synchronous buck DC / DC converter IC3 is connected to the power supply +Vdc, its enable pin +21V_EN is connected to the main control MCU, and its switching node pin SW is connected to the second voltage output interface, which can output a voltage of 21V. Both the first and second voltage output subunits use TI's LMR36520 buck chip, which has an input voltage range of 4.2V to 65V, can provide up to 2A of output current, and supports adjustable output voltage.

[0028] like Figure 2 As shown, the current output unit includes a control interface PWM1, an analog switch IC24, a filter subunit, and a constant current source unit. The control signal of the main control MCU is connected to the S pin of the analog switch IC24 through the control interface PWM1. The A pin of the analog switch is connected to the constant current source unit through the filter subunit. The filter subunit includes a first-order filter circuit and a second-order filter circuit connected in series, composed of resistors R253 and R255, and capacitors C41 and C42. The constant current source unit includes a first operational amplifier IC26 and a first constant current source unit. The circuit includes resistor R18, a second operational amplifier IC26, and the positive input interface of the first operational amplifier connected to the second-order filter circuit. Its output is connected to the positive input interface of the second operational amplifier via the first constant current resistor R18. The output of the second operational amplifier is connected to the base of the constant current transistor Q67 via the second constant current resistor R267. The collector of the constant current transistor is connected to the second voltage output interface +21V. Its emitter is connected to the current output interface via the third constant current resistor R269 and the constant current diode D5, outputting a 4-20mA current.

[0029] The first voltage output subunit can provide 5V voltage to the cascaded modules. Considering power consumption, there are usually three cascaded modules, which only act as signal acquisition slaves and do not have decision-making capabilities, enabling this acquisition system to have 16 acquisition channels.

[0030] The above description is merely an embodiment of this utility model and does not limit the patent scope of this utility model. Any equivalent structural or procedural transformations made based on the description and drawings of this utility model, or direct or indirect applications in other related technical fields, are similarly included within the patent protection scope of this utility model.

Claims

1. A novel liquid-cooled data acquisition system, characterized in that, The system includes a main module, which comprises a signal input module, a signal processing module, and an output module. The signal input module includes an input interface and an intelligent interface unit. The signal processing module includes a signal conditioning unit and a main control MCU. The output module includes a current output unit and a voltage output unit. The input interface is used to connect to external sensors and is connected to the signal conditioning unit through the intelligent interface unit. The intelligent interface unit and the signal conditioning unit are connected to the main control MCU. The current output unit is connected to the main control MCU and outputs a constant current. The voltage output power supply is connected to the main control MCU and the main control power supply, outputting a set voltage value.

2. The novel liquid-cooled data acquisition system according to claim 1, characterized in that, The intelligent interface unit includes an NTC switching subunit, a current switching subunit, a first voltage switching subunit, and a second voltage switching subunit; the NTC switching subunit, the current switching subunit, the first voltage switching subunit, and the second voltage switching subunit are respectively connected to the main control MCU through corresponding enable interfaces; and have switch access points; The input interface is connected to the signal conditioning unit via an access line; the access line includes a first access resistor, a second access resistor, and a third access resistor connected in series.

3. A novel liquid-cooled data acquisition system according to claim 2, characterized in that, The NTC switching subunit includes a P-type first MOSFET and a first switching resistor; the source (S) of the first MOSFET is connected to the digital power supply 3V3, its gate (G) is connected to its enable interface and is also connected to the digital power supply 3V3 through the second switching resistor, and its drain (D) is connected between the input interface and the first access resistor through the first switching resistor and the switch access point.

4. A novel liquid-cooled data acquisition system according to claim 2, characterized in that, The current switching subunit includes an N-type second MOSFET and a third switching resistor. The gate (G) of the second MOSFET is connected to the enable interface of the current switching subunit. The source (S) of the second MOSFET is grounded, and its drain (D) is connected between the input interface and the first access resistor through a fourth switching resistor and a first switching diode connected in parallel and a corresponding switch access point. The third switching resistor is connected between the gate (G) and source (S) of the second MOSFET.

5. A novel liquid-cooled data acquisition system according to claim 2, characterized in that, The switch access point of the first voltage switching subunit is connected between the first access resistor and the second access resistor; the switch access point of the second voltage switching subunit is connected between the second access resistor and the third access resistor. The first voltage switching subunit includes an N-type third MOSFET, a fifth switching resistor, and a sixth switching resistor; the gate (G) of the third MOSFET is connected to the enable interface of the first voltage switching subunit, its source (S) is grounded, and its drain (D) is connected to its switching access point through the sixth switching resistor; the fifth switching resistor is connected between the gate (G) and source (S) of the third MOSFET. The second voltage switching subunit includes an N-type fourth MOSFET, a seventh switching resistor, and an eighth switching resistor; the gate (G) of the fourth MOSFET is connected to the enable interface of the second voltage switching subunit, its source (S) is grounded, and its drain (D) is connected to its switching access point through the eighth switching resistor; the seventh switching resistor is connected between the gate (G) and source (S) of the fourth MOSFET.

6. A novel liquid-cooled data acquisition system according to claim 1, characterized in that, The signal conditioning unit includes an instrumentation amplifier. The positive input pin +IN of the signal conditioning unit is connected to the input interface via an access line, and its output interface OUT is connected to the main control MCU.

7. A novel liquid-cooled data acquisition system according to claim 6, characterized in that, The voltage output unit includes a first voltage output subunit and a second voltage output subunit. The first voltage output subunit includes a first synchronous buck DC / DC converter IC2. The input pin VIN of the first synchronous buck DC / DC converter is connected to the power supply, and its switching node pin SW is connected to the cascade interface and the first voltage output interface. The second voltage output subunit includes a second synchronous buck DC / DC converter. The input pin VIN of the second synchronous buck DC / DC converter IC3 is connected to the power supply, its enable pin is connected to the main control MCU, and its switching node pin SW is connected to the second voltage output interface.

8. A novel liquid-cooled data acquisition system according to claim 7, characterized in that, It also includes several cascaded modules, each comprising a cascaded processing module, a cascaded input interface, and a cascaded power supply interface; the cascaded input interface connects to external sensors and the cascaded processing module, and the cascaded power supply interface connects to the cascaded interface of the first voltage output subunit through a corresponding LDO module.

9. A novel liquid-cooled data acquisition system according to claim 7, characterized in that, The current output unit includes a control interface, an analog switch, a filter subunit, and a constant current source unit. The control signal of the main control MCU is connected to the S pin of the analog switch through the control interface. The A pin of the analog switch is connected to the constant current source unit through the filter subunit. The filter subunit includes a first-order filter circuit and a second-order filter circuit connected in series. The constant current source unit includes a first operational amplifier, a first constant current resistor, and a second operational amplifier. The positive input interface of the first operational amplifier is connected to the second-order filter circuit, and its output terminal is connected to the positive input interface of the second operational amplifier through the first constant current resistor. The output terminal of the second operational amplifier is connected to the base of a constant current transistor through a second constant current resistor. The collector of the constant current transistor is connected to the second voltage output interface, and its emitter is connected to the current output interface through a third constant current resistor and a constant current diode.

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