Semiconductor integrated circuit device

Abstract

To provide a semiconductor integrated circuit device configured so as to protect an internal semiconductor element even when an ESD surge enters a circuit, in a crystal oscillation circuit.SOLUTION: A semiconductor integrated circuit device 100 includes at least two connection terminals 105, 110 for connecting an external crystal oscillator, and an oscillation circuit 125 connected between these two connection terminals. The oscillation circuit 125 includes: an inverter circuit 135 for causing the crystal oscillator to oscillate when the crystal oscillator is externally connected to the two connection terminals 105, 110, the inverter circuit including an inverter element 155; a feedback circuit 140 including feedback resistance elements 160, 165 connected in parallel to the inverter circuit 135; and protective resistance elements 145, 150 connected between one of the two connection nodes to which the feedback circuit 140 and the inverter circuit 135 are connected in parallel and an input node of the inverter element 155 and between the other of the two connection nodes and an output node of the inverter element, respectively.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] The present invention relates to protecting an internal oscillation circuit from electrostatic discharge in a semiconductor integrated circuit device, particularly in a semiconductor integrated circuit device having a connection terminal for connecting an external crystal oscillator. [Background technology]

[0002] A semiconductor integrated circuit device equipped with a connection terminal for connecting an external crystal unit includes a crystal oscillation circuit, and it is necessary to protect the semiconductor elements that make up the crystal oscillation circuit from electrostatic discharge (ESD). Conventionally, in order to protect the semiconductor elements of the crystal oscillation circuit from ESD surges, a protection transistor has been placed immediately adjacent to the gate of the inverter circuit that makes up the crystal oscillation circuit.

[0003] Furthermore, Patent Document 1 below discloses an integrated circuit for an oscillator in which a protection diode is connected to the input terminal side of an inverter constituting a crystal oscillation circuit, and a varicap diode is connected to the output terminal side. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Laid-Open No. 2002-246843 Summary of the Invention [Problem to be solved by the invention]

[0005] However, the invention described in Patent Document 1 above has the problem that when an ESD surge enters the oscillation circuit, the ESD surge cannot be sufficiently diverted to the ground or the like, and the semiconductor elements that make up the inverter element cannot be sufficiently protected.

[0006] In view of the above circumstances, an object of the present invention is to provide a semiconductor integrated circuit device in which the internal semiconductor elements can be protected even if an ESD surge enters the crystal oscillation circuit. [Means for solving the problem]

[0007] In order to solve the above problem, a semiconductor integrated circuit device according to the present invention includes at least two connection terminals for connecting an external crystal resonator, and an oscillation circuit connected between the at least two connection terminals, wherein the oscillation circuit includes an inverter circuit including an inverter element for oscillating the crystal resonator when the crystal resonator is externally connected to the at least two connection terminals, a feedback circuit including a feedback resistance element connected in parallel to the inverter circuit, and protective resistance elements connected between two connection nodes where the feedback circuit and the inverter circuit are connected in parallel and an input node and an output node of the inverter element, respectively. [Brief explanation of the drawings]

[0008] [Figure 1] FIG. 1 is a schematic circuit diagram showing a configuration of a semiconductor integrated circuit device of a comparative example. [Figure 2] 1 is a schematic circuit diagram showing a configuration of a semiconductor integrated circuit device according to an embodiment; DETAILED DESCRIPTION OF THE INVENTION

[0009] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

[0010] First, a semiconductor integrated circuit device 500 of the comparative example will be described with reference to Figure 1. The semiconductor integrated circuit device 500 of the comparative example has at least two connection terminals for connecting an external crystal unit (not shown), namely, a crystal unit input terminal 505 (hereinafter referred to as Xi terminal 505) and a crystal unit output terminal 510 (hereinafter referred to as Xo terminal 510). A terminal protection circuit 515 is connected to the Xi terminal 505, and a terminal protection circuit 520 is connected to the Xo terminal 510.

[0011] Terminal protection circuit 515 is composed of a PMOS transistor connected between voltage source Vdd and Xi terminal 505, and an NMOS transistor connected between Xi terminal 505 and ground. Similarly, terminal protection circuit 520 is composed of a PMOS transistor connected between voltage source Vdd and Xo terminal 510, and an NMOS transistor connected between Xo terminal 510 and ground.

[0012] The gates of the PMOS transistor and NMOS transistor are connected to the respective sources, and normally act as non-conductive off transistors, protecting the Xi terminal 505 and the X0 terminal 510 from ESD surges.

[0013] The semiconductor integrated circuit device 500 also includes an oscillator circuit 525 , an output circuit 530 , a protective transistor 535 , a first protective resistor element 540 , and a second protective resistor element 545 .

[0014] Oscillator circuit 525 includes a plurality of inverter elements 550 connected in parallel to one another, a feedback resistor element 555, and a switch element 560. In FIG. 1, the plurality of inverter elements 550 includes seven individual inverter elements 550A-550G connected in parallel to one another. One or an arbitrary number of these inverter elements 550A-550G are selected for operation by a control circuit (not shown) inside semiconductor integrated circuit device 500.

[0015] Feedback resistor element 555 is connected in parallel to inverter element 550 and forms a feedback circuit for oscillator circuit 525. Switch element 560 can be turned "on," i.e., closed, to put oscillator circuit 525 into an oscillating state. Furthermore, with switch element 560 turned "off," i.e., open, voltage is applied to Xi terminal 505 or Xo terminal 510, and leakage current can be measured by measuring whether or not a current flows. Switch element 560 is typically made of a MOS-FET and is controlled by a control circuit (not shown).

[0016] The output circuit 530 includes an output buffer circuit 565 , which is connected to an internal output terminal 570 .

[0017] When an ESD surge enters the oscillator circuit 525, the protective transistor 535 protects the gates of the MOS-FETs constituting the multiple inverter elements 550 by dissipating the ESD surge to ground. The first protective resistor 540 and the second protective resistor 545 primarily function as ESD protection resistors, but also suppress the drive level of the oscillator circuit 525, prevent abnormal oscillation, and suppress noise in the oscillator circuit 525. In the comparative example, as shown in FIG. 1, the first protective resistor 540 and the second protective resistor 545 are set to relatively low resistance values ​​of 155 [Ω] and 500 [Ω], respectively. The reason for using such low resistance values ​​is to ensure the oscillation margin of the oscillator circuit 525. Also, in FIG. 1, the feedback resistor 555 is set to 170 kΩ.

[0018] A crystal oscillator (not shown) is connected to Xi terminal 505 and Xo terminal 510 of semiconductor integrated circuit device 500 of the comparative example configured as described above, and switch element 560 is set to a closed state. When any one or any two or more of inverter elements 550A-550G are selected by a control circuit (not shown) inside semiconductor integrated circuit device 500 to operate the circuit, an oscillation signal of a desired frequency is output from internal output terminal 570.

[0019] In semiconductor integrated circuit device 500 of the comparative example, when an ESD surge enters the circuit via Xi terminal 505 or Xo terminal 510, the ESD surge can be passed to ground via terminal protection circuits 515 and 520. However, at that time, there remains a possibility that the ESD surge may not be sufficiently absorbed and may enter the circuit, destroying the semiconductor element.

[0020] On the other hand, it is possible to make it difficult for an ESD surge to penetrate into the circuit by increasing the resistance values ​​of the first protective resistor element 540 and the second protective resistor element 545. However, doing so poses a problem in that the oscillation margin cannot be satisfied, causing the oscillation circuit 525 to stop oscillating.

[0021] [Embodiment] Next, a semiconductor integrated circuit device 100 according to an embodiment will be described with reference to Figure 2. The semiconductor integrated circuit device 100 according to the embodiment has at least two connection terminals for connecting an external crystal unit (not shown), namely, a crystal unit input terminal 105 (hereinafter referred to as Xi terminal 105) and a crystal unit output terminal 110 (hereinafter referred to as Xo terminal 110). A terminal protection circuit 115 is connected to the Xi terminal 105, and a terminal protection circuit 120 is connected to the Xo terminal 110.

[0022] The terminal protection circuit 115 is composed of a PMOS transistor connected between the voltage source Vdd and the Xi terminal 105, and an NMOS transistor connected between the Xi terminal 105 and ground. Similarly, the terminal protection circuit 120 is composed of a PMOS transistor connected between the voltage source Vdd and the Xo terminal 110, and an NMOS transistor connected between the Xo terminal 110 and ground.

[0023] The gates of the PMOS transistor and NMOS transistor are connected to the respective sources, forming off-transistors that are normally non-conductive, and protecting the Xi terminal 105 and the Xo terminal 110 from ESD surges.

[0024] The semiconductor integrated circuit device 100 also includes an oscillator circuit 125 and an output circuit 130.

[0025] The oscillator circuit 125 is connected between the Xi terminal 105 and the Xo terminal 110, and includes an inverter circuit 135 and a feedback circuit 140 connected in parallel to each other to oscillate a crystal oscillator (not shown) when the crystal oscillator is externally connected to the Xi terminal 105 and the Xo terminal 110.

[0026] The inverter circuit 135 includes inverter protection resistor elements 145 and 150. The inverter protection resistor elements 145 and 150 are connected between two connection nodes where the inverter circuit 135 and the feedback circuit 140 are connected in parallel and the input node and output node of the inverter circuit 135, respectively.

[0027] In this embodiment, a plurality of inverter circuits 135 are connected in parallel to the feedback circuit 140. Specifically, each inverter circuit 135 includes inverter elements 155A-155G and inverter protection resistor elements 145A-145G and 150A-150G connected to the input and output nodes of the respective inverter elements 155A-155G. Note that one or any plurality of these inverter elements 155A-155G are selected for operation by a control circuit (not shown) inside the semiconductor integrated circuit device 100.

[0028] The inverter protection resistors 145A-145G are connected in series to the input nodes of the inverter elements 155A-155G. Meanwhile, the inverter protection resistors 150A-150G are connected in series to the output nodes of the inverter elements 155A-155G. (Note that when the individual inverter protection resistors 145A-145G and 150A-150G are referred to collectively without distinction, they will be simply referred to as inverter protection resistors 145 and 150.) In other words, the input and output sides of each inverter element 155A-155G are sandwiched between the inverter protection resistors 145A-145G and 150A-150G.

[0029] The resistance values ​​of the inverter protection resistors 145 and 150 are, for example, 1300 [Ω] each, but may be other values. The resistance value of the inverter protection resistor 145 on the input node side of the inverter element 155 and the resistance value of the inverter protection resistor 150 on the output node side may be the same or different. For example, the resistance value of the inverter protection resistor 145 on the input node side may be 1300 [Ω], and the resistance value of the inverter protection resistor 150 on the output node side may be 650 [Ω].

[0030] Furthermore, the resistance values ​​of the inverter protection resistors 145 and 150 need only be large enough to prevent ESD surges from entering and to maintain oscillation of the oscillator circuit 125 even when one of the multiple inverter circuits 135 operates independently. That is, if the inverter protection resistors 145 and 150 each have a resistance of 1300 Ω, when the oscillator circuit 125 is operated using all of the inverter elements 155, the effective resistances on the input and output sides of the inverter element 155 are each 186 Ω. On the other hand, when the oscillator circuit 125 is operated using only one inverter element 155, the effective resistances on the input and output sides of the inverter element 155 are each 1300 Ω. However, in this case, the oscillation of the oscillator circuit 125 is maintained because a crystal resonator with a low oscillation frequency is used.

[0031] The feedback circuit 140 includes a feedback resistor. The feedback resistor includes at least two feedback resistors, namely, a first feedback resistor 160 and a second feedback resistor 165. Three or more feedback resistors may be provided. A switch element 170 is connected in series between the first feedback resistor 160 and the second feedback resistor 165. That is, the first feedback resistor 160 is connected to one side of the switch element 170, and the second feedback resistor 165 is connected to the other side. In other words, the switch element 170 is sandwiched between the first feedback resistor 160 and the second feedback resistor 165. The resistance values ​​of the first feedback resistor 160 and the second feedback resistor 165 are, for example, 500 kΩ each. The resistance values ​​of the first feedback resistor 160 and the second feedback resistor 165 may be the same or different.

[0032] The first feedback resistor 160, the second feedback resistor 165, and the switch element 170 constitute a feedback circuit 140 of the oscillator circuit 125. By turning the switch element 170 "on," i.e., in a closed state, the oscillator circuit 125 is put into an oscillating state, and by turning it "off," i.e., in an open state, the oscillation of the oscillator circuit 125 can be stopped. The switch element 170 is usually made of a MOS-FET, and is controlled by a control circuit (not shown).

[0033] The output circuit 130 includes an output buffer circuit 180, which is connected to an internal output terminal 185. The resistance value of the output circuit protection resistor element 175 is, for example, 1300 [Ω], but may be any other resistance value.

[0034] A crystal oscillator (not shown) is connected to the Xi terminal 105 and the Xo terminal 110 of the semiconductor integrated circuit device 100 of the embodiment configured as described above, and the switch element 170 is turned "on" to operate the device. Then, the crystal oscillator (not shown), the inverter circuit 135, and the feedback circuit 140 operate as the oscillation circuit 125, and an oscillation signal of a desired frequency is output from the internal output terminal 185.

[0035] Assume now that an ESD surge enters the semiconductor integrated circuit device 100 from either the Xi terminal 105, the Xo terminal 110, or both. In this case, regardless of whether the ESD surge enters from the Xi terminal 105 or the Xo terminal 110, it can be passed to ground via the terminal protection circuits 115 and 120. This is because the resistance values ​​of the terminal protection circuits 115 and 120 during snapback operation are small, and the resistance values ​​of the inverter protection resistors 145 and 150, the first feedback resistor 160, and the second feedback resistor 165 are sufficiently large. Therefore, the inverter element 155 is protected from the ESD surge by the terminal protection circuits 115 and 120 and the inverter protection resistors 145 and 150. Furthermore, the semiconductor elements constituting the switch element 170 are also protected from the ESD surge by the terminal protection circuits 115 and 120, the first feedback resistor 160, and the second feedback resistor 165.

[0036] Furthermore, an output circuit protection resistor element 175 is interposed between the oscillator circuit 125 and the output buffer circuit 180 of the output circuit 130. That is, the output circuit protection resistor element 175 is connected between the Xi terminal 105 and the output buffer circuit 180. Therefore, even if an ESD surge is mixed in from the Xi terminal 105, the output buffer circuit 180 is protected by the output circuit protection resistor element 175.

[0037] As described above, Xi terminal 105 and Xo terminal 110 are all connected to the semiconductor device via protective resistive elements. If a protective resistive element with a resistance value of 1 kΩ or more is selected, the resistance value will be sufficiently larger than the resistance value during snapback operation of terminal protection circuits 115 and 120, making it possible to protect semiconductor integrated circuit device 100 from ESD surges.

[0038] Furthermore, when inverter protection resistor elements 145 and 150 each have a resistance value of 1300 Ω, the effective resistance value of oscillator circuit 125 increases from 186 Ω to 1300 Ω, which is sufficiently larger than the resistance value of terminal protection circuits 115 and 120 during snapback operation, making it possible to protect semiconductor integrated circuit device 100 from ESD surges. [Explanation of symbols]

[0039] 100 Semiconductor integrated circuit device 105 Crystal oscillator input terminal (Xi terminal) 110 Crystal oscillator output terminal (Xо terminal) 115, 120 terminal protection circuit 125 Oscillator Circuit 130 Output circuit 135 Inverter circuit 140 Feedback Circuit 145, 145A-145G Inverter protection resistor element 150, 150A-150G inverter protection resistor element 155, 155A-155G inverter elements 160 First feedback resistor 165 Second feedback resistor 170 Switching element 175 Output circuit protection resistor element 180 Output buffer circuit 185 Internal output terminal 500 Semiconductor integrated circuit device 505 Crystal oscillator input terminal (Xi terminal) 510 Crystal oscillator output terminal (Xо terminal) 515, 520 terminal protection circuit 525 Oscillator Circuit 530 Output Circuit 535 Protection Transistor 540 First protective resistor element 545 Second protection resistor element 550, 550A-550G inverter elements 555 Feedback resistor element 560 Switching element 565 Output buffer circuit 570 Internal output terminal

Claims

1. At least two connection terminals for connecting an external crystal unit; an oscillator circuit connected between the at least two connection terminals, The oscillator circuit an inverter circuit including an inverter element for oscillating the crystal resonator when the crystal resonator is externally connected to the at least two connection terminals; and a feedback circuit including a feedback resistor element connected in parallel to the inverter circuit. a protection resistor element connected between two connection nodes where the feedback circuit and the inverter circuit are connected in parallel and an input node and an output node of the inverter element, respectively;

2. 2. The semiconductor integrated circuit device according to claim 1, wherein said feedback resistor element includes at least two feedback resistor elements, and a switch element is connected in series between said at least two feedback resistor elements.

3. a plurality of the inverter circuits are connected in parallel to the feedback circuit; 2. The semiconductor integrated circuit device according to claim 1, wherein each of the plurality of inverter circuits includes a protective resistance element connected between two connection nodes at which the feedback circuit and the inverter circuit are connected in parallel and an input node and an output node of each inverter element.

4. 4. The semiconductor integrated circuit device according to claim 3, wherein the resistance value of the protective resistor element of each of the plurality of inverter circuits is large enough to prevent an ESD surge from entering, and is large enough to maintain oscillation of the oscillator circuit even when one of the plurality of inverter circuits operates independently.

Images