Silicon member

A silicon member with controlled grain boundary structures and surface finish suppresses localized corrosion, enhancing its durability in corrosive environments.

JP2025157997APending Publication Date: 2025-10-16MITSUBISHI MATERIALS CORP +1
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Patent Information

Application Number
JP2024060406
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-04-03
Publication Date
2025-10-16

AI Technical Summary

Technical Problem

The challenge in semiconductor manufacturing is the preferential corrosion of grain boundaries in polycrystalline and mono-like silicon components due to corrosive environments, leading to localized corrosion and potential abnormal discharge, which is exacerbated by surface depressions from scratches and microcracks.

Method used

A silicon member with a polycrystalline region having 80% or more coincidence grain boundaries, limited surface recess depth of 0.5 μm or less, and controlled proportions of Σ3 and Σ9 grain boundaries to suppress preferential corrosion.

Benefits of technology

The solution effectively prevents localized corrosion, extending the service life of silicon components in corrosive environments by minimizing grain boundary corrosion and surface depressions.

✦ Generated by Eureka AI based on patent content.

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Abstract

To provide a silicon member capable of suppressing a generation of a local corrosion to achieve an extension of a usage life.SOLUTION: A silicon member has a polycrystalline region, a ratio of a corresponding grain boundary in a crystal grain boundary in the polycrystalline region is 80% or more, and a recess depth of a surface is 0.5 μm or less. A ratio of a Σ3 grain boundary in the corresponding grain boundary is preferably 80% or more. A ratio of a Σ9 grain boundary in the corresponding grain boundary is preferably 3% or more and 20% or less. A ratio of a random grain boundary in a crystal grain boundary in the polycrystalline region is preferably 15% or less.SELECTED DRAWING: None
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Description

[Technical Field]

[0001] The present invention relates to a silicon member used in a corrosive environment such as a plasma processing apparatus. [Background technology]

[0002] 2. Description of the Related Art Conventionally, in semiconductor manufacturing equipment such as plasma etching equipment used in semiconductor device manufacturing processes, members made of high-purity materials are used in order to prevent deterioration in characteristics and yield. In particular, since silicon is the same material as device wafers, silicon members made of high-purity silicon materials are widely used in semiconductor manufacturing equipment.

[0003] For example, in a plasma etching apparatus, an electrode plate connected to a high-frequency power source and a stand are arranged, for example, one above the other, facing each other within a chamber, and a silicon wafer is placed on the stand. A high-frequency voltage is applied while gas is circulated toward the silicon wafer through through-holes formed in the electrode plate, thereby generating plasma and performing processes such as etching on the silicon wafer.

[0004] In the plasma processing apparatuses described above, silicon components made of high-purity silicon materials are widely used to prevent metal contamination inside the chamber, such as electrode plates, silicon rings, and shower plates. Here, as shown in Patent Document 1, for example, the raw material of the silicon member includes polycrystalline silicon, mono-like silicon, and single crystal silicon. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Japanese Patent Application Laid-Open No. 2014-141403 Summary of the Invention [Problem to be solved by the invention]

[0006] Recently, for example, in semiconductor device manufacturing processes, efforts are being made to increase the area of ​​silicon wafers to be used, and there is a demand for larger silicon members as well. It is difficult to use single crystal silicon as the material for large silicon components, so polycrystalline silicon or mono-like silicon is used instead.

[0007] In polycrystalline silicon and mono-like silicon, grain boundaries exist, and there is a risk that the grain boundaries will corrode preferentially in corrosive environments (plasma and corrosive chemicals). If the grain boundaries corrode preferentially and a depression (e.g., groove, trench, crack, slit, step, etc.) is formed, corrosion will accelerate in the depression, and the depression may expand. Depending on the equipment and conditions used, if the depression exceeds approximately 1 mm, a problem called abnormal discharge will occur in the depression, reducing the processing distribution of the silicon wafer. Furthermore, in the above-mentioned silicon member, depressions are formed on the surface due to scratches and microcracks caused by grinding, polishing, etc., and there is a risk that these depressions will corrode preferentially in a corrosive environment (plasma and corrosive chemicals).

[0008] The present invention has been made in consideration of the above-mentioned circumstances, and aims to provide a silicon member that can suppress the occurrence of localized corrosion and extend its service life even when used in a corrosive environment. [Means for solving the problem]

[0009] In order to solve the above problems, the inventors conducted extensive research and discovered that at coincidence boundaries, atoms are partially bonded to each other, the bonding strength of the grain boundaries is stronger than that of random grain boundaries, and preferential corrosion of the grain boundaries can be suppressed. Furthermore, we have found that by removing minute dents such as polishing scratches and microcracks formed on the surface of silicon components, it is possible to suppress the progression of localized corrosion caused by the dents and extend the service life of the components.

[0010] The present invention has been made based on the above findings, and the silicon member of aspect 1 of the present invention is characterized in that it has a polycrystalline region consisting of a plurality of crystal grains, the proportion of coincidence grain boundaries in the crystal grain boundaries of the polycrystalline region is 80% or more, and the depth of the surface depression is 0.5 μm or less.

[0011] According to the silicon member of aspect 1 of the present invention, the silicon member has a polycrystalline region consisting of a plurality of crystal grains, and the proportion of coincidence grain boundaries among the crystal grain boundaries of the polycrystalline region is 80% or more, so that preferential corrosion of the grain boundaries can be suppressed. Furthermore, since the depth of the recesses on the surface is set to 0.5 μm or less, the progression of corrosion in the recesses can be suppressed. Therefore, even when used in a corrosive environment, the progress of localized corrosion can be suppressed, and the service life can be extended.

[0012] A silicon member according to a second aspect of the present invention is characterized in that in the silicon member according to the first aspect, the proportion of Σ3 grain boundaries in the coincidence grain boundaries is 80% or more. According to the silicon member of aspect 2 of the present invention, the proportion of Σ3 grain boundaries among the coincidence grain boundaries is 80% or more, and among the coincidence grain boundaries, there are many Σ3 grain boundaries which have a large number of atomic bonds and a high grain boundary bonding strength, which further prevents preferential corrosion of the grain boundaries even when used in a corrosive environment.

[0013] A silicon member according to a third aspect of the present invention is characterized in that in the silicon member according to the first or second aspect, the proportion of Σ9 grain boundaries in the coincidence grain boundaries is 3% or more and 20% or less. According to the silicon member of the third aspect of the present invention, the proportion of Σ9 grain boundaries in the coincidence grain boundaries is 3% or more and 20% or less. Therefore, many Σ9 grain boundaries with relatively strong grain boundary bonding strength are present in parts other than the Σ3 grain boundaries, and preferential corrosion of the grain boundaries can be further suppressed even when the silicon member is used in a corrosive environment.

[0014] A silicon member according to a fourth aspect of the present invention is characterized in that in the silicon portion according to any one of the first to third aspects, the proportion of random grain boundaries in the crystal grain boundaries of the polycrystalline region is 20% or less. According to the silicon member of aspect 4 of the present invention, the proportion of random grain boundaries in the grain boundaries of the polycrystalline region is limited to 20% or less, so that preferential corrosion of the grain boundaries can be reliably suppressed even when the silicon member is used in a corrosive environment.

[0015] A silicon member according to a fifth aspect of the present invention is the silicon member according to any one of the first to fourth aspects, characterized in that the total length of the grain boundaries within an observation field of 10 mm x 20 mm is 50 cm or less. According to the silicon member of aspect 5 of the present invention, the total length of the crystal grain boundaries within an observation field of 10 mm × 20 mm is 50 cm or less, so there are few grain boundaries, and even when used in a corrosive environment, the progression of localized corrosion can be suppressed. [Effects of the Invention]

[0016] According to the present invention, it is possible to provide a silicon member that can suppress the occurrence of localized corrosion even when used in a corrosive environment, and that can extend the service life. [Brief explanation of the drawings]

[0017] [Figure 1] 1A and 1B are explanatory views showing an example of a silicon member according to an embodiment of the present invention, in which (a) is a top view and (b) is a cross-sectional view. [Figure 2] FIG. 1 is a flow diagram illustrating an example of a method for manufacturing a silicon member according to an embodiment of the present invention. [Figure 3] 3 is an explanatory diagram of a silicon ingot manufacturing apparatus used in the method for manufacturing the silicon member shown in FIG. 2. FIG. [Figure 4] FIG. 4 is a schematic explanatory diagram of a crucible used in the silicon ingot manufacturing apparatus shown in FIG. [Figure 5] 1 shows the results of observation of the polycrystalline region of Example 1 of the present invention. [Figure 6] 1 shows the results of observation of the polycrystalline region of Example 2 of the present invention. [Figure 7] 1 shows the observation results of the polycrystalline region of Comparative Example 1. DETAILED DESCRIPTION OF THE INVENTION

[0018] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A silicon member according to an embodiment of the present invention will now be described with reference to the accompanying drawings. The silicon member of this embodiment is a silicon member arranged in a chamber of a plasma processing apparatus such as a plasma etching apparatus or a plasma CVD apparatus used in a semiconductor device manufacturing process, and in this embodiment, is a silicon electrode plate having a structure in which a plurality of air vents are formed in a plate-shaped member.

[0019] The silicon member 10 of this embodiment has a generally disk shape as shown in FIG. 1, and air vents are not shown in FIG. Here, as will be described later, the silicon member 10 of this embodiment is obtained by cutting a directionally solidified monolike silicon ingot perpendicular to the solidification direction, and as shown in Fig. 1, has a single crystal region 11 located at the center of the disk and a polycrystalline region 12 located on the outer periphery of this single crystal region 11. In this embodiment, the area ratio of the single crystal region 11 located at the center of the disk is 30% or more.

[0020] In the silicon member 10 of this embodiment, the proportion of coincidence boundaries among the grain boundaries of the polycrystalline region 12 is 80% or more. That is, the proportion of the length of the coincidence boundaries to the total length of the grain boundaries present in the polycrystalline region 12 is 80% or more. Furthermore, in the silicon member 10 of this embodiment, the depth of recesses on the surface is set to 0.5 μm or less.

[0021] In the silicon member 10 of this embodiment, the proportion of Σ3 grain boundaries in the coincidence grain boundaries (the proportion of the Σ3 grain boundary length in the coincidence grain boundary length) is preferably 80% or more. Furthermore, in the silicon member 10 of this embodiment, the proportion of Σ9 grain boundaries in the coincidence grain boundaries (proportion of the Σ9 grain boundary length in the coincidence grain boundary length) is preferably 3% or more and 20% or less.

[0022] Furthermore, in the silicon member 10 of this embodiment, it is preferable that the proportion of random grain boundaries in the grain boundaries of the polycrystalline region 12 (the proportion of the length of the random grain boundaries to the total length of the grain boundaries present in the polycrystalline region 12) is 15% or less. Furthermore, in the silicon member 10 of this embodiment, the total length of the crystal grain boundaries (total grain boundary length) within an observation field of 10 mm×20 mm is preferably 50 cm or less.

[0023] The reason why the crystalline structure of the silicon member 10 according to this embodiment is defined as described above will be explained below.

[0024] (Proportion of coincident grain boundaries in the polycrystalline region: 80% or more) The grain boundaries present in the polycrystalline region 12 may be corroded preferentially in a corrosive environment (plasma and corrosive chemicals). Here, a coincidence boundary is an ordered grain boundary in which atoms on the grain boundary are located on the lattice points of the crystals on both sides, and have an atomic arrangement that is in a shared relationship. It is a type of twin boundary, and in the case of a Σ3 coincidence boundary, if one of the crystals is rotated 180 degrees about an axis perpendicular to a certain face, the grain boundary disappears and the crystal becomes a single crystal.

[0025] Since atoms at coincidence boundaries are partially bonded to each other, the bonding strength of the grain boundaries is stronger than that of random grain boundaries, and preferential corrosion of the grain boundaries can be suppressed. For this reason, in this embodiment, the proportion of coincidence boundaries among the crystal grain boundaries of the polycrystalline region 12 is set to 80% or more, thereby suppressing preferential corrosion of the grain boundaries. In this embodiment, the proportion of coincidence boundaries in the crystal grain boundaries of the polycrystalline region 12 is preferably 85% or more, and more preferably 90% or more.

[0026] (Surface recess depth: 0.5 μm or less) If depressions are formed on the surface of the silicon member 10 due to scratches or microcracks caused by grinding, polishing, etc., these depressions will corrode preferentially in a corrosive environment (plasma and corrosive chemicals). For this reason, in this embodiment, the depth of the depressions on the surface of the silicon member 10 is limited to 0.5 μm or less. In this embodiment, the depth of the recesses on the surface of the silicon member 10 is preferably 0.25 μm or less, and more preferably 0.1 μm or less.

[0027] (Proportion of Σ3 grain boundaries among coincidence grain boundaries: 80% or more) At the Σ3 grain boundary, one in three atoms are bonded to each other, and since the number of atomic bonds is greater than that of other coincidence grain boundaries and the grain boundary bonding strength is strong, preferential corrosion of the grain boundary is further suppressed even in corrosive environments. Therefore, in this embodiment, it is preferable that the proportion of Σ3 grain boundaries in the coincidence boundaries is 80% or more. In this embodiment, the proportion of Σ3 grain boundaries in the coincidence grain boundaries is more preferably 85% or more, and even more preferably 90% or more.

[0028] (Proportion of Σ9 grain boundaries among coincidence grain boundaries: 3% to 20%) At the Σ9 grain boundary, one in nine atoms are bonded to each other, and the bonding strength of the grain boundary is relatively strong, which further suppresses preferential corrosion of the grain boundary even in a corrosive environment. Therefore, it is preferable that there are many Σ9 grain boundaries as coincidence boundaries other than the Σ3 grain boundary. Therefore, in this embodiment, it is preferable that the proportion of Σ9 boundaries in the coincidence boundaries is 3% or more and 20% or less. In this embodiment, the proportion of Σ9 boundaries in the coincidence boundaries is more preferably 5% or more, and even more preferably 7% or more. On the other hand, the proportion of Σ9 boundaries in the coincidence boundaries is more preferably 17% or less, and even more preferably 15% or less.

[0029] (Ratio of random grain boundaries in the polycrystalline region: 15% or less) Random grain boundaries have a lower grain boundary bonding strength than coincident grain boundaries, and there is a risk that the grain boundaries will corrode preferentially in a corrosive environment. For this reason, it is preferable to limit the proportion of random grain boundaries in the crystal grain boundaries of the polycrystalline region 12 to 15% or less. In this embodiment, the proportion of random grain boundaries in the grain boundaries of polycrystalline region 12 is more preferably 10% or less, and even more preferably 5% or less. The proportion of random grain boundaries in the grain boundaries of polycrystalline region 12 may be 0%.

[0030] (Total length of grain boundaries within a 10mm x 20mm observation field: 50cm or less) As described above, in the polycrystalline region 12, the grain boundaries may corrode preferentially in a corrosive environment, and therefore it is preferable that the grain boundary length is short. Therefore, in this embodiment, it is preferable that the total length of the grain boundaries within a 10 mm×20 mm observation field by electron backscatter diffraction is 50 cm or less. In this embodiment, the total length of the grain boundaries within an observation field of 10 mm×20 mm is more preferably 30 cm or less, and even more preferably 20 cm or less.

[0031] Next, a method for manufacturing the silicon member 10 according to this embodiment will be described with reference to FIGS.

[0032] As shown in FIG. 2, the method for manufacturing the silicon member 10 according to this embodiment includes a silicon ingot manufacturing step S01, a silicon ingot cutting step S02, a processing step S03, and a polishing step S04.

[0033] (Silicon ingot manufacturing process S01) First, a silicon ingot is produced as a material for the silicon member 10. The crystal structure is controlled by this silicon ingot production step S01. First, the silicon ingot manufacturing apparatus 20 used in the silicon ingot manufacturing process S01 will be described with reference to FIG.

[0034] This silicon ingot manufacturing apparatus 20 includes a crucible 30 in which silicon melt L is stored, a chill plate 22 on which this crucible 30 is placed, a lower heater 23 that supports this chill plate 22 from below, and an upper heater 24 disposed above the crucible 30. In addition, a heat insulating material 25 is provided around the crucible 30. The chill plate 22 has a hollow structure, and is configured so that Ar gas is supplied to the inside through a supply pipe 26 .

[0035] Here, the crucible 30 used in the silicon ingot manufacturing apparatus 20 of this embodiment will be described with reference to FIG. 4 has a mold 31 and a silica layer 32 formed on the inner surface of the mold 31. The mold 31 is made of, for example, quartz or graphite.

[0036] As shown in FIG. 4, the silica layer 32 is provided inside the mold 31, and has a structure in which slurry layers 33 made of fine silica powder and colloidal silica having an average particle size of 1 μm or more and 200 μm or less, and stucco layers 34 made of coarse silica powder having an average particle size of 100 μm or more and 1000 μm or less are alternately stacked in the thickness direction, with the slurry layer 33 being the innermost layer that comes into contact with the silicon ingot, and the total number of stacked slurry layers 33 and stucco layers 34 being 6 or more. In this embodiment, as shown in FIG. 4, a slurry layer 33 is formed at the location in contact with the inner surface of the mold 31, and the total number of stacked slurry layers 33 and stucco layers 34 is six.

[0037] If the total number of stacked slurry layers 33 and stucco layers 34 is less than six, the stress applied when removing the silicon ingot may not be fully relieved, which may result in cracking of the silicon ingot. For this reason, in this embodiment, the total number of stacked slurry layers 33 and stucco layers 34 is set to six or more. Furthermore, by setting the average particle size of the fine silica powder within the range of 1 μm to 200 μm, it can be mixed with colloidal silica to form a slurry, and the above-mentioned slurry layer 33 can be formed satisfactorily. Furthermore, by setting the average particle size of the coarse silica powder to 100 μm or more and 1000 μm or less, the surface roughness does not become larger than necessary, and separation from the mold 31 becomes easy.

[0038] In this embodiment, the thickness of silica layer 32 (total thickness of laminated slurry layer 33 and stucco layer 34) is preferably 1 mm or more, and more preferably 2 mm or more. On the other hand, the thickness of silica layer 32 (total thickness of laminated slurry layer 33 and stucco layer 34) is preferably 30 mm or less, and more preferably 25 mm or less.

[0039] Furthermore, the thickness of the slurry layer 33 is preferably 0.1 mm or more, and more preferably 0.2 mm or more, while the thickness of the slurry layer 33 is preferably 5 mm or less, and more preferably 4 mm or less. The thickness of the stucco layer 34 is preferably 0.1 mm or more, and more preferably 0.2 mm or more, while the thickness of the stucco layer 34 is preferably 5 mm or less, and more preferably 4 mm or less.

[0040] Next, a method for producing a silicon ingot using the silicon ingot production apparatus 20 shown in FIG. 3 will be described.

[0041] First, a seed crystal plate is placed at the bottom of the crucible 30 shown in Fig. 4 (seed crystal plate placing step). The seed crystal plate may be made of a single crystal, and may be taken from a single crystal silicon ingot. Although the crystal grows depending on the crystal plane orientation of the surface of the seed crystal plate, there are no particular limitations on the crystal plane orientation of the surface of the seed crystal plate.

[0042] Next, silicon raw material is charged into the crucible 30 in which the seed crystal plate is placed (raw material charging process). Here, the silicon raw material is a lump called a "chunk" obtained by crushing high-purity silicon of 11N (purity 99.999999999). The particle size of this lump silicon raw material is, for example, 30 mm to 100 mm.

[0043] Next, the silicon raw material charged in the crucible 30 is heated by passing current through the upper heater 24 and the lower heater 23. At this time, the output of the lower heater 23 is adjusted so that the seed crystal plate placed at the bottom of the crucible 30 does not melt completely, and the upper chunk of the seed crystal plate is mainly melted from above (silicon raw material melting process). As a result, silicon melt is stored in the crucible 30. If the seed crystal plate melts completely, liquid phase epitaxial growth will not occur, and many crystal nuclei will form on the bottom of the crucible, resulting in polycrystals and poor growth of single crystals. For this reason, it is necessary to control the temperature so that the seed crystal plate does not melt completely.

[0044] Next, the amount of current supplied to the lower heater 23 is further reduced, and Ar gas is supplied into the chill plate 22 via the supply pipe 26. This cools the bottom of the crucible 30. Furthermore, by gradually reducing the current supplied to the upper heater 24, the silicon melt in the crucible 30 undergoes crystal growth while inheriting the crystal orientation of the seed crystal plate placed at the bottom of the crucible 30, and a silicon ingot having a unidirectional solidification structure and a single crystal portion is obtained (unidirectional solidification process). As for the casting conditions, it is preferable to adjust the solidification rate to be within the range of 5 mm / h to 20 mm / h.

[0045] In the unidirectional solidification process, since the temperature gradient of the silicon melt becomes stronger in the vertical direction, which increases the proportion of coincidence grain boundaries in the polycrystalline region, in this embodiment, it is preferable to control the outputs of the upper heater 24 and the lower heater 23 so that the temperature difference between the top and bottom of the furnace is 70° C. or more. In this embodiment, the temperature measurement positions in the furnace at this temperature difference are near the top and bottom of the silicon ingot. In this embodiment, the temperature difference between the top and bottom of the furnace is more preferably 80° C. or more, and even more preferably 100° C. or more. There is no particular upper limit to the temperature difference between the top and bottom of the furnace, but it is preferably 250° C. or less, and more preferably 150° C. or less.

[0046] After solidification is complete, the silicon ingot formed inside the crucible 30 is removed. In this manner, the silicon ingot of this embodiment is manufactured. In this silicon ingot, a single crystal region is formed in the center of the cross section perpendicular to the solidification direction, and a polycrystalline region is formed on the outer periphery of this single crystal region.

[0047] (Silicon ingot cutting process S02) Next, as described above, the directionally solidified silicon ingot is cut perpendicular to the solidification direction to obtain a disk material of a predetermined thickness.

[0048] (Processing process S03) Next, the disk material is machined to the shape and size of the product, and the surface is polished.

[0049] (Polishing process S04) Next, the surface of the disk material is polished to reduce the depth of the recesses on the surface to 0.5 μm or less. In the polishing process S04, for example, an Oscar polishing machine may be used, with a nonwoven polishing cloth and NaOH (silica slurry), TMAH (silica slurry), water (diamond slurry), or the like, as the polishing abrasive solvent and abrasives. The process program settings for Polishing vary depending on the equipment, but the most common settings are the polishing platen rotation speed, polishing pressure, polishing liquid supply rate, and polishing time. When polishing the 600mm diameter object used in this experiment, each part of the equipment is large. The approximate best setting ranges are a polishing platen rotation speed of 5 rpm to 200 rpm, a polishing pressure of 5 kPa to 1 MPa, a polishing liquid supply rate of 100 mL / min to 10 L / min, and a polishing time of 10 minutes to 1000 minutes.

[0050] Through the above steps, the silicon member 10 of this embodiment is manufactured.

[0051] The silicon member 10 of this embodiment configured as described above has a polycrystalline region 12, and the proportion of coincidence grain boundaries among the crystal grain boundaries of the polycrystalline region 12 is 80% or more, so that preferential corrosion of the grain boundaries can be suppressed even in a corrosive environment. Furthermore, since the depth of the recesses on the surface is set to 0.5 μm or less, the progression of corrosion in the recesses can be suppressed. Therefore, even when the silicon member 10 is used in a corrosive environment, the occurrence of localized corrosion can be suppressed, and the service life of the silicon member 10 can be extended.

[0052] In the silicon member 10 of this embodiment, when the proportion of Σ3 grain boundaries among the coincidence grain boundaries is 80% or more, there are many Σ3 grain boundaries among the coincidence grain boundaries, which have a large number of atomic bonds and strong grain boundary bonding strength, and this can further prevent preferential corrosion of the grain boundaries even when used in a corrosive environment.

[0053] In the silicon member 10 of this embodiment, when the proportion of Σ9 grain boundaries in the coincidence grain boundaries is 3% or more and 20% or less, Σ9 grain boundaries with a relatively strong grain boundary bonding strength are present, and preferential corrosion of the grain boundaries can be further suppressed even when used in a corrosive environment.

[0054] In the silicon member 10 of this embodiment, when the proportion of random grain boundaries among the grain boundaries of the polycrystalline region 12 is 15% or less, preferential corrosion of the grain boundaries can be reliably suppressed even when used in a corrosive environment.

[0055] In the silicon member 10 of this embodiment, when the total length of the crystal grain boundaries within an observation field of 10 mm × 20 mm is 50 cm or less, the number of grain boundaries is small, and the progression of localized corrosion can be suppressed even when the silicon member 10 is used in a corrosive environment.

[0056] Although the embodiment of the present invention has been described above, the present invention is not limited to this and can be modified as appropriate within the scope of the technical idea of ​​the invention. For example, in the present embodiment, the silicon member is described as a disk-shaped silicon electrode plate, but is not limited to this and may be a ring-shaped member. Also, in the present embodiment, the silicon member is described as having a single crystal region, but may not have a single crystal region. [Example]

[0057] The results of confirmation experiments conducted to confirm the effectiveness of the present invention will be described below.

[0058] A directionally solidified silicon ingot (diameter 600 mm) was produced using the silicon ingot manufacturing apparatus described in the embodiment section above. At this time, the temperature difference between the top and bottom of the furnace was adjusted to the value shown in Table 1 by controlling the output of the upper and lower heaters. The obtained silicon ingot was cut perpendicular to the solidification direction to obtain a disk material.

[0059] Thereafter, the surface of the disk material was polished using an Oscar polishing machine with the polishing solution shown in Table 1. The polishing cloth was nonwoven fabric, the polishing platen rotation speed was 30 rpm, the polishing pressure was 50 kPa, the polishing solution supply rate was 1000 mL / min, and the polishing time was 200 min. By the above-described process, silicon members of the invention and comparative examples shown in Table 1 were produced.

[0060] The obtained silicon members were evaluated as follows for the crystal grain boundaries in the polycrystalline region, the depth of the recesses on the surface, and the etching characteristics.

[0061] (grain boundaries in polycrystalline regions) A silicon member was fabricated from the position of radius 175 mm (polycrystalline region) of the obtained disk material with a diameter of 600 mm, and an observation sample was taken. The crystal structure was then observed using an EBSD device with a measurement area of ​​10 mm x 20 mm. Using the IPF map display, random grain boundaries and special grain boundaries (Σ3 grain boundaries, Σ9 grain boundaries, etc.) were identified from the grain boundary angles, and the length of each grain boundary was measured to calculate the total grain boundary length. The evaluation results are shown in Table 2. Examples of observation results using the EBSD device are shown in Figures 5 to 8.

[0062] (Surface recess depth) The depth of the recesses on the surface was measured using a white light interference microscope on a surface plate in a temperature-controlled room (for example, 23°C). The measurement method is not limited to white light interference microscopes; laser microscopes, laser displacement measuring instruments, and probe-type surface roughness measuring instruments can also be used, but white light interference microscopes are capable of measuring with a resolution of less than 1 nm.

[0063] (etching characteristics) The etching characteristics with fluorine gas were evaluated using a plasma etching device (ICP type etching device). The stage diameter was φ150 mm, etching gas was SF6, RF was 2800 W, pressure was 10 Pa, and etching time was 30 minutes. In addition, the "etching depth" in Table 2 is the reduction in total thickness. The "grain boundary progression etching depth" is the amount of progression of the dents. Here, the "grain boundary progression etching depth" was measured at three locations where dents were confirmed at the grain boundaries (grain boundary boundary 1, grain boundary boundary 2, and grain boundary boundary 3), and the respective measured values ​​and their average value were recorded.

[0064] [Table 1]

[0065] [Table 2]

[0066] In Comparative Example 1, the proportion of coincidence boundaries in the crystal grain boundaries of the polycrystalline region was 73.5%, and etching progressed at the grain boundary portions, causing localized corrosion. In Comparative Example 2, the proportion of coincidence boundaries in the crystal grain boundaries of the polycrystalline region was 59.5% and the recess depth was 0.759 mm, so etching progressed further at the grain boundaries, causing localized corrosion.

[0067] In Inventive Example 1, the proportion of Σ3 boundaries in the coincidence boundaries was 100.0%, the proportion of Σ9 boundaries in the coincidence boundaries was 0.0%, and the proportion of random boundaries in the crystal grain boundaries in the polycrystalline region was 0.0%. In Inventive Example 2, the proportion of Σ3 boundaries in the coincidence boundaries was 84.4%, the proportion of Σ9 boundaries in the coincidence boundaries was 15.6%, and the proportion of random boundaries in the crystal grain boundaries in the polycrystalline region was 0.0%.

[0068] As a result of the above, it was confirmed that the present invention can provide a silicon component that can suppress the occurrence of localized corrosion and extend its service life even when used in a corrosive environment. [Explanation of symbols]

[0069] 10 Silicon parts 12 Polycrystalline region

Claims

1. A polycrystalline region made up of a plurality of crystal grains, wherein the proportion of coincidence grain boundaries in the crystal grain boundaries of the polycrystalline region is 80% or more; A silicon member having a surface depression depth of 0.5 μm or less.

2. 2. The silicon member according to claim 1, wherein the proportion of Σ3 grain boundaries in the coincidence grain boundaries is 80% or more.

3. 3. The silicon member according to claim 1, wherein a ratio of Σ9 grain boundaries in the coincidence grain boundaries is 3% or more and 20% or less.

4. 3. The silicon member according to claim 1, wherein the proportion of random grain boundaries in the crystal grain boundaries of the polycrystalline region is 15% or less.

5. 3. The silicon member according to claim 1, wherein the total length of the crystal grain boundaries within an observation field of 10 mm x 20 mm is 50 cm or less.

Citation Information

Patent Citations

  • Silicon member for plasma etching equipment and manufacturing method of the silicon member for the plasma etching equipment

    JP2014141403A