Photolithography system and photolithography method

The photolithography method leverages the response difference between positive and negative photoresists to form contour line patterns, addressing resolution and efficiency limitations in conventional methods, achieving smaller line widths and higher density.

JP2025526630AActive Publication Date: 2025-08-15SHANGHAI OPTOELECTRONICS SCI & TECH INNOVATION CENT
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Patent Information

Application Number
JP2025507096
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Priority Date
2022-08-05
Filing Date
2023-08-03
Publication Date
2025-08-15
Estimated Expiration
2043-08-03

AI Technical Summary

Technical Problem

Conventional photolithography methods face limitations in achieving high resolution and efficiency, with optical lithography being cost-effective but limited to 1 micron resolution, while DUV and EUV are expensive and particle beam lithography is time-consuming.

Method used

A photolithography method utilizing the difference in response to light sources between positive and negative photoresists, forming pattern regions with positive and negative resist layers, and developing them to achieve a contour line pattern with smaller line widths, doubling line density.

Benefits of technology

The method achieves high efficiency, low cost, and simple operation with smaller line widths than conventional methods by pattern contouring, avoiding dissolution issues between photoresist layers.

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Abstract

The present invention relates to a photolithography method and a photolithography system, which include the steps of: (1) forming a negative resist layer on a substrate using a negative photoresist, and forming a positive resist layer on the negative resist layer using a positive photoresist; (2) patterning the negative resist layer and the positive resist layer to form a positive pattern area and a negative pattern area in the positive resist layer and the negative resist layer, respectively, so that the positive pattern area is larger than the negative pattern area; (3) developing the positive resist layer with a positive resist developer to remove the positive photoresist in the positive pattern area; and (4) developing the negative resist layer with a negative resist developer to remove the negative photoresist located near the negative pattern area, thereby providing an exposed area having a size corresponding to the positive pattern area and the negative pattern area, and exposing the substrate. The photolithography method of the present invention is simpler than conventional photolithography techniques, and by contouring the pattern, it can achieve smaller line widths than conventional techniques, making it widely applicable to semiconductor processes and worthy of widespread research and application.
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Description

[Technical Field]

[0001] The present invention relates to the field of semiconductor microstructure processing technology, and more particularly to photolithography methods and systems. [Background technology]

[0002] The rapid development of integrated circuits relies on the development of photolithography, a related manufacturing process, which represents the highest level of precision currently achievable. Photolithography is a precision microfabrication technology. Conventional photolithography uses ultraviolet light with a wavelength of 135-4500 Å as the image information carrier and photoresist as the intermediate or image recording medium to achieve pattern conversion, transfer, and processing, ultimately transferring the image information to a wafer, primarily a silicon wafer, or a dielectric layer.

[0003] In principle, photolithography is a technique for transferring a pattern from a mask onto a substrate through photoresist by irradiating it with light. First, ultraviolet light is irradiated through a mask onto the substrate surface coated with a thin photoresist film, causing a chemical reaction in the photoresist in the exposed areas. Next, development is used to dissolve and remove the photoresist in the exposed or unexposed areas, replicating the mask pattern onto the thin photoresist film. Finally, etching is used to transfer the pattern onto the substrate. Photoresists can be broadly divided into positive and negative photoresists. Positive photoresists have the property that the exposed areas are photochemically reactive and dissolve in developer, while the unexposed areas are insoluble in developer. Negative photoresists have the property that the exposed areas are insoluble in developer due to crosslinking and photochemical reactions, while the unexposed areas are soluble in developer.

[0004] Photolithography is the most important manufacturing process for integrated circuits, and is similar to the lathe in a metalworking workshop. Photolithography technology is essential for almost all processes in the entire chip manufacturing process. Photolithography is also the most important technology in chip manufacturing, accounting for more than 35% of chip manufacturing costs.

[0005] According to the exposure source, photolithography technology can be mainly divided into optical lithography, which generally includes ultraviolet (UV), deep ultraviolet (DUV), and extreme ultraviolet (EUV) as light sources, and particle beam lithography, which generally includes X-ray, electron beam, and ion beam lithography.

[0006] In conventional optical lithography, UV can only achieve a pattern resolution of about 1 micron. Meanwhile, DUV and EUV can achieve higher resolution, but are expensive. Furthermore, particle beam lithography, such as electron beam lithography and focused ion beam lithography, can also achieve a certain degree of resolution, but they are time-consuming and require multiple cycles of drawing processes, significantly reducing work efficiency. Summary of the Invention

[0007] The object of the present invention is to overcome the drawbacks of the prior art by providing a photolithography method that is simple, has a smaller line width than the prior art, is widely applicable to semiconductor processes, and is worthy of being widely studied and applied.

[0008] The present invention has been made to solve the above-mentioned problems, and its object is to provide a photolithography method that utilizes the difference in response to a light source between positive and negative photoresists, i.e., the difference in exposure energy obtained from exposure, and the difference in pattern size after actual development of mutually compatible positive and negative photoresists, to obtain a contour line pattern based on the features of an original mask pattern, and the line width of the contour line pattern is smaller than the characteristic line width of the original pattern, thereby achieving double the line density, and then combining a deposition process and an etching process on a substrate material to further transfer the contour line pattern to a target material. [Means for solving the problem]

[0009] In order to solve the above problems, a photolithography method according to a first aspect of the present invention includes: (1) forming a negative resist layer on a substrate using a negative photoresist, and forming a positive resist layer on the negative resist layer using a positive photoresist; (2) patterning the negative resist layer and the positive resist layer to form a positive pattern region and a negative pattern region in the positive resist layer and the negative resist layer, respectively, such that the positive pattern region is larger than the negative pattern region; (3) developing the positive resist layer with a positive resist developer to remove the positive photoresist in the positive pattern area; (4) developing the negative resist layer with a negative resist developer to remove the negative photoresist located near the negative pattern area, thereby providing an exposed area having a size corresponding to the positive pattern area and the negative pattern area, and exposing the substrate; Includes:

[0010] Furthermore, a photolithography method according to a second aspect of the present invention includes: (1) forming a negative resist layer on a substrate using a negative photoresist, forming a spacer layer on the negative resist layer, and forming a positive resist layer on the spacer layer using a positive photoresist; (2) patterning the negative resist layer and the positive resist layer to form a positive pattern region and a negative pattern region in the positive resist layer and the negative resist layer, respectively, such that the positive pattern region is larger than the negative pattern region; (3) developing the positive resist layer with a positive resist developer to remove the positive photoresist in the positive pattern area; (4) developing the spacer layer using a spacer layer developer or etching the spacer layer using the pattern of the developed positive resist layer as an etching mask so that the pattern of the spacer layer coincides with the pattern of the developed positive resist layer; (5) developing the negative resist layer with a negative resist developer to remove the negative photoresist located near the negative pattern area, thereby providing an exposed area having a size corresponding to the positive pattern area and the negative pattern area, and exposing the substrate; Includes:

[0011] Furthermore, a photolithography method according to a third aspect of the present invention includes the steps of: (1) forming a positive resist layer on a substrate using a positive photoresist, forming a spacer layer on the positive resist layer, and forming a negative resist layer on the spacer layer using a negative photoresist; (2) patterning the negative resist layer and the positive resist layer to form a positive pattern region and a negative pattern region in the positive resist layer and the negative resist layer, respectively, such that the positive pattern region is larger than the negative pattern region; (3) developing the negative resist layer with a negative resist developer to remove the negative photoresist other than the negative pattern region; (4) developing the spacer layer using a spacer layer developer or etching the spacer layer using the pattern of the developed positive resist layer as an etching mask so that the pattern of the spacer layer coincides with the pattern of the developed positive resist layer; (5) developing the positive resist layer with a positive resist developer to remove the positive photoresist at the edge of the positive pattern area, thereby providing an exposed area having a size corresponding to the positive pattern area and the negative pattern area, and exposing the substrate; Includes:

[0012] Furthermore, in step (2), the positive resist layer and the negative resist layer are exposed to an exposure source using a photomask having a stencil pattern or by focus direct writing, thereby forming positive pattern areas and negative pattern areas in the positive resist layer and the negative resist layer, respectively.

[0013] Furthermore, in step (2), the positive resist layer and the negative resist layer are exposed to light by a projection exposure method using an exposure source through a photomask having a stencil pattern, or by a shielding exposure method using an exposure source through a photomask having a stencil pattern, or by a reflective exposure method using an exposure source to expose the positive resist layer and the negative resist layer by reflecting light on a photomask having a stencil pattern.

[0014] Furthermore, the focus direct writing includes ultraviolet light direct writing, deep ultraviolet light direct writing, extreme ultraviolet light direct writing, ion beam direct writing, electron beam direct writing, or X-ray direct writing.

[0015] Furthermore, the wavelength of the exposure light source is 1 to 500 nm, and the drying temperature after exposure is 30 to 300°C.

[0016] Furthermore, the positive photoresist includes a positive ultraviolet photoresist, a positive deep ultraviolet photoresist, a positive extreme ultraviolet photoresist, a positive electron beam photoresist, a positive ion beam photoresist, or a positive X-ray photoresist, and the negative photoresist includes a negative ultraviolet photoresist, a negative deep ultraviolet photoresist, a negative developable deep ultraviolet photoresist, a negative extreme ultraviolet photoresist, a negative electron beam photoresist, a negative ion beam photoresist, or a positive X-ray photoresist.

[0017] Furthermore, the positive resist developer is a developer that corresponds to the positive photoresist, and the negative resist developer is a developer that corresponds to the negative photoresist.

[0018] Furthermore, the photolithography method further includes forming a pattern on the substrate by a material deposition technique or an etching technique.

[0019] Furthermore, the material deposition techniques include electrochemical deposition, plating, CVD (Chemical Vapor Deposition) deposition, laser sputtering, magnetron sputtering, thermal evaporation, electron beam evaporation, or atomic evaporation; the etching techniques include wet etching or dry etching, the wet etching includes electrochemical etching or selective etching liquid etching, and the dry etching includes ion etching or chemical reactive ion etching.

[0020] Additionally, the substrate may comprise a semiconductor, a metal, an insulator, a polymer, or a composite material.

[0021] Furthermore, the spacer layer comprises an inorganic, polymeric, or composite material.

[0022] A fourth aspect of the present invention provides a photolithography system further comprising a layer forming unit, a patterning unit, a positive resist developing unit, and a negative resist developing unit, wherein the photolithography system: (1) forming a negative resist layer on a substrate using a negative photoresist, and forming a positive resist layer on the negative resist layer using a positive photoresist by the layer forming unit; (2) patterning the negative resist layer and the positive resist layer by the patterning unit to form a positive pattern region and a negative pattern region in the positive resist layer and the negative resist layer, respectively, so that the positive pattern region is larger than the negative pattern region; (3) developing the positive resist layer with a positive resist developer by the positive resist developing unit to remove the positive photoresist in the positive pattern region; (4) developing the negative resist layer with a negative resist developer by the negative resist developing unit, and removing the negative photoresist located in the vicinity of the negative pattern area, thereby providing an exposed area having a size corresponding to the positive pattern area and the negative pattern area, and exposing the substrate; Execute.

[0023] A fifth aspect of the present invention provides a photolithography system further comprising a layer forming unit, a patterning unit, a positive resist developing unit, a spacer layer developing and etching unit, and a negative resist developing unit, wherein the photolithography system: (1) forming a negative resist layer on a substrate using a negative photoresist, forming a spacer layer on the negative resist layer, and forming a positive resist layer on the spacer layer using a positive photoresist by the layer forming unit; (2) patterning the negative resist layer and the positive resist layer by the patterning unit to form a positive pattern region and a negative pattern region in the positive resist layer and the negative resist layer, respectively, so that the positive pattern region is larger than the negative pattern region; (3) developing the positive resist layer with a positive resist developer by the positive resist developing unit to remove the positive photoresist in the positive pattern region; (4) developing the spacer layer using a spacer layer developer or etching the spacer layer using the pattern of the developed positive resist layer as an etching mask so that the pattern of the spacer layer coincides with the pattern of the developed positive resist layer by the spacer layer developing and etching unit; (5) developing the negative resist layer with a negative resist developer by the negative resist developing unit, and removing the negative photoresist located in the vicinity of the negative pattern area, thereby providing an exposed area having a size corresponding to the positive pattern area and the negative pattern area, and exposing the substrate; Execute.

[0024] A sixth aspect of the present invention provides a photolithography system further comprising a layer forming unit, a patterning unit, a negative resist developing unit, a spacer layer developing and etching unit, and a positive resist developing unit, wherein the photolithography system comprises: (1) forming a positive resist layer on a substrate using a positive photoresist, forming a spacer layer on the positive resist layer, and forming a negative resist layer on the spacer layer using a negative photoresist by the layer forming unit; (2) patterning the negative resist layer and the positive resist layer by the patterning unit to form a positive pattern region and a negative pattern region in the positive resist layer and the negative resist layer, respectively, so that the positive pattern region is larger than the negative pattern region; (3) developing the negative resist layer with a negative resist developer by the negative resist developing unit to remove the negative photoresist other than the negative pattern region; (4) developing the spacer layer using a spacer layer developer or etching the spacer layer using the pattern of the developed positive resist layer as an etching mask so that the pattern of the spacer layer coincides with the pattern of the developed positive resist layer by the spacer layer developing and etching unit; (5) developing the positive resist layer with a positive resist developer by the positive resist developing unit, and removing the positive photoresist at the edge portion of the positive pattern area, thereby providing an exposed area having a size corresponding to the positive pattern area and the negative pattern area, and exposing the substrate; Execute.

[0025] The present invention further provides a photolithography system control method for controlling the photolithography system according to any one of the fourth to sixth aspects to execute each step.

[0026] The present invention further provides a computer device comprising a memory, a processor, and a computer program stored in the memory and executable by the processor, wherein the computer device realizes the above-mentioned photolithography system control method by the processor executing the computer program.

[0027] The present invention further provides a computer-readable medium storing a computer program that, when executed by a processor, implements the above-described photolithography system control method.

[0028] Effect of the invention Compared with the prior art, the present invention has the following advantages: (1) The present invention has the characteristics of high efficiency, low cost, and simple operation, and can realize size reduction relative to the original mask pattern and achieve smaller line widths than the prior art by pattern contouring.

[0029] (2) In the present invention, by applying a thin spacer layer between two layers of photoresist, it is possible to avoid or reduce the phenomenon in which the two layers of photoresist are dissolved during the application process. [Brief explanation of the drawings]

[0030] [Figure 1A]1 is a schematic diagram showing step 1A of applying a negative photoresist to a substrate in the photolithography method according to the first embodiment of the present invention. FIG. [Figure 1B] FIG. 2 is a schematic diagram showing step 2A of applying a positive photoresist to a negative photoresist in the photolithography method according to the first embodiment of the present invention. [Figure 1C] FIG. 3 is a schematic diagram showing step 3A of exposing two layers of photoresist in the photolithography method according to the first embodiment of the present invention. [Figure 1D] FIG. 4 is a schematic diagram showing step 4A of developing a positive photoresist in the photolithography method according to the first embodiment of the present invention. [Figure 1E] FIG. 5 is a schematic diagram showing step 5A of developing a negative photoresist in the photolithography method according to the first embodiment of the present invention. [Figure 1F] FIG. 6 is a schematic diagram showing step 6A of depositing by a deposition technique in the photolithography method according to the first embodiment of the present invention. [Figure 1G] FIG. 7 is a schematic diagram showing step 7A of removing photoresist after vapor deposition in the photolithography method according to the first embodiment of the present invention. [Figure 1F1] FIG. 6 is a schematic diagram showing step 6A' of etching by an etching technique in the photolithography method according to the first embodiment of the present invention. [Figure 1G1] FIG. 7 is a schematic diagram showing step 7A' of removing photoresist after etching in the photolithography method according to the first embodiment of the present invention. [Figure 2A] FIG. 10 is a schematic diagram showing step 1B of applying a negative photoresist to a substrate in a photolithography method according to the second embodiment of the present invention. [Figure 2B] FIG. 10 is a schematic diagram showing step 2B of applying a spacer layer to a negative photoresist in the photolithography method according to the second embodiment of the present invention. [Figure 2C]FIG. 10 is a schematic diagram showing step 3B of applying a positive photoresist to the spacer layer in the photolithography method according to the second embodiment of the present invention. [Figure 2D] FIG. 10 is a schematic diagram showing step 4B of exposing two layers of photoresist in the photolithography method according to the second embodiment of the present invention. [Figure 2E] FIG. 10 is a schematic diagram showing step 5B of developing a positive photoresist in the photolithography method according to the second embodiment of the present invention. [Figure 2F] FIG. 6 is a schematic diagram showing step 6B of patterning the spacer layer in the photolithography method according to the second embodiment of the present invention. [Figure 2G] FIG. 10 is a schematic diagram showing step 7B of developing a negative photoresist in the photolithography method according to the second embodiment of the present invention. [Figure 2H] FIG. 8 is a schematic diagram showing step 8B of performing deposition by a deposition technique in the photolithography method according to the second embodiment of the present invention. [Figure 2I] FIG. 10 is a schematic diagram showing step 9B of removing photoresist after vapor deposition in the photolithography method according to the second embodiment of the present invention. [Figure 2H1] FIG. 8 is a schematic diagram showing step 8B' of etching by an etching technique in the photolithography method according to the second embodiment of the present invention. [Figure 2I1] FIG. 10 is a schematic diagram showing step 9B' of removing photoresist after etching in the photolithography method according to the second embodiment of the present invention. [Figure 3A] FIG. 10 is a schematic diagram showing step 1C of applying a positive photoresist to a substrate in a photolithography method according to the third embodiment of the present invention. [Figure 3B] FIG. 10 is a schematic diagram showing step 2C of applying a spacer layer to a positive photoresist in the photolithography method according to the third embodiment of the present invention. [Figure 3C]FIG. 11 is a schematic diagram showing step 3C of applying a negative photoresist to the spacer layer in the photolithography method according to the third embodiment of the present invention. [Figure 3D] FIG. 10 is a schematic diagram showing step 4C of exposing two layers of photoresist in the photolithography method according to the third embodiment of the present invention. [Figure 3E] FIG. 10 is a schematic diagram showing step 5C of developing a negative photoresist in the photolithography method according to the third embodiment of the present invention. [Figure 3F] FIG. 10 is a schematic diagram showing step 6C of patterning the spacer layer in the photolithography method according to the third embodiment of the present invention. [Figure 3G] FIG. 10 is a schematic diagram showing step 7C of developing a positive photoresist in the photolithography method according to the third embodiment of the present invention. [Figure 4] 1A and 1B are schematic diagrams illustrating a contour line pattern obtained based on a mask pattern using a photolithography method according to an embodiment of the present invention. [Figure 5] 1 is a block diagram schematically illustrating a lithography system compatible with a lithography method according to a first embodiment of the present invention. [Figure 6] FIG. 10 is a block diagram schematically illustrating a lithography system compatible with a lithography method according to a second embodiment of the present invention. [Figure 7] FIG. 10 is a block diagram schematically illustrating a lithography system compatible with a lithography method according to a third embodiment of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0031] The present invention will be described in detail below with reference to the accompanying drawings and specific embodiments. The present embodiments are implemented based on the technical solutions of the present invention, and provide detailed embodiments and specific operating procedures, but the scope of protection of the present invention is not limited to the following embodiments.

[0032] For convenience of description, spatially relative terms such as "below," "above," and "up" may be used herein to describe the relationship of one element or feature to another element or feature as shown in the figures. It should be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation other than the orientation depicted in the figures. For example, if the device in the figures were inverted, elements described as "below" or "below" other elements or features would then be oriented "above" the other elements or features.

[0033] Unless otherwise specified, terms used herein have the same meaning as commonly understood by those skilled in the art to which the present invention belongs. Terms should be understood to have a meaning consistent with the meaning in the context of the relevant art, and should not be idealized or overly formalized unless expressly so limited herein.

[0034] Embodiment 1 <Photolithography method based on two-layer photoresist> A first embodiment of the present invention provides a photolithography method, the method comprising: (1) forming a negative resist layer on a substrate using a negative photoresist, and forming a positive resist layer on the negative resist layer using a positive photoresist; (2) patterning the negative resist layer and the positive resist layer to form a positive pattern region and a negative pattern region in the positive resist layer and the negative resist layer, respectively, such that the positive pattern region is larger than the negative pattern region; (3) developing the positive resist layer with a positive resist developer to remove the positive photoresist in the positive pattern area; (4) developing the negative resist layer with a negative resist developer to remove the negative photoresist located near the negative pattern area, thereby providing an exposed area having a size corresponding to the positive pattern area and the negative pattern area, and exposing the substrate; Includes:

[0035] Hereinafter, a first embodiment of the photolithography method based on the above-described two-layer photoresist will be described in detail with reference to Figures 1A, 1B, 1C, 1D, 1E, 1F, 1G, 1F1, and 1G1. In each drawing, the same or corresponding parts are denoted by the same reference numerals.

[0036] 1A is a schematic diagram showing step 1A of applying a negative photoresist to a substrate in the photolithography method according to the first embodiment of the present invention. FIG. 1B is a schematic diagram showing step 2A of applying a positive photoresist to the negative photoresist in the photolithography method according to the first embodiment of the present invention.

[0037] First, as shown in Fig. 1A, in step 1A, a negative photoresist 102A (i.e., a negative resist layer) is spin-coated on a substrate 101A and dried. Next, as shown in Fig. 1B, in step 2A, a positive photoresist 103A (i.e., a positive resist layer) is spin-coated on the negative photoresist 102A and dried (corresponding to forming a negative resist layer on a substrate using a negative photoresist and forming a positive resist layer on the negative resist layer using a positive photoresist).

[0038] The negative photoresist includes negative ultraviolet photoresist, negative deep ultraviolet photoresist, negative developable deep ultraviolet photoresist, negative extreme ultraviolet photoresist, negative electron beam photoresist, negative ion beam photoresist, or negative X-ray photoresist, including, but not limited to, the NANO® SU-8 Series, HSQ, AZ series photoresist (e.g., AZ N4000, AZ N6000), HNR series photoresist, SC series photoresist, ma-N series photoresist (e.g., ma-N 400, ma-N 1400), AZ® nLOF® 2000 Series, AZ® nLOF® 5500 Photoresist, NR7-PY Series, NR9-PY Series, JSR WPR Series, NR71 Series, NR9 Series, etc.

[0039] Positive photoresists include positive ultraviolet photoresists, positive deep ultraviolet photoresists, positive extreme ultraviolet photoresists, positive electron beam photoresists, positive ion beam photoresists, or positive X-ray photoresists, including, but not limited to, MICROPOSIT S1800 series photoresists, BCI-3511 photoresists, AZ series photoresists (e.g., AZ111, AZ 1500, AZ 3300, AZ 4999, AZ 6600, AZ 8112, AZ 3000, AZ 1075, AZ 700, AZ 900), HNR500 series photoresists, OiR series photoresists, TDMR-AR80 HP 6CP, PR1 series photoresists, ma-P 1200 series photoresists, SPR series photoresists (e.g., SPR 220, SPR 660, SPR3000, etc.), PMMA series photoresists, and the like.

[0040] In addition, compatibility between different types of positive and negative photoresists must be confirmed in advance. Below are two examples of positive and negative photoresist pair sets: The first set is a positive photoresist model number HTI 751 and a negative photoresist model number SUN 9i, and the second set is a positive photoresist model number AZ 1500 and a negative photoresist model number AZ nlof 2020.

[0041] For example, the process of spin-coating a negative photoresist (e.g., SUN 9i, AZ nlof 2020) involves first spin-coating at 800-1000 rpm for 5-10 seconds (this step can be omitted), then spin-coating at 4000-8000 rpm for 30-40 seconds, and baking at 95-100°C for 60-90 seconds.

[0042] For example, the process of spin-coating a positive photoresist (e.g., HTI 751, AZ 1500) involves first spin-coating at a rotation speed of 800-1000 rpm for 5-10 seconds (this step can be omitted), then spin-coating at a rotation speed of 2000-5000 rpm for 30-40 seconds, and baking at 90-100°C for 30-50 seconds.

[0043] The thickness of the photoresist film is determined by the different rotation speeds, and the pre-baking temperature and time, as well as the subsequent exposure dose, exposure time, and development time, are adjusted according to the different film thicknesses.

[0044] Here, the substrate material includes a semiconductor, a metal, an insulator, a polymer, or a composite material.

[0045] FIG. 1C is a schematic view showing step 3A of exposing two layers of photoresist in the photolithography method according to the first embodiment of the present invention.

[0046] After step 2A, in step 3A, as shown in Fig. 1C, two layers of photoresist 102A, 103A are exposed to an exposure source using a photomask having a stencil pattern or by focus direct writing (an example of photomask 108A is shown in Fig. 1C). After exposure, different sized exposure patterns 104A, 105A (i.e., negative pattern areas and positive pattern areas) are formed on the negative photoresist 102A and the positive photoresist 103A, respectively, and then dried (corresponding to patterning the negative resist layer and the positive resist layer to form positive pattern areas and negative pattern areas, respectively, so that the positive pattern areas are larger than the negative pattern areas).

[0047] The exposure source may be an ultraviolet light source, a deep ultraviolet light source, an extreme ultraviolet light source, an ion beam, an electron beam, or an X-ray. For example, the wavelength of the exposure source may be 1-500 nm, and the drying temperature after exposure may be 30-300°C. Alternatively, the wavelength of the exposure source may be 350-400 nm, and the drying temperature after exposure may be 95-105°C.

[0048] The focus direct writing includes ultraviolet light direct writing, deep ultraviolet light direct writing, extreme ultraviolet light direct writing, ion beam direct writing, electron beam direct writing, and X-ray direct writing. For example, the feature line width or feature size of the stencil pattern may be 2 nm-1000 μm. Furthermore, the feature line width or feature size of the stencil pattern may be 2 nm-1 μm.

[0049] For example, a pre-baked silicon wafer is placed under a mask and then placed under a UV light source. The UV light source is turned on and photolithography is performed. The exposure time is adjusted depending on the positive-negative photoresist pair set used. In the example pair mentioned above, the photoresist pair sets of HTI 751 and SUN 9i, or AZ 1500 and AZ nlof 2020, require 100-200 mJ / cm at wavelengths of 350-400 nm. 2The exposure flux is applied. The UV wavelength and exposure flux must be determined by taking into account the UV absorption effect of different thicknesses of positive photoresists (e.g., HTI 751, AZ 1500) to ensure that the underlying negative photoresist (e.g., SUN 9i, AZ nlof 2020) receives sufficient exposure flux. Because photoresist pair sets (HTI 751 and SUN 9i, AZ 1500 and AZ nlof 2020) respond differently to exposure flux at specific wavelengths, different sizes of patterns can be obtained based on the mask pattern (e.g., 104A and 105A in Figure 1C).

[0050] For example, the exposure may be a single exposure. For example, the exposure may be a multiple exposure. That is, the exposure may be divided into multiple exposures of shorter duration or smaller duration and superimposed.

[0051] Figure 1D is a schematic diagram showing step 4A of developing a positive photoresist in the photolithography method according to the first embodiment of the present invention. Figure 1E is a schematic diagram showing step 5A of developing a negative photoresist in the photolithography method according to the first embodiment of the present invention.

[0052] After step 3A, in step 4A, as shown in Fig. 1D, the positive photoresist is developed with a positive resist developer (corresponding to developing the positive resist layer with a positive resist developer and removing the positive photoresist in the positive pattern area). Then, as shown in Fig. 1E, in step 5A, the negative photoresist is controllably developed with a negative resist developer to wash away only the edge portion of the exposure pattern 104A on the negative photoresist and expose the substrate, thereby converting the stencil pattern into a contour line pattern (corresponding to developing the negative resist layer with a negative resist developer and removing the negative photoresist located near the negative pattern area to provide an exposed area with a size corresponding to the positive pattern area and the negative pattern area, thereby exposing the substrate).

[0053] The positive resist developer is a developer corresponding to the positive photoresist, and the negative resist developer is a developer corresponding to the negative photoresist. For example, the positive resist developer may be TMAH 2.38% and MF-26A, and the negative resist developer may be TMAH 2.38% and SU-8 developer.

[0054] For example, the exposed silicon wafer is placed in a corresponding positive resist developer, such as a TMAH developer, and the exposed positive photoresist on the silicon wafer is washed to generate a pattern opposite to the exposure pattern. The silicon wafer is then washed to remove the developer and dried to remove the residual liquid. The exposed silicon wafer is then placed in a corresponding negative resist developer, such as a TMAH developer, and the development time is adjusted to partially (but not entirely) wash the unexposed negative photoresist on the silicon wafer. The silicon wafer is then washed to remove the developer and dried to remove the residual liquid, and a contour line pattern of the exposure pattern is generated.

[0055] Also, if the developer for positive and negative photoresists is the same, e.g., TMAH, steps 4A and 5A of the two-step development can be merged to eliminate the need for additional washing and drying steps. It is also necessary to conduct cross-experiments for positive and negative photoresists and the corresponding developers to create an optimal development process.

[0056] Figure 1F is a schematic diagram illustrating step 6A of depositing a layer by a vapor deposition technique in the photolithography method according to the first embodiment of the present invention. Figure 1G is a schematic diagram illustrating step 7A of removing the photoresist after deposition in the photolithography method according to the first embodiment of the present invention.

[0057] After step 5A, a deposition layer 106A may be formed by a material deposition technique in step 6A, as shown in Figure 1F, and then the photoresist is removed in step 7A, leaving a contour-type pattern, as shown in Figure 1G.

[0058] Materials deposition techniques include electrochemical vapor deposition, plating, CVD deposition, laser sputtering, magnetron sputtering, thermal evaporation, electron beam evaporation and atomic vapor deposition.

[0059] Figure 1F1 is a schematic diagram illustrating step 6A' of etching by an etching technique in the photolithography method according to embodiment 1 of the present invention. Figure 1G1 is a schematic diagram illustrating step 7A' of removing photoresist after etching in the photolithography method according to embodiment 1 of the present invention.

[0060] After step 5A, as shown in Figure 1F1, in step 6A', a groove 107A may be formed by etching technology, and then, as shown in Figure 1G1, in step 7A', the photoresist is removed to leave a contour line pattern.

[0061] FIG. 4 is a schematic diagram showing a contour line pattern obtained based on a mask pattern using a photolithography method according to an embodiment of the present invention.

[0062] By adopting the first embodiment of the present invention, a contour line pattern based on a mask pattern can be obtained as shown in Figure 4. Since the line width of the contour line pattern is smaller than that of the mask pattern, the line density can be doubled, and the size can be reduced compared to the original mask pattern. Also, Figure 4 shows examples in which the mask patterns are, from left to right, a first rectangle, a second rectangle, a square, a circle, and an irregular shape, respectively, but the present invention is not limited to these. Mask patterns of any shape can be adopted as needed, and contour line patterns of any shape can be realized.

[0063] Specific examples of photolithography methods based on the bilayer photoresist of the present invention will now be described in detail.

[0064] Example 1a As an example, this embodiment 1a specifically includes the following steps.

[0065] (1) Negative photoresist coating The silicon wafer is placed in a resist coating system and fixed. Negative photoresist SUN 9i or AZ nlof 2020 is spin-coated at 1000 rpm for 5 seconds and 4000 rpm for 40 seconds, and then baked at 100°C for 60 seconds.

[0066] (2) Positive photoresist coating The cooled silicon wafer is placed in a resist coating system and fixed. Positive photoresist HTI 751 or AZ 1500 is spin-coated at 800 rpm for 5 seconds and 2500 rpm for 30 seconds, and then baked at 95-100°C for 40 seconds.

[0067] (3) Exposure The silicon wafer substrate that has undergone the above steps is tightly fixed under a mask, placed directly under an ultraviolet light source under vacuum, and the light source is turned on to perform photolithography. The exposure time is adjusted according to the type of photoresist pair set and the thickness of the photoresist layer. After exposure is complete, the mask is removed, and the exposed silicon wafer is moved to a heating stage and baked at 100°C for 45 seconds. Here, the exposure flux is, for example, 100 mJ / cm. 2 and the exposure flux can be changed as needed.

[0068] (4) Development of positive photoresist The exposed silicon wafer is placed in a corresponding positive photoresist developer, such as a TMAH developer, and the exposed positive photoresist on the silicon wafer is washed to generate a pattern opposite to the exposure pattern. The silicon wafer is then washed to remove the developer and dried to remove any residual liquid.

[0069] (4) Development of negative photoresist The exposed silicon wafer is placed in a corresponding negative photoresist developer, for example, a TMAH developer, and the developing time is adjusted to wash away some (but not all) of the unexposed negative photoresist on the silicon wafer. The silicon wafer is then washed to remove the developer and dried to remove the residual liquid, thereby generating a contour line pattern based on the mask pattern.

[0070] If the developer for the positive and negative photoresists is the same, e.g., TMAH, the two-step development (4) and (5) may be combined so that an additional washing and drying step is not required. In this Example 1a, as an example, the following vapor deposition step can be further carried out in addition to the above steps (1) to (5).

[0071] (6) Vapor deposition of materials The developed silicon wafer was placed in the deposition device and heated with a molecular pump for 10 -6A 2-nanometer chromium film was thermally evaporated at a rate of 1 Å / s and a 50-nanometer gold film was thermally evaporated at a rate of 0.5 Å / s under a vacuum of 0.2 Pa. The 2-nanometer chromium film served as an adhesion layer for the gold film.

[0072] (7) Removal of photoresist After the chamber has cooled, the vacuum is released and the plated silicon wafer is removed. The silicon wafer is then immersed in acetone and ultrasonically cleaned until all of the photoresist is removed, leaving behind a gold outline pattern.

[0073] In this Example 1a, as an example, the following etching step can be further carried out in addition to the above steps (1) to (5).

[0074] (6') Dry etching The silicon wafer after photolithography is placed in an ion etching machine, and the exposed silicon substrate is etched with plasma gas using the photoresist pattern as a mask, thereby etching a pattern into the silicon wafer in a contour line pattern.

[0075] (7') Removal of photoresist A silicon wafer was immersed in acetone and subjected to ultrasonic cleaning until the photoresist was completely removed, thereby creating a contour line pattern on the surface of the silicon wafer.

[0076] Example 1b Regarding exposure, in Example 1a, an exposure method was used in which the silicon wafer substrate was tightly fixed under a mask, evacuated, and placed directly under an ultraviolet light source, but the present invention is not limited to this. For example, the photolithography technology for the positive-negative two-layer photoresist of the present invention may also use a projection exposure method. In the following, Example 1b, the exposure step of the photolithography technology for the positive-negative two-layer photoresist of the present invention will be described using a projection ultraviolet photolithography system with an ultraviolet light wavelength of less than 400 nm as an example (the remaining steps are the same as in Example 1a, so only the exposure step (3) will be described here. Duplicate explanations of the remaining steps will be omitted).

[0077] (3) Projection-type ultraviolet exposure The silicon wafer substrate after the above steps is then tightly fixed to the sample stage of a projection photolithography machine and subjected to projection UV exposure through a photomask. The exposure time is adjusted according to the type of photoresist pair set and the thickness of the photoresist layer. After exposure, the exposed silicon wafer is transferred to a heating stage and baked at 110°C for 90 seconds. The exposure flux is, for example, 100 mJ / cm. 2 and can be modified according to needs.

[0078] Example 1c Regarding exposure, in Example 1a, an exposure method was used in which a silicon wafer substrate was tightly fixed under a mask, evacuated, and placed directly under an ultraviolet light source, while in Example 1b, a projection exposure method was used. However, the present invention is not limited to this. For example, the photolithography technique for the positive-negative two-layer photoresist of the present invention may also use an ultraviolet direct writing exposure method. Hereinafter, in Example 1c, the exposure step of the photolithography technique for the positive-negative two-layer photoresist of the present invention using ultraviolet direct writing exposure will be described (since the remaining steps are the same as in Example 1a, only the exposure step (3) will be described here. Duplicate explanations of the remaining steps will be omitted).

[0079] (3) Ultraviolet direct writing exposure The silicon wafer substrate after the above steps is fixed in close contact with the exposure source, and the UV direct writing system is turned on to perform the direct writing exposure operation. The exposure time is adjusted according to the type of photoresist pair set and the thickness of the photoresist layer. After the exposure is completed, the mask is removed, and the exposed silicon wafer is transferred to a heating table and baked at 110°C for 60 seconds. The exposure flux is, for example, 100 mJ / cm. 2 and can be modified according to needs.

[0080] Example 1d Regarding exposure, in Example 1a, an exposure method was used in which a silicon wafer substrate was tightly fixed under a mask, evacuated, and placed directly under an ultraviolet light source; in Example 1b, a projection exposure method was used; and in Example 1c, an ultraviolet direct writing exposure method was used; however, the present invention is not limited to these. For example, the photolithography technique for the positive-negative two-layer photoresist of the present invention may also use an electron beam direct writing exposure method. Below, in Example 1d, the main steps of the photolithography technique for the positive-negative two-layer photoresist of the present invention using electron beam direct writing exposure are described.

[0081] (1) Spin coating of negative photoresist The cleaned silicon wafer was placed on a spin coater and vacuum-fixed. A negative electron beam photoresist (HSQ) was drop-coated, spin-coated, and pre-baked.

[0082] (2) Spin coating of positive photoresist After cooling, the silicon wafer was placed on a spin coater and vacuum-fixed. A positive electron beam photoresist (PMMA) was drop-coated, followed by spin-coating and pre-baking.

[0083] (3) Electron beam direct writing exposure The silicon wafer substrate that has undergone the above steps is placed in an electron beam direct writing system, and the electron beam direct writing operation is performed. The electron beam exposure dose is adjusted according to the type of photoresist pair set and the thickness of the photoresist layer. After the electron beam direct writing exposure is completed, the exposed silicon wafer is transferred to a heating table and post-baked. In this process, the exposure flux is, for example, 500 μC / cm 2 and can be modified according to needs.

[0084] (4) Development of positive photoresist After the post-baking was completed and the silicon wafer was cooled to room temperature, it was separately developed by placing the silicon wafer after photolithography in a positive electron beam photoresist developer (MIBK:IPA developer) to wash away the exposed positive photoresist on the silicon wafer, then removing the silicon wafer, rinsing it with water, and drying it with a nitrogen gas stream.

[0085] (5) Development of negative photoresist The silicon wafer was then placed in a negative electron beam photoresist developer (TMAH developer) to partially remove the unexposed negative photoresist PMMA underneath the unexposed positive photoresist. The silicon wafer was then removed, washed with water, and dried in a nitrogen gas stream. A contour line pattern based on the stencil pattern was then created.

[0086] Thereafter, a convex or concave structure can be realized by further combining processes such as material vapor deposition and dry / wet etching, but since these are similar to steps (6) and (7) and steps (6') and (7') in Example 1a, they will not be described again here.

[0087] Embodiment 2 <Photolithography method based on negative photoresist + spacer layer + positive photoresist> Embodiment 2 of the present invention provides a photolithography method based on negative photoresist+spacer layer+positive photoresist, the method comprising: (1) forming a negative resist layer on a substrate using a negative photoresist, forming a spacer layer on the negative resist layer, and forming a positive resist layer on the spacer layer using a positive photoresist; (2) patterning the negative resist layer and the positive resist layer to form a positive pattern region and a negative pattern region in the positive resist layer and the negative resist layer, respectively, such that the positive pattern region is larger than the negative pattern region; (3) developing the positive resist layer with a positive resist developer to remove the positive photoresist in the positive pattern area; (4) developing the spacer layer using a spacer layer developer or etching the spacer layer using the pattern of the developed positive resist layer as an etching mask so that the pattern of the spacer layer coincides with the pattern of the developed positive resist layer; (5) developing the negative resist layer with a negative resist developer to remove the negative photoresist located near the negative pattern area, thereby providing an exposed area having a size corresponding to the positive pattern area and the negative pattern area, and exposing the substrate; Contains Hereinafter, a second embodiment of the photolithography method based on the above-described negative photoresist + thin spacer layer + positive photoresist will be described in detail with reference to Figures 2A, 2B, 2C, 2D, 2E, 2F, 2G, 2H, 2I, 2H1, and 2I1. In each drawing, identical or corresponding parts are denoted by the same reference numerals. Furthermore, duplicated descriptions of parts in the second embodiment that are similar to those in the first embodiment will be omitted.

[0088] Figure 2A is a schematic diagram showing step 1B of applying a negative photoresist to a substrate in a photolithography method according to embodiment 2 of the present invention. Figure 2B is a schematic diagram showing step 2B of applying a spacer layer to the negative photoresist in the photolithography method according to embodiment 2 of the present invention. Figure 2C is a schematic diagram showing step 3B of applying a positive photoresist to the spacer layer in the photolithography method according to embodiment 2 of the present invention.

[0089] First, as shown in FIG. 2A, in step 1B, a negative photoresist 102B (i.e., a negative resist layer) is spin-coated on a substrate 101B and dried. Next, as shown in FIG. 2B, in step 2B, a spacer layer thin film 110B is applied on the negative photoresist 102B. Next, as shown in FIG. 2C, in step 2C, a positive photoresist 103B (i.e., a positive resist layer) that matches the negative photoresist 102B is spin-coated on the spacer layer thin film 110B and dried (corresponding to forming a negative resist layer on a substrate using a negative photoresist, forming a spacer layer on the negative resist layer, and forming a positive resist layer on the spacer layer using a positive photoresist).

[0090] Negative photoresists include negative ultraviolet photoresists, negative deep ultraviolet photoresists, negative extreme ultraviolet photoresists, negative electron beam photoresists, negative ion beam photoresists, or negative X-ray photoresists. Positive photoresists include positive ultraviolet photoresists, positive deep ultraviolet photoresists, positive extreme ultraviolet photoresists, positive electron beam photoresists, positive ion beam photoresists, or positive X-ray photoresists.

[0091] In addition, compatibility between different types of positive and negative photoresists must be confirmed in advance. Below are two examples of positive and negative photoresist pair sets: The first set is a positive photoresist model number HTI 751 and a negative photoresist model number SUN 9i, and the second set is a positive photoresist model number AZ 1500 and a negative photoresist model number AZ nlof 2020.

[0092] For example, the process of spin-coating a negative photoresist (e.g., SUN 9i, AZ nlof 2020) involves first spin-coating at 800-1000 rpm for 5-10 seconds (this step can be omitted), then spin-coating at 4000-8000 rpm for 30-40 seconds, and baking at 95-100°C for 60-90 seconds.

[0093] For example, the process of spin-coating a positive photoresist (e.g., HTI 751, AZ 1500) involves first spin-coating at a rotation speed of 800-1000 rpm for 5-10 seconds (this step can be omitted), then spin-coating at a rotation speed of 2000-5000 rpm for 30-40 seconds, and baking at 90-100°C for 30-50 seconds.

[0094] The thickness of the photoresist film is determined by the different rotation speeds, and the pre-baking temperature and time, as well as the subsequent exposure dose, exposure time, and development time, are adjusted according to the different film thicknesses.

[0095] Here, the substrate material includes a semiconductor, a metal, an insulator, a polymer, or a composite material.

[0096] FIG. 2D is a schematic diagram showing step 4B of exposing two layers of photoresist in the photolithography method according to the second embodiment of the present invention.

[0097] After step 3B, in step 4B, as shown in Fig. 2D, the two layers of photoresist 102B and 103B are exposed to an exposure source using a photomask having a stencil pattern or by focus direct writing (Fig. 2D shows an example of photomask 108B). After exposure, exposure patterns 104B and 105B (i.e., negative pattern areas and positive pattern areas) of different sizes are formed on the negative photoresist 102B and the positive photoresist 103B, respectively, and then dried (corresponding to patterning the negative resist layer and the positive resist layer to form positive pattern areas and negative pattern areas in the positive resist layer and the negative resist layer, respectively, so that the positive pattern areas are larger than the negative pattern areas).

[0098] The exposure source may be an ultraviolet light source, a deep ultraviolet light source, an extreme ultraviolet light source, an ion beam, an electron beam, or an X-ray. The focus direct writing may be an ultraviolet light direct writing, a deep ultraviolet light direct writing, an extreme ultraviolet light direct writing, an ion beam direct writing, an electron beam direct writing, or an X-ray direct writing. The feature line width or feature size of the stencil pattern may be 2 nm-1000 μm.

[0099] For example, a pre-baked silicon wafer is placed under a mask and then placed under a UV light source. The UV light source is turned on and photolithography is performed. The exposure time is adjusted depending on the positive-negative photoresist pair set used. In the example pair mentioned above, the photoresist pair sets of HTI 751 and SUN 9i, or AZ 1500 and AZ nlof 2020, require 100-200 mJ / cm at wavelengths of 350-400 nm. 2The exposure flux is applied. The UV wavelength and exposure flux must be determined by taking into account the UV absorption effect of different thicknesses of positive photoresists (e.g., HTI 751, AZ 1500) to ensure that the underlying negative photoresist (e.g., SUN 9i, AZ nlof 2020) receives sufficient exposure flux. Because photoresist pair sets of HTI 751 and SUN 9i, AZ 1500 and AZ nlof 2020 respond differently to exposure flux at specific wavelengths, different sizes of patterns can be obtained based on the mask pattern (e.g., 104B and 105B in Figure 2D).

[0100] For example, the exposure may be a single exposure. For example, the exposure may be a multiple exposure. That is, the exposure may be divided into multiple exposures of shorter duration or smaller duration and superimposed.

[0101] Figure 2E is a schematic diagram illustrating step 5B of developing a positive photoresist in the photolithography method according to the second embodiment of the present invention. Figure 2F is a schematic diagram illustrating step 6B of patterning a spacer layer in the photolithography method according to the second embodiment of the present invention. Figure 2G is a schematic diagram illustrating step 7B of developing a negative photoresist in the photolithography method according to the second embodiment of the present invention.

[0102] After step 4B, in step 5B, as shown in Fig. 2E, the positive photoresist is developed with a positive resist developer (corresponding to developing the positive resist layer with a positive resist developer and removing the positive photoresist in the positive pattern region). Next, as shown in Fig. 2F, in step 6B, the spacer layer thin film is developed with a spacer layer thin film developer, or the spacer layer thin film is etched using the pattern of the developed positive photoresist as an etching mask, so that the pattern of the spacer layer and the pattern of the developed positive resist layer match. (This corresponds to developing the spacer layer with a spacer layer developer, or etching the spacer layer using the pattern of the developed positive resist layer as an etching mask, so that the pattern of the spacer layer and the pattern of the developed positive resist layer match.) Next, as shown in FIG. 2G, in step 7B, the negative photoresist is controllably developed with a negative resist developer to wash away only the edge portion of the exposed pattern 104B on the negative photoresist and expose the substrate, thereby converting the stencil pattern into a contour line pattern (the negative resist layer is developed with a negative resist developer to remove the negative photoresist located near the negative pattern area, thereby providing an exposed area having a size corresponding to the positive pattern area and the negative pattern area, and exposing the substrate).

[0103] For example, the exposed silicon wafer is placed in a corresponding positive resist developer, such as a TMAH developer, and the exposed positive photoresist on the silicon wafer is washed to create a pattern opposite to the exposure pattern. The silicon wafer is then washed, the developer is removed, and the silicon wafer is dried to remove any residual liquid. The exposed silicon wafer is then placed in a corresponding spacer layer thin film developer, such as a TMAH developer, or dry etching is used to transfer the positive photoresist pattern to the underlying spacer layer thin film using the positive photoresist pattern as an etching mask. The silicon wafer is then washed and dried as needed, resulting in a spacer layer thin film with a pattern that matches or is close to the positive photoresist pattern. The exposed silicon wafer is then placed in a corresponding negative resist developer, such as a TMAH developer, and the development time is adjusted to partially (but not completely) clean the unexposed negative photoresist on the silicon wafer. The silicon wafer is then washed, the developer is removed, and the silicon wafer is dried to remove any residual liquid, resulting in a contour line pattern of the exposure pattern.

[0104] In addition, if the developer for the positive photoresist, the negative photoresist, and the spacer layer thin film is the same, or if the developer for both is the same, the corresponding development steps can be combined according to the actual situation, and the cleaning and drying process can be reduced. In addition, cross-experiments should be conducted on the positive photoresist, the negative photoresist, the spacer layer thin film, and the corresponding developers to determine the optimal development process.

[0105] Figure 2H is a schematic diagram illustrating step 8B of depositing by a vapor deposition technique in the photolithography method according to the second embodiment of the present invention. Figure 2I is a schematic diagram illustrating step 9B of removing the photoresist after deposition in the photolithography method according to the second embodiment of the present invention.

[0106] After step 7B, a deposition layer 106B may be formed by a material deposition technique in step 8B, as shown in Figure 2H, and then the photoresist is removed in step 9B, leaving a contour-type pattern, as shown in Figure 2I.

[0107] Materials deposition techniques include electrochemical vapor deposition, plating, CVD deposition, laser sputtering, magnetron sputtering, thermal evaporation, electron beam evaporation and atomic vapor deposition.

[0108] Figure 2H1 is a schematic diagram illustrating step 8B' of etching by an etching technique in the photolithography method according to embodiment 2 of the present invention. Figure 2I1 is a schematic diagram illustrating step 9B' of removing photoresist after etching in the photolithography method according to embodiment 2 of the present invention.

[0109] After step 7B, as shown in Figure 2H1, in step 8B', an etching technique may be used to form grooves 107B, and then, as shown in Figure 2I1, in step 9B', the photoresist is removed to leave a contour pattern.

[0110] By adopting the second embodiment of the present invention, a contour line pattern based on a mask pattern can be obtained, as shown in Figure 4. The line width of the contour line pattern is smaller than that of the mask pattern, thereby doubling the line density and reducing the size of the original mask pattern. In addition, by applying a thin spacer layer between the two layers of photoresist, the phenomenon of dissolution of the two layers of photoresist during the application process can be avoided or reduced.

[0111] Example 2a As an example, this embodiment 2a specifically includes the following steps:

[0112] (1) Negative photoresist coating The silicon wafer is placed in a resist coating system and fixed. Negative photoresist SUN 9i or AZ nlof 2020 is spin-coated at 1000 rpm for 5 seconds and 4000 rpm for 40 seconds, and then baked at 100°C for 60 seconds.

[0113] (2) Spacer layer thin film coating The silicon wafer is placed in a spacer layer thin film coating system (using vapor coating, scrape coating, spray coating, spin coating, etc.) and the spacer layer thin film is coated. The spacer layer thin film can be inorganic, polymeric, or composite material. The role of the spacer layer is to prevent or reduce the dissolution of the two layers of photoresist during the coating process.

[0114] (3) Positive photoresist coating The cooled silicon wafer is placed in a resist coating system and fixed. Positive photoresist HTI 751 or AZ 1500 is spin-coated at 800 rpm for 5 seconds and 2500 rpm for 30 seconds, and then baked at 95-100°C for 40 seconds.

[0115] (4) Exposure The silicon wafer substrate that has undergone the above steps is tightly fixed under a mask, placed directly under an ultraviolet light source under vacuum, and the light source is turned on to perform photolithography. The exposure time is adjusted according to the type of photoresist pair set and the thickness of the photoresist layer. After exposure is complete, the mask is removed, and the exposed silicon wafer is moved to a heating stage and baked at 100°C for 45 seconds. Here, the exposure flux is, for example, 100 mJ / cm. 2 and the exposure flux can be changed as needed.

[0116] (5) Development of positive photoresist The exposed silicon wafer is placed in a corresponding positive photoresist developer, such as a TMAH developer, and the exposed positive photoresist on the silicon wafer is washed to generate a pattern opposite to the exposure pattern. The silicon wafer is then washed to remove the developer and dried to remove any residual liquid.

[0117] (6) Patterning of the spacer layer thin film The exposed silicon wafer is placed in a corresponding spacer layer thin film developer, such as a TMAH developer, or the positive photoresist pattern is used as an etching mask by dry etching or other means to transfer the positive photoresist pattern to the underlying spacer layer thin film, and then the wafer is washed and dried as needed to obtain a spacer layer thin film pattern that matches or is close to the positive photoresist pattern.

[0118] (7) Development of negative photoresist The exposed silicon wafer is placed in a corresponding negative photoresist developer, for example, a TMAH developer, and the developing time is adjusted to wash away some (but not all) of the unexposed negative photoresist on the silicon wafer. The silicon wafer is then washed to remove the developer and dried to remove the residual liquid, thereby generating a contour line pattern based on the mask pattern.

[0119] Furthermore, if the developer for the positive photoresist, the negative photoresist, and the spacer layer thin film is the same, or if the developer for both is the same, the corresponding development steps can be combined according to the actual situation, and the cleaning and drying process can be reduced.

[0120] In this Example 2a, as an example, the following vapor deposition step can be further carried out in addition to the above steps (1) to (7).

[0121] (8) Vapor deposition of materials The developed silicon wafer was placed in the deposition device and heated with a molecular pump for 10 -6A 2-nanometer chromium film was thermally evaporated at a rate of 1 Å / s and a 50-nanometer gold film was thermally evaporated at a rate of 0.5 Å / s under a vacuum of 0.2 Pa. The 2-nanometer chromium film served as an adhesion layer for the gold film.

[0122] (9) Removal of photoresist After the chamber has cooled, the vacuum is released and the plated silicon wafer is removed. The silicon wafer is then immersed in acetone and ultrasonically cleaned until all of the photoresist is removed, leaving behind a gold outline pattern.

[0123] In this Example 2a, as an example, the following etching step can be further carried out in addition to the above steps (1) to (7).

[0124] (8') Dry etching The silicon wafer after photolithography is placed in an ion etching machine, and the exposed silicon substrate is etched with plasma gas using the photoresist pattern as a mask, thereby etching a pattern into the silicon wafer in a contour line pattern.

[0125] (9') Removal of photoresist A silicon wafer was immersed in acetone and subjected to ultrasonic cleaning until the photoresist was completely removed, thereby creating a contour line pattern on the surface of the silicon wafer.

[0126] Furthermore, in the same way as the projection exposure of Example 1b, the ultraviolet direct writing exposure of Example 1c, and the electron beam direct writing exposure of Example 1d described above, in this embodiment 2, Example 2a can be modified to obtain Example 2b, which employs projection exposure, Example 2c, which employs ultraviolet direct writing exposure, and Example 2d, which employs electron beam direct writing exposure. Here, redundant explanations of the projection exposure of Example 2b, the ultraviolet direct writing exposure of Example 2c, and the electron beam direct writing exposure of Example 2d will be omitted.

[0127] Embodiment 3 <Photolithography method based on positive photoresist + spacer layer + negative photoresist> The third embodiment of the present invention provides a photolithography method based on positive photoresist+spacer layer+negative photoresist, which includes: (1) forming a positive resist layer on a substrate using a positive photoresist, forming a spacer layer on the positive resist layer, and forming a negative resist layer on the spacer layer using a negative photoresist; (2) patterning the negative resist layer and the positive resist layer to form a positive pattern region and a negative pattern region in the positive resist layer and the negative resist layer, respectively, such that the positive pattern region is larger than the negative pattern region; (3) developing the negative resist layer with a negative resist developer to remove the negative photoresist other than the negative pattern region; (4) developing the spacer layer using a spacer layer developer or etching the spacer layer using the pattern of the developed positive resist layer as an etching mask so that the pattern of the spacer layer coincides with the pattern of the developed positive resist layer; (5) developing the positive resist layer with a positive resist developer to remove the positive photoresist at the edge of the positive pattern area, thereby providing an exposed area having a size corresponding to the positive pattern area and the negative pattern area, and exposing the substrate; Includes:

[0128] Hereinafter, a third embodiment of the photolithography method based on the above-described positive photoresist + thin spacer layer + negative photoresist will be described in detail with reference to Figures 3A, 3B, 3C, 3D, 3E, 3F, and 3G. In each drawing, the same or corresponding parts are denoted by the same reference numerals. Furthermore, duplicated explanations of parts in the third embodiment that are the same as those in the second embodiment will be omitted.

[0129] Figure 3A is a schematic diagram showing step 1C of applying a positive photoresist to a substrate in a photolithography method according to the third embodiment of the present invention. Figure 3B is a schematic diagram showing step 2C of applying a spacer layer to the positive photoresist in the photolithography method according to the third embodiment of the present invention. Figure 3C is a schematic diagram showing step 3C of applying a negative photoresist to the spacer layer in the photolithography method according to the third embodiment of the present invention.

[0130] First, as shown in FIG. 3A, in step 1C, a positive photoresist 103C (i.e., a positive resist layer) is spin-coated on a substrate 101C and dried. Next, as shown in FIG. 3B, in step 2C, a spacer layer thin film 110C is applied on the positive photoresist 103C. Next, as shown in FIG. 3C, in step 3C, a negative photoresist 102C (i.e., a negative resist layer) that matches the positive photoresist 103C is spin-coated on the spacer layer thin film 110C and dried (corresponding to forming a positive resist layer on a substrate using a positive photoresist, forming a spacer layer on the positive resist layer, and forming a negative resist layer on the spacer layer using a negative photoresist).

[0131] Negative photoresists include negative ultraviolet photoresists, negative deep ultraviolet photoresists, negative extreme ultraviolet photoresists, negative electron beam photoresists, negative ion beam photoresists, or negative X-ray photoresists. Positive photoresists include positive ultraviolet photoresists, positive deep ultraviolet photoresists, positive extreme ultraviolet photoresists, positive electron beam photoresists, positive ion beam photoresists, or positive X-ray photoresists.

[0132] In addition, compatibility between different types of positive and negative photoresists must be confirmed in advance. Below are two examples of positive and negative photoresist pair sets: The first set is a positive photoresist model number HTI 751 and a negative photoresist model number SUN 9i, and the second set is a positive photoresist model number AZ 1500 and a negative photoresist model number AZ nlof 2020.

[0133] For example, the process of spin-coating a negative photoresist (e.g., SUN 9i, AZ nlof 2020) involves first spin-coating at 800-1000 rpm for 5-10 seconds (this step can be omitted), then spin-coating at 4000-8000 rpm for 30-40 seconds, and baking at 95-100°C for 60-90 seconds.

[0134] For example, the process of spin-coating a positive photoresist (e.g., HTI 751, AZ 1500) involves first spin-coating at a rotation speed of 800-1000 rpm for 5-10 seconds (this step can be omitted), then spin-coating at a rotation speed of 2000-5000 rpm for 30-40 seconds, and baking at 90-100°C for 30-50 seconds.

[0135] The thickness of the photoresist film is determined by the different rotation speeds, and the pre-baking temperature and time, as well as the subsequent exposure dose, exposure time, and development time, are adjusted according to the different film thicknesses.

[0136] Here, the substrate material includes a semiconductor, a metal, an insulator, a polymer, or a composite material.

[0137] FIG. 3D is a schematic diagram showing step 4C of exposing two layers of photoresist in the photolithography method according to the third embodiment of the present invention.

[0138] After step 3C, in step 4C, as shown in Fig. 3D, the two layers of photoresist 102C and 103C are exposed to an exposure source using a photomask having a stencil pattern or by focus direct writing (Fig. 3D shows an example of photomask 108C). After exposure, exposure patterns 104C and 105C (i.e., negative pattern areas and positive pattern areas) of different sizes are formed on the negative photoresist 102C and the positive photoresist 103C, respectively, and then dried (corresponding to patterning the negative resist layer and the positive resist layer to form positive pattern areas and negative pattern areas in the positive resist layer and the negative resist layer, respectively, so that the positive pattern areas are larger than the negative pattern areas).

[0139] The exposure source may be an ultraviolet light source, a deep ultraviolet light source, an extreme ultraviolet light source, an ion beam, an electron beam, or an X-ray. The focus direct writing may be an ultraviolet light direct writing, a deep ultraviolet light direct writing, an extreme ultraviolet light direct writing, an ion beam direct writing, an electron beam direct writing, or an X-ray direct writing. The feature line width or feature size of the stencil pattern may be 2 nm-1000 μm.

[0140] For example, a pre-baked silicon wafer is placed under a mask and then placed under a UV light source. The UV light source is turned on and photolithography is performed. The exposure time is adjusted depending on the positive-negative photoresist pair set used. In the example pair mentioned above, the photoresist pair sets of HTI 751 and SUN 9i, or AZ 1500 and AZ nlof 2020, require 100-200 mJ / cm at wavelengths of 350-400 nm. 2The exposure flux is applied. The UV wavelength and exposure flux must be determined by taking into account the UV absorption effect of different thicknesses of positive photoresists (e.g., HTI 751, AZ 1500) to ensure that the underlying negative photoresist (e.g., SUN 9i, AZ nlof 2020) receives sufficient exposure flux. Because photoresist pair sets of HTI 751 and SUN 9i, AZ 1500 and AZ nlof 2020 respond differently to exposure flux at specific wavelengths, different sizes of patterns can be obtained based on the mask pattern (e.g., 104C and 105C in Figure 3D).

[0141] For example, the exposure may be a single exposure. For example, the exposure may be a multiple exposure. That is, the exposure may be divided into multiple exposures of shorter duration or smaller duration and superimposed.

[0142] Figure 3E is a schematic diagram illustrating step 5C of developing a negative photoresist in the photolithography method according to the third embodiment of the present invention. Figure 3F is a schematic diagram illustrating step 6C of patterning a spacer layer in the photolithography method according to the third embodiment of the present invention. Figure 3G is a schematic diagram illustrating step 7C of developing a positive photoresist in the photolithography method according to the third embodiment of the present invention.

[0143] After step 4C, in step 5C, as shown in Fig. 3E, the negative photoresist is developed with a negative resist developer (corresponding to developing the negative resist layer with a negative resist developer and removing the negative photoresist except for the negative pattern region). Next, as shown in Fig. 3F, in step 6C, the spacer layer thin film is developed with a spacer layer thin film developer, or the spacer layer thin film is etched using the pattern of the negative photoresist after development as an etching mask, so that the pattern of the spacer layer and the pattern of the negative resist layer after development match (corresponding to developing the spacer layer with a spacer layer developer, or etching the spacer layer using the pattern of the negative resist layer after development as an etching mask, so that the pattern of the spacer layer and the pattern of the negative resist layer after development match). Next, as shown in FIG. 3G, in step 7C, the positive photoresist is controllably developed with a positive resist developer to wash away only the edge portions of the exposure pattern 105C on the positive photoresist and expose the substrate, thereby converting the stencil pattern into a contour line pattern (the positive resist layer is developed with a positive resist developer to remove the positive photoresist at the edge portions of the positive pattern area, thereby providing an exposed area with a size related to the positive pattern area and the negative pattern area, corresponding to exposing the substrate).

[0144] For example, the exposed silicon wafer is placed in a corresponding negative resist developer, such as a TMAH developer, and the unexposed negative photoresist on the silicon wafer is washed to create a pattern of the exposure pattern. The silicon wafer is then washed to remove the developer and dried to remove any remaining liquid. The exposed silicon wafer is then placed in a corresponding spacer layer developer, such as a TMAH developer, or dry etching is used to transfer the negative photoresist pattern to the underlying spacer layer. The silicon wafer is then washed and dried as needed, resulting in a spacer layer pattern that matches or is close to the negative photoresist pattern. The exposed silicon wafer is then placed in a corresponding positive resist developer, such as a TMAH developer, and the development time is adjusted to partially (but not completely) clean the exposed positive photoresist on the silicon wafer. The silicon wafer is then washed, the developer is removed, and the silicon wafer is dried to remove any remaining liquid, resulting in a contour line pattern of the exposure pattern.

[0145] In addition, if the developer for the positive photoresist, the negative photoresist, and the spacer layer thin film is the same, or if the developer for both is the same, the corresponding development steps can be combined according to the actual situation, and the cleaning and drying process can be reduced. In addition, cross-experiments should be conducted on the positive photoresist, the negative photoresist, the spacer layer thin film, and the corresponding developers to determine the optimal development process.

[0146] Example 3a As an example, this embodiment 3a specifically includes the following steps:

[0147] (1) Positive photoresist coating The silicon wafer is placed in a resist coating system and fixed. A positive photoresist (e.g., HTI 751 or AZ 1500) is spin-coated at 800 rpm for 5 seconds and 2500 rpm for 30 seconds, and then baked at 95-100°C for 40 seconds.

[0148] (2) Spacer layer thin film coating The silicon wafer is placed in a spacer layer thin film coating system (using vapor coating, scrape coating, spray coating, spin coating, etc.) and the spacer layer thin film is coated. The spacer layer thin film can be inorganic, polymeric, or composite material. The role of the spacer layer is to prevent or reduce the dissolution of the two layers of photoresist during the coating process.

[0149] (3) Coating of negative photoresist The cooled silicon wafer is placed in a resist coating system and fixed. A negative photoresist (e.g., SUN 9i or AZ nlof 2020) is spin-coated at 1000 rpm for 5 seconds and 4000 rpm for 40 seconds, and then baked at 100-110°C for 60 seconds.

[0150] (4) Exposure The silicon wafer substrate that has undergone the above steps is tightly fixed under a mask, placed directly under an ultraviolet light source under vacuum, and the light source is turned on to perform photolithography. The exposure time is adjusted according to the type of photoresist pair set and the thickness of the photoresist layer. After exposure is complete, the mask is removed, and the exposed silicon wafer is moved to a heating stage and baked at 100°C for 45 seconds. Here, the exposure flux is, for example, 100 mJ / cm. 2 and the exposure flux can be changed as needed.

[0151] (5) Development of negative photoresist The exposed silicon wafer is placed in a corresponding negative photoresist developer, such as a TMAH developer, and the unexposed negative photoresist on the silicon wafer is washed to generate a pattern of the exposure pattern. Then, the silicon wafer is washed to remove the developer and dried to remove the residual liquid.

[0152] (6) Patterning of the spacer layer thin film The exposed silicon wafer is placed in a corresponding spacer layer thin film developer, such as a TMAH developer, or the negative photoresist pattern is used as an etching mask by dry etching or other means to transfer the negative photoresist pattern to the underlying spacer layer thin film, and then the wafer is washed and dried as needed, resulting in a spacer layer thin film pattern that matches or is close to the negative photoresist pattern.

[0153] (7) Development of positive photoresist The exposed silicon wafer is placed in a corresponding positive photoresist developer, for example, a TMAH developer, and the development time is adjusted to wash away part (but not all) of the exposed positive photoresist on the silicon wafer. The silicon wafer is then washed to remove the developer and dried to remove the residual liquid, thereby generating a contour line pattern of the exposed pattern.

[0154] Furthermore, if the developer for the positive photoresist, the negative photoresist, and the spacer layer thin film is the same, or if the developer for both is the same, the corresponding development steps can be combined according to the actual situation, and the cleaning and drying process can be reduced.

[0155] In this Example 3a, as an example, in addition to the above steps (1) to (7), the following deposition step or etching step can be further performed. The specific contents of the deposition step and etching step are the same as those of the deposition step and etching step in the above Example 2a, so a duplicated description will be omitted here.

[0156] Furthermore, in the same way as the projection exposure of Example 1b, the ultraviolet direct writing exposure of Example 1c, and the electron beam direct writing exposure of Example 1d described above, in this embodiment 3, Example 3a can be modified to obtain Example 3b, which employs projection exposure, Example 3c, which employs ultraviolet direct writing exposure, and Example 3d, which employs electron beam direct writing exposure. Here, redundant explanations of the projection exposure of Example 3b, the ultraviolet direct writing exposure of Example 3c, and the electron beam direct writing exposure of Example 3d will be omitted.

[0157] By adopting the third embodiment of the present invention, a contour line pattern based on a mask pattern can be obtained, as shown in Figure 4. The line width of the contour line pattern is smaller than that of the mask pattern, thereby doubling the line density and reducing the size of the original mask pattern. In addition, by applying a thin spacer layer between the two layers of photoresist, the phenomenon of dissolution of the two layers of photoresist during the application process can be avoided or reduced.

[0158] <Photolithography system> The configuration of a photolithography system corresponding to a photolithography method according to an embodiment of the present invention will be described in detail below.

[0159] FIG. 5 is a block diagram schematically showing a photolithography system compatible with the photolithography method according to the first embodiment of the present invention.

[0160] As shown in FIG. 5, a photolithography system 10A corresponding to the photolithography method according to the first embodiment of the present invention includes a layer forming unit 1001A, a patterning unit 1002A, a positive resist developing unit 1003A, and a negative resist developing unit 1004A. (1) forming a negative resist layer on a substrate using a negative photoresist and forming a positive resist layer on the negative resist layer using a positive photoresist by the layer forming unit 1001A; (2) patterning the negative resist layer and the positive resist layer by the patterning unit 1002A to form a positive pattern area and a negative pattern area in the positive resist layer and the negative resist layer, respectively, so that the positive pattern area is larger than the negative pattern area; (3) developing the positive resist layer with a positive resist developer by the positive resist developing unit 1003A to remove the positive photoresist in the positive pattern area; (4) developing the negative resist layer with a negative resist developer by the negative resist developing unit 1004A, and removing the negative photoresist located near the negative pattern area, thereby providing an exposed area having a size corresponding to the positive pattern area and the negative pattern area, and exposing the substrate; Execute.

[0161] For example, the layer forming unit 1001A includes a spin coating unit and a drying unit, and the patterning unit 1002A includes an exposure unit. The photolithography system 10A may further include a deposition etching unit, a photoresist removal unit, etc. (not shown in FIG. 5) as needed.

[0162] FIG. 6 is a block diagram schematically showing a photolithography system compatible with a photolithography method according to a second embodiment of the present invention.

[0163] As shown in FIG. 6, a photolithography system 10B corresponding to the photolithography method according to the second embodiment of the present invention includes a layer forming unit 1001B, a patterning unit 1002B, a positive resist developing unit 1003B, a spacer layer developing and etching unit 1005B, and a negative resist developing unit 1004B. (1) forming a negative resist layer on a substrate using a negative photoresist, forming a spacer layer on the negative resist layer, and forming a positive resist layer on the spacer layer using a positive photoresist by the layer forming unit 1001B; (2) patterning the negative resist layer and the positive resist layer by the patterning unit 1002B to form a positive pattern region and a negative pattern region in the positive resist layer and the negative resist layer, respectively, so that the positive pattern region is larger than the negative pattern region; (3) developing the positive resist layer with a positive resist developer by the positive resist developing unit 1003B to remove the positive photoresist in the positive pattern region; (4) developing the spacer layer using a spacer layer developer by the spacer layer developing and etching unit 1005B so that the pattern of the spacer layer coincides with the pattern of the developed positive resist layer, or etching the spacer layer using the pattern of the developed positive resist layer as an etching mask; (5) developing the negative resist layer with a negative resist developer by the negative resist developing unit 1004B, and removing the negative photoresist located in the vicinity of the negative pattern area, thereby providing an exposed area having a size corresponding to the positive pattern area and the negative pattern area, and exposing the substrate; Execute.

[0164] For example, the layer forming unit 1001B includes a spin coating unit and a drying unit, and the patterning unit 1002B includes an exposure unit. The photolithography system 10B may further include a deposition etching unit, a photoresist removal unit, etc. (not shown in FIG. 6) as needed.

[0165] FIG. 7 is a block diagram schematically showing a photolithography system compatible with a photolithography method according to a third embodiment of the present invention.

[0166] As shown in FIG. 7, a photolithography system 10C corresponding to the photolithography method according to the third embodiment of the present invention includes a layer forming unit 1001C, a patterning unit 1002C, a negative resist developing unit 1004C, a spacer layer developing and etching unit 1005C, and a positive resist developing unit 1003C. (1) forming a positive resist layer on a substrate using a positive photoresist, forming a spacer layer on the positive resist layer, and forming a negative resist layer on the spacer layer using a negative photoresist by the layer forming unit 1001C; (2) patterning the negative resist layer and the positive resist layer by the patterning unit 1002C to form a positive pattern area and a negative pattern area in the positive resist layer and the negative resist layer, respectively, so that the positive pattern area is larger than the negative pattern area; (3) developing the negative resist layer with a negative resist developer by the negative resist developing unit 1004C to remove the negative photoresist other than the negative pattern region; (4) developing the spacer layer using a spacer layer developer by the spacer layer developing and etching unit 1005C so that the pattern of the spacer layer coincides with the pattern of the developed positive resist layer, or etching the spacer layer using the pattern of the developed positive resist layer as an etching mask; (5) developing the positive resist layer with a positive resist developer by the positive resist developing unit 1003C, and removing the positive photoresist at the edge portion of the positive pattern area, thereby providing an exposed area having a size corresponding to the positive pattern area and the negative pattern area, and exposing the substrate; Execute.

[0167] For example, the layer forming unit 1001C includes a spin coating unit and a drying unit, and the patterning unit 1002C includes an exposure unit. The photolithography system 10C may further include a deposition etching unit, a photoresist removal unit, etc. (not shown in FIG. 7) as needed.

[0168] The present invention also provides a photolithography system control method for controlling the above photolithography system to execute each step.

[0169] The present invention further provides a computer device comprising a memory, a processor, and a computer program stored in the memory and executable by the processor, wherein the computer device realizes the above-mentioned photolithography system control method by the processor executing the computer program.

[0170] The present invention further provides a computer-readable medium storing a computer program that, when executed by a processor, implements the above-described photolithography system control method.

[0171] Industrial Practicality The photolithography method and photolithography system of the present invention can be widely applied in the fields of semiconductor processing, chip manufacturing, etc., and are worthy of widespread research and application. [Explanation of symbols]

[0172] 101A, 101B, 101C base material 102A, 102B, 102C Negative photoresist (negative resist layer) 103A, 103B, 103C Positive photoresist (positive resist layer) 104A, 104B, 104C: Exposure pattern on negative photoresist (negative pattern area) 105A, 105B, 105C: Exposure pattern on positive photoresist (positive pattern area) 106A, 106B Vapor deposited layer 107A, 107B Concave groove 108A, 108B, 108C Photomasks 110B, 110C spacer layers 10A, 10B, 10C Photolithography System 1001A, 1001B, 1001C layer forming part 1002A, 1002B, 1002C Patterning section 1003A, 1003B, 1003C Positive resist developing unit 1004A, 1004B, 1004C Negative resist developing section 1005B, 1005C Spacer layer development etching section

Claims

1. 1. A photolithography method comprising: (1) forming a negative resist layer on a substrate using a negative photoresist, and forming a positive resist layer on the negative resist layer using a positive photoresist; (2) patterning the negative resist layer and the positive resist layer to form a positive pattern region and a negative pattern region in the positive resist layer and the negative resist layer, respectively, such that the positive pattern region is larger than the negative pattern region; (3) developing the positive resist layer with a positive resist developer to remove the positive photoresist in the positive pattern area; (4) A photolithography method comprising the steps of: developing the negative resist layer with a negative resist developer and removing the negative photoresist located in the vicinity of the negative pattern area, thereby providing an exposed area having a size corresponding to the positive pattern area and the negative pattern area, and exposing the substrate.

2. 1. A photolithography method comprising: (1) forming a negative resist layer on a substrate using a negative photoresist, forming a spacer layer on the negative resist layer, and forming a positive resist layer on the spacer layer using a positive photoresist; (2) patterning the negative resist layer and the positive resist layer to form a positive pattern region and a negative pattern region in the positive resist layer and the negative resist layer, respectively, such that the positive pattern region is larger than the negative pattern region; (3) developing the positive resist layer with a positive resist developer to remove the positive photoresist in the positive pattern area; (4) developing the spacer layer using a spacer layer developer or etching the spacer layer using the pattern of the developed positive resist layer as an etching mask so that the pattern of the spacer layer coincides with the pattern of the developed positive resist layer; (5) A photolithography method comprising the steps of: developing the negative resist layer with a negative resist developer and removing the negative photoresist located in the vicinity of the negative pattern area, thereby providing an exposed area having a size corresponding to the positive pattern area and the negative pattern area, and exposing the substrate.

3. 1. A photolithography method comprising: (1) forming a positive resist layer on a substrate using a positive photoresist, forming a spacer layer on the positive resist layer, and forming a negative resist layer on the spacer layer using a negative photoresist; (2) patterning the negative resist layer and the positive resist layer to form a positive pattern region and a negative pattern region in the positive resist layer and the negative resist layer, respectively, such that the positive pattern region is larger than the negative pattern region; (3) developing the negative resist layer with a negative resist developer to remove the negative photoresist other than the negative pattern region; (4) developing the spacer layer using a spacer layer developer or etching the spacer layer using the pattern of the developed positive resist layer as an etching mask so that the pattern of the spacer layer coincides with the pattern of the developed positive resist layer; (5) A photolithography method comprising the steps of: developing the positive resist layer with a positive resist developer and removing the positive photoresist at the edge portions of the positive pattern area, thereby providing an exposed area having a size corresponding to the positive pattern area and the negative pattern area, and exposing the substrate.

4. 4. The photolithography method according to claim 1, wherein in step (2), the positive resist layer and the negative resist layer are exposed to an exposure source using a photomask having a stencil pattern or by focus direct writing, thereby forming positive pattern areas and negative pattern areas in the positive resist layer and the negative resist layer, respectively.

5. In the step (2), exposing the positive resist layer and the negative resist layer to light through a photomask having a stencil pattern using an exposure source in the manner of projection exposure; or Exposing the positive resist layer and the negative resist layer to light through a photomask having a stencil pattern under an exposure source in a shielded exposure manner; or 5. The photolithography method according to claim 4, wherein the positive resist layer and the negative resist layer are exposed by a reflective exposure method using an exposure source reflected on a photomask having a stencil pattern.

6. 5. The photolithography method of claim 4, wherein the focus direct writing includes ultraviolet light direct writing, deep ultraviolet light direct writing, extreme ultraviolet light direct writing, ion beam direct writing, electron beam direct writing, or X-ray direct writing.

7. 5. The photolithography method according to claim 4, wherein the wavelength of the exposure light source is 1 to 500 nm, and the drying temperature after exposure is 30 to 300[deg.] C.

8. The positive photoresist includes a positive ultraviolet photoresist, a positive deep ultraviolet photoresist, a positive extreme ultraviolet photoresist, a positive electron beam photoresist, a positive ion beam photoresist, or a positive X-ray photoresist; 4. The photolithography method according to claim 1, wherein the negative photoresist comprises a negative ultraviolet photoresist, a negative deep ultraviolet photoresist, a negative developable deep ultraviolet photoresist, a negative extreme ultraviolet photoresist, a negative electron beam photoresist, a negative ion beam photoresist, or a positive X-ray photoresist.

9. the positive resist developer is a developer compatible with the positive photoresist, 4. The photolithography method according to claim 1, wherein the negative resist developer is a developer compatible with the negative photoresist.

10. 4. The photolithography method according to claim 1, further comprising forming a pattern on the substrate by a material deposition technique or an etching technique.

11. the material deposition technique includes electrochemical deposition, plating, CVD deposition, laser sputtering, magnetron sputtering, thermal evaporation, electron beam evaporation, or atomic vapor deposition; 11. The photolithography method of claim 10, wherein the etching technique comprises wet etching or dry etching, wherein the wet etching comprises electrochemical etching or selective etching liquid etching, and wherein the dry etching comprises ion etching or chemical reactive ion etching.

12. 4. The photolithography method according to claim 1, wherein the substrate comprises a semiconductor, a metal, an insulator, a polymer, or a composite material.

13. 4. A photolithographic method according to claim 2 or 3, wherein the spacer layer comprises an inorganic, polymeric or composite material.

14. A photolithography system including a layer forming unit, a patterning unit, a positive resist developing unit, and a negative resist developing unit, (1) forming a negative resist layer on a substrate using a negative photoresist, and forming a positive resist layer on the negative resist layer using a positive photoresist by the layer forming unit; (2) patterning the negative resist layer and the positive resist layer by the patterning unit to form a positive pattern region and a negative pattern region in the positive resist layer and the negative resist layer, respectively, so that the positive pattern region is larger than the negative pattern region; (3) developing the positive resist layer with a positive resist developer by the positive resist developing unit to remove the positive photoresist in the positive pattern region; (4) A photolithography system that executes a step in which the negative resist developing unit develops the negative resist layer with a negative resist developer and removes the negative photoresist located in the vicinity of the negative pattern area, thereby providing the positive pattern area, an exposed area having a size corresponding to the size of the negative pattern area, and exposing the substrate.

15. 1. A photolithography system comprising a layer forming unit, a patterning unit, a positive resist developing unit, a spacer layer developing and etching unit, and a negative resist developing unit, (1) forming a negative resist layer on a substrate using a negative photoresist, forming a spacer layer on the negative resist layer, and forming a positive resist layer on the spacer layer using a positive photoresist by the layer forming unit; (2) patterning the negative resist layer and the positive resist layer by the patterning unit to form a positive pattern region and a negative pattern region in the positive resist layer and the negative resist layer, respectively, so that the positive pattern region is larger than the negative pattern region; (3) developing the positive resist layer with a positive resist developer by the positive resist developing unit to remove the positive photoresist in the positive pattern region; (4) developing the spacer layer using a spacer layer developer or etching the spacer layer using the pattern of the developed positive resist layer as an etching mask so that the pattern of the spacer layer coincides with the pattern of the developed positive resist layer by the spacer layer developing and etching unit; (5) A photolithography system that executes a step in which the negative resist developing unit develops the negative resist layer with a negative resist developer and removes the negative photoresist located in the vicinity of the negative pattern area, thereby providing the positive pattern area, an exposed area having a size corresponding to the size of the negative pattern area, and exposing the substrate.

16. 1. A photolithography system comprising a layer forming unit, a patterning unit, a negative resist developing unit, a spacer layer developing and etching unit, and a positive resist developing unit, (1) forming a positive resist layer on a substrate using a positive photoresist, forming a spacer layer on the positive resist layer, and forming a negative resist layer on the spacer layer using a negative photoresist by the layer forming unit; (2) patterning the negative resist layer and the positive resist layer by the patterning unit to form a positive pattern region and a negative pattern region in the positive resist layer and the negative resist layer, respectively, so that the positive pattern region is larger than the negative pattern region; (3) developing the negative resist layer with a negative resist developer by the negative resist developing unit to remove the negative photoresist other than the negative pattern region; (4) developing the spacer layer using a spacer layer developer or etching the spacer layer using the pattern of the developed positive resist layer as an etching mask so that the pattern of the spacer layer coincides with the pattern of the developed positive resist layer by the spacer layer developing and etching unit; (5) A photolithography system that executes a step in which the positive resist developing unit develops the positive resist layer with a positive resist developer and removes the positive photoresist at the edge portions of the positive pattern area, thereby providing an exposed area having a size corresponding to the positive pattern area and the negative pattern area, and exposing the substrate.

17. A photolithography system control method for controlling the photolithography system according to any one of claims 14 to 16 to execute each step.

18. 20. A computer device comprising a memory, a processor, and a computer program stored in the memory and executable by the processor, wherein the computer device realizes the photolithography system control method of claim 17 by the processor executing the computer program.

19. A computer-readable medium storing a computer program that, when executed by a processor, implements the photolithography system control method of claim 17.

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