Wiring Board
The wiring substrate addresses warpage issues by using alternating build-up portions with different thermal expansion rate filling materials in through-hole conductors, enhancing substrate flatness and reliability.
Patent Information
- Application Number
- JP2021010331
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2021-01-26
- Publication Date
- 2025-01-30
- Estimated Expiration
- 2041-01-26
AI Technical Summary
The existing multi-layer wiring substrates face issues with warpage due to differences in thermal expansion rates between the conductor layers, leading to stress and board warping.
A wiring substrate design with alternating first and second build-up portions on either side of a core substrate, using through-hole conductors filled with multiple filling materials having different thermal expansion rates to offset stress, and incorporating a conductor film covering the inner wall of penetrating holes.
This design reduces warpage by effectively managing thermal expansion differences, resulting in a flatter and more reliable wiring substrate.
Smart Images

Figure 0007624318000001 
Figure 0007624318000002 
Figure 0007624318000003
Abstract
Description
[Technical field]
[0001] The present invention relates to a wiring board. [Background technology]
[0002] Patent Document 1 discloses a multilayer wiring board including a core substrate having a through hole with a conductor formed on the inner wall surface thereof. The inside of the conductor formed on the inner wall surface of the through hole is filled with a hardened body obtained by hardening a filler containing multiple resin materials with different viscosities. [Prior art documents] [Patent documents]
[0003] [Patent Document 1] JP 2009-194105 A Summary of the Invention [Problem to be solved by the invention]
[0004] In the core substrate constituting the multilayer wiring board shown in Patent Document 1, the hardened body constituting the inside of the through hole is uniformly distributed within the area defined by the conductor formed on the inner wall surface of the through hole. Therefore, it is difficult for the core substrate to offset stresses caused by differences in the thermal expansion coefficients on one side and the other side of the core substrate, and it is considered that these stresses are likely to appear as warping of the entire substrate. [Means for solving the problem]
[0005] The wiring board of the present invention has a first surface and a second surface opposite to the first surface, and includes a laminate including a first conductor layer formed on the first surface and a second conductor layer formed on the second surface, a through-hole conductor penetrating the laminate and connecting the first conductor layer and the second conductor layer, a first build-up section formed of insulating layers and conductor layers alternately stacked on the first surface, and a second build-up section formed of insulating layers and conductor layers alternately stacked on the second surface. The thermal expansion coefficient of the first build-up section is different from that of the second build-up section, and the through-hole conductor includes a conductor film covering an inner wall surface of a through-hole penetrating the laminate and a filler material filling the through-hole, the filler material including at least one set of fillers filling different regions of the through-hole in a thickness direction of the laminate, the set of fillers having different thermal expansion coefficients.
[0006] According to the embodiment of the present invention, it is possible to reduce the degree of warping that may occur in a wiring board due to stress caused by a difference in the amount of thermal expansion between components on one side of the wiring board and components on the other side of the wiring board, and it is possible to provide a wiring board with good flatness and suppressed warping. [Brief description of the drawings]
[0007] [Figure 1] FIG. 1 is a cross-sectional view showing an example of a wiring board according to an embodiment of the present invention. [Diagram 2] An enlarged view of part II in Figure 1. [Diagram 3] FIG. 4 is an enlarged cross-sectional view showing another example of the wiring board according to an embodiment of the present invention. [Figure 4A] An enlarged view of part IV in FIG. [Figure 4B] FIG. 4 is an enlarged cross-sectional view showing another example of the wiring board according to an embodiment of the present invention. [Diagram 5] FIG. 11 is a cross-sectional view showing still another example of the wiring board according to an embodiment of the present invention. [Figure 6A] 5A to 5C are cross-sectional views showing an example of a manufacturing process for a wiring board. [Figure 6B] 5A to 5C are cross-sectional views showing an example of a manufacturing process for a wiring board. [Figure 6C] 5A to 5C are cross-sectional views showing an example of a manufacturing process for a wiring board. [Figure 6D] 5A to 5C are cross-sectional views showing an example of a manufacturing process for a wiring board. [Figure 6E] 5A to 5C are cross-sectional views showing an example of a manufacturing process for a wiring board. [Figure 6F] 5A to 5C are cross-sectional views showing an example of a manufacturing process for a wiring board. [Figure 6G] 5A to 5C are cross-sectional views showing an example of a manufacturing process for a wiring board. [Figure 6H] 5A to 5C are cross-sectional views showing an example of a manufacturing process for a wiring board. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0008] A wiring board according to an embodiment of the present invention will be described with reference to the drawings. FIG. 1 shows a cross-sectional view of a wiring board 1, which is an example of a wiring board according to an embodiment. The wiring board 1 has a laminate 100 having a first surface 100F and a second surface 100S, which is the surface opposite to the first surface 100F. The laminate 100 has an insulating layer 101, a first conductor layer 102a formed on one surface of the insulating layer 101, and a second conductor layer 102b formed on the other surface of the insulating layer 101. The first conductor layer 102a and the second conductor layer 102b are connected by a through-hole conductor 30 penetrating the laminate 100.
[0009] The illustrated wiring board 1 includes a first buildup section 110 formed on a first surface 100F of the laminate 100, and a second buildup section 120 formed on a second surface 100S. That is, the wiring board 1 has the first and second buildup sections 110, 120 laminated on both surfaces of the laminate 100, and the laminate 100 has the form of a core substrate. Therefore, in the description of this embodiment, the laminate 100 is also referred to as a core substrate 100.
[0010] The first buildup section 110 is composed of insulating layers 111 and conductor layers 112 that are alternately laminated on the first surface 100F of the core substrate 100. The second buildup section 120 is composed of insulating layers 121 and conductor layers 122 that are alternately laminated on the second surface 100S of the core substrate 100. In the example of FIG. 1, the first buildup section 110 is composed of two insulating layers 111 and two conductor layers 112, and the second buildup section 120 is composed of two insulating layers 121 and two conductor layers 122. Each insulating layer 111 includes a via conductor 113 that connects the conductor layers sandwiching each insulating layer 111 (for example, between the conductor layers 112, or between the first conductor layer 102a and the conductor layer 112). Each insulating layer 121 includes a via conductor 123 that connects the conductor layers sandwiching each insulating layer 121 (for example, between the conductor layers 122, or between the second conductor layer 102b and the conductor layer 122).
[0011] In the illustrated example, the first buildup section 110 and the second buildup section 120 each include two conductor layers 112, 122 and two insulating layers 111, 121, but the number of insulating layers 111, 121 and conductor layers 112, 122 included in the first and second buildup sections 110, 120 is not limited to this. The first buildup section 110 and the second buildup section 120 may include three or more conductor layers and three or more insulating layers, or may include only one conductor layer and one insulating layer. Furthermore, the first buildup section 110 and the second buildup section 120 may have different numbers of insulating layers and conductor layers.
[0012] In the description of the wiring board of this embodiment, the side farther from the insulating layer 101 is referred to as "top", "upper side", "outside", or "outside", and the side closer to the insulating layer 101 is referred to as "bottom", "lower side", "inside", or "inside". In addition, in each insulating layer and conductor layer, the surface facing the opposite side to the laminate (core substrate) 100 is also referred to as the "top surface", and the surface facing the laminate 100 is also referred to as the "bottom surface". Therefore, for example, in the description of the first buildup section 110 and the second buildup section 120, the side farther from the laminate 100 is also referred to as the "upper side", "upper", "upper layer side", "outside", or simply "upper" or "outside", and the side closer to the laminate 100 is also referred to as the "lower side", "lower", "lower layer side", "inside", or simply "lower" or "inside". In the description of the embodiment, the thickness direction of the wiring board is also simply referred to as the "Z direction".
[0013] A solder resist layer 10 is formed on the first buildup section 110. A solder resist layer 20 is formed on the second buildup section 120. An opening 10a is formed in the solder resist layer 10, and a conductor pad 112p of the outermost conductor layer 112 in the first buildup section 110 is exposed from the opening 10a. An opening 20a is formed in the solder resist layer 20, and a conductor pad 122p of the outermost conductor layer 122 in the second buildup section 120 is exposed from the opening 20a.
[0014] In the illustrated example, the conductor pad 112p may be a connection pad used for mounting an external electronic component (not shown), etc. Meanwhile, the conductor pad 122p may be a connection pad used for connecting to an external motherboard (not shown), etc. A surface protection film (not shown) made of Au, Ni / Au, Ni / Pd / Au, solder, heat-resistant preflux, etc. may be formed on the exposed surfaces of the conductor pads 112p, 122p.
[0015] The insulating layers 101, 111, and 121 are each formed of an insulating resin such as an epoxy resin, a bismaleimide triazine resin (BT resin), or a phenol resin. Each insulating layer may contain a reinforcing material (core material) such as glass fiber and / or an inorganic filler such as silica or alumina. The solder resist layers 10 and 20 are each formed of a photosensitive epoxy resin or polyimide resin.
[0016] The conductor layers 102a, 102b, 112, 122, the via conductors 113, 123, and the through-hole conductors 30 may be formed using any metal such as copper or nickel. For example, the conductor layers 102a, 102b, 112, 122 are composed of a metal foil such as copper foil and / or a metal film formed by plating or sputtering. The conductor layers 102a, 102b, 112, 122, and the via conductors 113, 123 are shown in FIG. 1 as a single-layer structure for simplicity, but may have a multilayer structure of two or more layers. The conductor layers 112, 122, and the via conductors 113, 123 may have a two-layer structure including, for example, an electroless plating film and an electrolytic plating film. The first and second conductor layers 102a, 102b formed on the surface of the insulating layer 101, which will be described in detail later together with the through-hole conductor 30, may have a five-layer structure including a metal foil, an electroless plating film, and an electrolytic plating film. Each of the conductor layers 102a, 102b, 112, 122 of the wiring board 1 is patterned to have a predetermined conductor pattern.
[0017] In this embodiment, the laminate 100 includes a through-hole conductor 30 that penetrates the insulating layer 101 and connects the first conductor layer 102a constituting the first surface 100F and the second conductor layer 102b constituting the second surface 100S. The through-hole conductor 30 includes a conductive conductor film 31 that covers the inner wall of the through hole TH formed in the laminate 100, and a filler 32 that fills the area (cavity) defined by the conductor film 31. That is, the through-hole conductor 30 includes the conductor film 31 that is responsible for electrical conductivity, and the filler 32 that fills the inside of the through-hole conductor 30. The conductor film 31 that constitutes the through-hole conductor 30 is formed integrally with the first and second conductor layers 102a and 102b.
[0018] The core substrate of the wiring board of the embodiment may have a plurality of through-hole conductors. In any of the plurality of through-hole conductors, a plurality of different regions in the Z direction in a cavity defined by a conductive film covering the inner wall of the through hole may be filled with a filler having a different thermal expansion coefficient. Specifically, in the three through-hole conductors 30 shown in the drawing of the wiring board 1, the filler 32 in the right-end and left-end through-hole conductors 30 is composed of a plurality of fillers 32a and 32b. In other words, any of the plurality of through-hole conductors 30 has a first filler 32a that fills a region on the first surface side of the through hole TH and a second filler 32b that fills a region on the second surface side of the through hole TH.
[0019] Each of the plurality of fillers 32a, 32b fills a different region in the Z direction in the through hole TH defined by the conductive film 31. The fillers 32a and 32b have different thermal expansion coefficients. Since the filler 32 of the through-hole conductor 30 is thus composed of the plurality of fillers 32a, 32b having different thermal expansion coefficients, warping of the wiring board may be suppressed.
[0020] On the other hand, in the through-hole conductor 30 shown in the center of the three through-hole conductors 30 shown in the figure, the area defined by the conductive film 31 is uniformly filled with a single filler material 32e. That is, in the wiring board of this embodiment, it is not necessary for all of the multiple through-hole conductors to be made of multiple fillers, and it is sufficient that any number and any position of the multiple through-hole conductors is made of multiple fillers having different thermal expansion coefficients.
[0021] For example, as shown in the figure, when the residual copper ratio is different between the first buildup section 110 and the second buildup section 120, the thermal expansion coefficient of the first buildup section 110 and the thermal expansion coefficient of the second buildup section 120 may be different. The amount of thermal expansion and contraction on both sides of the core substrate 100 due to temperature changes may be different. As a result, a stress that warps the wiring substrate 1 may be applied to the core substrate 100. The filler 32 constituting the through-hole conductors 30 at the right and left ends shown in FIG. 1 is composed of a first filler 32a filling the area on the first surface side in the Z direction and a second filler 32b filling the area on the second surface side. If filler 32a and filler 32b have different thermal expansion coefficients, the stress due to the difference in the thermal expansion coefficients between the components on the first surface 100F side and the components on the second surface 100S side of laminate 100 of wiring board 1 is offset by the stress due to the difference in the amount of thermal expansion between filler 32a and filler 32b, and the degree of warping of wiring board 1 may be reduced.
[0022] Specifically, when the thermal expansion coefficient of first buildup section 110 is higher than that of second buildup section 120, first filler 32a is made of a material having a thermal expansion coefficient lower than that of second filler 32b. As a result, the stress caused by the difference in the thermal expansion coefficient between first buildup section 110 and second buildup section 120 is offset by the stress caused by the difference in the thermal expansion coefficient between filler 32a and filler 32b, and the degree of warping of wiring board 1 can be suppressed.
[0023] Next, the configuration of the through-hole conductor 30 and the configurations of the first conductor layer 102a and the second conductor layer 102b formed integrally with the through-hole conductor 30 will be described in detail with reference to Fig. 2. Fig. 2 is an enlarged view of an area II surrounded by a dashed line in Fig. 1. Fig. 2 shows an enlarged view of the through-hole conductor 30 having a plurality of fillers 32a, 32b, which is shown at the left end of the plurality of through-hole conductors 30 shown in Fig. 1.
[0024] In the illustrated example, the conductor film 31 that covers the inner wall of the through hole TH and constitutes the through-hole conductor 30 has a metal film 2b and an electrolytic plating film 2c. The metal film 2b and the electrolytic plating film 2c are formed continuously and integrally with the metal film 2b and the electrolytic plating film 2c that constitute the first conductor layer 102a and the second conductor layer 102b. A metal foil 2a is laminated on the top (surface) of the insulating layer 101, and the metal film 2b and the electrolytic plating film 2c that cover the inner wall surface of the through hole TH are also formed on the metal foil 2a and constitute a part of the first conductor layer 102a and the second conductor layer 102b.
[0025] An example of the metal foil 2a is a copper foil, but the material of the metal foil 2a is not limited to copper. The metal film 2b formed on the metal foil 2a and on the inner wall surface of the through hole TH is a metal film formed by, for example, electroless plating or sputtering. The metal film 2b is made of, for example, copper or nickel, and is used as a power supply layer when forming the electrolytic plating film 2c. The electrolytic plating film 2c is made of a metal such as copper that is deposited on the metal film 2b. However, the material of the metal film 2b and the electrolytic plating film 2c is not limited to copper.
[0026] In the illustrated example, the through-hole conductor 30 has a cylindrical shape having a substantially uniform diameter in the thickness direction of the insulating layer 101. In this case, the diameter D of the through-hole conductor 30 (i.e., the diameter of the through hole TH) is, for example, 100 μm or more and 350 μm or less. The length of the through-hole conductor (i.e., the thickness of the insulating layer 101) is preferably 300 μm or more and 2500 μm or less. It is considered that the through-hole conductor 30 having a diameter and length in such a range is unlikely to have an excessively large planar shape, and that the volume of the fillers 32a and 32b capable of generating a sufficient stress to suppress the above-mentioned warpage can be sufficiently secured.
[0027] The shape and dimensions of the through-hole conductor 30 are not limited to those described above. For example, the through-hole conductor 30 may have a tapered shape in which the diameter decreases from one surface of the core substrate 100 to the other surface (for example, from the first surface 100F to the second surface 100S). The through-hole conductor 30 may also have a shape in which the diameter decreases from each of the first surface 100F and the second surface 100S toward the center in the thickness direction of the core substrate 100. In this case, the diameter of the through-hole conductor 30 may be smallest at the center in the Z direction and largest on the first surface 100F or the second surface 100S. Such a through-hole conductor 30 may be formed, for example, by irradiating a through hole TH for the through-hole conductor with laser light from both the first surface 100F side and the second surface 100S side.
[0028] The fillers 32a and 32b are formed using an insulating material containing a resin such as epoxy, acrylic, phenol, or polyimide. The fillers 32a and 32b may contain an inorganic filler such as alumina. As described above, the thermal expansion coefficients of the first filler 32a and the second filler 32b are different from each other. The thermal expansion coefficients of the first filler 32a and the second filler 32b can be adjusted by the type of resin and / or the content of the inorganic filler. For example, when the fillers 32a and 32b are formed using the same resin material, the thermal expansion coefficient of the filler 32a can be made lower than that of the filler 32b by making the content of the inorganic filler of the filler 32a higher than that of the filler 32b. For example, the filler 32a may have an inorganic filler content of 68 wt % and a thermal expansion coefficient of about 24 ppm / °C, and the filler 32b may have an inorganic filler content of 55 wt % and a thermal expansion coefficient of about 35 ppm / °C.
[0029] In the illustrated example, the boundary between filler 32a and filler 32b is provided near the center in the thickness direction of core substrate 100, but this boundary position may be provided at a position other than the center in the thickness direction of core substrate 100. In other words, the volume of filler 32a and the volume of filler 32b may be different, and the volume ratio thereof may be appropriately changed depending on the magnitude of the required stress based on the difference in the thermal expansion coefficients of the multiple fillers 32a and 32b.
[0030] In the illustrated example, the filler of the present embodiment includes two fillers, the first filler 32a and the second filler 32b, but may include another filler. A filler having a thermal expansion coefficient different from those of the first filler 32a and the second filler 32b may be interposed between the first filler 32a and the second filler 32b.
[0031] In the first conductor layer 102a and the second conductor layer 102b, a metal film 2d and an electrolytic plating film 2e are further formed on the electrolytic plating film 2c. Two layers, a metal film 2d and an electrolytic plating film 2e, are also formed on the end face of the filler 32 of the through-hole conductor 30 so as to cover the filler 32. That is, the first and second conductor layers 102a and 102b have a five-layer structure consisting of the metal foil 2a, the metal film 2b, the electrolytic plating film 2c, the metal film 2d, and the electrolytic plating 2e, except for the portion above the through-hole conductor 30. Such first and second conductor layers 102a and 102b can be formed, for example, by forming the electrolytic plating film 2e and then patterning it using, for example, a subtractive method so as to have a predetermined conductor pattern.
[0032] At the interface between the filler 32 and the metal film 2d, peeling may occur due to the difference in thermal expansion coefficient between the filler 32 and the metal film 2d. From the viewpoint of suppressing this peeling, it is desirable that the filler 32 in contact with the metal film 2d has a thermal expansion coefficient close to that of the metal film 2d. FIG. 3 shows an example in which a third filler 32c is provided in a region of the first filler 32a on the first conductor layer 102a side, and a fourth filler 32d is provided in a region of the second filler 32b on the second conductor layer 102b side. The third filler 32c and the fourth filler 32d may be made of a material having a thermal expansion coefficient closer to that of the conductor layers 102a and 102b than the first filler 32a and the second filler 32b. Specifically, when metal film 2d is made of copper having a thermal expansion coefficient of about 16 ppm / ° C., fillers 32c, 32d may be made of a material having a thermal expansion coefficient of about 20 ppm / ° C. to 40 ppm / ° C. By making filler 32 of through-hole conductor 30 have such a configuration, warping is suppressed and peeling of conductor layers 102a, 102b is suppressed, thereby providing a wiring board of good quality.
[0033] 2, the conductor layers 112, 122 are composed of two layers, a metal film 2b and an electrolytic plating film 2c. The via conductors 113, 123 are formed integrally with the conductor layers 112, 122, and have a two-layer structure of a metal film 2b and an electrolytic plating film 2c that are continuous with the conductor layers 112, 122.
[0034] As described above, in the wiring board of the embodiment, it is not necessary that all of the through-hole conductors are made of a plurality of fillers having different thermal expansion coefficients. As shown in Fig. 4A, which is an enlarged view of the central through-hole conductor 30 in Fig. 1, the through hole TH of any of the through-hole conductors may be filled uniformly with a single filler 32e. Even when the through-hole TH is filled with such a single filler 32e, as shown in Fig. 4B, fillers 32c and 32d having a thermal expansion coefficient closer to that of the conductor layers 102a and 102b than that of the filler 32e may be provided at both ends of the filler 32e.
[0035] The fillers 32a, 32b, 32c, 32d, and 32e constituting the filler 32 are preferably formed using a material with a relatively high thermal conductivity. For example, the heat generated by electronic components that may be mounted on the first buildup section 110 may be efficiently conducted to the second buildup section 120, improving heat dissipation and improving the operational reliability of the electronic components. Specifically, the fillers 32a, 32b, 32c, 32d, and 32e preferably have a thermal conductivity of 0.5 W / m·K or more.
[0036] In the above description of wiring board 1, an example has been described in which the thermal expansion coefficients of the components on the first surface 100F side and the second surface 100S side of core substrate 100 are different between first buildup section 110 and second buildup section 120. However, a structure in which the filler is composed of a plurality of fillers with different thermal expansion coefficients may be effective in suppressing warping even when there is no difference in the thermal expansion coefficients between first buildup section 110 and second buildup section 120.
[0037] For example, as shown in FIG. 5 as a wiring board 1a, when the laminate 100 is a multi-layer laminate having a plurality of insulating layers 101a, 101b, and 101c, the thermal expansion coefficients on both sides of the center in the thickness direction of the laminate 100 may differ. For example, as shown in the figure, when the residual copper ratio is different on one side and the other side of the insulating layer 101a constituting the center in the thickness direction of the laminate 100, the thermal expansion coefficient may be biased within the laminate 100. In such a case, a structure in which the filler 32 of the through-hole conductor 30 is composed of a plurality of fillers 32a and 32b having different thermal expansion coefficients can offset the bias in the thermal expansion coefficient within the laminate 100. Therefore, the warping of the laminate 100, i.e., the warping of the wiring board 1a, can be suppressed.
[0038] Next, an example of a method for manufacturing a wiring board according to an embodiment will be described with reference to FIGS. 6A to 6H, taking the case where the wiring board 1 of FIG. 1 is manufactured as an example. In FIGS. 6A to 6F, the structure of each conductor layer is depicted in detail, as in FIG. 2, but in FIGS. 6G and 6H, the structure of each conductor layer is simplified and shown as having a single-layer structure, as in FIG. 1. First, as shown in FIG. 6A, a substrate (e.g., a double-sided copper-clad laminate) including an insulating layer 101 and a metal foil 2a is prepared, and a through hole TH is formed. The through hole TH is formed by boring a hole with a cutting device such as a drill. The through hole TH may be formed by irradiation of a laser beam such as a carbon dioxide laser or a YAG laser.
[0039] Next, as shown in FIG. 6B, a metal film 2b is formed on the inner wall surface of the through hole TH and on the metal foil 2a by, for example, electroless plating or sputtering. The metal film 2b is, for example, an electroless plating film made of copper, but the material of the metal film 2b is not limited to copper. Then, an electrolytic plating film 2c is formed on the metal film 2b by electrolytic plating using the metal film 2b as a power supply layer. The electrolytic plating film 2c is made of a metal such as copper that is deposited on the metal film 2b. However, the material of the metal film 2c is not limited to copper. On the inner wall surface of the through hole TH, a two-layered conductor film 31 is formed, which includes the metal film 2b and the electrolytic plating film 2c and is responsible for the conductivity between the conductor layers formed on both sides of the insulating layer 101.
[0040] 6C, a sealing plate SP is attached to one surface of the insulating layer 101. One side of the through-hole TH is closed by the sealing plate SP. For the sealing plate SP, a breathable material such as a PET film, urethane foam, or Japanese paper may be used.
[0041] Next, as shown in FIG. 6D, the hollow portion of the through hole TH is filled with a filler 32b. For example, a resin such as epoxy, acrylic, or phenol is injected from the opening of the through hole TH on the side that is not blocked by the sealing plate SP. If necessary, the supplied epoxy resin or the like can be sucked from the side that is blocked by the sealing plate SP. The sealing plate SP has air permeability, and the filler 32b can be sucked toward the sealing plate SP side by, for example, making the outside of the sealing plate SP at a lower air pressure than the inside of the through hole. The filler 32b is filled up to the center in the thickness direction of the insulating layer 101. During the process of filling with the filler 32b, the opening on the opposite side to the opening blocked by the sealing plate SP of the through hole shown in the center can be blocked by an appropriate protective plate (not shown) such as PET. The filled filler 32b is solidified by heating or the like as necessary.
[0042] Next, as shown in FIG. 6E, the remaining space of the through hole TH is filled with the filler 32a, and the through hole TH shown in the center is also filled with the filler 32e. The filler 32a is made of a material having a thermal expansion coefficient different from that of the filler 32b. For example, when the filler 32b is made of an epoxy resin or the like having a relatively high thermal expansion coefficient, the filler 32a may be filled with a polyimide resin or the like having a relatively low thermal expansion coefficient. The difference in thermal expansion coefficient may be adjusted by changing the filler content of the filler 32b and the filler 32a. When the thermal expansion coefficient of the filler 32a is configured to be lower than that of the filler 32b, the thermal expansion coefficient may be adjusted by, for example, making the filler content of the filler 32a higher than that of the filler 32b. The through hole TH is completely filled with the fillers 32a and 32e, and the formation of the through-hole conductor 30 having the conductor film 31 and the filler 32 is completed.
[0043] Next, as shown in FIG. 6F, after the sealing plate SP is removed, the end face of the solidified filling material 32 is polished by any method such as chemical mechanical polishing, if necessary. This polishing preferably makes the end face of the filling material 32 and the surface of the electrolytic plating film 2c approximately flush with each other. Furthermore, a metal film 2d and an electrolytic plating film 2e are formed in order on the electrolytic plating film 2c and the filling material 32. The metal film 2d and the electrolytic plating film 2e are formed, for example, by the same method as the metal film 2b and the electrolytic plating film 2c. As a result, the first and second conductor layers 102a and 102b having a five-layer structure of the metal foil 2a, the metal film 2b, the electrolytic plating film 2c, the metal film 2d, and the electrolytic plating film 2e are formed on both sides of the insulating layer 101.
[0044] The first and second conductor layers 102a, 102b are patterned into a desired conductor pattern, for example, by etching using an etching mask with openings at appropriate positions. The first and second conductor layers 102a, 102b can be formed in this manner using a subtractive method. The formation of the laminate (core substrate) 100 shown in FIG. 6F is completed.
[0045] 6G, insulating layers and conductor layers are alternately laminated on both sides of the core substrate 100. A first build-up section 110 is formed on the first surface 100F of the core substrate 100, and a second build-up section 120 is formed on the second surface 100S. For example, a film-like insulating resin (e.g., epoxy resin) is thermocompressed to the first surface 100F and the second surface 100S to form the insulating layer 111 on the first surface 100F side of the two insulating layers 111 and the insulating layer 121 on the second surface 100S side of the two insulating layers 121. Through holes 113h and 123h are formed in the insulating layers 111 and 121 at the positions where the via conductors 113 and 123 are to be formed, for example, by irradiation with a carbon dioxide laser beam.
[0046] A metal film made of a conductor such as copper is formed on the inner walls of the through holes 113h and 123h and on the surfaces of the insulating layers 111 and 121 by electroless plating or sputtering. The metal film is used as a power supply layer, and the conductor layers 112 and 122, as well as the via conductors 113 and 123, each having a desired conductor pattern, are formed by electrolytic plating using a plating resist having appropriate openings. That is, the conductor layer 112 on the first surface 100F side of the two conductor layers 112 and the conductor layer 122 on the second surface 100S side of the two conductor layers 122 are formed by a semi-additive method (SAP method). Together with the conductor layers 112 and 122, the via conductor 113 penetrating the insulating layer 111 on the first surface 100F side and the via conductor 123 penetrating the insulating layer 121 on the second surface 100S side are formed.
[0047] Furthermore, the insulating layer 111 and the insulating layer 121 on the surface side are formed in the same manner as the insulating layer 111 on the first surface 100F side and the insulating layer 121 on the second surface 100S side. Also, the conductor layers 112 and 122 on the surface side are formed in the same manner as the conductor layer 112 on the first surface 100F side and the conductor layer 122 on the second surface 100S side. Also, the via conductors 113 and 123 penetrating the insulating layers 111 and 121 on the surface side are formed in the same manner as the via conductor 113 penetrating the insulating layer 111 on the first surface 100F side and the via conductor 123 penetrating the insulating layer 121 on the second surface 100S side. In this manner, the first buildup section 110 and the second buildup section 120 are formed.
[0048] When the wiring board 1 shown in FIG. 1 is formed, as shown in FIG. 6H, a solder resist layer 10 is formed on the first build-up section 110, and a solder resist layer 20 is formed on the second build-up section 120. The solder resist layers 10 and 20 are formed to have openings 10a and 20a exposing the conductor pads 112p and 122p, for example, by forming a resin layer containing a photosensitive epoxy resin or polyimide resin, and exposing and developing the resin layer using a mask having an appropriate opening pattern. A surface protection film (not shown) made of Au, Ni / Au, Ni / Pd / Au, solder, heat-resistant preflux, or the like may be formed on the exposed surfaces of the conductor pads 112p and 122p by electroless plating, solder leveling, spray coating, or the like. The wiring board 1 of FIG. 1 is completed through the above steps.
[0049] The wiring board of the embodiment is not limited to those having the structures illustrated in the drawings and the structures, shapes, and materials illustrated in this specification. The first buildup section and the second buildup section may have different numbers of layers, and may have any number of insulating layers and conductor layers. [Explanation of symbols]
[0050] 1, 1a Wiring board 30 Through-hole conductor 31 Conductive Film 32, 32a~e Filler 100 Laminate 100F 1st page 100S 2nd page 101 Insulating layer 102a First conductor layer 102b Second conductor layer 111, 121 Insulating layer 112, 122 Conductor layer 110 First Build-up Section 120 Second Build-up Section TH through hole SP sealing plate
Claims
1. a laminate having a first surface and a second surface opposite to the first surface, the laminate including a first conductor layer formed on the first surface and a second conductor layer formed on the second surface; a through-hole conductor penetrating the laminate and connecting the first conductor layer and the second conductor layer; a first buildup section formed of insulating layers and conductor layers alternately stacked on the first surface; a second buildup section formed of insulating layers and conductor layers alternately stacked on the second surface; A wiring board having the through-hole conductor includes a conductive film that covers an inner wall surface of a through hole that penetrates the laminate, and a filler that fills the through hole; the filler is filled in a space surrounded by the conductive film, the first conductive layer, and the second conductive layer, and is covered by the first conductive layer and the second conductive layer directly above the through hole; The filler includes at least one set of fillers filling different regions of the through hole in a thickness direction of the laminate, The set of fillers have different thermal expansion coefficients, and are composed of a first filler that fills the area on the first surface side of the through hole and a second filler that fills the area on the second surface side of the through hole, and the thermal expansion coefficient of the first build-up portion is higher than the thermal expansion coefficient of the second build-up portion, and the thermal expansion coefficient of the first filler is lower than the thermal expansion coefficient of the second filler.
2. 2. The wiring board according to claim 1, wherein the filling material contains an inorganic filler, and the first filling material and the second filling material have different contents of the inorganic filler.
3. a laminate having a first surface and a second surface opposite to the first surface, the laminate including a first conductor layer formed on the first surface and a second conductor layer formed on the second surface; a through-hole conductor penetrating the laminate and connecting the first conductor layer and the second conductor layer; a first buildup section formed of insulating layers and conductor layers alternately stacked on the first surface; a second buildup section formed of insulating layers and conductor layers alternately stacked on the second surface; A wiring board having the through-hole conductor includes a conductive film that covers an inner wall surface of a through hole that penetrates the laminate, and a filler that fills the through hole; The filler includes at least one set of fillers filling different regions of the through hole in a thickness direction of the laminate, the set of fillers have different thermal expansion coefficients, and the fillers are composed of a first filler that fills an area on the first surface side of the through hole and a second filler that fills an area on the second surface side of the through hole; The filler further has a third filler on the first surface side of the first filler and a fourth filler on the second surface side of the second filler, the thermal expansion coefficient of the third filler being closer to the thermal expansion coefficient of the conductor constituting the first conductor layer than the first filler, and the thermal expansion coefficient of the fourth filler being closer to the thermal expansion coefficient of the conductor constituting the second conductor layer than the second filler.
4. 2. The wiring board according to claim 1, wherein the filler that fills the through hole has a thermal conductivity of 0.5 W / m·K or more.
5. 2. The wiring board according to claim 1, wherein the through-hole conductor has a cylindrical shape, and the cylindrical shape has a substantially uniform diameter in a length direction of 100 [mu]m or more and 350 [mu]m or less.
6. 2. The wiring board according to claim 1, an insulating layer covering the first surface among insulating layers and conductor layers alternately stacked on the first surface, and an insulating layer covering the second surface among insulating layers and conductor layers alternately stacked on the second surface are formed of the same insulating resin material; Directly above the through hole, the first conductor layer is connected to a via conductor that penetrates the insulating layer covering the first surface, and the second conductor layer is connected to a via conductor that penetrates the insulating layer covering the second surface.
Citation Information
Patent Citations
Three-dimensional structure / substrate through multilayer resistance
JP1992313297A
Hole-filling material for printed circuit board and printed circuit board prepared by using same
JP1999199759A
Multilayer wiring board and its manufacturing method
JP2005310934A
Through-hole filler and multilayer wiring board
JP2009194105A
Epoxy resin composition for thermal conductive material, cured article thereof and electronic member
JP2017008153A