Semiconductor module
The semiconductor module's metal wiring board with grooves and bosses enhances adhesion, addressing delamination issues by improving bonding resilience to thermal stress.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2023-10-10
- Publication Date
- 2026-03-17
AI Technical Summary
The adhesion of the sealing resin to the joint of the metal wiring board in semiconductor modules is compromised by fluctuations in internal stress caused by temperature changes, leading to potential delamination.
A semiconductor module design featuring a metal wiring board with a first joint portion having a plate-like structure that includes grooves along its outer circumference and protruding bosses on its lower surface, enhancing the adhesion between the metal wiring board and the sealing resin.
The design improves the adhesion between the metal wiring board and the sealing resin, preventing delamination and ensuring stable bonding even under thermal stress.
Smart Images

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Abstract
Description
Technical Field
[0005]
[0001] The present invention relates to a semiconductor module.
Background Art
[0002] A semiconductor module has a substrate provided with semiconductor elements such as an IGBT (Insulated Gate Bipolar Transistor), a power MOSFET (Metal Oxide Semiconductor Field Effect Transistor), a FWD (Free Wheeling Diode), etc., and is used in an inverter device or the like.
[0003] In this type of semiconductor module, for example, in Patent Documents 1 to 3, semiconductor elements are arranged on an insulating substrate (which may be called a laminated substrate), and a metal wiring board (which may be called a lead frame) for wiring is arranged on the upper surface electrode of the semiconductor element. The metal wiring board is formed into a predetermined shape by, for example, pressing a metal plate. One end of the metal wiring board is electrically joined to the upper surface electrode via a joining material such as solder.
[0004] In a semiconductor module, a sealing resin is filled inside a case member, and the internal structure including the metal wiring board is covered with the sealing resin. In order to improve the adhesion strength of the sealing resin to the metal wiring board, in Patent Document 4, a groove in the shape of an ant groove whose opening part is narrower than the width of the bottom is formed in the metal wiring board, and in Patent Document 5, a plurality of lattice-shaped grooves are formed in the metal wiring board.
[0005] In Patent Documents 6 to 9, it is described that a plurality of dimples are formed on the surface of the metal wiring board, and protrusions (return parts, return portions, key parts) are provided on the inner walls of the dimples to improve the adhesion strength of the sealing resin. As a method of forming such dimples, a hole is formed by a first pressing process, and a second pressing process is performed on the periphery of the hole to deform a part of the hole and protrude the protrusion on the inner wall.
Prior Art Documents
[0006] [Patent Document 1] Japanese Patent Publication No. 2018-088448 [Patent Document 2] Japanese Patent Publication No. 2016-139635 [Patent Document 3] Japanese Patent Publication No. 2015-176871 [Patent Document 4] Japanese Patent Application Publication No. 6-163773 [Patent Document 5] Japanese Patent Publication No. 2021-077718 [Patent Document 6] Japanese Patent Application Publication No. 7-273270 [Patent Document 7] Japanese Patent Publication No. 2005-191178 [Patent Document 8] Japanese Patent Publication No. 2017-005124 [Patent Document 9] Japanese Patent Publication No. 2007-258587 [Overview of the project] [Problems that the invention aims to solve]
[0007] Incidentally, in this type of semiconductor module, the power semiconductor element generates heat during switching operation. In the structure described above, where a metal wiring board is soldered to the surface of the power semiconductor element, fluctuations in internal stress caused by temperature changes may cause distortion at the joint. As a result, it is conceivable that the adhesion of the sealing resin to the joint of the metal wiring board may decrease.
[0008] The present invention has been made in view of the above, and one of its objectives is to provide a semiconductor module that can improve the adhesion between the joint of a metal wiring board and the sealing resin. [Means for solving the problem]
[0009] A semiconductor module according to one aspect of the present invention comprises a laminated substrate having a plurality of circuit boards arranged on the upper surface of an insulating board, a semiconductor element disposed on the upper surface of at least one of the circuit boards, and a metal wiring board disposed on the upper surface of the semiconductor element, wherein the metal wiring board has a first joint portion bonded to the upper surface of the semiconductor element via a bonding material, the first joint portion includes a plate-like portion having an upper surface and a lower surface, and the upper surface of the plate-like portion has at least one groove provided along the outer circumference of the first joint portion. [Effects of the Invention]
[0010] According to the present invention, it is possible to improve the adhesion between the joint portion of the metal wiring board and the sealing resin in a semiconductor module. [Brief explanation of the drawing]
[0011] [Figure 1] This is a schematic diagram of the semiconductor device according to this embodiment, viewed from above. [Figure 2] Figure 1 is a cross-sectional view of the semiconductor device shown in Figure 1, cut along line AA. [Figure 3] This is an enlarged view of the metal wiring board according to this embodiment. [Figure 4] Figure 3 is a plan view of the metal wiring board as seen from the direction of arrow B. [Figure 5] This is a magnified view of section C of the metal wiring board shown in Figure 3. [Figure 6] This is a plan view showing a specific example of a semiconductor module to which the metal wiring board according to this embodiment is applied. [Figure 7] This is an equivalent circuit diagram of the semiconductor device according to this embodiment. [Figure 8] This is a plan view showing a first embodiment in which grooves are provided on the surface of a metal wiring board. [Figure 9] This is a cross-sectional view taken along the DD line in Figure 8. [Figure 10] This is a plan view showing a second embodiment in which grooves are provided on the surface of a metal wiring board. [Figure 11] This is a plan view showing a third embodiment in which grooves are provided on the surface of a metal wiring board. [Figure 12] It is a plan view showing a fourth embodiment in which grooves are provided on the surface of a metal wiring board.
Mode for Carrying Out the Invention
[0012] Hereinafter, a semiconductor module and a semiconductor device to which the present invention is applicable will be described. First, referring to FIGS. 1 to 7, the overall semiconductor module and semiconductor device, and the schematic configuration of the metal wiring board included in the semiconductor module and semiconductor device will be described. FIG. 1 is a schematic view of the semiconductor device according to the present embodiment as viewed from above. FIG. 2 is a cross-sectional view of the semiconductor device shown in FIG. 1 cut along line A-A. FIG. 3 is an enlarged view of the metal wiring board according to the present embodiment. FIG. 4 is a plan view of the metal wiring board shown in FIG. 3 when viewed in the direction of arrow B. FIG. 5 is an enlarged view of part C of the metal wiring board shown in FIG. 3. FIG. 6 is a plan view showing a specific example of a semiconductor module to which the metal wiring board according to the present embodiment is applied. FIG. 7 is an equivalent circuit diagram of the semiconductor device according to the present embodiment. Here, as the semiconductor element 3, a configuration in which an antiparallel circuit of an IGBT and a FWD is connected in series is adopted.
[0013] In the following diagrams, the longitudinal direction of the semiconductor module (cooler) is defined as the X direction, the short direction as the Y direction, and the height direction (thickness direction of the substrate) as the Z direction. The longitudinal direction of the semiconductor module indicates the direction in which multiple circuit boards are arranged. The X, Y, and Z axes shown are orthogonal to each other and form a right-handed system. In some cases, the X direction may be called the left-right direction, the Y direction the front-back direction, and the Z direction the up-down direction. These directions (front-back, left-right, up-down) are terms used for convenience of explanation, and the correspondence with the X, Y, and Z directions may change depending on the mounting orientation of the semiconductor module. For example, the heat dissipation side (cooler side) of the semiconductor module will be called the bottom side, and the opposite side will be called the top side. In this specification, a plan view means viewing the top or bottom surface of the semiconductor module from the Z direction. Also, the aspect ratio and the relative sizes of each component in each drawing are only schematic representations and do not necessarily match. For the sake of explanation, it is possible that the relative sizes of the components may be exaggerated in the representation.
[0014] The semiconductor device 100 according to this embodiment is applicable to power conversion devices such as inverters for industrial or automotive motors. As shown in Figures 1 and 2, the semiconductor device 100 is configured by placing a semiconductor module 1 on the upper surface of a cooler 10. The cooler 10 can be configured in any way with respect to the semiconductor module 1.
[0015] The cooler 10 releases heat from the semiconductor module 1 to the outside and has a rectangular parallelepiped shape overall. Although not specifically shown in the figures, the cooler 10 is constructed by providing multiple fins on the underside of a base plate and housing these fins in a water jacket. However, the cooler 10 is not limited to this configuration and can be modified as appropriate.
[0016] The semiconductor module 1 is constructed by arranging a laminated substrate 2, semiconductor elements 3, and metal wiring boards 4, etc., inside a case 11.
[0017] The laminated substrate 2 is composed of, for example, a DCB (Direct Copper Bonding) substrate, an AMB (Active Metal Brazing) substrate, or a metal-based substrate. The laminated substrate 2 is constructed by stacking an insulating plate 20, a heat sink 21, and a plurality of circuit boards 22, and is formed in a rectangular shape when viewed from above.
[0018] Specifically, the insulating plate 20 is formed as a plate-like body having an upper surface and a lower surface, and has a rectangular shape in plan view that is elongated in the X direction. The insulating plate 20 may be formed from ceramic materials such as aluminum oxide (Al2O3), aluminum nitride (AlN), silicon nitride (Si3N4), or aluminum oxide (Al2O3) and zirconium oxide (ZrO2).
[0019] Furthermore, the insulating plate 20 may be formed from, for example, a thermosetting resin such as epoxy resin or polyimide resin, or a composite material using glass or ceramic material as a filler in a thermosetting resin. Preferably, the insulating plate 20 is flexible and may be formed from a material containing, for example, a thermosetting resin. The insulating plate 20 may also be called an insulating layer or insulating film.
[0020] The heat sink 21 has a predetermined thickness in the Z direction and a rectangular shape in plan view that is long in the Y direction. The heat sink 21 is made of a metal plate with good thermal conductivity, such as copper or aluminum. The heat sink 21 is placed on the lower surface of the insulating plate 20. The lower surface of the heat sink 21 is the mounting surface to the cooler 10, which is the mounting site for the semiconductor module 1, and also functions as a heat dissipation surface (heat dissipation area) for releasing heat from the semiconductor module 1. The heat sink 21 is joined to the upper surface of the cooler 10 via a bonding material S1 such as solder. The heat sink 21 may also be placed on the upper surface of the cooler 10 via a thermal conductive material such as thermal grease or thermal compound.
[0021] Multiple circuit boards 22 each have a predetermined thickness and are arranged on the upper surface of the insulating board 20. Each circuit board 22 is formed in an electrically independent island shape. For example, a circuit board 22 has a rectangular shape in plan view and is arranged in a line in the X direction on the insulating board 20. Note that the number of circuit boards 22 is not limited to two as shown in Figure 1, and can be changed as appropriate. Three or more circuit boards 22 may be arranged on the insulating board 20 as shown in Figure 6. Furthermore, the shape, arrangement, etc., of the circuit boards 22 are not limited to these and can be changed as appropriate. These circuit boards 22 are formed from metal plates with good thermal conductivity, such as copper or aluminum. The circuit boards 22 may also be called circuit layers or circuit patterns.
[0022] A semiconductor element 3 is arranged on the upper surface of a predetermined circuit board 22 (the circuit board 22 on the negative side in the X direction) via a bonding material S2 such as solder. The semiconductor element 3 is formed in a rectangular shape in plan view using a semiconductor substrate such as silicon (Si) or silicon carbide (SiC). The semiconductor element 3 may be a power semiconductor element. Switching elements such as IGBTs (Insulated Gate Bipolar Transistors) and power MOSFETs (Metal Oxide Semiconductor Field Effect Transistors), and diodes such as FWDs (Free Wheeling Diodes) can be used as semiconductor elements 3.
[0023] In this embodiment, the semiconductor element 3 is composed of an RC (Reverse Conducting)-IGBT element that integrates the functions of an IGBT (Insulated Gate Bipolar Transistor) element and an FWD (Free Wheeling Diode) element.
[0024] The semiconductor element 3 is not limited to those described above and may be constructed by combining the switching elements, diodes, etc. For example, the IGBT element and the FWD element may be constructed separately. Also, an RB (Reverse Blocking)-IGBT with sufficient voltage resistance against reverse bias may be used as the semiconductor element 3. Furthermore, the shape, number, and placement of the semiconductor element 3 can be changed as appropriate.
[0025] Furthermore, the semiconductor element 3 has electrodes (not shown) formed on its upper and lower surfaces. For example, the upper electrode is composed of an emitter electrode (source electrode) or a gate electrode, and the lower electrode is composed of a collector electrode (drain electrode).
[0026] In this embodiment, the semiconductor element 3 is a so-called vertical switching element in which the above-described functional elements are formed on a semiconductor substrate, but it is not limited to this and may also be a horizontal switching element.
[0027] A metal wiring board 4 is placed on the upper surface of the semiconductor element 3. The metal wiring board 4 is composed of a plate-like body having an upper surface and a lower surface, and is formed from a metal material such as copper, copper alloy, aluminum alloy, or iron alloy. The metal wiring board 4 is formed into a predetermined shape, for example, by press working. Note that the shape of the metal wiring board 4 shown below is merely an example and can be changed as appropriate. The metal wiring board may also be called a lead frame.
[0028] The metal wiring board 4 according to this embodiment is a long body that extends in the X direction so as to straddle a plurality of circuit boards 22 in a plan view, and has a crank shape that is bent multiple times in a side view. Specifically, as shown in Figures 2 and 3, the metal wiring board 4 is composed of a first joint portion 40 that is joined to the upper surface (upper electrode) of the semiconductor element 3 via a bonding material S3, a second joint portion 41 that is joined to the upper surface of the circuit board 22 on the positive X side via a bonding material S4, and a connecting portion 42 that connects the first joint portion 40 and the second joint portion 41.
[0029] The width of the metal wiring board 4 in the Y direction is uniform from the first joint 40 to the second joint 41. Furthermore, the first joint 40, the second joint 41, and the connecting portion 42 are arranged in a line along the X direction in a plan view. However, the width of the metal wiring board 4 in the Y direction does not need to be uniform from the first joint 40 to the second joint 41; as shown in Figure 6, they may have different widths. Also, the first joint 40, the second joint 41, and the connecting portion 42 do not need to be arranged in a line; as shown in Figure 6, they may be arranged diagonally offset from each other.
[0030] The first joint portion 40 is formed in a rectangular shape smaller than the outer shape of the semiconductor element 3 in a plan view, and includes a plate-like portion having an upper surface and a lower surface. At the end of the first joint portion 40 on the positive X-direction side (connecting portion 42 side), a first bent portion 43 is formed that bends at approximately a right angle and rises upward. One end (left end) of the connecting portion 42 is connected to the upper end of the first bent portion 43. As will be described in detail later, a plurality of bosses 45 protruding toward the semiconductor element 3 are formed on the lower surface of the first joint portion 40. In addition, a bottomed hole 46 is formed on the upper surface of the first joint portion 40 at a location corresponding to directly above the bosses 45.
[0031] The second joint portion 41 is formed in a rectangular shape smaller than the outer shape of the circuit board 22 in a plan view, and includes a plate-like portion having an upper surface and a lower surface. At the end of the second joint portion 41 on the negative X-direction side (connecting portion 42 side), a second bent portion 44 is formed that bends at approximately a right angle and rises upward. The other end (right end) of the connecting portion 42 is connected to the upper end of the second bent portion 44. As will be described in detail later, a plurality of bosses 47 protruding toward the circuit board 22 are formed on the lower surface of the second joint portion 41. In addition, a bottomed hole 48 is formed on the upper surface of the second joint portion 41 at a location corresponding to directly above the bosses 47.
[0032] The connecting portion 42 extends horizontally, with one end connected to the first bent portion 43 and the other end connected to the second bent portion 44, as described above.
[0033] The length of the first bent portion 43 in the Z direction is shorter than that of the second bent portion 44 by the thickness of the semiconductor element 3. In other words, the first joint portion 40 and the second joint portion 41 are located at different heights. More specifically, the first joint portion 40 is located at a higher position than the second joint portion 41.
[0034] The shape, number, and placement of the metal wiring boards 4 described above are merely examples and can be modified as appropriate without limitation. As will be described in detail later, as shown in Figure 6, multiple (for example, four) metal wiring boards 4 may be arranged for a single semiconductor module. In this embodiment, the semiconductor elements 3, metal wiring boards 4, and the main terminals described later form, for example, the inverter circuit shown in Figure 7.
[0035] The laminated substrate 2, semiconductor element 3, and metal wiring board 4 are surrounded by a case 11. The case 11 has a rectangular annular cylindrical or frame shape in plan view and is formed of, for example, synthetic resin. The case 11 may be formed of, for example, a thermosetting resin material such as epoxy resin or silicone rubber. The lower end of the case 11 is bonded to the upper surface of the cooler 10 via adhesive (not shown), and the upper end extends to a position sufficiently higher than the upper surface of the metal wiring board 4. In this way, the case 11 surrounds the laminated substrate 2, semiconductor element 3, and metal wiring board 4, defining a space for housing the laminated substrate 2, semiconductor element 3, and metal wiring board 4.
[0036] The internal space defined by case 11 is filled with sealing resin 5. The sealing resin 5 may be filled up to the top edge of case 11. This seals the laminated substrate 2, semiconductor element 3, and metal wiring board 4. The entire metal wiring board 4 is covered with sealing resin 5.
[0037] The sealing resin 5 may be composed of, for example, a thermosetting resin. Preferably, the sealing resin 5 contains at least one of epoxy, silicone, urethane, polyimide, polyamide, and polyamideimide. For example, epoxy resin mixed with filler is preferred for the sealing resin 5 from the viewpoint of insulating properties, heat resistance, and heat dissipation.
[0038] Furthermore, as shown in the specific example in Figure 6, the case 11 may be provided with a plurality of main terminals 60 for the main current and a plurality of control terminals 61 for control. The main terminals 60 are formed as long, plate-shaped bodies and are embedded in the side walls of the case 11. In Figure 6, two main terminals 60 constituting the N terminal and P terminal are arranged side by side in the X direction on the side wall of the case 11 located on the negative side in the Y direction. In addition, a main terminal 60 constituting the M terminal is arranged on the side wall of the case 11 located on the positive side in the Y direction.
[0039] As described above, in this embodiment, an inverter circuit like the one shown in Figure 7 is formed by the semiconductor element 3, the metal wiring board 4, and the main terminals 60, etc. These main terminals 60 (N terminal, P terminal, M terminal) correspond to IN(N) (which may also be called the low-potential input terminal or negative terminal), IN(P) (which may also be called the high-potential input terminal or positive terminal), and OUT(M) (which may also be called the output terminal or intermediate terminal) in Figure 7, respectively.
[0040] Furthermore, the control terminal 61 is formed as a long, plate-like body and is embedded in the side wall of the case 11 located on the positive side in the Y direction. The control terminal 61 is electrically connected to a predetermined control electrode of the semiconductor element 3 via a wiring member such as a bonding wire. These main terminals 60 and control terminals 61 are formed from metal materials such as copper, copper alloys, aluminum alloys, and iron alloys, and have predetermined electrical conductivity and predetermined mechanical strength. The shape, number, and arrangement of the main terminals 60 and control terminals 61 are not limited to these and can be changed as appropriate.
[0041] Incidentally, in semiconductor modules, it is necessary to prevent delamination from progressing along the interface between the metal wiring board and the encapsulating resin. One way to reduce delamination is to increase the surface area of the metal wiring board and improve the adhesion (anchor effect) between the metal wiring board and the encapsulating resin. One way to increase the surface area of the metal wiring board is to create an uneven surface on the metal wiring board. However, if there is an uneven surface on the underside of the metal wiring board (the surface facing the semiconductor element), voids and sink marks are more likely to occur in the bonding material. As a result, this may affect the mounting quality of the metal wiring board.
[0042] Furthermore, methods for roughening the surface of metal wiring boards include laser processing and wet methods using chemicals. However, these methods not only increase costs, but also make the underside of the metal wiring board rougher, which can easily cause voids and sink marks in the bonding material. In other words, it is difficult to roughen the surface of the metal wiring board without affecting the quality of the bonding material directly beneath it.
[0043] In this embodiment, the first joint portion 40 of the metal wiring board 4 is recessed from the upper side to provide a bottomed hole 46, and a boss 45 protruding from the lower side is provided on the back side of the bottomed hole 46. In addition, multiple roughened recesses 49 smaller than the bottomed hole 46 are provided on the upper surface of the first joint portion 40.
[0044] In a plan view, the bosses 45 are positioned near the four corners of the rectangular first joint 40. The formation of multiple bosses 45 in this manner prevents the first joint 40 from tilting relative to the upper surface of the semiconductor element 3 during the bonding process of the metal wiring board 4. Therefore, the orientation of the metal wiring board 4 (first joint 40) can be stabilized.
[0045] In particular, by providing a boss 45 on the lower surface of the metal wiring board 4, a gap of at least the height of the boss 45 can be secured between the first joint 40 and the semiconductor element 3. By filling this gap with the bonding material S3, it is possible to ensure the thickness of the bonding material S3.
[0046] Furthermore, the upper surface of the first joint 40 is roughened by the formation of multiple roughened recesses 49. As a result, the surface area of the upper surface of the first joint 40 is increased, making it possible to improve the adhesion (anchor effect) between the upper surface of the first joint 40 and the sealing resin 5. In particular, it is preferable that the sealing resin 5 penetrates into the roughened recesses 49. This allows for an even greater anchoring effect. Therefore, it is possible to suppress the delamination and progression of the sealing resin 5 on the upper surface of the metal wiring board 4 above the semiconductor element 3 due to thermal stress.
[0047] Furthermore, the second joint portion 41 is recessed from the upper side to provide a bottomed hole 48, and a boss 47 protruding from the lower side is provided on the back side of the bottomed hole 48. This ensures a gap of at least the height of the boss 47 between the second joint portion 41 and the circuit board 22. By filling this gap with the bonding material S4, it is possible to ensure the thickness of the bonding material S4.
[0048] The boss 45, bottomed hole 46, and roughened recess 49 in the first joint 40, and the boss 47 and bottomed hole 48 in the second joint 41 are formed, for example, by press working.
[0049] The multiple roughened recesses 49 may be formed on the upper surface of the second joint 41, or they may be formed only on the upper surface of the first joint 40. In other words, the roughened recesses 49 do not need to be formed on the connecting portion 42, the first bent portion 43, and the second bent portion 44, which constitute the parts other than the first joint 40.
[0050] Since the semiconductor element 3, which is a heat source, is located directly below the first joint 40, it is possible to make it more susceptible to the effects of the anchoring effect due to surface roughening. Furthermore, by roughening only the parts where the anchoring effect should be improved, it becomes unnecessary to incur extra processing costs. In other words, the second joint 41, connecting part 42, first bend part 43, and second bend part 44 are less affected by the peeling of the sealing resin 5 compared to the first joint 40. In this case, the surfaces of the second joint 41, connecting part 42, first bend part 43, and second bend part 44 are flat, and their surface roughness may be the same as the surface roughness of the lower surface of the first joint 40.
[0051] Furthermore, it is preferable that the lower surface of the first joint 40 is flat in the portion excluding the boss 45. That is, it is preferable that no roughened recesses 49 are formed on the lower surface of the first joint 40. For example, it is preferable that the surface roughness of the lower surface of the first joint 40 is smaller than the surface roughness of the upper surface of the first joint 40. A flat lower surface of the first joint 40 makes it less likely for voids and sink marks to occur in the joint material S3.
[0052] Furthermore, as shown in Figure 5, a coating film F may be interposed at the interface between the upper surface of the first joint 40 and the sealing resin 5.
[0053] Next, an embodiment in which grooves are provided on the upper surface of the first joint 40 will be described with reference to Figures 8 to 12. Figures 8 and 9 represent the first embodiment, Figure 10 represents the second embodiment, Figure 11 represents the third embodiment, and Figure 12 represents the fourth embodiment. In each embodiment, the upper surface of the first joint 40 has a roughened region roughened by a plurality of roughened recesses 49 and a non-roughened region in which no roughened recesses 49 are formed. The non-roughened region contains four bottomed holes 46.
[0054] In all of the first to fourth embodiments, at least one groove is provided on the upper surface of the first joint 40 along the outer circumference of the first joint 40. "Along the outer circumference" means that it is located near the outer edge of the first joint 40 and extends in approximately the same direction as the outer edge of the first joint 40. Also, "groove" means that it is a strip-shaped structure that is at least longer than the roughened recess 49.
[0055] In the first embodiment shown in Figures 8 and 9, a rectangular frame-shaped groove 50 is provided on the upper surface of the first joint 40. The groove 50 is positioned to surround the outside of all the bottomed holes 46 and all the roughened recesses 49.
[0056] Specifically, the first joint portion 40, which is rectangular in plan view, has a tip edge 40a at the tip end in the X direction (the end opposite to the connecting portion 42), and a boundary portion 40b at the end opposite to the tip edge 40a in the X direction, which forms the boundary with the first bent portion 43. The tip edge 40a and the boundary portion 40b are both linear in shape and extend in the Y direction. The first joint portion 40 also has a pair of lateral edges 40c and 40d that extend in the X direction and connect the ends of the tip edge 40a and the boundary portion 40b.
[0057] The groove 50 is composed of a pair of linear portions 50a, 50b extending in the Y direction along the tip outer edge 40a and the boundary portion 40b, and a pair of linear portions 50c, 50d extending in the X direction along the pair of lateral outer edges 40c, 40d. There is a predetermined distance in the X direction between the tip outer edge 40a and the linear portion 50a, and between the boundary portion 40b and the linear portion 50b. There is a predetermined distance in the Y direction between the lateral outer edge 40c and the linear portion 50c, and between the lateral outer edge 40d and the linear portion 50d. On the outer circumference side of the groove 50, the upper surface of the first joint portion 40 is flat.
[0058] Figure 9 shows the cross-sectional structure of the first joint 40 at a position along the DD line in Figure 8. The upper surface of the first joint 40 is covered with sealing resin 5, and a coating film F is interposed at the interface between the upper surface of the first joint 40 and the sealing resin 5. Delamination at the interface between the first joint 40 and the sealing resin 5 tends to occur from the outer periphery of the first joint 40, and delamination that occurs from the outer periphery of the first joint 40 progresses toward the inner region of the first joint 40.
[0059] Due to the structure of the metal wiring board 4, thermal deformation (expansion and contraction) occurs around the axis of the rising portions such as the first bend portion 43 and the second bend portion 44 in the connecting portion 42. Therefore, when thermal deformation occurs, the displacement of the tip side where the tip outer edge 40a is located in the first joint portion 40 becomes large. For this reason, in the first joint portion 40, delamination tends to progress in the X direction from the tip outer edge 40a toward the connecting portion 42. In particular, at the cross-sectional position shown in Figure 9, a non-roughened region where no roughened recess 49 is provided continues along the extension of the tip outer edge 40a in the X direction, creating conditions where delamination tends to progress toward the inside of the first joint portion 40.
[0060] Here, by providing the groove 50, the surface area of the first joint 40 is increased in the region along the outer circumference of the first joint 40, which is prone to delamination, thereby improving the adhesion (anchor effect) between the upper surface of the first joint 40 and the sealing resin 5. Unlike the multiple roughened recesses 49 which are spaced apart in the X and Y directions on the upper surface of the first joint 40, the groove 50 has a continuous shape in the X and Y directions. Therefore, the groove 50 is present in all parts along the outer circumference of the first joint 40, preventing a smooth surface from continuing from the outer circumference to the inner circumference of the first joint 40.
[0061] For example, if we consider delamination progressing in the X direction from the tip outer edge 40a of the first joint 40, the linear portion 50a of the groove 50 extends in a direction (Y direction) perpendicular to the direction of delamination progression (X direction). With this configuration, the linear portion 50a of the groove 50 can suppress the progression of delamination in the X direction. Furthermore, in the roughened region where the roughened recess 49 is provided inside the groove 50, an anchoring effect can also be obtained from the roughened recess 49. Even in the non-roughened region, such as the cross-sectional position shown in Figure 9, the linear portion 50a of the groove 50 is formed continuously along the tip outer edge 40a of the first joint 40, so the groove 50 can suppress the progression of delamination in the X direction from the tip outer edge 40a.
[0062] Figure 9 shows the straight portion 50a along the leading edge 40a of the groove 50. However, the effect of suppressing the progression of peeling of the sealing resin 5 from the outer circumference of the first joint 40 can be obtained not only with the straight portion 50a, but also with the other straight portions 50b, 50c, and 50d. For example, the straight portions 50c and 50d can suppress the progression of peeling in the Y direction from the lateral outer edges 40c and 40d. Also, the straight portion 50b can suppress the progression of peeling in the X direction from the boundary portion 40b with the first bent portion 43.
[0063] As shown in Figure 9, the groove 50 is a closed groove with a U-shaped (rectangular) cross-sectional shape that opens toward the upper surface of the first joint 40. From the viewpoint of ensuring the strength of the metal wiring board 4 and preventing deformation, the depth Z1 of the groove 50 is preferably 30% or less of the thickness T1 of the first joint 40. Furthermore, the opening width W1 of the groove 50 is preferably 50 μm or more and 600 μm or less.
[0064] To stabilize the orientation of the metal wiring board 4, bosses 45 are provided near the four corners of the lower surface of the first joint 40, and the bottomed holes 46 (non-roughened areas) formed directly above the bosses 45 are located near the four corners of the upper surface of the first joint 40. Even near the four corners of the first joint 40, where roughening by the roughened recesses 49 is difficult, by arranging one or more rows of grooves 50 on the outer circumference side of the bottomed holes 46, which are non-roughened areas, the grooves 50 can suppress the progression of peeling to the position of the bottomed holes 46.
[0065] The cross-sectional shape of the groove 50 does not have to be U-shaped. For example, the groove 50 can be constructed with a U-shaped or semicircular cross-sectional shape.
[0066] In the second embodiment shown in Figure 10, in addition to the groove 50 along the outer circumference of the first joint 40, there is a second groove 51 located inside the upper surface of the first joint 40, relative to the groove 50. The second groove 51 is a rectangular frame-shaped groove similar to the groove 50, and is composed of a pair of linear portions 51a, 51b extending in the Y direction and a pair of linear portions 51c, 51d extending in the X direction. A plurality (four) of bottomed holes 46 are arranged between the groove 50 and the second groove 51. The inside of the second groove 51 is a roughened region in which a plurality of roughened recesses 49 are arranged.
[0067] The second groove 51, like the roughened recess 49 and groove 50, has the effect of increasing the surface area of the first joint 40 and improving the adhesion between the upper surface of the first joint 40 and the sealing resin 5. Even if the peeling of the sealing resin 5 progresses to the inside of the first joint 40 beyond the location of groove 50, the second groove 51 can suppress the progression of peeling. Since the second groove 51 is continuous in a frame shape, even in areas where the roughened recess 49 does not exist in the X and Y directions, the effect of reliably suppressing the progression of peeling can be obtained by the second groove 51.
[0068] In the third embodiment shown in Figure 11, in addition to the groove 50 and the second groove 51, there is a third groove 52 located further inside the upper surface of the first joint 40 than the second groove 51. The third groove 52 is a rectangular frame-shaped groove similar to grooves 50 and the second groove 51, and is composed of a pair of linear portions 52a and 52b extending in the Y direction and a pair of linear portions 52c and 52d extending in the X direction. The area between the second groove 51 and the third groove 52 is a roughened region in which a plurality of roughened recesses 49 are arranged. Furthermore, the inside of the third groove 52 is also a roughened region in which a plurality of roughened recesses 49 are arranged.
[0069] The third groove 52, like the roughened recesses 49, groove 50, and the second groove 51, increases the surface area of the first joint 40, thereby improving the adhesion between the upper surface of the first joint 40 and the sealing resin 5. Even if the peeling of the sealing resin 5 progresses to the inside of the upper surface of the first joint 40 beyond the locations of grooves 50 and the second groove 51, the third groove 52 can suppress the progression of peeling. Since the third groove 52 is continuous in a frame shape, even in areas where roughened recesses 49 do not exist in the X and Y directions, the effect of reliably suppressing the progression of peeling can be obtained by the third groove 52.
[0070] The grooves formed on the upper surface of the first joint 40 are not limited to frame shapes such as the groove 50, the second groove 51, and the third groove 52 described above. The fourth embodiment shown in Figure 12 is an example of a configuration in which a plurality of parallel grooves 53 (53a-53g) are formed on the upper surface of the first joint 40. Each of the grooves 53a-53g extends linearly in the Y direction and is arranged at a predetermined interval in the X direction. Each of the grooves 53a-53g is formed to be longer than the distance between the two bottomed holes 46 in the Y direction.
[0071] Of the multiple grooves 53, groove 53a, located at the very tip of the first joint 40, is situated between the tip outer edge 40a and the bottomed holes 46 (two bottomed holes 46 located close to the tip outer edge 40a). Groove 53b, located closest to the first bent portion 43, is situated between the boundary portion 40b and the bottomed holes 46 (two bottomed holes 46 located close to the boundary portion 40b). In other words, two grooves 53a and 53b are formed on the outer circumference in the X direction, relative to each bottomed hole 46. Furthermore, between grooves 53a and 53b, grooves 53c, 53d, 53e, 53f, and 53g are formed as additional grooves located further inside the upper surface of the first joint 40 than grooves 53a and 53b. Between each of the grooves 53c-53g, there is a roughened region in which multiple roughened recesses 49 are formed.
[0072] As described above, in the first joint 40, peeling of the sealing resin 5 tends to progress in the X direction from the tip side where the tip outer edge 40a is located. By providing grooves 53a-53g that extend in the Y direction perpendicular to the X direction in which peeling progresses, the effect of suppressing the peeling of the sealing resin 5 can be improved. In particular, since groove 53a is located along the tip side opposite to the connecting portion 42, the progress of peeling can be effectively suppressed at the initial stage. Also, since groove 53a is formed on the outer circumference side of the bottomed hole 46 (between the tip outer edge 40a and the bottomed hole 46), the groove 53a can prevent peeling from progressing to the bottomed hole 46.
[0073] The grooves 50, the second groove 51, the third groove 52, and the multiple grooves 53 shown in Figures 8 to 12 can be formed, for example, by press working or cutting.
[0074] In the above embodiment, the first joint portion 40 of the metal wiring board 4 has a bottomed hole 46 in the non-roughened region of the upper surface, but the configuration of the non-roughened region is not limited to a bottomed hole. For example, when connecting wires to the upper surface of the metal wiring board 4, the location where the wires are connected may be the non-roughened region. Furthermore, protruding portions that project upward from the metal wiring board 4, or through holes that penetrate the upper and lower surfaces of the metal wiring board 4, can also be applied as non-roughened regions. In any case, the above effects can be obtained by arranging one or more rows of grooves on the outer circumference side of the non-roughened region.
[0075] Furthermore, the present invention can also be applied to the first joint of a metal wiring board that does not have a non-roughened area such as a bottomed hole 46 on its upper surface. Additionally, the present invention can be applied to the first joint of a metal wiring board whose upper surface is not roughened by the roughened recess 49 (i.e., does not have the roughened recess 49).
[0076] As described above, this embodiment makes it possible to improve the adhesion between the metal wiring board and the sealing resin. Furthermore, it is possible to improve the bonding strength between the semiconductor element and the metal wiring board while ensuring sufficient thickness of the bonding material.
[0077] Although this embodiment and its variations have been described, other embodiments may be combinations of the above embodiment and its variations, either entirely or partially.
[0078] Furthermore, in the above embodiment, the number and placement of semiconductor elements are not limited to the above configuration and can be changed as appropriate.
[0079] Furthermore, in the above embodiment, the number and layout of the circuit boards are not limited to the above configuration and can be changed as appropriate.
[0080] Furthermore, although the above embodiment describes a configuration in which the laminated substrate and semiconductor elements are formed in a rectangular or square shape in plan view, the configuration is not limited to this. These configurations may be formed in polygonal shapes other than those described above.
[0081] Furthermore, this embodiment is not limited to the embodiments and modifications described above, and may be modified, substituted, or transformed in various ways without departing from the spirit of the technical idea. Moreover, if the technical idea can be realized in a different way by advances in the technology or by other derived technologies, it may be implemented by that method. Accordingly, the claims cover all embodiments that may fall within the scope of the technical idea.
[0082] The key features of the above embodiment are summarized below. The semiconductor module according to the above embodiment comprises a laminated substrate on which a plurality of circuit boards are arranged on the upper surface of an insulating board, a semiconductor element arranged on the upper surface of at least one of the circuit boards, and a metal wiring board arranged on the upper surface of the semiconductor element, wherein the metal wiring board has a first joint portion joined to the upper surface of the semiconductor element via a bonding material, and the first joint portion includes a plate-like portion having an upper surface and a lower surface, and the upper surface of the plate-like portion has at least one groove provided along the outer circumference of the first joint portion.
[0083] Furthermore, the upper surface of the plate-like portion has a plurality of roughening recesses located inside the grooves, which roughen the upper surface.
[0084] Furthermore, the upper surface of the plate-like portion has a non-roughened region that does not have the roughened recess, and one or more rows of grooves are arranged on the outer periphery side of the non-roughened region.
[0085] Furthermore, it has another groove located inside the upper surface of the first joint, relative to the aforementioned groove.
[0086] Furthermore, the aforementioned metal wiring board has a second joint portion joined to the upper surface of another circuit board via a bonding material, and a connecting portion connecting the first joint portion and the second joint portion, and the groove is arranged along at least the tip side of the first joint portion opposite to the connecting portion. [Industrial applicability]
[0087] As described above, the present invention has the effect of improving the adhesion between the joint portion of a metal wiring board and the sealing resin, and is particularly useful for semiconductor modules used in industrial or electrical equipment.
[0088] This application is based on Japanese Patent Application No. 2022-177076, filed on November 4, 2022. All of its contents are included here. [Explanation of Symbols]
[0089] 1: Semiconductor module 2: Multilayer substrate 3: Semiconductor elements 4:Metal wiring board 5: Sealing resin 10:Cooler 11: Case 20: Insulating board 21: Heat sink 22: Circuit board 40: 1st joint 41:Second joint 42:Connection part 43: 1st bending part 44:Second bending part 45: Boss 46: Bottom hole (non-roughened area) 47: Boss 48:Bottomed hole 49: Roughened recesses 50: Groove 51: The Second Groove 52: The Third Groove 53: Groove 60: Main terminal 61: Control terminal 100: Semiconductor Device F: Coating film S1: Bonding material S2: Bonding material S3: Joining material S4: Joining material Z1: Groove depth W1: Groove opening width
Claims
[Claim 1] A laminated substrate in which multiple circuit boards are arranged on the upper surface of an insulating board, A semiconductor element disposed on the upper surface of at least one of the circuit boards, The semiconductor element comprises a metal wiring board disposed on the upper surface of the semiconductor element, The metal wiring board has a first joint portion joined to the upper surface of the semiconductor element via a first bonding material, a second joint portion joined to the upper surface of another circuit board via a second bonding material, and a connecting portion that connects the first joint portion and the second joint portion. The first joint portion includes a plate-like portion having an upper surface and a lower surface, The end of the first joint on the connecting portion side is formed with a first bent portion that bends at approximately a right angle and rises upward. The first joint has a tip outer edge at the end opposite to the connecting portion, and a boundary portion at the end opposite to the tip outer edge that forms the boundary with the first bent portion. The upper surface of the plate-like portion has a first groove, a second groove, a plurality of third grooves, a first bottomed hole, a second bottomed hole, and a plurality of roughened recesses. The first groove is located between the outer edge of the tip and the first bottomed hole near the outer edge of the tip. The second groove is located between the boundary and the second bottomed hole near the boundary. The plurality of third grooves are located between the first groove and the second groove, The space between each of the plurality of third grooves is a roughened region in which the plurality of roughened recesses are formed. A semiconductor module in which bosses are formed on the lower surface of the plate-like portion at locations corresponding to the first and second bottomed holes, respectively.
Citation Information
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