Display module and display apparatus having same
Patent Information
- Application Number
- PCT/KR2024/009297
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-09-01
- Filing Date
- 2024-07-02
- Publication Date
- 2025-03-06
Smart Images

Figure KR2024009297_06032025_PF_FP_ABST
Abstract
Description
Display module and display device including the same
[0001] The present invention relates to a display module that implements an image using an inorganic light-emitting element and a display device including the same.
[0002] Display devices can be divided into self-emissive displays, in which each pixel emits light by itself, and photoluminescent displays, which require a separate light source.
[0003] LCD (Liquid Crystal Display) is a typical water-emitting display, and it is structurally complex and has limitations in implementing a thin thickness because it requires a backlight unit that supplies light from the rear of the display panel, a liquid crystal layer that acts as a switch to pass / block light, and a color filter that changes the supplied light into the desired color.
[0004] On the other hand, self-luminous displays, which feature individual light-emitting elements at each pixel, eliminate the need for components like backlight units and liquid crystal layers, and can even omit color filters. This allows for a simple structure and a high degree of design freedom. Furthermore, they can achieve a thin profile and excellent contrast ratio, brightness, and viewing angle.
[0005] Among self-illuminating displays, micro LED displays are a type of flat panel display comprised of multiple micro-sized LEDs. Compared to LCDs, which require backlighting, micro LED displays offer superior contrast, response time, and energy efficiency.
[0006] Additionally, micro LEDs, which are inorganic light-emitting devices, are brighter, have better luminous efficiency, and have a longer lifespan than OLEDs, which require a separate encapsulation layer to protect the organic material.
[0007] One aspect of the present disclosure can prevent heat generated by supplying voltage to drive an LED from being concentrated in a specific area of a display module.
[0008] One aspect of the present disclosure is to provide uniform image quality by minimizing degradation deviation between elements of a display module.
[0009] The technical problems to be achieved in this document are not limited to the technical problems mentioned above, and other technical problems not mentioned can be clearly understood by a person having ordinary skill in the technical field to which the present invention belongs from the description below.
[0010] A display module according to the invention comprises: a substrate including a glass substrate and at least one layer laminated on the glass substrate; a plurality of light-emitting elements arranged on an upper side of the substrate; a plurality of micro-pixel controllers provided on an upper side of the substrate and driving the plurality of light-emitting elements; a power voltage wiring provided on a lower side of the substrate and receiving a power voltage from a power board; and a reference voltage wiring provided on a lower side of the substrate and receiving a reference voltage from the power board; wherein the glass substrate includes at least one Through Glass Via (TGV) formed in a region remaining except for a region corresponding to the plurality of light-emitting elements and the plurality of micro-pixel controllers, and the power voltage wiring transmits the power voltage to the plurality of micro-pixel controllers provided on an upper side of the substrate through the at least one Through Glass Via, and the reference voltage wiring transmits the reference voltage to the plurality of micro-pixel controllers provided on an upper side of the substrate through the at least one Through Glass Via.
[0011] A display device according to the invention comprises: a substrate including a glass substrate and at least one layer laminated on the glass substrate; a plurality of light-emitting elements arranged on an upper side of the substrate; a plurality of micro-pixel controllers provided on an upper side of the substrate and driving the plurality of light-emitting elements; a power voltage wiring provided on a lower side of the substrate and receiving a power voltage; and a reference voltage wiring provided on a lower side of the substrate and receiving a reference voltage; a display module including: And a power board that supplies the power voltage to the power voltage wiring and supplies the reference voltage to the reference voltage wiring; wherein the glass substrate includes at least one Through Glass Via (TGV) formed in a region remaining except for a region corresponding to the plurality of light-emitting elements and the plurality of micro-pixel controllers, and the power voltage wiring can transmit the power voltage to the plurality of micro-pixel controllers provided on the upper side of the substrate through the at least one Through Glass Via electrode, and the reference voltage wiring can transmit the reference voltage to the plurality of micro-pixel controllers provided on the upper side of the substrate through the at least one Through Glass Via electrode.
[0012] According to the present disclosure, heat generated by supplying voltage to drive an LED can be prevented from being concentrated in a specific area of a display module.
[0013] According to the present disclosure, uniform image quality can be provided by minimizing deterioration deviation between elements of a display module.
[0014] FIG. 1 is a perspective view showing an example of a display module and a display device including the same according to one embodiment.
[0015] FIG. 2 is a drawing showing an example of a pixel array constituting a unit module of a display device according to one embodiment.
[0016] Figures 3 and 4 are control block diagrams of a display device according to one embodiment.
[0017] FIGS. 5 and 6 are drawings showing examples of the arrangement of micro pixel controllers in a display module according to one embodiment.
[0018] FIG. 7 is a schematic diagram illustrating a basic circuit structure required for a micro pixel controller to supply driving current to pixels in a display module according to one embodiment.
[0019] Fig. 8 is a cross-sectional view showing the laminated structure of a substrate in a display module according to one embodiment.
[0020] FIG. 9 is a plan view showing the back surface of a second buffer layer provided on the lower side of a glass substrate in a display module according to one embodiment.
[0021] FIG. 10 is a plan view showing the back surface of an insulating layer provided on the lower side of a second buffer layer in a display module according to one embodiment.
[0022] FIG. 11 is a plan view of a display module according to one embodiment, viewed from the upper side of the substrate.
[0023] FIG. 12 is a plan view of a display module according to one embodiment, viewed from the upper side of the substrate.
[0024] FIGS. 13 and 14 are diagrams showing examples of signals transmitted to a plurality of tiled display modules in a display device according to one embodiment.
[0025] FIG. 15 is a drawing showing an example of a method in which a plurality of display modules are coupled to a main body in a display device according to one embodiment.
[0026] FIG. 16 is a diagram illustrating an example of BM processing performed on a display module according to one embodiment.
[0027] FIG. 17 is a diagram illustrating an example of BM processing performed on a display device according to one embodiment.
[0028] The embodiments described in this specification and the configurations illustrated in the drawings are merely preferred examples of the disclosed invention, and there may be various modified examples that can replace the embodiments and drawings of this specification at the time of filing of this application.
[0029] The terminology used herein is for the purpose of describing embodiments only and is not intended to limit and / or restrict the disclosed invention.
[0030] For example, in this specification, a singular expression may include a plural expression unless the context clearly indicates otherwise.
[0031] In this document, each of the phrases "A or B", "at least one of A and B", "at least one of A or B", "A, B, or C", "at least one of A, B, and C", and "at least one of A, B, or C" may include any one of the items listed together in that phrase, or all possible combinations thereof.
[0032] The term "and / or" includes any combination of a plurality of related described elements or any one of a plurality of related described elements.
[0033] Terms such as "first," "second," or "first" or "second" may be used simply to distinguish one component from another and do not qualify the components in any other respect (e.g., importance or order).
[0034] When a component (e.g., a first component) is referred to as being "coupled" or "connected" to another component (e.g., a second component), with or without the terms "functionally" or "communicatively," it means that the component can be connected to the other component directly (e.g., wired), wirelessly, or through a third component.
[0035] The terms "include" or "have" are intended to specify the presence of a feature, number, step, operation, component, part or combination thereof described in this document, but do not preclude the presence or addition of one or more other features, numbers, steps, operations, components, parts or combinations thereof.
[0036] When a component is said to be “connected,” “coupled,” “supported,” or “in contact with” another component, this includes not only cases where the components are directly connected, coupled, supported, or in contact, but also cases where the components are indirectly connected, coupled, supported, or in contact through a third component.
[0037] When we say that a component is "on top of" and "below" another component, this includes not only cases where the component is in contact with the other component, but also cases where there is another component between the two components.
[0038] Additionally, terms such as "~part", "~device", "~block", "~absence", and "~module" may refer to a unit that processes at least one function or operation. For example, the terms may refer to at least one hardware such as an FPGA (field-programmable gate array) / ASIC (application specific integrated circuit), at least one software stored in a memory, or at least one process processed by a processor.
[0039] Hereinafter, embodiments of a display module and a display device including the same according to various embodiments will be specifically described with reference to the attached drawings.
[0040] FIG. 1 is a perspective view showing an example of a display module and a display device including the same according to one embodiment, and FIG. 2 is a drawing showing an example of a pixel array constituting a unit module of a display device according to one embodiment.
[0041] According to one embodiment, the display device is a self-luminous display device in which light-emitting elements are arranged in each pixel, enabling each pixel to emit light on its own. Therefore, unlike liquid crystal display devices, it does not require components such as a backlight unit or liquid crystal layer, enabling a thin thickness, and its simple structure allows for various design changes.
[0042] In addition, a display device according to one embodiment may employ an inorganic light-emitting element, such as an inorganic light-emitting diode (ILD), as a light-emitting element arranged in each pixel. Inorganic light-emitting elements have a faster response speed than organic light-emitting elements, such as OLED (Organic Light Emitting Diode), and can implement high brightness with low power consumption.
[0043] In addition, unlike organic light-emitting devices, which are vulnerable to moisture and oxygen exposure, require a sealing process, and have low durability, the inorganic light-emitting device does not require a sealing process and is highly durable. Hereinafter, the inorganic light-emitting device mentioned in the examples described below refers to an inorganic light-emitting diode.
[0044] In one embodiment, the inorganic light-emitting element employed in the display device may be a micro LED having a short side length of approximately 100 μm, tens of μm, or several μm. By employing micro LEDs in this manner, pixel sizes can be reduced and high resolution can be achieved even within the same screen size.
[0045] Furthermore, manufacturing LED chips in micron-scale sizes can address the inherent problem of inorganic materials breaking when bent. This means that when micro LED chips are transferred to a flexible substrate, even if the substrate bends, the LED chips won't break, making flexible display devices possible.
[0046] Display devices employing micro LEDs can be applied to various fields by taking advantage of their ultra-small pixel size and thin thickness. For example, as illustrated in FIG. 1, a large-area screen can be implemented by tiling multiple display modules (10) onto which multiple micro LEDs are transferred and fixing them to a main body (20). Such a large-area screen display device (1) can be used as signage, an electronic bulletin board, etc.
[0047] Meanwhile, the three-dimensional coordinate system of the XYZ axes illustrated in Fig. 1 is based on the display device (1), and the plane on which the screen of the display device (1) is located is the XZ plane, and the direction in which the image is output or the light-emitting direction of the inorganic light-emitting element is the +Y direction. Since the coordinate system is based on the display device (1), the same coordinate system can be applied whether the display device (1) is lying down or standing up.
[0048] Generally, the display device (1) is used in a standing position, and the user views the image from the front of the display device (1), so the +Y direction in which the image is output can be called the front, and the opposite direction can be called the rear.
[0049] In addition, the display device (1) is generally manufactured in a lying state. Therefore, it is also possible to refer to the -Y direction of the display device (1) as the downward direction and the +Y direction as the upward direction. That is, in the embodiment described below, the +Y direction may be referred to as the upward direction or forward, and the -Y direction may be referred to as the downward direction or rear.
[0050] Except for the top and bottom surfaces of a flat-type display device (1) or display module (10), the remaining four surfaces are all referred to as side surfaces, regardless of the position of the display device (1) or display module (10).
[0051] In the example of Fig. 1, a case is illustrated where a display device (1) includes a plurality of display modules to implement a large-area screen, but the embodiment of the display device (1) is not limited thereto. It is also possible for the display device (1) to be implemented as a TV, wearable device, portable device, PC monitor, etc., including a single display module (10).
[0052] Referring to FIG. 2, the display module (10) may include a plurality of pixels arranged in a two-dimensional manner, i.e., an M x N (M, N are integers greater than or equal to 2) array of pixels. FIG. 2 conceptually illustrates the pixel array, and it is to be understood that, in addition to the active area where pixels are arranged in the display module (10), a bezel area or wiring area where no image is displayed may also be located.
[0053] In the present embodiment, the fact that certain components are arranged two-dimensionally may include not only cases where the components are arranged on the same plane, but also cases where the components are arranged on different planes that are parallel to each other. Furthermore, cases where the components are arranged on the same plane do not necessarily require that the tops of the arranged components be located on the same plane, and cases where the tops of the arranged components are located on different planes that are parallel to each other may also be included.
[0054] A pixel (P) may include a plurality of sub-pixels that output light of different colors to implement various colors by color combinations. For example, it may be composed of at least three sub-pixels that output light of different colors. Specifically, the pixel (P) may be composed of three sub-pixels (SP(R), SP(G), SP(B)) corresponding to R, G, and B, respectively. Here, a red sub-pixel (SP(R)) may output red light, a green sub-pixel (SP(G)) may output green light, and a blue sub-pixel (SP(B)) may output blue light.
[0055] However, the pixel arrangement of FIG. 2 is merely an example that can be applied to a display module (10) and a display device (1) according to one embodiment, and the sub-pixels may be arranged along the X-axis direction, may not be arranged in a row, and may be implemented with different sizes of the sub-pixels. A single pixel only needs to include multiple sub-pixels to implement various colors, and there are no restrictions on the size or arrangement method of each sub-pixel.
[0056] In addition, a pixel (P) does not necessarily have to be composed of a red sub-pixel (SP(R)) that outputs red light, a green sub-pixel (SP(G)) that outputs green light, and a blue sub-pixel (SP(B)) that outputs blue light, and it is also possible to include a sub-pixel that outputs yellow light or white light. In other words, there are no restrictions on the color or type of light output from each sub-pixel, or the number of sub-pixels.
[0057] However, in the embodiments described later, for the sake of specific explanation, an example will be given in which a pixel (P) is composed of a red sub-pixel (SP(R)), a green sub-pixel (SP(G)), and a blue sub-pixel (SP(B)).
[0058] As mentioned above, the display module (10) and the display device (1) according to one embodiment are self-luminous display devices in which each pixel can emit light on its own. Accordingly, inorganic light-emitting elements that emit light of different colors may be arranged in each sub-pixel. For example, a red inorganic light-emitting element may be arranged in a red sub-pixel (SP(R)), a green inorganic light-emitting element may be arranged in a green sub-pixel (SP(G)), and a blue inorganic light-emitting element may be arranged in a blue sub-pixel (SP(B)).
[0059] Accordingly, in the present embodiment, a pixel (P) may represent a cluster including a red inorganic light-emitting element, a green inorganic light-emitting element, and a blue inorganic light-emitting element, and a sub-pixel may represent each inorganic light-emitting element.
[0060] Figures 3 and 4 are control block diagrams of a display device according to one embodiment.
[0061] Referring to FIG. 3, a display device (1) according to one embodiment may include a plurality of display modules (10-1, 10-2, ..., 10-n, where n is an integer greater than or equal to 2), and may include a main controller (300) and a timing controller (500) that control a plurality of display modules (10), a communication unit (430) that communicates with an external device, a source input unit (440) that receives a source image, a speaker (410) that outputs sound, and an input unit (420) that receives a command for controlling the display device (1) from a user.
[0062] The input unit (420) may include a button or a touch pad provided in one area of the display device (1), and when the display panel (100, see FIG. 4) is implemented as a touch screen, the input unit (420) may include a touch pad provided on the front of the display panel (100).
[0063] The input unit (420) can receive various commands from the user to control the display device (1), such as turning the display device (1) on / off, adjusting the volume, adjusting the channel, adjusting the screen, and changing various settings.
[0064] The speaker (410) may be provided in one area of the main body (20), or a separate speaker module physically separated from the main body (20) may be further provided.
[0065] The communication unit (430) can communicate with a relay server or other electronic devices to send and receive necessary data. The communication unit (430) can adopt at least one of various wireless communication methods such as 3G (3rd Generation), 4G (4th Generation), wireless LAN, Wi-Fi, Bluetooth, Zigbee, WFD (Wi-Fi Direct), UWB (Ultra wideband), infrared communication (IrDA; Infrared Data Association), BLE (Bluetooth Low Energy), NFC (Near Field Communication), and Z-Wave. In addition, it is also possible to adopt a wired communication method such as PCI (Peripheral Component Interconnect), PCI-express, and USB (Universe Serial Bus).
[0066] The source input unit (440) can receive a source signal input from a set-top box, USB, antenna, etc. Accordingly, the source input unit (440) can include at least one selected from a group of source input interfaces including an HDMI cable port, a USB port, an antenna, etc.
[0067] The source signal received by the source input unit (440) can be processed by the main controller (300) and converted into a form that can be output by the display panel (100) and speaker (410).
[0068] The main controller (300) and the timing controller (500) may include at least one memory that stores a program and various data for performing the operations described below, and at least one processor that executes the stored program.
[0069] The main controller (300) can process a source signal input through the source input unit (440) to generate a video signal corresponding to the input source signal.
[0070] For example, the main controller (300) may include a source decoder, a scaler, an image enhancer, and a graphics processor. The source decoder may decode a source signal compressed in a format such as MPEG, and the scaler may output image data of a desired resolution through resolution conversion.
[0071] Image enhancers can improve the image quality of image data by applying various correction techniques. A graphics processor can distinguish pixels of image data into RGB data and output them along with control signals, such as a synchronization signal for display timing on a display panel (100). In other words, the main controller (300) can output image data and control signals corresponding to a source signal.
[0072] The operation of the main controller (300) described above is only an example applicable to the display device (1), and it is also possible to perform other operations or omit some of the operations described above.
[0073] Image data and control signals output from the main controller (300) can be transmitted to the timing controller (500).
[0074] The timing controller (500) can convert image data transmitted from the main controller (300) into image data in a form that can be processed by the driver IC (200, see FIG. 4) and generate various control signals, such as timing control signals, necessary to display the image data on the display panel (100).
[0075] Although a display device (1) according to one embodiment does not necessarily have to include a plurality of display modules (10), in the embodiment described below, for the sake of specific explanation, a display device (1) including a plurality of display modules (10) will be used as an example to specifically explain the operation of each component.
[0076] Referring to FIG. 4, each of the plurality of display modules (10-1, 10-2, ..., 10-n) may include a display panel (100) that displays an image and a driver IC (200) that drives the display panel (100).
[0077] The display panel (100) may include a plurality of pixels arranged in two dimensions as described above, and each pixel may be composed of a plurality of sub-pixels to implement various colors.
[0078] In addition, as previously mentioned, the display device (1) according to one embodiment is a self-luminous display device in which each pixel can emit light on its own. Accordingly, an inorganic light-emitting element (120) may be arranged in each sub-pixel. That is, each of the plurality of pixels may be composed of two or more inorganic light-emitting elements (120).
[0079] Each inorganic light-emitting element (120) can be driven by an AM (Active Matrix) method or a PM (Passive Matrix) method. However, in the embodiment described below, for the sake of specific explanation, a case in which the inorganic light-emitting element (120) is driven by an AM method will be described as an example.
[0080] In a display module (10) according to one embodiment, each inorganic light emitting element (120) can be individually controlled by a micro pixel controller (130), and the micro pixel controller (130) can operate based on a driving signal output from a driver IC (200) or a timing control signal output from a timing controller (500).
[0081] FIGS. 5 and 6 are drawings showing examples of the arrangement of micro pixel controllers in a display module according to one embodiment.
[0082] Referring to FIG. 5, a plurality of pixels (P) are arranged two-dimensionally on the upper side of the substrate (110), and the micro pixel controller (130) can be placed in a space on the upper side of the substrate (110) where no pixels (P) are placed.
[0083] When arranging a plurality of pixels (P) on a substrate (110), the pixel spacing (PP) between adjacent pixels located in the upper, lower, left, and right directions can all be maintained identically. In the present embodiment, the fact that certain values are identical may include not only cases where the values are completely identical, but also cases where the values are identical within a certain error range.
[0084] Pixel spacing (PP) may be referred to as pixel pitch, and in the present embodiment, pixel spacing (PP) is defined as the distance from the center of one pixel to the center of an adjacent pixel. However, the embodiment of the display module (10) is not limited thereto, and other definitions of pixel spacing (PP) may be applied.
[0085] One micro pixel controller (130) can control two or more pixels (P), and the micro pixel controller (130) can be placed in a space between two or more pixels (P). In the example of FIG. 5, a case in which one micro pixel controller (130) controls four pixels (P) is illustrated, but the embodiment of the display module (10) is not limited thereto, and there is no limitation on the number of pixels (P) controlled by the micro pixel controller (130).
[0086] For example, when the micro pixel controller (130) has a rectangular parallelepiped shape, the length (L) of the short side of the upper or lower surface of the micro pixel controller (130) may be provided in an ultra-small size that is shorter than the distance (D) between the boundaries of adjacent pixels (P), and the short side of the micro pixel controller (130) may be arranged parallel to a vertical line indicating the shortest distance between two adjacent pixels (P). Here, the distance (D) between the boundaries of adjacent pixels (P) may mean the distance between inorganic light emitting elements (120) included in different pixels (P) among adjacent inorganic light emitting elements (120).
[0087] That is, the micro pixel controller (130) can be placed without affecting the spacing between multiple pixels (P). Therefore, even if the micro pixel controller (130) is placed between pixels (P), the spacing between pixels (P) can be minimized, thereby achieving high resolution within the same area.
[0088] Meanwhile, when one micro pixel controller (130) controls pixels (P) in an array of mx 2 (m is an integer greater than or equal to 1), the micro pixel controller (130) may be placed between two columns in which the pixels (P) to be controlled (hereinafter, used interchangeably with the term “target pixel”) are placed, as illustrated in FIG. 6.
[0089] Alternatively, when one micro pixel controller (130) controls pixels (P) in a 2 x n (n is an integer greater than or equal to 1) array, it is also possible for the pixels (P) controlled by the micro pixel controller (130) to be arranged between two rows.
[0090] Figure 6 is an enlarged drawing showing a micro pixel controller that controls pixels in a 2 x 2 array and the arrangement of the target pixels of the control.
[0091] Referring to FIG. 6, the micro pixel controller (130) can be placed in at least one of the pixel areas (PA1, PA2, PA3, PA4) of the four pixels (P1, P2, P3, P4) that it controls. In the present embodiment, the pixel area is an area where each pixel is located, and when the active area of the display panel (100) is divided into an array (M x N) identical to the array of pixels, an area where each pixel is included can be defined as the pixel area of the corresponding pixel.
[0092] Specifically, the micro pixel controller (130) may be placed in one of the pixel areas (PA1, PA2, PA3, PA4) of the pixels it controls, may be placed across two of these areas, may be placed across three of these areas, or may be placed across four of these areas as illustrated in FIG. 6.
[0093] Alternatively, the micro pixel controller (130) may be placed at the center of the entire pixel area (PW), that is, an area that combines the pixel areas (PA1, PA2, PA3, PA4) of the four pixels (P1, P2, P3, P4) that it controls.
[0094] When the micro pixel controller (130) is arranged as described above, it can efficiently supply driving current to a plurality of pixels (P) that it controls. A specific configuration for supplying driving current to the pixels (P) to be controlled will be described later.
[0095] Meanwhile, the micro pixel controller (130) may be electrically connected to a target pixel to control a plurality of pixels (P). In the present embodiment, the electrical connection between the two components may include not only connection through wiring, but also cases where electrically conductive materials are directly soldered or a conductive adhesive is used. As long as current flows between the two connected components, there are no restrictions on the specific connection method.
[0096] For example, when soldering two components, Au-In bonding, Au-Sn bonding, Cu pillar / SnAg bump bonding, Ni pillar / SnAg bump bonding, SnAgCu, SnBi, SnAg solder ball bonding, etc. can be used.
[0097] In addition, when using a conductive adhesive, a conductive adhesive such as an anisotropic conductive film (ACF) or an anisotropic conductive paste (ACP) can be placed between two components and pressure applied to cause current to flow in the direction in which the pressure is applied.
[0098] FIG. 7 is a schematic diagram illustrating a basic circuit structure required for a micro pixel controller to supply driving current to pixels in a display module according to one embodiment.
[0099] Referring to FIG. 7, the driver IC (200) may include a scan driver (210) and a data driver (220). The scan driver (210) may output a gate signal for turning on / off a sub-pixel, and the data driver (220) may output a data signal for implementing an image.
[0100] The scan driver (210) can generate a gate signal based on a timing control signal transmitted from the timing controller (500), and the data driver (220) can generate a data signal based on image data transmitted from the timing controller (500). The gate signal is a gate voltage (V) for turning on a sub-pixel. GATE ) may include a data voltage (V) representing the grayscale of the image. DATA ) may be included.
[0101] The scan driver (210) can be formed on the upper side of the substrate (110) in a gate-in-panel manner according to various design changes, and can output a gate signal.
[0102] The micro pixel controller (130) may include a pixel circuit (131P) for individually controlling each inorganic light emitting element (120), and a gate signal output from a scan driver (210) and a data signal output from a data driver (220) may be input to the pixel circuit (131P).
[0103] For example, the gate voltage (V) in the pixel circuit (131P) GATE ), data voltage (V DATA ) and power voltage is input, the pixel circuit (131P) supplies a driving current (I) for driving the inorganic light emitting element (120). D ) can be printed.
[0104] The driving current (I) output from the pixel circuit (131P) D ) can be input to the inorganic light-emitting element (120), and the inorganic light-emitting element (120) can be input to the input driving current (I D ) can be used to create images.
[0105] Constant voltage includes the power supply voltage and the reference voltage. The power supply voltage is the voltage supplied to the pixel circuit (131P). As described above, when the power supply voltage is supplied to the pixel circuit (131P), the pixel circuit (131P) generates a driving current (I D ) can be output. The reference voltage can be applied to the cathode (125b) of the inorganic light-emitting element (120).
[0106] Fig. 8 is a cross-sectional view showing the laminated structure of a substrate in a display module according to one embodiment.
[0107] Referring to FIG. 8, the substrate (110) may include a glass substrate (113), a first buffer layer (114), a thin film transistor layer (TFT layer) (115), and a planarization layer (116). The upper side of the glass substrate (113) may refer to the +Y direction, and the lower side of the glass substrate (113) may refer to the -Y direction.
[0108] The glass substrate (113) may include a Through Glass Via (TGV) (123). The Through Glass Via (TGV) (123) may be formed through various etching techniques, such as etching using a corrosive solution (e.g., hydrofluoric acid, etc.) or etching using a laser (e.g., laser induced etching; LIE, laser induced deep etching; LIDE), by plating the inner wall of a hole penetrating the glass substrate (113) with a conductive material (e.g., copper) and then filling the hole with a filling material (VIA filling).
[0109] The glass via electrode (123) can transmit an electrical signal received from the lower side of the glass substrate (113) to a substrate via hole (124) provided on the upper side of the glass substrate (113).
[0110] Specifically, the glass through-hole electrode (123) may include a reference voltage glass through-hole electrode (123a) and a power voltage glass through-hole electrode (123b). The reference voltage glass through-hole electrode (123a) may transmit a reference voltage received from a reference voltage line (VDD, see FIG. 9) provided on the lower side of the glass substrate (113) to a substrate reference voltage via hole (124a) provided on the upper side of the glass substrate (113), and the power voltage glass through-hole electrode (123b) may transmit a power voltage received from a power voltage line (VSS, see FIG. 10) provided on the lower side of the glass substrate (113) to a substrate power voltage via hole (124b) provided on the upper side of the glass substrate (113).
[0111] A first buffer layer (114) can be formed on the upper surface of a glass substrate (113), and a TFT layer (115) can be formed on the upper surface of the first buffer layer (114).
[0112] The first buffer layer (114) can provide a flat surface on the upper part of the glass substrate (113) and can block foreign substances or moisture from penetrating through the glass substrate (113). For example, the first buffer layer (114) can contain an inorganic material such as silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, aluminum nitride, titanium oxide, or titanium nitride, or an organic material such as polyimide, polyester, or acrylic, and can also be formed as a plurality of laminates of the exemplified materials.
[0113] The first buffer layer (114) may include a substrate via hole (124). The substrate via hole (124) may transmit an electrical signal received from the lower side of the first buffer layer (114) to a static voltage electrode (160) provided on the upper side of the first buffer layer (114).
[0114] Specifically, the substrate via hole (124) may include a substrate reference voltage via hole (124a) and a substrate power voltage via hole (124b). The substrate reference voltage via hole (124a) may transmit a reference voltage received from the reference voltage glass-through electrode (123b) to the constant voltage electrode (160), and the substrate power voltage via hole (124b) may transmit a power voltage received from the power voltage glass-through electrode (123b) to the constant voltage electrode (160).
[0115] The first buffer layer (114) may include a data wire (163) and a gate wire (164). The data wire (163) may transmit a data signal supplied from a data driver (220) to the micro pixel controller (130). The gate wire (164) may transmit a gate signal supplied from a scan driver (210) to the micro pixel controller (130).
[0116] The glass-through electrode (123) is a data wiring area (D DATA ) and gate wiring area (D GATE ) can be formed in areas other than the data wiring area (D DATA ) means an area where data wiring (163) is formed and an area that does not overlap in the vertical direction (+Y to -Y direction) of the substrate (110). Gate wiring area (D GATE ) means an area where the gate wiring (164) is formed and an area that does not overlap in the vertical direction (+Y to -Y direction) of the substrate (110).
[0117] The TFT layer (115) may include a static voltage electrode (160). The static voltage electrode (160) may transmit a static voltage (reference voltage, power voltage) to the micro pixel controller (130).
[0118] The static voltage electrode (160) may include a reference voltage electrode (161) and a power voltage electrode (162). The reference voltage electrode (161) may transmit a reference voltage to the micro pixel controller (130), and the power voltage electrode (162) may transmit a power voltage to the micro pixel controller (130).
[0119] The electrostatic voltage electrode (160) can transmit the electrostatic voltage received from the substrate via hole (124) to the micro pixel controller (130).
[0120] Specifically, the reference voltage electrode (161) can transmit the reference voltage received from the substrate reference voltage via hole (124a) to the micro pixel controller (130), and the power voltage electrode (162) can transmit the power voltage received from the substrate power voltage via hole (124b) to the micro pixel controller (130).
[0121] The TFT layer (115) may include a thin film transistor (TR). The thin film transistor (TR) may receive a data signal from a data wire (163) or a gate signal from a gate wire (164).
[0122] A thin film transistor (TR) receives a power voltage from a power voltage electrode (162) and supplies a driving current (I) to an inorganic light emitting element (120). D ) can be supplied.
[0123] Specifically, a thin film transistor (TR) is electrically connected to the anode (125a) of an inorganic light emitting element (120) and drives a driving current (I D ) can be supplied.
[0124] A thin film transistor (TR) is a component of a pixel circuit (131P) and supplies a driving current (I) to an inorganic light emitting element (120). D ) can be supplied.
[0125] The glass through electrode (123) is a thin film transistor region (D TR) can be formed in the area excluding the thin film transistor area (D TR ) means an area where a thin film transistor (TR) is formed and an area that does not overlap in the vertical direction (+Y to -Y direction) of the substrate (110).
[0126] An inorganic light-emitting element (120) may be arranged on the upper side of the first buffer layer (114). The inorganic light-emitting element (120) may include an anode (125a) and a cathode (125b). The anode (125a) receives a driving current (I) from a thin film transistor (TR). D ) can be supplied. The cathode (125b) can be supplied with a reference voltage from the reference voltage electrode (161).
[0127] The glass-penetrating electrode (123) is an inorganic light-emitting element region (D LED ) can be formed in the area excluding the inorganic light emitting element area (D LED ) means an area where the inorganic light-emitting element (120) is formed and an area that does not overlap in the vertical direction (+Y to -Y direction) of the substrate (110).
[0128] The micropixel controller (130) may be placed above the first buffer layer (114). The micropixel controller (130) may be electrically connected to a data line (163). Specifically, the micropixel controller (130) may receive a data signal from the data line (163).
[0129] The micro pixel controller (130) can be electrically connected to the gate wiring (164). Specifically, the micro pixel controller (130) can receive a gate signal from the gate wiring (164).
[0130] The micro pixel controller (130) may include a pixel circuit (131P). The pixel circuit (131P) may receive a static voltage (reference voltage and power voltage) from a static voltage electrode (160) and drive an inorganic light emitting element (120).
[0131] In addition to the pixel circuit (131P), the micro pixel controller (130) may include various elements (e.g., PWM controller, PAM controller, slope waveform controller, etc.) that control signals for driving the inorganic light emitting element (120).
[0132] The glass penetration electrode (123) can be formed in an area excluding the micro pixel controller (130) area. The area excluding the micro pixel controller (130) area means an area occupied by various elements included in the micro pixel controller (130) and wiring for connecting the elements and an area that does not overlap in the vertical direction (+Y to -Y direction) of the substrate (110).
[0133] A planarization layer (116) may be formed on the upper surface of the TFT layer (115). An inorganic light-emitting element (120) or a micro-pixel controller (130) may be placed on the planarization layer (116).
[0134] The second buffer layer (112) may be formed on the lower surface of the glass substrate (113). The second buffer layer (112) may include a first via hole (122).
[0135] The first via hole (122) can be electrically connected to a constant voltage power line (VSS, VDD). Specifically, the first reference voltage via hole (122a) can receive a reference voltage from the reference voltage line (VSS), and the first power voltage via hole (122b) can receive a power voltage from the power voltage line (VDD).
[0136] The first via hole (122) can be electrically connected to the glass through electrode (123). Specifically, the first reference voltage via hole (122a) can transmit a reference voltage received from the reference voltage line (VSS) to the reference voltage glass through electrode (123a), and the first power voltage via hole (122b) can transmit a power voltage received from the power voltage line (VDD) to the power voltage glass through electrode (123b).
[0137] The second buffer layer (112) can provide a flat surface on the lower portion of the glass substrate (113) and can block foreign substances or moisture from penetrating through the glass substrate (113). For example, the second buffer layer (112) can contain an inorganic material such as silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, aluminum nitride, titanium oxide, or titanium nitride, or an organic material such as polyimide, polyester, or acrylic, and can also be formed as a plurality of laminates of the exemplified materials.
[0138] An insulation layer (111) may be formed on the lower surface of the second buffer layer (112). The insulation layer (111) may include a second via hole (121). The second via hole (121) may be electrically connected to a power voltage wiring (VDD).
[0139] Specifically, the second via hole (121) can transmit the power voltage received from the power voltage wiring (VDD) to the first power voltage via hole (122b).
[0140] Fig. 9 is a plan view showing the back surface of a second buffer layer provided on the lower side of a glass substrate in a display module according to one embodiment. Fig. 10 is a plan view showing the back surface of an insulating layer provided on the lower side of a second buffer layer in a display module according to one embodiment.
[0141] Referring to FIG. 9, the second buffer layer (112) includes a first via hole (122) that is electrically connected to a glass through electrode (123). The first via hole (122) is formed on the lower side of the area where the glass through electrode (123) is formed on the glass substrate (113) and can be electrically connected to the glass through electrode (123).
[0142] Specifically, the first reference voltage via hole (122a) is connected to the reference voltage wiring (VSS) and can transmit the reference voltage received from the reference voltage wiring (VSS) to the reference voltage glass through electrode (123a).
[0143] Accordingly, the reference voltage supplied to the reference voltage wiring (VSS) provided on the lower side of the glass substrate (113) can be transmitted to the micro pixel controller (130) provided on the upper side of the glass substrate (113) through the reference voltage glass-through electrode (123a).
[0144] The first via holes (122) may be arranged in the same column and / or the same row in the second buffer layer (112). For example, a plurality of first via holes (122) may be arranged in an mxn array (m and n are positive integers, and at least one of m and n is 2 or greater) in the second buffer layer (112).
[0145] The first via holes (122) may have the same spacing between adjacent first via holes (122). For example, the spacing (D) between the first via holes (122) arranged at positions corresponding to the first row VSS ) may be the same. For another example, the spacing (D) between the first via holes (122) arranged at positions corresponding to the first row VSS ) may be the same.
[0146] In the present embodiment, the fact that certain values are identical may include not only cases where the values are completely identical, but also cases where the values are identical within a certain error range.
[0147] Referring to FIG. 10, the insulating layer (111) includes a second via hole (121) that is electrically connected to the first via hole (122). The second via hole (121) is formed on the lower side of the area where the first via hole (122) is formed in the second buffer layer (112) and can be electrically connected to the first via hole (122).
[0148] Specifically, the second via hole (121) is connected to the power voltage line (VDD) and can transmit the power voltage received from the power voltage line (VDD) to the first power voltage via hole (122b). The first power voltage via hole (122b) can transmit the power voltage received from the second via hole (121) to the power voltage glass-through electrode (123b).
[0149] Accordingly, the power voltage supplied to the power voltage wiring (VDD) provided on the lower side of the glass substrate (113) can be transmitted to the micro pixel controller (130) provided on the upper side of the glass substrate (113) through the power voltage glass-through electrode (123b).
[0150] The second via holes (121) may be arranged in the same column and / or the same row in the insulating layer (111). For example, a plurality of second via holes (121) may be arranged in an mxn array (m and n are positive integers, and at least one of m and n is 2 or greater) in the insulating layer (111).
[0151] The second via holes (121) may have the same spacing between adjacent second via holes (121). For example, the spacing (D) between second via holes (121) arranged at positions corresponding to the first row VDD ) may be the same. For another example, the spacing (D) between the second via holes (121) arranged at positions corresponding to the first row VDD ) may be the same.
[0152] In the present embodiment, the fact that certain values are identical may include not only cases where the values are completely identical, but also cases where the values are identical within a certain error range.
[0153] However, depending on various design changes, the reference voltage wiring (VSS) and the power voltage wiring (VDD) may be provided in the display module (10) differently from the embodiments described in FIGS. 9 and 10. For example, the first via hole (122) may be electrically connected to the power voltage wiring (VDD) to transmit the power voltage to the through-glass electrode (123), and the second via hole (121) may be electrically connected to the reference voltage wiring (VSS) to transmit the reference voltage to the through-glass electrode (123).
[0154] FIG. 11 is a plan view of a display module according to one embodiment, viewed from the upper side of the substrate.
[0155] Referring to FIG. 11, the micro pixel controller (130) can receive electrical signals from data wiring (163), gate wiring (164), and wiring (165) connecting various elements (e.g., PWM controller, PAM controller, slope waveform controller, etc.) within the micro pixel controller (130).
[0156] The glass penetration electrode (123) can be formed in an area other than the wiring area. The wiring area refers to an area that does not overlap with the area occupied by the data wiring (163), the gate wiring (164), and the wiring (165) connecting various elements within the micro pixel controller (130) in the vertical direction (+Y to -Y direction) of the substrate (110).
[0157] The glass penetration electrode (123) can be formed in an area excluding the entire pixel area (PW). The area excluding the entire pixel area (PW) means an area occupied by the micro pixel controller (130), the inorganic light emitting element (120), and the thin film transistor (TR) and an area that does not overlap in the vertical direction (+Y to -Y direction) of the substrate (110).
[0158] The glass-through electrodes (123) may be arranged in the same column and / or the same row on the substrate (110). For example, a plurality of glass-through electrodes (123) may be arranged in an mxn array on the substrate (110) (m and n are positive integers, and at least one of m and n is 2 or greater).
[0159] The gap between adjacent glass-through electrodes (123) may be the same. For example, the gap (D) between glass-through electrodes (123) arranged at positions corresponding to the first row V ) may be the same. For another example, the spacing (D) between the glass-through electrodes (123) arranged at positions corresponding to the first row V ) may be the same.
[0160] Referring to FIGS. 9 to 11, the second via hole (121), the first via hole (122), and the glass through electrode (123) can be arranged in the same area in the vertical direction (+Y to -Y direction) of the substrate (110), and the spacing (D) between the adjacent first via holes (122) VSS ), the gap (D) between adjacent second via holes (121) VDD ), the gap (D) between adjacent glass-penetrating electrodes (123) V ) may be the same.
[0161] The reference voltage value transmitted through each first reference voltage via hole (122a) and each reference voltage glass-through electrode (123a) may be the same. The power voltage value transmitted through each second via hole (121), the first power voltage via hole (122b), and the power voltage glass-through electrode (123b) may be the same.
[0162] In the present embodiment, the fact that certain values are identical may include not only cases where the values are completely identical, but also cases where the values are identical within a certain error range.
[0163] Heat may be generated when voltage is transmitted through wiring or via holes. The generated heat may be continuously transmitted to elements (e.g., inorganic light-emitting elements (120), thin-film transistors (TRs), etc.) within the display module (10), resulting in deterioration. Deterioration refers to a phenomenon in which the performance of a device deteriorates due to exposure to heat, light, etc.
[0164] If the static voltage (reference voltage and power voltage) is not uniformly transmitted within the display module (10), deterioration deviations may occur between elements within the display module (10).
[0165] According to an embodiment of the present disclosure, by transmitting a uniform voltage to each element within the display module (10), it is possible to minimize the deterioration deviation caused by heat transmitted to each element being concentrated in a specific area.
[0166] FIG. 12 is a plan view of a display module according to one embodiment, viewed from the upper side of the substrate.
[0167] Referring to FIG. 12, the scan driver (210) may be provided on the upper side of the substrate (110) in a Gate In Panel (GIP) manner. GIP refers to a technology that can reduce the complexity of the wiring structure of the display device (1) by placing the scan driver (210) in an area excluding the wiring area.
[0168] The scan driver (210) may include a GIP circuit, and the GIP circuit may transmit a gate signal to the micro pixel controller (130) through the GIP wiring (164).
[0169] The glass penetration electrode (123) can be formed in an area excluding the scan driver (210) and the GIP wiring (164) provided on the upper side of the substrate (110) in the GIP manner. The area excluding the scan driver (210) and the GIP wiring (164) provided on the upper side of the substrate (110) in the GIP manner means an area that does not overlap with the area occupied by the scan driver (210) and the GIP wiring (164) provided on the upper side of the substrate (110) in the GIP manner in the vertical direction (+Y to -Y direction) of the substrate (110).
[0170] FIGS. 13 and 14 are diagrams showing examples of signals transmitted to a plurality of tiled display modules in a display device according to one embodiment.
[0171] As described above, a plurality of display modules (10-1, 10-2, ..., 10-n) can be tiled to implement a display device (1) having a large-area screen. Since FIGS. 13 and 14 are drawings illustrating a display device (1) on an XY plane, only a one-dimensional arrangement of display modules (10-1, 10-2, ..., 10-P) is shown. However, as described above with reference to FIG. 1, it is also possible for a plurality of display modules (10-1, 10-2, ..., 10-n) to be arranged in a two-dimensional manner.
[0172] The display panel (100) can be connected to the FPCB through a film on which the driver IC (200) is mounted. The FPCB can be connected to the driving board (501) to electrically connect the display module (10) to the driving board (501).
[0173] A timing controller (500) may be provided on the driving board (501). Accordingly, the driving board (501) may also be referred to as a T-con board. A plurality of display modules (10-1, 10-2, ..., 10-n) may receive image data, timing control signals, etc. from the driving board (501).
[0174] Referring to FIG. 14, the display device (1) may further include a main board (301) and a power board (601). The main board (301) may be provided with the aforementioned main controller (300), and the power board (601) may be provided with a power circuit necessary to supply power to a plurality of display modules (10-1, 10-2, ..., 10-n).
[0175] The power board (601) can be electrically connected to a plurality of display modules (10-1, 10-2, ..., 10-n) through an FPCB, and can supply a power voltage, a reference voltage, etc. to a plurality of display modules (10-1, 10-2, ..., 10-n) connected through the FPCB.
[0176] For example, the power voltage supplied from the power board (601) can be applied to the microcontroller (130) through the power voltage wire (VDD), the second via hole (121), the first power voltage via hole (122b), the power voltage glass-through electrode (123b), the substrate power voltage via hole (124b), and the power voltage electrode (162). The reference voltage supplied from the power board (601) can be applied to the micropixel controller (130) or the inorganic light emitting element (120) through the power voltage wire (VSS), the first reference voltage via hole (122a), the reference voltage glass-through electrode (123a), the substrate reference voltage via hole (124a), and the reference voltage electrode (161).
[0177] In the above example, it has been described that multiple display modules (10-1, 10-2, ..., 10-n) share a driving board (501), but it is also possible to connect a separate driving board (501) to each individual display module (10). Alternatively, it is also possible to group multiple display modules (10-1, 10-2, ..., 10-n) and connect one driving board (501) per group.
[0178] FIG. 15 is a drawing showing an example of a method in which a plurality of display modules are coupled to a main body in a display device according to one embodiment.
[0179] As described above, a plurality of display modules (10) may be arranged in a two-dimensional matrix form and fixed to the main body (20). Referring to the example of FIG. 15, a plurality of display modules (10) may be installed in a frame (21) positioned below the frame, and the frame (21) may have a two-dimensional mesh structure in which some areas corresponding to the plurality of display modules (10) are open.
[0180] Specifically, the frame (21) may be formed with as many openings (21H) as the number of display modules (10), and the openings (21H) may have the same arrangement as the plurality of display modules (10).
[0181] Each of the plurality of display modules (10) may have a bottom edge area mounted on a frame (21). The bottom edge area may be an area where no circuit elements or wiring are formed.
[0182] A plurality of display modules (10) can be mounted on the frame (21) by using magnetic force, being joined by a mechanical structure, or being bonded by an adhesive. There is no limitation on the method by which the display modules (10) are mounted on the frame (21).
[0183] The drive board (501), main board (301), and power board (601) can be placed at the bottom of the frame (21), and can be electrically connected to a plurality of display modules (10) through openings (21H) formed in the frame (21).
[0184] A lower cover (22) is attached to the lower part of the frame (21), and the lower cover (22) can form the lower surface appearance of the display device (1).
[0185] In the above example, the case where the display modules (10) are arranged in two dimensions was taken as an example, but it is also possible for the display modules (10) to be arranged in one dimension, and in this case, the structure of the frame (21) can also be transformed into a one-dimensional mesh structure.
[0186] In addition, the shape of the frame (21) described above is only an example applicable to embodiments of the display device, and the display module (10) can be fixed by applying frames (21) of various shapes.
[0187] FIG. 16 is a drawing showing an example of BM processing performed on a display module according to one embodiment, and FIG. 17 is a drawing showing an example of BM processing performed on a display device according to one embodiment.
[0188] Referring to FIG. 16, a black matrix (BM) process may be performed on the display module (10) to block unnecessary light other than light required for image implementation, prevent light from being reflected in the gap between pixels, and improve contrast.
[0189] For example, a black matrix layer (BM1) can be formed on the upper surface of the substrate (110) by applying one of various BM processing methods, such as printing black ink on the upper surface of the substrate (110), performing patterning using a black photosensitive material, or using a black ACF when mounting an inorganic light-emitting element (120) on the substrate (110). At this time, a black matrix layer (BM1) can also be formed on the upper surface of the micro pixel controller (130) to prevent the micro pixel controller (130) from being recognized or from reflecting light.
[0190] Referring to Fig. 17, when a display device (1) is implemented by tiling a plurality of display modules (10), BM processing can also be performed on the space between the display modules (10). For example, by forming a side member (BM2) made of a material that absorbs light on each side of the plurality of display modules (10-1 to 10-6), particularly on a side adjacent to another display module (10), light reflection in the gap between the modules can be prevented and a seamless effect can be implemented.
[0191] The display module of the present disclosure comprises a substrate including a glass substrate and at least one layer laminated on the glass substrate; a plurality of light-emitting elements arranged on an upper side of the substrate; a plurality of micro-pixel controllers provided on an upper side of the substrate and driving the plurality of light-emitting elements; a power voltage wiring provided on a lower side of the substrate and receiving a power voltage from a power board; and a reference voltage wiring provided on a lower side of the substrate and receiving a reference voltage from the power board; wherein the glass substrate includes at least one Through Glass Via (TGV) formed in a region remaining except for a region corresponding to the plurality of light-emitting elements and the plurality of micro-pixel controllers, and the power voltage wiring transmits the power voltage to the plurality of micro-pixel controllers provided on an upper side of the substrate through the at least one Through Glass Via, and the reference voltage wiring transmits the reference voltage to the plurality of micro-pixel controllers provided on an upper side of the substrate through the at least one Through Glass Via.
[0192] The at least one glass-through electrode may include a plurality of glass-through electrodes arranged in the same row.
[0193] The at least one glass-through electrode may include a plurality of glass-through electrodes arranged in the same row.
[0194] The at least one glass-through electrode may include a plurality of glass-through electrodes having the same spacing between adjacent glass-through electrodes.
[0195] The at least one layer may include data wiring for transmitting a data signal to the plurality of micropixel controllers; and gate wiring for transmitting a gate signal to the plurality of micropixel controllers.
[0196] The above glass-penetrating electrode can be formed in an area other than an area corresponding to the data wiring and gate wiring.
[0197] The at least one layer includes a thin film transistor layer (TFT layer) including a plurality of thin film transistors, and the glass through electrode can be formed in a remaining area excluding an area corresponding to the plurality of thin film transistors.
[0198] The at least one layer may include a layer including a GIP (Gate in panel) wiring that transmits a gate signal to the plurality of micro pixel controllers, and the glass-through electrode may be formed in a remaining area excluding an area corresponding to the GIP wiring.
[0199] The glass substrate may further include a buffer layer provided on the lower side, and the buffer layer may include at least one first via hole electrically connected to the at least one glass through-hole electrode.
[0200] The buffer layer may further include an insulating layer provided on the lower side, and the insulating layer may include at least one second via hole for electrically connecting the power voltage wiring or the reference voltage wiring with the at least one first via hole.
[0201] The display device of the present disclosure comprises a display module including a substrate including a glass substrate and at least one layer laminated on the glass substrate; a plurality of light-emitting elements arranged on an upper side of the substrate; a plurality of micro-pixel controllers provided on an upper side of the substrate and driving the plurality of light-emitting elements; a power voltage wiring provided on a lower side of the substrate and receiving a power voltage; and a reference voltage wiring provided on a lower side of the substrate and receiving a reference voltage. And a power board that supplies the power voltage to the power voltage wiring and supplies the reference voltage to the reference voltage wiring; wherein the glass substrate includes at least one Through Glass Via (TGV) formed in a region remaining except for a region corresponding to the plurality of light-emitting elements and the plurality of micro-pixel controllers, and the power voltage wiring can transmit the power voltage to the plurality of micro-pixel controllers provided on the upper side of the substrate through the at least one Through Glass Via electrode, and the reference voltage wiring can transmit the reference voltage to the plurality of micro-pixel controllers provided on the upper side of the substrate through the at least one Through Glass Via electrode.
[0202] The at least one glass penetrating electrode may include a plurality of glass penetrating electrodes arranged in the same row.
[0203] The at least one glass penetrating electrode may include a plurality of glass penetrating electrodes arranged in the same row.
[0204] The at least one glass-through electrode may include a plurality of glass-through electrodes having the same spacing between adjacent glass-through electrodes.
[0205] The at least one layer may include data wiring for transmitting a data signal to the plurality of micropixel controllers; and gate wiring for transmitting a gate signal to the plurality of micropixel controllers.
[0206] The above glass-penetrating electrode can be formed in an area other than an area corresponding to the data wiring and gate wiring.
[0207] The at least one layer may include a thin film transistor layer including a plurality of thin film transistors, and the glass through electrode may be formed in a remaining area excluding an area corresponding to the plurality of thin film transistors.
[0208] The at least one layer may include a gate layer including a GIP (Gate in panel) wiring that transmits a gate signal to the plurality of micro pixel controllers, and the glass through electrode may be formed in a remaining area excluding an area corresponding to the GIP wiring.
[0209] The glass substrate may further include a buffer layer provided on the lower side, and the buffer layer may include at least one first via hole electrically connected to the at least one glass through-hole electrode.
[0210] Further comprising an insulating layer provided on the lower side of the above buffer layer,
[0211] The insulating layer may include at least one second via hole for electrically connecting the power voltage wiring or the reference voltage wiring with the at least one first via hole.
[0212] Meanwhile, the disclosed embodiments may be implemented in the form of a recording medium storing computer-executable instructions. The instructions may be stored in the form of program code, and when executed by a processor, may generate program modules to perform the operations of the disclosed embodiments. The recording medium may be implemented as a computer-readable recording medium.
[0213] Computer-readable storage media include all types of storage media that store instructions that can be deciphered by a computer. Examples include read-only memory (ROM), random access memory (RAM), magnetic tape, magnetic disks, flash memory, and optical data storage devices.
[0214] Additionally, a computer-readable recording medium may be provided in the form of a non-transitory storage medium. Here, the term "non-transitory storage medium" simply means a tangible device that does not contain signals (e.g., electromagnetic waves). This term does not distinguish between cases where data is permanently stored in the storage medium and cases where data is temporarily stored. For example, a "non-transitory storage medium" may include a buffer in which data is temporarily stored.
[0215] According to one embodiment, the method according to various embodiments disclosed in the present document may be provided as included in a computer program product. The computer program product may be traded as a product between a seller and a buyer. The computer program product may be distributed in the form of a machine-readable recording medium (e.g., compact disc read only memory (CD-ROM)), or may be distributed online (e.g., downloaded or uploaded) via an application store (e.g., Play Store™) or directly between two user devices (e.g., smartphones). In the case of online distribution, at least a portion of the computer program product (e.g., a downloadable app) may be temporarily stored or temporarily generated on a machine-readable recording medium, such as the memory of a manufacturer's server, an application store's server, or an intermediary server.
[0216] The disclosed embodiments have been described with reference to the attached drawings as described above. Those skilled in the art will understand that the present invention can be implemented in forms other than the disclosed embodiments without altering the technical spirit or essential features of the present invention. The disclosed embodiments are illustrative and should not be construed as limiting.
Claims
1. A substrate comprising a glass substrate and at least one layer laminated on the glass substrate; A plurality of light emitting elements arranged on the upper side of the substrate; A plurality of micro pixel controllers provided on the upper side of the substrate and driving the plurality of light emitting elements; Power voltage wiring provided on the lower side of the above substrate and supplied with power voltage from the power board; and A reference voltage wiring provided on the lower side of the above substrate and supplied with a reference voltage from the power board; The glass substrate includes at least one Through Glass Via (TGV) formed in a region other than a region corresponding to the plurality of light-emitting elements and the plurality of micro-pixel controllers, The above power voltage wiring transmits the power voltage to the plurality of micro pixel controllers provided on the upper side of the substrate through the at least one glass-through electrode, A display module in which the above-mentioned reference voltage wiring transmits the reference voltage to the plurality of micro pixel controllers provided on the upper side of the substrate through the at least one glass-through electrode.
2. In paragraph 1, At least one of the above glass-penetrating electrodes, A display module comprising a plurality of glass-transparent electrodes arranged in the same column.
3. In paragraph 1, At least one of the above glass-penetrating electrodes, A display module comprising a plurality of glass-transparent electrodes arranged in the same row.
4. In paragraph 1, At least one of the above glass-penetrating electrodes, A display module comprising a plurality of glass-transfer electrodes having equal spacing between adjacent glass-transfer electrodes.
5. In paragraph 1, At least one layer above, Data wiring for transmitting data signals to the plurality of micropixel controllers; and A display module including gate wiring for transmitting gate signals to the plurality of micro pixel controllers.
6. In paragraph 5, A display module in which the above glass-penetrating electrode is formed in an area other than an area corresponding to the data wiring and gate wiring.
7. In paragraph 1, At least one layer above, A thin film transistor layer (TFT layer) including a plurality of thin film transistors, A display module in which the above glass-penetrating electrode is formed in an area remaining except for an area corresponding to the plurality of thin film transistors.
8. In paragraph 1, wherein at least one of the layers comprises a layer including a GIP (Gate in panel) wiring that transmits a gate signal to the plurality of micropixel controllers; A display module in which the above glass-penetrating electrode is formed in an area other than an area corresponding to the GIP wiring.
9. In paragraph 1, Further comprising a buffer layer provided on the lower side of the glass substrate, A display module, wherein the buffer layer includes at least one first via hole electrically connected to the at least one glass-transmitting electrode.
10. In paragraph 9, Further comprising an insulating layer provided on the lower side of the above buffer layer, A display module wherein the insulating layer includes at least one second via hole for electrically connecting the power voltage wiring or the reference voltage wiring with the at least one first via hole.
11. A substrate comprising a glass substrate and at least one layer laminated on the glass substrate; A plurality of light emitting elements arranged on the upper side of the substrate; A plurality of micro pixel controllers provided on the upper side of the substrate and driving the plurality of light emitting elements; Power voltage wiring provided on the lower side of the above substrate and supplied with power voltage; and A display module including a reference voltage wiring provided on the lower side of the substrate and supplied with a reference voltage; and A power board for supplying the power voltage to the power voltage wiring and the reference voltage to the reference voltage wiring; The glass substrate includes at least one Through Glass Via (TGV) formed in a region other than a region corresponding to the plurality of light-emitting elements and the plurality of micro-pixel controllers, The above power voltage wiring transmits the power voltage to the plurality of micro pixel controllers provided on the upper side of the substrate through the at least one glass-through electrode, A display device in which the above-mentioned reference voltage wiring transmits the reference voltage to the plurality of micro pixel controllers provided on the upper side of the substrate through the at least one glass-through electrode.
12. In paragraph 11, At least one of the above glass-penetrating electrodes, A display device comprising a plurality of glass penetration electrodes arranged in the same row.
13. In paragraph 11, At least one of the above glass-penetrating electrodes, A display device comprising a plurality of glass penetration electrodes arranged in the same row.
14. In paragraph 11, At least one of the above glass-penetrating electrodes, A display device comprising a plurality of glass-transmitting electrodes having equal spacing between adjacent glass-transmitting electrodes.
15. In paragraph 11, At least one layer above, Data wiring for transmitting data signals to the plurality of micropixel controllers; and A display device comprising: a gate wiring for transmitting a gate signal to the plurality of micropixel controllers;
Citation Information
Patent Citations
Liquid crystal display device and method of fabricating the same
KR1020110062102A
Fuel cell system
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Underground Power Cable Support Device
KR102083194B1
Semiconductor device and driving method thereof
US20190114961A1
KR20220058220A