A method for manufacturing superconducting wires and electronic device using the same

Abstract

A method and corresponding device are presented. The method comprises providing a substrate suitable for growth of superconducting layer; applying a mask having a selected pattern on said substrate; depositing material for forming said superconducting layer on said substrate and mask. The mask is formed of a hard material having a service temperature exceeding 700 °C. The use of a hard mask enables fabrication of narrow high Tc superconducting wires having width below 5 µm, enabling the device to operate as a photon detector at increased temperatures relative to conventional superconducting materials.

Description

[0001] A METHOD FOR MANUFACTURING SUPERCONDUCTING WIRES AND ELECTRONIC DEVICE USING THE SAME

[0002] TECHNOLOGICAL FIELD

[0003] The present disclosure is in the field of high-T superconductors and applications using such high Tcsuperconductors. The present disclosure relates in particular to superconducting thin wires, circuits including such wires, and method for manufacturing thereof.

[0004] BACKGROUND

[0005] Photon detectors are employed in various classical applications involving extremely low light intensities such as optical communications and biological imaging. Photon detectors and single-photon detectors are also the indispensable driving force of the revolution in experimental quantum optics, related closely to various quantum information applications implemented over the past decade, including quantum key distribution, optical quantum computing, and quantum emitter characterization. Further, such photon detectors may often be used in light detection and ranging (LiDAR), and additional detection techniques. Beyond quantum technologies, superconducting nanowire single-photon detectors (SNSPD) redefine photon-based research, opening up new avenues for the investigation of cosmic phenomena, molecular science, astrophysics and astronomy, medical imaging, and particle interaction. Among several approaches in developing photon detectors, SNSPDs based on conventional superconductors have been well studied in the past decade, bringing these devices to the commercial level.

[0006] SNSPDs are typically based on superconductors, which typically show an energy gap of the order of ~meV, being much lower compared to typical semiconductors. As a result, SNSPDs have much broader wavelength ranges compared to those of avalanche photodiode (APDs) detectors. These devices offer high detection efficiency over a very broad photon energy range including the mid infrared (IR), low dark counts, fast recovery time, and excellent timing resolution reaching the pico-second range. On the other hand, absorbing photons may cause local heating and may result in breaking of the superconductivity condition in the nanowires, an effect that requires cool-down time between detection of photons.

[0007] A. Kumar et al., Appl. Phys. Lett. 122, 192604 (2023) report ultrafast optical response in high-T superconductor (YBa2Cu3O?-6) based microwires operating at 76 K. This work found a rise time ~ 850 ps and a fall time ~1250 ps and an upper limit of timing jitter of ~ 100 ps, using twice the standard deviation of the fitted data. In the experiments, incident power is proven to be an important factor for a device jitter. At low incident power, a lower rate of hot-spot generation by a smaller number of absorbed photons results in a longer latency time to obtain the required number of hot-spots for superconductor-to-normal transition. The lower hot-spot generation rate also results in larger timing jitter of the device. Whereas, at high incident power, a higher hot-spot generation rate yields shorter latency and smaller timing jitter. These observations agree well with the statistical model. Enhancing the sensitivity of the current device can enable future high- superconductor nanowire single photon detectors, toward the widespread use of ultrafast quantum technologies.

[0008] Charaev, I. et al., Nat. Nanotechnol. 18, 343-349 (2023), describe the detection of individual quanta of light is important for quantum communication, fluorescence lifetime imaging, remote sensing and more. Due to their high detection efficiency, exceptional signal-to-noise ratio and fast recovery times, superconducting-nanowire single-photon detectors (SNSPDs) have become a critical component in these applications. However, the operation of conventional SNSPDs requires costly cryocoolers. Here they report the fabrication of two types of high-temperature superconducting nanowires. They observe linear scaling of the photon count rate on the radiation power at the telecommunications wavelength of 1.5 pm and thereby reveal single-photon operation. SNSPDs made from thin flakes of E^SnCaQ C +i? exhibit a single-photon response up to 25 K, and for SNSPDs from Lai.55Sro.45Cu04 / La2Cu04 bilayer films, this response is observed up to 8 K. While the underlying detection mechanism is not fully understood yet, their work expands the family of materials for SNSPD technology beyond the liquid helium temperature limit and suggests that even higher operation temperatures may be reached using other high-temperature superconductors.

[0009] Lyatti, M. et al., Nat Commun 11, 763 (2020), report that a significant progress has been made in superconducting quantum circuits. However new quantum devices that have longer decoherence times at higher temperatures are urgently required for quantum technologies. Superconducting nanowires with quantum phase slips are promising candidates for use in novel quantum devices. Here, they demonstrate YBa2Cu3O?-x nanowires with phase-slip dynamics and study their switching-current statistics at temperatures below 20 K. They apply theoretical models developed for Josephson junctions and show that the results provide strong evidence for energy -level quantization in the nanowires. The crossover temperature to the quantum regime of 12-13 K and the lifetime in the excited state exceeding 20 ms at 5.4 K are superior to those in conventional Josephson junctions. They also show how the absorption of a single photon changes the phase-slip and quantum state of a nanowire, which is important for the development of single-photon detectors with high operating temperature and superior temporal resolution.

[0010] GENERAL DESCRIPTION

[0011] One of the most promising approaches in developing photon detectors utilize SNSPDs based on low-7i superconductors. These devices offer high detection efficiency over a very broad range of photon energies, including the mid IR. Such detectors also provide low dark counts and excellent timing resolution reaching the pico-second range. However, conventional superconductor-based devices require extremely low operation temperature being typically below 10 K. The extreme low-temperature conditions limit the useability and commercial applicability of such low-7i based SNSPDs to research labs due to bulky and expensive cryogenic systems.

[0012] High-temperature (high-T ) superconductors are promising materials for future fast and compact SNSPDs. Operation temperatures for devices based on these materials can be as high as achievable using liquid nitrogen cooling (at temperature of about 77 K), allowing the use of cheaper, more flexible, and portable systems. Combined with their fast recovery time, high-T superconducting (HTS) materials are ideal candidates for photon detectors. However, fabrication of high-T superconducting wires suffers from various difficulties as described herein.

[0013] Previously used selective epitaxial growth (SEG) methods are based on a relatively soft mask materials such as SisN4 and other nitrides, which have relatively low maximal use temperature. Pulsed laser deposition (PLD) method used in deposition of HTS materials, results in deterioration of the soft mask material, resulting in diffusion of the deposited HTS and leading to various defects in the fabricated pattern. As a result, fabrication of wide HTS wires, e.g. having wire width scales of ~ 10 m may provide reasonable yield. However, nanoscale width wires fabricated with nitride-based masks demonstrate extremely low yield due to fabrication defects, rendering nanowire fabrication with nitride-based SEG as an inefficient method.

[0014] The present disclosure is based on the inventors’ understanding that the choice of mask material for fabrication of nanowires and nanowire-based structures requires consideration of the maximum service temperature, also referred to as continuous service temperature, of the mask material in addition to its melting temperature. In order to overcome the limitations associated with softer nitride material diffusion, the present disclosure utilizes oxide, carbide, and nitride materials that are characterized by higher melting points and maximum service temperatures, and typically characterized by service temperature above 750 °C, or above 800 °C, or above 850 °C or above 900 °C. In some embodiments, the present disclosure may utilize a mask formed of hard materials such as AI2O3, HfCh, ZrCE, ZnO, SiCh, TiCh, MgO, CT2O3, SiC, TiC, ZrC to enable fabrication of micrometric and / or nanometric HTS structures. In some embodiments other oxides and carbides as well as nitrides such as BN, HfN, etc. can be selected for their favorable properties and high service temperature. As described herein, the use of such hard mask materials enables selective epitaxial growth (SEG fabrication) of nanoscale width superconducting wires with high Tcof ~ 85 K that are suitable for use in SNSPDs providing desired optical response and various other applications.

[0015] Accordingly, the present disclosure provides a method for fabrication, and a resulting superconducting circuit that may utilize high- / / superconducting material and suitable for use in various electronic units / devices including for example photon detecting devices. The technique of the present disclosure utilizes a hard mask for selective deposition of the HTS material by defining regions of a substrate where material deposition provides a superconducting layer, surrounded by regions where the material deposition results in an insulating phase of the deposited materials.

[0016] More specifically, the superconducting circuit may be fabricated on a substrate having a lattice structure, and selected orientation, selected to promote deposition of a selected, suitable, material composition forming a superconducting phase when deposited in the substrate. On top of the substrate, the present technique utilizes a patterned mask carrying a pattern selected to determine pattern of the deposited HTS material. The mask is formed of a hard material having a high service temperature. The mask material may be selected in accordance with its lattice structure and / or orientation providing that when a material composition similar to that of the selected superconducting material is deposited on the mask, the resulting material is an insulating phase of the material composition. This is typically due to the lattice structure of the resulting material composition. The use of a hard mask material having high service temperature provides for significantly reducing defects in deposited patterns, increasing yield of manufacturing high- / / superconducting material with desired patterns that include micrometric and / or nanometric features. This enables fabrication of high-Z / SNSPDs and opening new applications for efficient detectors operable at cryogenic conditions achievable using liquid Nitrogen cooling.

[0017] Further, the technique of the present disclosure enables fabrication of a photon detector unit comprising one or more high Tcsuperconducting wires having width being 5 pm or below. Such photon detector unit enables detection of photons within a relatively broad wavelength range and may provide for detection of mid-infrared radiation with wavelength range between 2.5 pm and 25 pm, in addition to infrared and / or visible wavelength ranges.

[0018] Thus, according to a first broad aspect, the present disclosure provides a method for fabricating superconducting wires, the method comprising: providing a substrate suitable for growth of superconducting layer; applying a mask having a selected pattern on said substrate; depositing material for forming said superconducting layer on said substrate and mask.

[0019] According to some embodiments, the mask is formed of a hard material having a service temperature exceeding 700 °C.

[0020] According to some embodiments, the mask is formed of a material selected from oxide, carbide, and nitride materials characterized by a service temperature exceeding 700°C.

[0021] According to some embodiments, the mask may be formed of a material selected from a group consisting of: AI2O3, HfCh, ZrCh, ZnO, SiCh, TiCh, MgO, CT2O3, SiC, TiC, ZrC, and BN. According to some embodiments, the superconducting material is a high-7 / superconductor.

[0022] According to some embodiments, the superconducting material is selected from a group consisting of: YBCO (YE^CusO?), LBCO (CuBao.15La1.85O4), BSCCO (Bi2Sr2Can-iCunO2n+4+x), TBCCO (TlmBa2Can-iCunO2«+m+2), and HBCCO (Bi2Sr2Can-iCunO2«+4+x).

[0023] According to some embodiments, the method may comprise: applying a PMMA / photoresist layer on said substrate; etching said selected pattern on said PMMA / photoresist layer; applying a mask layer on said substrate and PMMA / photoresist pattern; lifting said mask layer from the selected pattern to remove a mask material from regions of the selected pattern; and depositing material for forming said superconducting layer on said substrate and mask, thereby forming a superconducting pattern in accordance with the selected pattern.

[0024] According to some embodiments, the pattern comprises at least one wire region having a width of 5 pm or less, or of 1 pm or less.

[0025] According to some embodiments, the selected pattern comprises at least one meander wire region having a width of 5 pm or less.

[0026] According to some embodiments, the selected pattern comprises tapered current input and output connections, said tapered current input and output connection having varying width selected to provide impedance matching between input and output electrical circuits and one or more superconducting wire regions within said selected pattern.

[0027] According to some embodiments, the selected pattern comprises at least two connection pads, the method further comprises applying a selected metallic layer on said connection pads.

[0028] According to some embodiments, said providing a substrate suitable for growth of superconducting layer comprises selecting a substrate material having a lattice structure that matches a lattice structure of superconducting phase of a selected superconducting material, such when depositing material for forming said superconducting layer on said substrate and mask, the lattice structure of the substrate supports a crystalline arrangement of the material promoting superconducting properties thereof. According to a second broad aspect, the present disclosure provides an electronic unit comprising a superconducting circuit comprising one or more wire regions characterized by width of the wire region being 5 pm or less.

[0029] According to some embodiments, the superconducting circuit is formed on a substrate, the superconducting circuit comprising a pattern of a material composition having high-T superconductor properties surrounded by regions of insulating phase of a similar material composition having an electrically insulating property.

[0030] According to some embodiments, the regions of insulating phase of the similar material are formed on a mask material placed on the substrate.

[0031] According to some embodiments, the superconducting circuit comprising one or more meander structure section having a width of 5 pm or less, or of 1 pm or less.

[0032] According to a third broad aspect, the present disclosure provides a photon detector comprising one or more superconducting wire regions formed of a high- superconductor and having width of 5 pm or less.

[0033] According to some embodiments, the one or more superconducting wire regions are formed on a substrate, surrounded by regions of insulating phase of similar material composition formed on a mask material placed on said substrate.

[0034] According to some embodiments, the mask material is formed of oxide, carbide, or nitride materials characterized by a service temperature exceeding 700°C.

[0035] According to some embodiments, the mask material is formed of a material selected from a group consisting of: AI2O3, HfCh, ZrCh, ZnO, SiCh, TiCh, MgO, CnCh, SiC, TiC, ZrC, and BN.

[0036] According to some embodiments, the one or more superconducting wire regions comprising one or more meander structure section having a wire width of 5 pm or less, or of 1 pm or less.

[0037] According to some embodiments, the photon detector may further comprise an electric circuit configured to transmit a selected current through said one or more superconducting wire regions and determine data on voltage required for transmission of the selected current, thereby determining data on one or more photons impinging on the one or more superconducting wire regions.

[0038] According to some embodiments, the photon detector may comprise a cooling arrangement configured to maintain the one or more superconducting wire regions at a selected temperature being higher than 4 K or higher than 20 K. In some embodiments, the cooling arrangement may be operable to maintain the one or more superconducting wire regions at a temperature range between 60 K and 120 K (associated with Tcof the HTS material is use. In some embodiments, the device may be operable at a temperature range between 65 K and 120 K, or between 70 K and 110 K or between 75 K and 85 K. typically, certain HTS materials such as YBCO and BSCCO exhibit Tcof 95 K or 110 K.

[0039] According to some embodiments, the photon detector may comprise a liquid nitrogen cooling arrangement for cooling at least the one or more superconducting wire regions.

[0040] BRIEF DESCRIPTION OF THE DRAWINGS

[0041] In order to better understand the subject matter that is disclosed herein and to exemplify how it may be carried out in practice, embodiments will now be described, by way of non-limiting example only, with reference to the accompanying drawings, in which:

[0042] Fig. 1 exemplify a selective epitaxial growth process of YBCO microwire; (a) a clean STO substrate with (100) lattice direction, (b) a thin film of SisN4 is deposited on the STO substrate using plasma-enhanced chemical vapor deposition (PECVD), (c) the surface is spin-coated with polymethyl methacrylate (PMMA) for an EBL process, (d) selected specific regions of the PMMA resist are exposed using the EBL technique, (e) the exposed PMMA is removed after development, (f) exposed regions of SisN4 are etched away using reactive ion etching (RIE) to reveal the underlying substrate, (g) the PMMA resist is completely removed using acetone, (h) YBCO is deposited over the entire sample, but crystalline YBCO grows only inside the areas where the STO substrate was revealed;

[0043] Fig- 2 shows the resistance as a function of temperature measurement of a 50 nm thin YBCO microwire epitaxially grown on STO substrate with a SisN4 mask.

[0044] Figs. 3A to 3D show SEM images of the YBCO microwire device, Fig. 3A shows a SEM image of the devices before, Fig. 3B shows an enlarged SEM image of the device after heat treatment at 950 °C, exemplifying the severe effect of heat treatment on SisN4 film; Fig. 3C shows a patterned wire section illustrating defects due to the effect of heat on SisN4 film when subjected to 700 °C; and Fig. 3D shows intrusion of impurities (SislSh) inside the nanowire regions;

[0045] Figs. 4A and 4B show SEM images of a 10 jim patterned device (Fig. 4A) and a 5 jim patterned device (Fig. 4B) showing the effect of heat on SisN4 film when subjected to 900 °C;

[0046] Figs. 5A to 5D show SEM images of a YBCO wire deposited with thickness of 1 j m (Fig. 5A), 500 nm (Fig. 5B), 80 nm (Fig. 5C) and 200 nm meander structure (Fig. 5D);

[0047] Fig. 6 exemplify SEG based lift-off process for the fabrication of a YBCO nanowire, (a) an STO substrate with a (100) orientation, (b) the substrate is spin-coated with LOR and 1505 photoresist using a spin-coating technique, (c) specific regions of the photoresist are exposed using a laser beam, (d) the exposed photoresist is removed after development process, leaving behind a desired pattern, (e) a 20 nm thin film of AI2O3 (ALO) is deposited onto the substrate using an e-gun deposition technique, (f) lift-off of the ALO film by immersing the sample in a NMP solution, (g) deposition of YBCO over the entire sample, crystalline YBCO growth occurs exclusively within the areas where the STO substrate was exposed;

[0048] Figs. 7A to 7D show the SEM images of fabricated superconducting wires including a 200 nm wide and 5 j m long (Fig. 7A), a 450 nm wide and 10 j m long (Fig. 7B), a meander structure with 750 nm wide wire (Fig. 7C), and measured resistance as a function of temperature measurement of the 50 nm thin YBCO meander nanowire epitaxially grown on STO substrate;

[0049] Fig. 8 exemplify selective epitaxial growth process using hard oxide / carbide / nitride as a mask material for high temperature superconducting (e.g., YBCO) nanowire fabrication; (a) a clean substrate with (100) direction, (b) deposition of a 20 nm thin film of hard oxide / carbide / nitride as a mask material on the substrate, (c) the surface is spin-coated with PR for photolithography process, (d) exposure of selected regions of the PR using a laser beam, (e) removal of the exposed PR after development, (f) etching of the exposed regions of hard oxide / carbide / nitride to reveal the underlying substrate, (g) the PR is removed using acetone and the depth was measured using a-step profilometer, (h) deposition of YBCO over the entire sample, crystalline YBCO grows only inside the areas where STO substrate was revealed; Fig. 9 exemplify selective epitaxial growth process using a hard oxide / carbide / nitride as a mask material for high temperature superconducting (e.g., YBCO) nanowire fabrication; (a) a clean substrate with (100) direction, (b) deposition of a thin film of hard oxide / carbide / nitride as a mask material on the substrate using thin film deposition technique, (c) the surface is spin-coated with PMMA for EBL process, (d) exposure of selected regions of the PMMA using an e-beam (e.g., EBL), (e) removal of the exposed PMMA after development, (f) etching of the exposed regions of hard oxide / carbide / nitride mask material (e.g., using RLE) to reveal the underlying substrate, (g) removing the PMMA using acetone, (h) deposition of YBCO over the entire sample, crystalline YBCO grows only inside the areas where STO substrate was revealed;

[0050] Fig. 10 exemplifies seven wire configurations according to some embodiments of the present disclosure, (A) is a meander wire with meander tapered connections, (B) is a meander wire with a different meander tapered connections, (C) is a straight wire with meander tapered connections, (D) is a straight wire with meander tapered connections, (E) is a meander wire with straight tapered connections, (F) is a meander wire with straight tapered connections, (G) is a straight with straight tapered connections, and (H) is a straight with straight tapered connections;

[0051] Fig. 11 illustrates another meander nanowire utilizing meander tapered connections according to some embodiments of the present disclosure;

[0052] Fig. 12 illustrates an electronic device, e.g., a photon detector, utilizing a high Tcsuperconducting wire according to some embodiments of the present disclosure; and

[0053] Figs. 13A and 13B show measured data of voltage applied on the superconducting wire for different temperatures and current values under mid IR illumination of 3.25micron (Fig. 13A) and 4.25 micron (Fig. 13B) showing detection of the photons according to some embodiments of the present disclosure.

[0054] DETAILED DESCRIPTION OF EMBODIMENTS

[0055] High- / / superconductors (HTSs) are ideal candidates for various applications including single photon detectors. Since the discovery of HTSs in 1986, these materials and their properties have been the focus of much attention due to their relatively high transition temperatures. Operation temperatures for HTS-based devices can be high enough for operation with liquid nitrogen cooling (77 K), allowing the use of cheaper, more flexible and portable cooling systems. HTS materials are ideal candidates for the next generation of SNSPDs for various reasons including fast recovery time. An exemplary HTS material is Yttrium barium copper oxide (YBCO) considered here for such devices due to its mature growth techniques, while other HTS materials may be used, and specifically copper based HTS such as LBCO, BSCCO, TBCCO, HBCCO or others. However, during device fabrication, superconducting properties of YBCO tend to undergo significant degradation leading to device failure. This is attributed mostly to oxygen loss caused by edge damage due to the patterning techniques currently in use.

[0056] The inventors of the present disclosure identified that developing HTS nanowires, e.g., YBCO nanowires, for photodetection at temperatures above liquid nitrogen cooling is significantly influenced by the high sensitivity of the superconductivity of the HTS structures, which is associated with lattice structure of the material. Accordingly, HTS nanowires may require robust fabrication and patterning techniques that maintains the lattice structure of the HTS to provide efficient and reliable detection.

[0057] Generally, superconductor-based photon detectors utilize the unique behavior of superconducting materials and their response to the energy carried by incoming photons for detection operation. When in an operating state, a superconducting nanowire is maintained well below the critical temperature of the HTS material and is held under bias of direct current (DC) that is just below the critical current of the superconductor. When a photon is absorbed by the nanowire, absorption of the photon results in heating of the HTS material, creating a small resistive hotspot. This forces the current to flow along the periphery of the hotspot. Since the nanowires are narrow, the local current density around the hotspot increases, exceeding the superconducting critical current density and leads to the formation of a resistive barrier across the width of the nanowire. The DC bias applied on the nanowire may further assist in growing the resistive region by Joule heating associated with current passing through the nanowire until the flow of the current is blocked and the bias current is shunted, e.g. by an external circuit. This process provides a variation in at least one of transmitted current and voltage along the nanowire (which is zero in the superconducting state), indicating absorption of a photon by the detector.

[0058] In a previous work indicated above (A. Kumar et. al. Appl. Phys. Lett. 122, 192604 (2023)), the inventors of the present disclosure have demonstrated an ultrafast response in high-Tcsuperconductor (YBa2Cu3O(7-6) also known as YBCO) based microwires, fabricated using a selective epitaxial growth (SEG) method. These microwires exhibited an ultrafast response, operating at temperatures of 76 K and achieving remarkably short rise and recovery times of approximately 850 ps and 1250 ps, respectively. Additionally, the inventors have determined the upper limit of timing jitter by analyzing the standard deviation of the fitted data to be approximately 100 ps. The microwire based devices, however, have very low efficiency due to the micrometer scale width of about 9 micrometers.

[0059] The previously used SEG method was based on relatively soft mask materials such as SisN4 and / or other nitrides. These materials have suitable melting temperature but are characterized by a relatively low maximal use temperature. The SEG method often utilizes Pulsed laser deposition (PLD) method for deposition of the HTS materials. HTS materials such as YBCO are typically deposited at high temperature. The high deposition temperature of the HTS material results in deterioration of the softer mask materials, leading to diffusion of materials and causing various defects in the final structure. This results in various defects in the HTS wires, allowing to obtain a reasonably high yield only at wire width scales of ~10 pm. Attempts to fabricate nanoscale width HTS wires using nitride-based masks show various defects in the nanowires leading to an extremely low yield, preventing from efficient nanowire fabrication with nitride-based SEG method.

[0060] In this connection, reference is made to Fig. 1 exemplifying the manufacturing process of superconducting wires using SisN4 mask. As indicated above, in the previous work, the inventors of the present disclosure demonstrated manufacturing and operation of an HTS-based detector, employing the selective epitaxial growth (SEG) method with SisN4 as the mask material. The fabrication process involved several steps as follows:

[0061] • Thin Film Deposition: An STO substrate (a) is covered by a thin film of SisN4 (b). The SisN4 film is thickness of approximately 30 nm and may be deposited on the STO substrate using plasma-assisted chemical vapor deposition.

[0062] • Patterning of Sis The SisN4 film was coated by polymethyl methacrylate (PMMA) (c) and patterned (d) using an electron beam lithographic (EBL) technique, enabling precise control over the desired pattern.

[0063] • Exposed Region Dissolution: A solution of IPA:MIBK (1 :3) was utilized to dissolve the exposed region of the PMMA resist, selectively removing the unwanted areas (e). • Reactive Ion Etching (RLE): The patterned regions of SisN4 were etched using the reactive ion etching (RIE) technique (f), allowing for precise definition of the desired features.

[0064] • The PMMA resist was removed (g), exposing the SisN4 mask carrying the desired pattern.

[0065] • YBCO Film Deposition: A thin 50 nm film of YBCO was deposited on the patterned substrate using the pulsed-laser deposition (PLD) technique (h). The details of the YBCO thin film fabrication have been reported previously and are generally known in the art.

[0066] The result of the deposition is associated with properties of the substrate on which the material deposition takes place. When the deposited materials that grows directly on the substrate, the lattice structure of the substrate supports the crystalline arrangement of the HTS material and maintains its superconducting properties. Material deposited on the mask regions does not build a crystalline structure resulting in insulating material regions. Generally, HTS wire fabrication using the SEG method enables fabrication of microscale features while preserving the superconducting properties of the HTS material, e.g., the YBCO film.

[0067] To determine the critical temperatures of the superconducting microwires, the inventors conducted resistance vs. temperature (A(7)) measurements in a four-probe configuration. Fig. 2 presents the measured resistance of a microwire having a width of 9 pm. Upon cooling the sample, the superconducting transition was observed, characterized by a sharp decrease in resistance at temperatures below Tc= 81.5 K for the 9 pm width wire. The slightly broad transition observed in the R(T) measurement can be attributed to the size of the microwire. Additionally, an inset in Fig. 2 showcases a scanning electron microscope (SEM) image of the microwire device measured.

[0068] While the selective epitaxial growth (SEG) method utilizing SisN4 as a mask material proved successful in fabricating wires with widths slightly below 10 pm, fabricating superconducting wires having width of 1 pm or below, and even at width of 5 pm or below, were less successful. The nitride thin films may often undergo degradation under temperatures exceeding 700 °C, whereas the deposition temperature for the YBCO film is approximately 950 °C. To explore the characteristics of the SisN4 film, a comprehensive analysis concentrating on its temperature-dependent behavior was conducted.

[0069] The results, depicted in Figs. 3-6, revealed significant findings. Figs. 3A to 3D show scanning electron microscopy (SEM) images of a superconducting wire before and after annealing of the film at 950 °C. Fig. 3A shows contact circuit around the wire and Fig. 3B shows a zoom in on the wire and illustrates SisN4 amorphous regions around the wire. Fig. 3C shows a patterned superconducting wire and illustrating the effect of heat on the SisN4 film and degradation of the wire continuity. Fig. 3D shows SisN4 film impurities intrusion into the nanowire region due to high temperature processing. As shown, the SisN4 film exhibited signs of degradation and diffusion around and into the nanowire regions after exposure to temperatures exceeding 700 °C.

[0070] Figs. 4A and 4B show an additional example of the impact of thermal conditions on the SisN4 film used for fabrication of HTS wires with widths of 10 pm and 5 pm, respectively. Figs. 4A and 4B show SEM images of the wires demonstrating diffusion of SisN4 mask material into the HTS wire. As shown in Fig. 4A, the SisN4 diffusion remains mostly insignificant within micron-sized wires even at 950 °C, showing a few regions of SisN4 (some of which are marked with circles) within the wire. These and additional experimental findings indicate that the fabrication of wires narrower than about 5 pm presents various challenges relating to degradation of the mask material. This difficulty is reflected in the quality issues observed specifically in the submicron-width wires. As illustrated in Figs. 3A to 3D. When the substrate is heated to 700 °C or above, the SisN4 material begins to degrade, forming small islands that obstruct the nanowire regions.

[0071] As indicated above, while bulk silicon nitride possesses a high melting point of approximately 1900 °C, thin films of silicon nitride, particularly those with nanoscale thicknesses such as 30 nm, may exhibit distinct characteristics compared to the bulk material of the same composition. Consequently, the melting point of a 30 nm silicon nitride film could be significantly lower than 1900 °C. Another important parameter to consider relates to the maximal service temperature of the mask material, also known as the continuous service temperature. The maximal service temperature relates to the highest temperature at which the material can be utilized for prolonged periods without experiencing significant property changes. This parameter becomes particularly important when heating the films for extended durations during the deposition and growth of YBCO thin films. Despite the high melting point of SisN4, its maximal service temperature is approximately 730 °C, which is lower than the typical deposition temperature required for deposition and growing of YBCO or other HTS materials.

[0072] Accordingly, and as visible in the SEM images of Figs. 3A-3D, and 4A-4B, the SisN4 film undergoes noticeable alterations when exposed to elevated temperatures, e.g. associated with HTS material deposition. Evidently, a high-temperature reaction takes place during HTS material deposition and growth, resulting in the deterioration of the SisN4 film and potential infiltration of the mask material into the patterned HTS region. This phenomenon hinders the functionality of the HTS nanowire regions by varying width / thickness of the superconducting region.

[0073] Figs. 5A to 5D show SEM images of HTS (YBCO) wires fabricated with different widths using a SisN4 mask material. These images illustrate noticeable differences in contrast between the contact pads and the interior of the micrometer-size wire (Fig. 5A) and the nanometer-size wires (Fig. 5B to 5D). Fig. 5A illustrates limited intrusion of SisN4 at the boundaries of the HTS wire, with the central region exhibiting the same contrast as the STO substrate (shown in Fig. 5C, left and right sides). However, as shown in Figs. 5B to 5C once the wire width decreases below a micrometer, the HTS wire material is significantly affected by STN4 contamination, rendering the formation of superconducting nanowires unviable. Determining resistance to temperature variation of the wires was performed to determine the critical temperature Tcof the wires. This measurement showed typical critical temperature for the microwire shown in Fig. 5A, while the nanometer-size wires shown in Figs. 5B to 5D failed to show a transition to superconductivity. As shown, nanowires had difficulty forming superconducting YBCO as a result of contamination of the nanowire region due to SisN4 diffusion.

[0074] Accordingly, the use of SisN4 thin film as a mask material for fabrication of HTS nanowires is hindered by its low melting point and low maximum service temperature, which leads to diffusion of the mask material into the nanowire regions. Consequently, only a small fraction (approximately 1%) of the nanowire devices fabricated using SisN4 mask exhibit superconductive properties and are capable of performing the desired functionality. This extremely low yield of functional nanowires made with nitride-based mask makes this fabrication technique virtually impossible. The above experimental observations provide clear evidence of the detrimental effects of SisN4 as a mask material for HTS nanowire fabrication. Therefore, alternative approaches are necessary to address the diffusion issue to enable successful fabrication of superconducting wires with submicron widths. HTS nanowire fabrication using hard material thin films as a mask material.

[0075] As discussed herein above, the inventors of the present disclosure have identified that the choice of mask material for HTS nanowire fabrication requires consideration of the maximal / continuous service temperature of the mask material, in addition to the melting temperature thereof. Accordingly, the present disclosure provides a method for fabrication of superconducting wires using a hard mask formed of a material characterized by a service temperature being greater than 750 °C. Further, in some embodiments the technique of the present disclosure utilizes mask formed of hard material having elevated service temperature, thereby addressing challenges associated with fabrication using the relatively soft nitride masks described above. For example, the present technique provides a method for fabrication of superconducting wires utilizing mask material selected from oxide, carbide, and certain nitrides, characterized by sufficiently high melting points and service temperatures. For example, hard materials such as AI2O3, HfCh, ZrCE, ZnO, SiCh, TiCh, MgO, CnCh, SiC, TiC, ZrC, as well as other oxides and carbides, or certain nitrides such as BN, HfN, having sufficiently high service temperature, can be selected for their favorable properties.

[0076] SEG method based on lift-off / etching of oxide / carbide and BN films.

[0077] Reference is made to Fig. 6 illustrating schematically a process for fabrication of HTS nanowires according to some embodiments of the present disclosure. The method exemplified in Fig. 6 utilizes SEG followed by a lift-off method. Initially, a substrate (a), e.g., SrTiCh (STO), LaAlCh (LAO), MgO, YSZ (Yttria-stabilized Zirconia), AI2O3 (ALO), CeO2 or other such substrates, was coated (b) with two distinct positive photoresists, LOR and 1505, each of the photo resists may be applied at a speed of 6000 rpm. Subsequently, a desired pattern is generated on the photoresist using laser beam writing (c). The pattern generally includes one or more wire sections defined by width of 1 pm or below, and optionally, one or more connecting pads enabling electrical connections to the wire sections. In some embodiments, the laser writing exposure may be limited to the outside region, excluding the pads and wires, since certain laser writing technologies have a minimum resolution of 1 f m. In such embodiments, the wire region may be expose from both sides as illustrated in Fig. 6(d). This enables to effectively thin down the wire regions below the resolution limit of the laser writing technique, resulting in wires of approximately 200 nm in width. Additionally, O2 plasma etching may be used to ensure complete removal of the photoresist. Following laser writing, a mask film was deposited (e), e.g., using the e-gun deposition technique. The mask film was formed of an alumina layer having thickness of 20 nm. The next step involved the lift-off process, carried out in N-Methylpyrrolidone (NMP) solvent, to eliminate the photoresist along with the alumina covering it. This exposed the STO substrate with the pads and wire structure, as well as the amorphous alumina film in the remaining region (f). Finally, a 50 nm thin film of YBCO was deposited using the pulsed-laser deposition (PLD) technique (g). The resulting YBCO film deposited on the substrate retains its crystalline nature and exhibits its superconducting properties, this is while material deposited in regions covered by the amorphous alumina film form as amorphous material exhibiting electrical insulator properties.

[0078] Further, reference is made to Figs. 7A to 7C showing scanning electron microscope (SEM) images of a high- / / superconducting nanowire devices fabricated using the method of the present disclosure. Figs. 7A and 7B show nanowires of different widths and lengths demonstrating the capability of producing nanowires as small as 200 nm in width, Fig. 7A shows a 200 nm wide nanowire and Fig. 7B shows a 450 nm wide nanowire. Fig. 7C shows the meander structure of a 750 nm wide nanowire with a pitch of 2.2 pm. And Fig. 7D shows the resistance vs. temperature measurement associated with the nanowire of Fig. 7C, illustrating transition to superconductivity at Tcof about 79 K.

[0079] Using the resistance vs. temperature R(T) measurement in the four-probe geometry provides for determining the critical temperatures of superconducting nanowires. On cooling the sample, an onset of superconducting transition is characterized by a drop in resistance when temperatures below Tc= 84 K. In further measurements, Tcof the meander wire shown in Fig. 7C was measured to be 79 K. The Tcof other wires was also checked and found that all samples show a critical temperature within a similar range appropriate to the YBCO superconducting material.

[0080] To achieve fabrication of nanowires having desirably small width, reaching dimensions as small as 50 nm, the technique of the present disclosure may utilize various deposition techniques including for example Electron Beam Lithography (EBL) as well as Laser writing techniques. EBL and / or laser writing allow for precise control and manipulation of electron / laser beams to create patterns with extremely high resolution, enabling the formation of nanowires with nanoscale dimensions. Utilizing EBL enables pushing the boundaries of miniaturization and achieving the desired ultra-small wire width of 50 nm and below.

[0081] SEG method using oxide / carbide / nitride as mask material.

[0082] To fabricate superconducting nanowires devices, the inventors implemented a selective epitaxial growth (SEG) technique. The fabrication techniques are illustrated in Figs. 8 and 9 illustrating the fabrication processes according to some embodiments of the present disclosure. Fig. 8 exemplifies the fabrication method using laser beam patterning, and Fig. 9 exemplifies the method using E-beam patterning of the mask material.

[0083] As exemplified in Figs. 8 and 9, the method includes depositing thin file layer (b), e.g. having thickness of 20 nm, of a selected hard mask material on a substrate (a), the substrate has material composition and lattice arrangement and direction suitable for deposition of the desired superconducting material. The thin film may be of AlO / HfO, or other suitable hard oxide / carbide / nitride having sufficiently high service temperature, typically above 700°C, or above 750°C, or above 800°C. The thin film layer may be deposited using a selected deposition technique such as e.g., atomic layer deposition (ALD), or other techniques, and may be applied onto multiple substrates to provide parallel fabrication process. Typically, the deposited thin film may be thinner than the desired superconducting layer to be provided in the final device.

[0084] Generally, using the ALD method may provide for precise control over the thickness of the thin film, which is beneficial for accurate reactive ion etching (RIE) calibration finalizing the mask pattern.

[0085] Following deposition of the thin film layer (b), the mask layer is patterned to provide selected structure for depositing the superconducting material. Mask pattern process may include several actions, including for example applying PMMA / photoresist layer (c) of the thin film layer, exposure of the PMMA or photoresist layer within a selected pattern using laser writing (Fig. 8(d)) or E-beam writing (Fig. 9(d)), and development of the PMMA or photoresist layer (e). Further, the method may use one or more etching recipes for the mask film that were developed using RIE (f), or various other techniques including, for example, chemical etching. Following RTE (or chemical etching), the PMMA / photoresist layer is removed enabling deposition of the superconducting material composition (h). In accordance with lattice structure of the substrate and the mask material, deposition of the selected material combination results in superconducting lattice structure in selected locations, where the mask material is removed, and formation of amorphous / insulating phase where the material is deposited on the mask thin film.

[0086] During development of the method, multiple RIE trials were conducted to ensure complete removal of the mask films (A1O or HfO in this example) from the exposed regions. Further, the thickness of the mask thin film layer was measured using a profilometer to confirm successful removal. As indicated above, the process may involve coating the substrate with the deposited films, applying PMMA / photoresist, performing exposure, and subsequently developing it, e.g., using Tetramethylammonium hydroxide (TMAH), to dissolve the exposed photoresist (or PMMA). The next stage entailed the deposition of a superconducting material thin film (e.g., YBCO) to provide a desired layer thickness of e.g., 50 nm. Deposition of the superconducting material may, for example, utilize a pulsed-laser deposition (PLD) method. The details regarding the fabrication of the YBCO or other superconducting thin films have been generally known and have been previously reported (e.g., in C A J Damen et al 1998 Supercond. Sci. Technol. 11 437). The resulting YBCO film, which grows directly on the substrate, maintains its crystalline structure and superconducting properties. This is while material deposited on the mask regions is affected by lattice structure and results in material composition and structure that shows electrical insulator properties. Accordingly, using hard mask, the conditions for growing superconducting film do not degrade the mask material, maintaining nanoscale features of the pattern and preserving superconducting properties of the nanowires.

[0087] Generally, as indicated above, there are various substrates suitable for deposition of superconducting materials. The substrate, and its lattice structure direction are generally selected to support the desired lattice structure of the superconducting material. Certain suitable substrates include SrTiCh (STO), LaAlCh (LAO), MgO, YSZ (Yttria- stabilized Zirconia), AI2O3 (ALO), CeO2, while further additional substrates may be used in accordance with lattice structure of the substrate.

[0088] While the above examples describe the use of STO substrate, a requirement for impedance matching between a hotspot generated in response to photon absorption by the nanowire, and the nanowire itself, suggests the use of LaAlOs (ALO) substrate or other substrates having lower permittivity, for example, permittivity of LAO is about 8-25, while STO permittivity is much higher.

[0089] Additionally, in some embodiments, the superconducting nanowire may be formed with tapered connection connecting the nanowire to electrically conducting pads providing current transmission through the nanowire. In this connection, reference is made to Figs. 10 and 11 illustrating several nanowire structures according to some embodiments of the present disclosure. Fig. 10 illustrates 7 (seven) wire configurations with tapered input and output connections including (A) a meander microwire with meander geometry of the tapered connections; (B) a meander microwire with a different meander tapered connections; (C) a straight microwire with meander tapered connections; (D) an additional straight microwire with a different meander tapered connections; (E) a meander microwire with exponential long tapered connections; (F) a meander microwire with a different exponential long tapered connections; (G) a straight microwire exponential long tapered connections; and (H) an additional straight microwire with exponential long tapered connections. Fig. 11 illustrates a zoom view of a meander microwire utilizing meander tapered connections on both sides. These wire configurations can be achieved with desired dimensions using patterning of a hard mask as described above.

[0090] Generally, impedance matching is a technique used to maximize power transmission between electrical components / sy stems. The technique provides for ensuring that respective input and output impedance of different elements are matched to optimize power transmission and avoid loss in the system. The impedance (Z) is a measure of the opposition of an element to flow of an alternating current therethrough. It includes both resistance (R) and reactance (X) representing the combined effect of inductance (L) and capacitance (C). The impedance is represented by a complex number where real part relates to resistance and imaginary part relates to reactance, affecting phase of an alternating current.

[0091] The superconducting circuit according to some embodiments of the present disclosure may utilize tapered connections to electric connectors (pads) to provide impedance matching between the electrically conducting circuit providing and collecting electrical current and the superconducting wire exemplified in Figs. 10 and 11.

[0092] A tapered circuit, known as a tapering circuit, is a type of electrical circuit where the impedance, or selected characteristics of the circuit elements, vary gradually along path of electrical current through the circuit. Tapered circuits are commonly used in various applications, including antenna design, transmission line matching, and signal conditioning. The basic idea behind a tapered circuit is to provide a gradual change in the impedance or in one or more other circuit parameters to achieve specific objectives, such as impedance matching, signal attenuation, or dispersion control. The tapering can be achieved by varying the dimensions of circuit elements, including e.g., the width or length of conductors, or by introducing additional circuit elements with selected properties.

[0093] Superconducting devices according to some embodiments of the present disclosure may utilize a tapered microstrip transmission line providing impedance matching between a superconducting nanowire or microwire and the connection pads / electrodes. Given the superconducting nature of the wire, it is typically characterized by low impedance, while typical electrically conducting elements (e.g., current supply circuit) have higher impedance, resulting is impedance mismatch. Designing tapered microstrip transmission lines with a gradually changing width can provide impedance matching between the outside electronics and superconducting wire.

[0094] The use of a hard mask material as described above may provide increased flexibility in designing tapered microstrip transmission lines having width variation selected in accordance with the desired impedance profile, the substrate material and its dielectric constant, and the specific dimensions and tolerances for the microstrip line fabrication. A simplified configuration of an electronic unit or a photon detector utilizing a superconducting nanowires / microwires according to some embodiments of the present disclosure may have the form: [ZS0Urce » tapered line » HTS nanowire » tapered line » collection]. Accordingly, the tapered circuit may include an input tapered transmission line and an output tapered transmission line, connected at each side of the superconducting wire. As indicated, the tapered transmission lines are used to provide smooth transition of electrical signals without significant reflection, and thus minimizing the loss.

[0095] For example, in an electronic device or photon detector according to some embodiments of the present disclosure, a device with an impedance around 100 kilohms is connected to a measuring instrument and wires with an impedance of 50 ohms, e.g., superconducting wire having negligible resistance. This connection, if performed without impedance matching may result in high reflectivity and / or loss as the device impedance and the measuring instrument impedance are mismatched. The reflection coefficient (T) represents the ratio of the current reflected with respect to an input signal.

[0096] Assuming a device impedance of 100 kOhms (Zdevice=100 KQ) and an instrument impedance of 50 Ohms (ZWire=50 Q). The reflection coefficient (T) can be calculated using the formula: r=(Zwire ■Zdevice) / (Zwire+Zdevice ). Substituting the values to this formula provides: r=(50-100,000) / (50+100,000)=-0.9995. Indicating that the magnitude of the reflected signal is 0.9995, reflected with opposite phase to the input signal.

[0097] The reflection coefficient can be converted to a reflection loss (RL) in decibels using the formula: RL=-20xlogio(|r|), providing RL=-20><logio(0.9995)~-46.02 dB. Thus, approximately 46.02 dB of power is reflected back due to the impedance mismatch. Similar calculation may be used to determine voltage reflection coefficient (VRC) in accordance with VRC=sqrt(|T|), which in this case indicates that approximately 99.97% of the incident voltage is reflected back due to the impedance mismatch.

[0098] It is important to note that the reflection loss mentioned here is specific to the impedance mismatch at the connection point. Additional losses may occur due to other factors such as transmission line losses, cable impedance mismatches, or measurement instrument limitations.

[0099] To minimize the reflection loss and improve impedance matching, circuit design may employ impedance transformation techniques or matching networks. These techniques provide data enabling to match the impedance of the device and the measuring instrument, minimize reflections and optimize signal transfer. Further, impedance transformation techniques or matching networks can be employed to ensure better voltage transfer and reduce reflections.

[0100] In accordance with one or more impedance matching techniques, the tapered connections may utilize one or more of linear taper, exponential taper, Chebyshev type taper and / or tapered slot line, each providing a selected impedance profile along the tapered connection. The use of a hard mask material enables flexibility and repeatability in fabrication of these connection profiles as well as enabling fabrication of HTS nanowire as described above.

[0101] Further, according to some embodiments of the present disclosure, the electronic device, and / or photon detector unit may utilize tailored contact pads deposited onto a selected region of the superconducting material. For example, in some embodiments, the patterned superconductor may include two or more pads providing surface for electrical connection to an electronic circuit providing electrical current passing through the superconducting wires. In some embodiments, a metallic layer may be deposited on top of the two or more pads providing surface suitable for connection of one or more electrodes.

[0102] For example, the metallic layer may be formed or include a layer of gold (Au) on the superconducting material at the location of the two or more pads. For example, following deposition of the superconducting material, including the selected wire pattern describe above, the resulting device may be coated with PMMA or other photoresist materials (e.g. 950 A4 PMMA at 3000 rpm for 1 min). The coating may be baked at a selected temperature (e.g., at 180°C) for a selected duration (e.g. for 90 sec). This may result with a PMMA layer of an expected thickness of about 200 nm.

[0103] A typical size of the pads may be in a range of 200^200 pm2, a size that does not impose high requirements on the patterning mask. The pads regions may be exposed using laser or E-beam, and the exposed PMMA (or other selected photoresist materials) can be developed in MIBKTPA (e.g. at a ratio of 1 :3). The IPA can be rinsed and dried. At this stage the top 5-10 nm layer may be etched to ensure complete removal of PMMA traces from the developed regions of the pads, and the selected metal may be deposited thereon. The remaining PMMA or other photoresists may be removed to provide the final device.

[0104] The metallic layer may be formed of gold or titanium at a selected thickness of e.g., 10-20 nm. The PMMA may be removed using acetone or other solvents and the final product may be dried by air or N2 to remove any solvents.

[0105] Providing metallic contacts on the superconducting pads can provides for lower contact resistance and thus improve impedance matching at current transmission and / or collection contacts.

[0106] Reference is made to Fig. 12 illustrating schematically an electronic device or photon detector unit 100 configured according to some embodiments of the present disclosure. Device 100 includes a high Tcsuperconducting wire section 26 having a selected width being 5 pm or below, in some configurations the high Tcsuperconducting wire section may have width of 1 pm or below. The high Tcwire section is connected to first and second connection pads 22 and 24 via high Tcsuperconducting connection sections 32 and 34. Connection pads 22 and 24 may be formed of first superconducting layer covered by a metallic layer, providing electrical connection to a supply and control circuit 500. The connection sections 32 and 34 may have a tapered width to provide impedance matching between the metal of connection pads 22 and 24 and the superconducting wire section 26.

[0107] Superconducting wire section 26, and the connection sections 32 and 34 may be configured as illustrated above in Figs. 10 and 11. More specifically, the superconducting wire section 26 and / or connection sections 32 and 34 may be configured with a meander configuration or formed as a straight line.

[0108] The use of narrow superconducting wire section 26 provides the device 100 with an ability to operate at relatively warm cryogenic conditions. More specifically, the device may operate at a selected temperature greater than 4 K or greater than 20 K. Generally, the device 100 may be operates at temperatures ranging between 60 K and 120 K. the temperature range is generally determined in accordance with the HTS material being used. For example YBCO and BSCCO may exhibit Tcof about 95 K or 110 K. Accordingly, the device 100 may be operated at a temperatures of 62 K, or 68 K, or 70 K, or 72 K, or 83 K, or 90 K or 95 K or 100 K, or 110 K. Further, the device 100 may be operable at a temperature range between 70 K and 120 K, or between 75 K and 95 K. Selection of the temperature range enables the device 100 to be operated with liquid Nitrogen cooling. This enables the device to operate in various conditions. Further, the narrow width of the superconducting wire section 26 enables detection of relatively low energy photons associated with mid-IR wavelength range being in a range between 2.5 pm and 25 pm. This can be achieved using narrow superconducting wire, in which absorption of a photon generates a hot spot that affects current transmission through the wire. The variation in current transmission can be detected by supply and control circuit 500 allowing it to generate an output signal indicative of detection of a photon.

[0109] The inventors have conducted a series of experimental measurements on the device illustrated in Fig. 12, utilizing a stabilized black body radiation source operated at temperatures between 1300 °C and 1350 °C. Radiation emitted by the back body source was filtered by a bandpass filter allowing radiation having wavelengths of 3.25±0.25 pm, and 4.25±0.25 pm. The device was maintained at selected temperatures between 60 K and 85 K, while a control circuit including a controlled current source transmitting a bias current through the superconducting wire. When the bias current was close to the critical current of the superconducting wire section 26 (being about 140 pA in this specific example), the control circuit shows increased voltage levels in response to input radiation impinging on the superconducting wire. Using a chopper operating at a selected rate to generate a pulsating radiation sequence, the experiment showed temporal correlation between operation of the chopper and voltage measured by the control circuit, indication detection of photons in the respective wavelengths. Figs. 13A and 13B show results of photon detection using the photon detector device. Figs. 13A and 13B show circuit voltage measured between the contacts of the superconducting wire under different temperature and current conditions. Fig. 13A relates to detection of photons having wavelengths of 3.25±0.25 pm, and Fig. 13B relates to detection of photons having wavelengths of 4.25±0.25 pm. As shown, for various temperatures and current values transmitted through the superconducting wire, the voltage is very low, associated with the fact that there is no resistance for current transmission through the wire. However, for current values close to the critical current density, and at temperature close to Zc, an increase in voltage is visible, indicating a transition away from superconductivity associated with photon absorption by the wire.

[0110] The above-described technique provides for fabrication of the superconducting wire section 26, and further additional superconducting circuits having selected patterns including one or more nanowire sections, formed by wire section of width being 5 pm or below, or 1 pm or below. The present disclosure provides a superconducting circuit fabricated on a substrate and having one or more wire-sections having submicron width. Such superconducting circuits may be used in electronic units for various application including for example photon detectors, or other electronic elements.

[0111] Photon detectors as described above, and as exemplified in Fig. 12 can be used in a wide range of applications ranging from classical and quantum communications to biomedical imaging and semiconductor wafer inspection. The wavelength range of detection may be determined in accordance with the superconducting material, width of the wire section 26 and detection circuit. In some configurations, a photon detection system may be formed of an array of photon detector units 100 as exemplified in Fig. 12. Such an array of nanowire-based photon detectors may be used to provide for very fast and ultrasensitive image sensors.

[0112] Thus, the present disclosure provides a method for use in fabrication of superconducting circuits, and is especially useful for fabrication of superconducting nanowires, or wires having width below 5 pm, and especially using high-T superconductors. The present disclosure further provides a superconducting circuit, and electronic device using such superconducting circuit, e.g., suitable for use as photon detectors.

[0113] It is to be noted that the various features described in the various embodiments can be combined according to all possible technical combinations.

[0114] It is to be understood that the invention is not limited in its application to the details set forth in the description contained herein or illustrated in the drawings. The invention is capable of other embodiments and of being practiced and carried out in various ways. Hence, it is to be understood that the phraseology and terminology employed herein are for the purpose of description and should not be regarded as limiting.

[0115] As such, those skilled in the art will appreciate that the conception upon which this disclosure is based can readily be utilized as a basis for designing other structures, methods, and systems for carrying out the several purposes of the presently disclosed subject matter.

[0116] Those skilled in the art will readily appreciate that various modifications and changes can be applied to the embodiments of the invention as hereinbefore described without departing from its scope, defined in and by the appended claims.

Claims

CLAIMS:

1. A method for fabricating superconducting wires, the method comprising: providing a substrate suitable for growth of a superconducting layer thereon; applying a mask having a selected pattern on said substrate; depositing material for forming said superconducting layer on said substrate and mask.

2. The method of claim 1, wherein said mask is formed of a hard material characterized by a service temperature exceeding 700 °C.

3. The method of claim 1, wherein said mask is formed of a material selected from oxide, carbide, and nitride materials characterized by a service temperature exceeding 700°C.

4. The method of any one of claims 1 to 3, wherein said mask is formed of a material selected from a group consisting of: AI2O3, HfCh, ZrCh, ZnO, SiCh, TiCh, MgO, CnCh, SiC, TiC, ZrC, and BN.

5. The method of any one of claims 1 to 4, wherein said superconducting material is a high-Zcsuperconductor.

6. The method of claim 5, wherein said superconducting material is selected from a group consisting of: YBCO, LBCO, BSCCO, TBCCO, HBCCO.

7. The method of any one of claims 1 to 6, comprising: applying a PMMA / photoresist layer on said substrate; etching said selected pattern on said PMMA / photoresist layer; applying a mask layer on said substrate and PMMA / photoresist pattern; lifting said mask layer from the selected pattern to remove a mask material from regions of the selected pattern; and depositing material for forming said superconducting layer on said substrate and mask, thereby forming a superconducting pattern in accordance with the selected pattern.

8. The method of any one of claims 1 to 7, wherein said pattern comprises at least one wire region having a width of 5 pm or less.

9. The method of any one of claims 1 to 8, wherein said pattern comprises at least one wire region having a width of 1 pm or less.

10. The method of any one of claims 1 to 9, wherein said selected pattern comprises at least one meander wire region having a width of 5 pm or less.

11. The method of any one of claims 1 to 10, wherein said selected pattern comprises tapered current input and output connections, said tapered current input and output connection having varying width selected to provide impedance matching between input and output electrical circuits and one or more superconducting wire regions within said selected pattern.

12. The method of any one of claims 1 to 11, wherein said selected pattern comprises at least two connection pads, the method further comprises applying a selected metallic layer on said connection pads.

13. The method of any one of claims 1 to 12, wherein providing a substrate suitable for growth of superconducting layer comprises selecting a substrate material having a lattice structure that matches a lattice structure of superconducting phase of a selected superconducting material, such when depositing material for forming said superconducting layer on said substrate and mask, the lattice structure of the substrate supports a crystalline arrangement of the material promoting superconducting properties thereof.

14. An electronic unit comprising a superconducting circuit comprising one or more wire regions characterized by width of the wire region being 5 pm or less.

15. The electronic unit of claim 13, wherein said superconducting circuit is formed on a substrate, the superconducting circuit comprises a pattern of a material composition having high-T superconductor properties surrounded by regions of insulating phase of a similar material composition having an electrically insulating property.

16. The electronic unit of claim 15, wherein the regions of insulating phase of the similar material are formed on a mask material placed on the substrate.

17. The electronic unit of claim 16, wherein the mask material is formed of oxide, carbide, or nitride materials characterized by a service temperature exceeding 700 °C.

18. The electronic unit of claim 16 or 17, wherein said mask material is formed of a material selected from a group consisting of: AI2O3, HfCh, ZrO2, ZnO, SiO2, TiO2, MgO, Cr2O3, SiC, TiC, ZrC, and BN.

19. The electronic unit of any one of claims 14 to 18, wherein said superconducting circuit comprising one or more meander structure section having a width of 5 pm or less.

20. The electronic unit of any one of claims 14 to 18, wherein said superconducting circuit comprising one or more meander structure sections having width of 1 pm or less.

21. A photon detector comprising one or more superconducting wire regions formed of a high-Zcsuperconductor and having width of 5 pm or less.

22. The photon detector of claim 21, wherein said one or more superconducting wire regions are formed on a substrate, surrounded by regions of insulating phase of similar material composition formed on a mask material placed on said substrate.

23. The photon detector of claim 22, wherein said mask material is formed of oxide, carbide, or nitride materials characterized by a service temperature exceeding 700°C.

24. The photon detector of claim 22 or 23, wherein said mask material is formed of a material selected from a group consisting of: AI2O3, HfCh, ZrO2, ZnO, SiO2, TiO2, MgO, Cr2O3, SiC, TiC, ZrC, and BN.

25. The photon detector of any one of claims 21 to 24, wherein said one or more superconducting wire regions comprising one or more meander structure section having a wire width of 5 pm or less.

26. The photon detector of any one of claims 21 to 25, wherein said one or more superconducting wire regions comprising one or more meander structure section having a wire width of 1 pm or less.

27. The photon detector of any one of claims 21 to 26, further comprising an electric circuit configured to transmit a selected current through said one or more superconducting wire regions and determine data on voltage required for transmission of the selected current, thereby determining data on one or more photons impinging on the one or more superconducting wire regions.

28. The photon detector of any one of claims 21 to 27, comprising a cooling arrangement configured to maintain the one or more superconducting wire regions at a selected temperature range being between 60 K and 120 K.

29. The photon detector of any one of claims 21 to 28, comprising a liquid nitrogen cooling arrangement for cooling at least the one or more superconducting wire regions.

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