Laminated substrate, semiconductor element, and method for manufacturing semiconductor element

A bonded substrate with angled crystal planes between Group III nitride and support substrates addresses heat resistance issues, ensuring semiconductor devices withstand high temperatures without cracking.

WO2025196960A1PCT designated stage Publication Date: 2025-09-25NGK INSULATORS LTD
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Patent Information

Application Number
PCT/JP2024/010802
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-03-19
Publication Date
2025-09-25

AI Technical Summary

Technical Problem

Existing bonded substrates made of Group III element nitrides lack sufficient heat resistance, leading to cracking during semiconductor device manufacturing.

Method used

A bonded substrate comprising a Group III nitride crystal substrate and a support substrate with a different material, such as silicon carbide, where the crystal planes form a specific angle to mitigate thermal stress, enhancing heat resistance.

Benefits of technology

The bonded substrate exhibits improved heat resistance, preventing cracking and fracture in high-temperature environments, enabling high-yield semiconductor device manufacturing.

✦ Generated by Eureka AI based on patent content.

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Abstract

Provided is a laminated substrate that has excellent heat resistance. This laminated substrate is formed of: a group-III element nitride crystal substrate; and a support substrate composed of a material different from the material constituting the group-III element nitride crystal substrate. The support substrate is composed of a crystal having a hexagonal crystal structure. In a plan view, the minimum value of the angle formed by the m-plane of the group-III element nitride crystal substrate and the m-plane of the support substrate is 1° or more.
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Description

LAMINATED SUBSTRATE, SEMICONDUCTOR DEVICE, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

[0001] The present invention relates to a bonded substrate, a semiconductor element, and a method for manufacturing a semiconductor element.

[0002] Group III element nitrides are being actively developed as semiconductor materials, for example. As a substrate for use in a semiconductor device using a Group III element nitride, for example, as described in Patent Document 1, a bonded substrate has been proposed in which a Group III element nitride crystal layer is bonded to a substrate having a thermal expansion coefficient different from that of the Group III element nitride crystal layer.

[0003] Patent No. 4458116

[0004] However, the bonded substrates may not have sufficient heat resistance, and may crack during the manufacture of semiconductor devices.

[0005] In view of the above, a main object of the present invention is to provide a bonded substrate having excellent heat resistance.

[0006] 1. A bonded substrate according to an embodiment of the present invention is a bonded substrate comprising a group III nitride crystal substrate and a support substrate made of a material different from that of the group III nitride crystal substrate, wherein the support substrate is made of crystals having a hexagonal crystal structure, and the minimum angle formed between the m-plane of the group III nitride crystal substrate and the m-plane of the support substrate in a planar view is 1° or more. 2. In the bonded substrate described in 1 above, the minimum angle formed between the m-plane of the group III nitride crystal substrate and the m-plane of the support substrate in a planar view may be 15° or less. 3. In the bonded substrate described in 1 or 2 above, the minimum angle formed between the m-plane of the group III nitride crystal substrate and the m-plane of the support substrate in a planar view may be 3° or more. 4. In the bonded substrate described in any one of 1 to 3 above, the thickness of the group III nitride crystal substrate may be 0.5 μm or more and 10 μm or less. 5. In the bonded substrate described in any one of 1 to 4 above, the support substrate may have a thickness of 100 μm or more and 1000 μm or less. 6. In the bonded substrate described in any one of 1 to 5 above, the thermal expansion coefficient of the Group III nitride crystal substrate may be greater than the thermal expansion coefficient of the support substrate. 7. In the bonded substrate described in any one of 1 to 6 above, the support substrate may contain silicon carbide. 8. A semiconductor device according to another embodiment of the present invention comprises the bonded substrate described in any one of 1 to 7 above and a device layer provided on the bonded substrate. 9. A method for manufacturing a semiconductor device according to yet another embodiment of the present invention comprises forming a device layer on the bonded substrate described in any one of 1 to 7 above at a temperature of 1000° C. or more.

[0007] According to an embodiment of the present invention, a bonded substrate having excellent heat resistance can be provided.

[0008] FIG. 3A is a schematic cross-sectional view showing the overall configuration of a bonded substrate according to one embodiment of the present invention. FIG. 4B is an explanatory diagram of hexagonal crystal planes. FIG. 5 is a diagram showing an example of a manufacturing process for a Group III element nitride crystal substrate. FIG. 5C is a diagram continuing from FIG. 3A. FIG. 5D is a diagram continuing from FIG. 3B. FIG. 6A is a diagram showing the manufacturing process for a bonded substrate according to one embodiment of the present invention. FIG. 6B is a diagram continuing from FIG. 4A. FIG. 7A is a diagram showing an example of a method for adjusting the angle formed by the crystal planes. FIG. 7B is a schematic cross-sectional view showing the overall configuration of a semiconductor element according to one embodiment of the present invention.

[0009] Hereinafter, embodiments of the present invention will be described with reference to the drawings, but the present invention is not limited to these embodiments. In order to clarify the description, the drawings may schematically show the width, thickness, shape, etc. of each part compared to the embodiments, but these are merely examples and do not limit the interpretation of the present invention. Furthermore, in the drawings, the same or equivalent elements are given the same reference numerals, and redundant explanations may be omitted.

[0010] A. Bonded Substrate Figure 1 is a schematic cross-sectional view showing the general configuration of a bonded substrate according to one embodiment of the present invention. The bonded substrate 100 has a support substrate 10 and a group III element nitride crystal substrate 20. The bonded substrate 100 has a group III element nitride crystal substrate 20 having a first main surface 21 and a second main surface 22 facing each other, and a support substrate 10 arranged on the side of the group III element nitride crystal substrate 20 facing the second main surface 22. The bonded substrate 100 can be obtained, for example, by bonding the group III element nitride crystal substrate 20 and the support substrate 10 together.

[0011] Although not shown, the bonded substrate 100 may further include any layer. The type, function, number, combination, arrangement, etc. of such layers may be appropriately set depending on the purpose. For example, the bonded substrate 100 may include a device layer formed on the Group III element nitride crystal substrate 20. Furthermore, for example, the bonded substrate 100 may include a bonding layer disposed between the support substrate 10 and the Group III element nitride crystal substrate 20.

[0012] The bonded substrate 100 can be manufactured in any appropriate shape. In one embodiment, it can be manufactured in the form of a so-called wafer. The size of the bonded substrate 100 can be appropriately set depending on the purpose. For example, the diameter of the wafer is 50 mm to 200 mm. The bonded substrate 100 may have an orientation flat or a notch formed in a part thereof to indicate the crystal orientation (for example, the crystal orientation of the wafer).

[0013] The group III element nitride crystal substrate 20 is made of group III element nitride crystal. Examples of group III elements that make up the group III element nitride include aluminum (Al), gallium (Ga), and indium (In). These may be used alone or in combination of two or more. Specific examples of group III element nitrides include aluminum nitride (Al x N), gallium nitride (Ga y N), indium nitride (In z N), aluminum gallium nitride (Al x Ga y N), gallium indium nitride (Ga y In z N), aluminum indium nitride (Al x In z N), aluminum gallium indium nitride (Al x Ga y In z In each chemical formula in parentheses, typically, x+y+z=1.

[0014] The group III element nitride constituting the group III element nitride crystal substrate 20 may be doped with an element other than a group III element. Specifically, the group III element nitride constituting the group III element nitride crystal substrate 20 may contain an element other than a group III element as a dopant. By being doped with an element other than a group III element, the group III element nitride crystal substrate 20 may be semi-insulating. In this case, the resistivity of the group III element nitride crystal substrate 20 may be, for example, 1×10 5 Ω・cm or more 1×10 14 Ω cm or less, preferably 1×10 6Ω cm or more, more preferably 1×10 7 It is Ω·cm or more.

[0015] The resistivity can be determined, for example, from the change in the amount of charge over time. Specifically, the object to be measured is inserted into a capacitor consisting of a probe and a stage, a pulse voltage is applied, the change in the amount of charge of the object to be measured over time is measured, and the resistivity is calculated from the measured value. In this case, since the probe does not contact the object to be measured, the resistivity can be determined without forming an ohmic contact electrode. The spatial resolution of the probe can be approximately 1 mm to 10 mm. How to determine the resistivity is described, for example, in the non-patent document "R. Stibal et al., "Contactless evaluation of semi-insulating GaAs wafer resistivity using the time-dependent charge measurement," Semiconductor Science and Technology 6, p. 995 (1991)."

[0016] As the dopant, for example, a transition element such as zinc (Zn), iron (Fe), manganese (Mn), vanadium (V), chromium (Cr), cobalt (Co), or nickel (Ni) can be used. Carbon (C) can also be used as a dopant. These elements can be used alone or in combination of two or more.

[0017] The Group III element nitride crystal typically has a hexagonal wurtzite crystal structure. In the Group III element nitride crystal, the <0001> direction typically corresponds to the c-axis, the <1-100> direction typically corresponds to the m-axis, and the <11-20> direction typically corresponds to the a-axis. Furthermore, the crystal plane perpendicular to the c-axis is the c-plane, the crystal plane perpendicular to the m-axis is the m-plane, and the crystal plane perpendicular to the a-axis is the a-plane. In one embodiment, the thickness direction of the Group III element nitride crystal substrate 20 is parallel or substantially parallel to the c-axis, the first main surface 21 is a Group III element polar plane on the (0001) plane side, and the second main surface 22 is a nitrogen polar plane on the (000-1) plane side. The first main surface 21 may be parallel to the (0001) plane or may be tilted relative to the (0001) plane. The inclination angle of the first main surface 21 with respect to the (0001) plane is, for example, 10° or less, and may be 5° or less, 2° or less, or 1° or less. The second main surface 22 may be parallel to the (000-1) plane or may be inclined with respect to the (000-1) plane. The inclination angle of the second main surface 22 with respect to the (000-1) plane is, for example, 10° or less, and may be 5° or less, 2° or less, or 1° or less.

[0018] The thickness of the Group III element nitride crystal substrate 20 is, for example, 0.5 μm or more, and preferably 1 μm or more, while the thickness of the Group III element nitride crystal substrate 20 is, for example, 10 μm or less, and preferably 5 μm or less.

[0019] The support substrate 10 may be made of a material (hereinafter, sometimes referred to as a heterogeneous material) different from the material constituting the group III element nitride crystal substrate 20. By employing such a configuration, it is possible to obtain a bonded substrate 100 that satisfies properties (e.g., high heat dissipation) that cannot be achieved with the group III element nitride crystal substrate 20 alone. The support substrate 10 may be made of a crystal having a hexagonal crystal structure. In this case, specific examples of materials constituting the support substrate 10 include silicon carbide, aluminum nitride, gallium nitride, and sapphire. In one embodiment, the support substrate 10 is preferably made of silicon carbide or aluminum nitride. These materials have high thermal conductivity, and can be used to obtain semiconductor devices with excellent heat dissipation, for example.

[0020] On the other hand, the support substrate 10 made of a different material may have a different thermal expansion coefficient than the group III element nitride crystal substrate 20. Specifically, the constituent material of the group III element nitride crystal substrate 20 and the constituent material of the support substrate 10 may have different thermal expansion coefficients. The absolute value of the difference between the thermal expansion coefficient of the support substrate 10 and the thermal expansion coefficient of the group III element nitride crystal substrate 20 may be, for example, 0.5×10 -6 / K ~ 3.5 x 10 -6 / K, and 2.5 × 10 -6 / K or more. The thermal expansion coefficient of the group III element nitride crystal substrate 20 may be larger or smaller than that of the support substrate 10. For example, if the support substrate 10 is made of silicon carbide or aluminum nitride and the group III element nitride crystal substrate 20 is made of gallium nitride, the thermal expansion coefficient of the group III element nitride crystal substrate 20 will be larger than that of the support substrate 10.

[0021] The thickness of the support substrate 10 is, for example, 100 μm or more, and preferably 200 μm or more, while the thickness of the support substrate 10 is, for example, 1000 μm or less.

[0022] In the bonded substrate 100, the crystal orientation of the Group III nitride crystal substrate 20 and the crystal orientation of the support substrate 10 can be arranged in any appropriate manner. Figure 2 is an explanatory diagram of a hexagonal crystal plane. Specifically, when viewed from the c-plane, the m-plane perpendicular to the m-axis and the a-plane perpendicular to the a-axis can be arranged as shown in Figure 2. The m-plane tends to cleave easily.

[0023] In the bonded substrate 100, the support substrate 10 is preferably arranged so that its crystal plane (e.g., the a-plane and / or m-plane) forms a predetermined angle with respect to the m-plane of the Group III nitride crystal substrate 20 in a plan view. By adopting such an arrangement, the bonded substrate 100 can have excellent heat resistance. In a high-temperature environment, stress can be generated in both substrates of the bonded substrate 100, which have different thermal expansion coefficients. This stress can become larger as the environmental temperature increases, and its effect can become significant in high-temperature environments, for example, at 1000°C or higher. Specifically, tensile stress can be generated in the substrate with a small thermal expansion coefficient, and compressive stress can be generated in the substrate with a large thermal expansion coefficient. Substrates that experience tensile stress are prone to cracking and fracture. When the substrates have cleavage properties, cracking and fracture are likely to occur along the cleavage plane. In a bonded substrate, if a crack or fracture occurs in one substrate, the other substrate may also crack and fracture accordingly. By adopting the above-described arrangement, both substrates can have resistance to cleavage with each other, and the bonded substrate can have excellent heat resistance, and for example, the occurrence of breakage or cracks can be suppressed even when placed in a high-temperature environment.

[0024] For example, the minimum value of the angle θ formed between the m-plane of the Group III element nitride crystal substrate 20 and the m-plane of the support substrate 10 is 1° or more, preferably 2° or more, and more preferably 3° or more. The minimum value of the angle θ formed between the m-plane of the Group III element nitride crystal substrate 20 and the m-plane of the support substrate 10 can be 30° or less, preferably 29° or less, more preferably 28° or less, and even more preferably 27° or less. In this case, the minimum value of the angle formed between the m-plane of the Group III element nitride crystal substrate 20 and the a-plane of the support substrate 10 can be 0° or more, preferably 1° or more, more preferably 2° or more, and even more preferably 3° or more. The a-plane tends to cleave next to the m-plane.

[0025] In one embodiment, the minimum value of the angle θ formed between the m-plane of the Group III element nitride crystal substrate 20 and the m-plane of the support substrate 10 is preferably 15° or less. In this case, the minimum value of the angle formed between the m-plane of the Group III element nitride crystal substrate 20 and the a-plane of the support substrate 10 is preferably 15° or more. With this arrangement, the resistance of both substrates to cleavage is well maintained, and the bonded substrate 100 can have even better heat resistance.

[0026] B. Manufacturing Method As described above, the bonded substrate 100 can be obtained, for example, by bonding a Group III element nitride crystal substrate 20 and a support substrate 10 together.

[0027] <Group III Element Nitride Crystal Substrate> A substrate produced by any appropriate method can be used as the Group III element nitride crystal substrate 20. In one embodiment, the Group III element nitride crystal substrate 20 is produced by growing a Group III element nitride crystal on a seed crystal film of a seed crystal substrate having a base substrate and a seed crystal film, and using the grown Group III element nitride crystal as the Group III element nitride crystal substrate 20 (typically, a free-standing substrate).

[0028] 3A to 3C are diagrams showing an example of a manufacturing process for a Group III element nitride crystal substrate, in which a seed crystal film 32 is formed on an upper surface 31 a of a base substrate 31 having an upper surface 31 a and a lower surface 31 b facing each other, thereby completing a seed crystal substrate 33.

[0029] The base substrate 31 may be, for example, a substrate having a shape and size that allows for the production of a Group III element nitride crystal substrate having the desired shape and size. Typically, the base substrate 31 is disk-shaped with a diameter of 50 mm to 200 mm. The base substrate 31 has a thickness of, for example, 200 μm to 2000 μm. Any appropriate substrate may be used as the base substrate 31. Typically, the base substrate 31 is made of a single crystal. Examples of materials that may be used for the base substrate 31 include sapphire, crystal-oriented alumina, silicon, gallium oxide, aluminum gallium nitride, gallium arsenide, and silicon carbide.

[0030] The thickness of the seed crystal film 32 is, for example, 0.2 μm or more. From the viewpoint of preventing meltback and disappearance during growth of the Group III element nitride crystal, the thickness of the seed crystal film 32 is preferably 1 μm or more, and more preferably 2 μm or more. On the other hand, from the viewpoint of productivity, the thickness of the seed crystal film 32 is preferably 10 μm or less, and more preferably 5 μm or less. A Group III element nitride is typically used as the material constituting the seed crystal film 32. Details of the Group III element nitride are as described above.

[0031] A typical method for forming the seed crystal film 32 is vapor deposition. Specific examples of vapor deposition include metal organic chemical vapor deposition (MOCVD), hydride vapor phase epitaxy (HVPE), pulsed xenon deposition (PXD), molecular beam epitaxy (MBE), evaporation, and sublimation. Among these, MOCVD is preferably used.

[0032] The formation of the seed crystal film 32 by the MOCVD method includes, for example, a first formation step and a second formation step, in this order. Specifically, in the first formation step, a first layer (low-temperature grown buffer layer) (not shown) is formed on the base substrate at a temperature T1 (e.g., 450°C to 550°C), and in the second formation step, a second layer (not shown) is formed at a temperature T2 (e.g., 1000°C to 1200°C) higher than temperature T1. The thickness of the first layer is, for example, 20 nm to 50 nm. The thickness of the second layer is, for example, 1 μm to 5 μm.

[0033] Next, a group III element nitride crystal is grown on the seed crystal film 32 of the seed crystal substrate 33 to form a group III element nitride crystal layer 34, thereby obtaining a laminated substrate 35 as shown in FIG. 3B . The degree of growth of the group III element nitride crystal (the thickness of the group III element nitride crystal layer 34) can be adjusted depending on the desired thickness of the group III element nitride crystal substrate 20. Any appropriate direction can be selected as the growth direction of the group III element nitride crystal depending on the application, purpose, etc. Specific examples include the normal directions to the c-plane, a-plane, and m-plane, and the normal directions to planes inclined relative to the c-plane, a-plane, and m-plane.

[0034] Group III element nitride crystals can be grown by any appropriate method. The method for growing Group III element nitride crystals is not particularly limited, as long as it is a method that can achieve a crystal orientation that roughly follows the crystal orientation of the seed crystal film. Specific examples of methods for growing Group III element nitride crystals include vapor phase growth methods such as metal organic chemical vapor deposition (MOCVD), hydride vapor phase epitaxy (HVPE), pulsed excited deposition (PXD), molecular beam epitaxy (MBE), and sublimation; and liquid phase growth methods such as flux deposition, ammonothermal deposition, hydrothermal deposition, and sol-gel deposition. These methods can be used alone or in combination of two or more.

[0035] Preferably, a flux method (e.g., a Na flux method) is employed as a method for growing Group III element nitride crystals. Details of such growth methods are described, for example, in Japanese Patent No. 5451085, and growth may be performed by adjusting various conditions of the described growth method as appropriate. Specifically, Group III element nitride crystals can be grown by adjusting various conditions using a crystal manufacturing apparatus that includes a pressure-resistant vessel capable of supplying high-pressure nitrogen gas, a turntable that can rotate within the pressure-resistant vessel, and an outer vessel placed on the turntable.

[0036] Growth of Group III nitride crystals by the flux method is typically carried out using a crucible as a growth container. Specifically, the seed crystal substrate is placed at a predetermined position in the crucible, and the crucible is then filled with raw materials. The crucible containing the seed crystal substrate is typically placed with a lid on in a nitrogen-containing atmosphere at a predetermined pressure and temperature for growth.

[0037] The raw material is, for example, a melt composition containing a flux, a Group III element, and, if necessary, a dopant. The flux preferably contains at least one of an alkali metal and an alkaline earth metal, and more preferably metallic sodium. Typically, the flux and a metal source material are mixed together. As the metal source material, an elemental metal, an alloy, a metal compound, etc. can be used, but from the viewpoint of ease of handling, an elemental metal is preferably used.

[0038] The crucible (including the lid) can be made of any suitable material that can be used in the flux method. Examples of the crucible material include alumina, yttria, and YAG (yttrium aluminum garnet). The crucible material may be a single crystal or a polycrystal (ceramic). The ceramic may have a high relative density, such as by HIP treatment, to give it translucency.

[0039] As described above, the growth can be carried out in a nitrogen-containing atmosphere. The growth atmosphere can contain other gases in addition to nitrogen. The other gases are preferably inert gases such as argon, helium, and neon.

[0040] The pressure of the atmosphere during growth may be set to any appropriate pressure. For example, from the viewpoint of preventing evaporation of the flux, the pressure of the atmosphere during growth may be, for example, 1 MPa or more, or may be, for example, 2 MPa or more, or may be, for example, 3 MPa or more. On the other hand, for example, from the viewpoint of preventing the manufacturing equipment from becoming large-scale, the pressure of the atmosphere during growth may be, for example, 50 MPa or less, or may be, for example, 10 MPa or less.

[0041] The temperature of the atmosphere during growth can be set to any appropriate temperature, preferably 700°C to 1000°C, more preferably 800°C to 900°C.

[0042] The growth is preferably carried out while rotating the base substrate (crucible) from the viewpoint of, for example, promoting dissolution of high-pressure nitrogen gas into the melt composition. For example, the crucible with a lid is placed in the outer container of the crystal production apparatus and placed on a turntable, and the turntable is rotated (for example, on its axis) in this state to rotate the crucible.

[0043] After growth of the group III element nitride crystal, as shown in FIG. 3C , the base substrate 31 is removed from the group III element nitride crystal (group III element nitride crystal layer 34) to obtain a free-standing substrate 36. Typically, as shown in the figure, the free-standing substrate 36 may include the group III element nitride crystal layer 34 and the seed crystal film 32. For example, the free-standing substrate 36 is obtained by separating the group III element nitride crystal layer 34 from the base substrate 31. The group III element nitride crystal may be separated from the base substrate by any appropriate method. Examples of methods for separating the group III element nitride crystal include a method of spontaneously separating the group III element nitride crystal from the base substrate by utilizing the difference in thermal contraction between the group III element nitride crystal and the base substrate during a cooling step after growth of the group III element nitride crystal, a separation method using chemical etching, and a laser lift-off method using laser light irradiation. Alternatively, the free-standing substrate may be obtained by, for example, grinding and removing the base substrate 31, or by slicing the base substrate using a wire saw or the like.

[0044] The free-standing substrate 36 can be used as the group III element nitride crystal substrate 20 as is, but typically the free-standing substrate 36 is subjected to any suitable processing to obtain the group III element nitride crystal substrate 20 .

[0045] One example of processing performed on the free-standing substrate 36 is grinding of the peripheral portion (for example, grinding using a diamond grinding wheel). Typically, the free-standing substrate 36 is ground to have the desired shape and size (for example, a disk shape having a desired diameter).

[0046] Other examples of processing performed on the free-standing substrate 36 include grinding and polishing (e.g., chemical mechanical polishing (CMP) and lap polishing) of the main surfaces (upper and lower surfaces). Typically, the substrate is thinned and flattened to a desired thickness by grinding and polishing. In one embodiment, the seed crystal film 32 is removed by processing the main surface, and the group III nitride crystal substrate 20 can be left with only the group III nitride crystal layer 34 (only a single crystal growth layer).

[0047] Furthermore, for example, processing performed on the free-standing substrate 36 includes chamfering the outer peripheral edge, removing a process-affected layer formed on the surface by grinding or polishing, and removing residual stress that may result from the process-affected layer.

[0048] <Bonding> In one embodiment, as shown in Fig. 4A, a support substrate 10 and a group III element nitride crystal substrate 20 are prepared and directly bonded together, thereby obtaining a bonded body 101 (bonded substrate 100) of the support substrate 10 and the group III element nitride crystal substrate 20, as shown in Fig. 4B.

[0049] The bonding is performed so that the crystal planes of the respective substrates form the above-mentioned predetermined angle. FIG. 5 shows an example of a method for adjusting the angle between the crystal planes. The support substrate 10 has an orientation flat 10a formed along a crystal plane (e.g., m-plane). The Group III nitride crystal substrate 20 also has an orientation flat 20a formed along a crystal plane (e.g., m-plane). The orientation flat 10a of the support substrate 10 and the orientation flat 20a of the Group III nitride crystal substrate 20 are then positioned so that they form a predetermined angle θ in a plan view. An example of the angle θ is as described above. In this manner, a bonded body (bonded substrate 100) can be obtained in which the crystal orientations of the Group III nitride crystal substrate 20 and the support substrate 10 are arranged in a predetermined manner.

[0050] For the above direct bonding, it is preferable that the bonding surface 10b of the support substrate 10 and the bonding surface 20b of the Group III nitride crystal substrate 20 have each been activated by any appropriate activation treatment.

[0051] The activation process is typically performed by irradiating a neutralizing beam. Preferably, a neutralizing beam is generated using an apparatus such as that described in JP 2014-086400 A, and the activation process is performed by irradiating this beam. Specifically, a saddlefield fast atom beam (FAB) source is used as the beam source, an inert gas such as argon or xenon is introduced into the chamber, and a high voltage is applied to the electrode from a DC power supply. This generates a saddlefield electric field between the electrode (positive electrode) and the housing (negative electrode), causing electrons to move and generating a beam of atoms and ions from the inert gas. Of the beams that reach the grid, the ion beam is neutralized by the grid, and a beam of neutral atoms is emitted from the fast atom beam source. The voltage during the activation process by beam irradiation is preferably 0.5 kV to 2.0 kV, and the current during the activation process by beam irradiation is preferably 50 mA to 200 mA.

[0052] After the activation treatment, the bonding surface 10b of the support substrate 10 and the bonding surface 20b of the Group III element nitride crystal substrate 20 can be brought into contact with each other and pressure applied to directly bond them. The contact and pressure application of the bonding surfaces is preferably carried out in a vacuum atmosphere. The temperature at this time is typically room temperature. Specifically, a temperature of 20°C or higher and 40°C or lower is preferred, and a temperature of 25°C or higher and 30°C or lower is more preferred. The pressure applied is preferably 100N to 20,000N.

[0053] During bonding, it is preferable that the bonding surface 10b of the support substrate 10 and the bonding surface 20b of the Group III nitride crystal substrate 20 be flat. Specifically, the arithmetic mean roughness Ra of each of the bonding surface 10b of the support substrate 10 and the bonding surface 20b of the Group III nitride crystal substrate 20 is preferably 1 nm or less, more preferably 0.7 nm or less, even more preferably 0.5 nm or less, and particularly preferably 0.3 nm or less. Methods for flattening the surfaces of each substrate include, for example, mirror polishing by chemical mechanical polishing (CMP), lap polishing, etc.

[0054] Before bonding, it is preferable that the bonding surfaces be cleaned, for example, to remove abrasive residue. Examples of cleaning methods include wet cleaning, dry cleaning, and scrub cleaning. Among these, scrub cleaning is preferred because it allows for simple and efficient cleaning. A specific example of scrub cleaning is a method in which a cleaning agent (e.g., the Sun Wash series manufactured by Lion Corporation) is used, followed by cleaning with a scrub cleaner using a solvent (e.g., a mixed solution of acetone and isopropyl alcohol (IPA)).

[0055] The bonded body 101 may be subjected to any suitable processing to obtain the bonded substrate 100. For example, after bonding to the support substrate 10, the group III element nitride crystal substrate 20 may be thinned by polishing or the like.

[0056] C. Applications The above-mentioned laminated substrate can be typically applied to any suitable semiconductor device. Specifically, any suitable device layer can be formed on the laminated substrate.

[0057] 6 is a schematic cross-sectional view showing the general configuration of a semiconductor device according to one embodiment of the present invention, taking a high electron mobility transistor (HEMT) as an example. The HEMT device 200 includes a laminated substrate 100, a device layer 53 including a channel layer 51 and a barrier layer 52 in this order, and a source electrode 61, a drain electrode 62, and a gate electrode 63 provided on the device layer 53. These electrodes may each be metal electrodes having a thickness of approximately 10-15 nm.

[0058] The device layer 53 is typically made of a Group III element nitride and can be formed by epitaxially growing a crystal on the Group III element nitride crystal substrate 20. The channel layer 51 has a thickness of, for example, 50 nm to 5 μm. The barrier layer 52 has a thickness of, for example, 2 nm to 40 nm.

[0059] In one embodiment, the Group III element nitride crystal substrate 20 may be made of gallium nitride doped with an element other than a Group III element. In this case, the channel layer 51 is preferably made of gallium nitride. The barrier layer 52 is preferably made of at least one selected from aluminum gallium nitride, aluminum indium nitride, and aluminum indium gallium nitride. The channel layer 51 and the barrier layer 52 may each be formed by any appropriate method.

[0060] A typical method for forming (growing) the device layer is a vapor deposition method. Specific examples of vapor deposition methods include metal organic chemical vapor deposition (MOCVD), hydride vapor phase epitaxy (HVPE), pulsed excited deposition (PXD), molecular beam epitaxy (MBE), evaporation, and sublimation. Among these, MOCVD is preferably used. The formation temperature (growth temperature) of the device layer is, for example, 800°C or higher and 1200°C or lower, preferably 1000°C or higher. As described above, the bonded substrate according to the embodiment of the present invention can have excellent heat resistance, and therefore can be used to successfully manufacture semiconductor devices. Specifically, the bonded substrate can prevent breakage or cracks from occurring in the bonded substrate during device layer formation, allowing semiconductor devices to be manufactured with a high yield.

[0061] The present invention will be described in detail below using examples, but the present invention is not limited to these examples. The resistivity and arithmetic mean roughness Ra were measured using the following measurement methods. <Resistivity> The resistivity within the substrate surface was measured using a non-contact method based on the change in charge amount over time. Specifically, the substrate was placed on a stage, and a probe was brought close to the substrate (with a gap of 1 mm to 2 mm) to form a capacitor. A pulse voltage with a pulse width of 100 ns was applied, and the change in the charge amount over time on the substrate was measured for 1 second at room temperature (25°C) to calculate the resistivity. <Arithmetic mean roughness Ra> The arithmetic mean roughness Ra of the substrate was measured over a field of view of 10 μm x 10 μm using an atomic force microscope (Hitachi High-Tech Corporation, "AFM5400L").

[0062] Example 1 (Fabrication of Gallium Nitride Substrate) A c-plane sapphire substrate having a diameter of 4 inches was prepared, and a gallium nitride film having a thickness of 2 μm was formed on the sapphire substrate by MOCVD to fabricate a seed crystal substrate.

[0063] Gallium nitride crystals were grown on seed crystal substrates using a crystal manufacturing apparatus equipped with a pressure-resistant vessel capable of supplying high-pressure nitrogen gas, a turntable rotatable within the pressure-resistant vessel, an outer vessel mounted on the turntable, and a crystal growth furnace for placing the outer vessel under a desired temperature environment. The obtained seed crystal substrate was placed in an alumina crucible in a nitrogen atmosphere glove box. Next, 40 g of metallic gallium, 80 g of metallic sodium, and manganese as a doping element were melted in the glove box and filled into the crucible. The amount of manganese added was adjusted within the range of 1 mg to 1 g. The seed crystal substrate was then immersed in a flux melt and covered with an alumina plate. In this state, the crucible was placed in a stainless steel inner vessel, which was then placed in a stainless steel outer vessel capable of accommodating the inner vessel, and the outer vessel was closed with a lid equipped with a nitrogen inlet pipe. In this state, the outer vessel was placed on a turntable located within the crystal manufacturing apparatus, and the pressure-resistant vessel of the crystal manufacturing apparatus was sealed with a lid. Next, the heater was operated to heat the crystal growth furnace in the crystal manufacturing apparatus to a uniform temperature of 850°C, while nitrogen gas was introduced into the pressure vessel from a nitrogen gas cylinder until the pressure reached 4 MPa, and the outer vessel was rotated horizontally. This state was maintained for 35 hours to grow gallium nitride crystal.

[0064] After that, it was naturally cooled to room temperature and decompressed to atmospheric pressure, and then the lid of the pressure-resistant vessel was opened and the crucible was removed from inside. The solidified metallic sodium in the crucible was removed, and the seed crystal substrate on which the gallium nitride crystal had been grown was recovered. Next, at room temperature, an ultraviolet laser was irradiated from the sapphire substrate side of the seed crystal substrate on which the gallium nitride crystal had been grown to decompose the gallium nitride film on the seed crystal substrate, and the grown gallium nitride crystal was separated from the sapphire substrate. In this way, a gallium nitride crystal with a diameter of 4 inches and a thickness of 1 mm was obtained.

[0065] Thereafter, the surface of the gallium nitride crystal separated from the sapphire substrate and the opposite surface were ground and polished to obtain a 4-inch diameter, 0.5 mm thick, and 1×10 resistivity. 6 A semi-insulating gallium nitride substrate having a resistivity of Ω·cm or more was obtained. The surface (bonding surface) of the obtained gallium nitride substrate was mirror-finished, and its arithmetic mean roughness Ra was 0.2 nm.

[0066] The crystal orientation of the obtained gallium nitride substrate was measured using an automatic X-ray single crystal orientation measuring device (manufactured by Rigaku Corporation, "FSAS III"), and an orientation flat was formed on the gallium nitride substrate along the m-plane determined from the measured crystal orientation.

[0067] (Bonding with Support Substrate) A silicon carbide substrate (a heat dissipation semi-insulating SiC substrate (D grade) manufactured by SICC Corporation) having an orientation flat on its m-plane, a diameter of 4 inches, and a thickness of 500 μm was mirror-finished on its surface (bonding surface) to have an arithmetic mean roughness Ra of 0.2 nm, and this was used as a support substrate.

[0068] Next, the gallium nitride substrate and the support substrate were directly bonded to each other. Specifically, after cleaning the bonding surfaces of the gallium nitride substrate and the support substrate, both substrates were placed in a vacuum chamber and heated for 10 minutes. -6 After evacuation to the Pa range, the bonding surfaces of both substrates were irradiated with a fast atom beam (accelerating voltage 1 kV, Ar flow rate 27 sccm) for 120 seconds. After irradiation, the beam-irradiated surfaces of both substrates were overlapped and pressed at 10,000 N for 2 minutes to bond the two substrates. The two substrates were overlapped so that the angle θ between the orientation flats of each substrate was 1° in plan view.

[0069] Thereafter, the gallium nitride substrate of the resulting bonded body was ground and polished from the original thickness of 0.5 mm to 5 μm, thereby obtaining a bonded substrate.

[0070] [Examples 2 to 9] Bonded substrates were obtained in the same manner as in Example 1, except that when bonding the gallium nitride substrate and the support substrate, the two substrates were superimposed so that the angles θ between the orientation flats of each substrate were 2°, 3°, 6°, 9°, 12°, 15°, 18°, and 30° in plan view.

[0071] Comparative Example 1 A bonded substrate was obtained in the same manner as in Example 1, except that when bonding the gallium nitride substrate and the support substrate, the two substrates were superimposed so that the orientation flats of each substrate were aligned in a plan view (angle θ: 0°).

[0072] <Evaluation> The heat resistance of the bonded substrates obtained in the examples and comparative examples was evaluated. Specifically, the obtained bonded substrates were placed in a heating furnace, and the furnace was heated from room temperature to 1000°C over 30 minutes, and this state was maintained for 10 minutes. The heating furnace was then cooled over 30 minutes, and the bonded substrate was removed from the heating furnace, and the bonded substrate (gallium nitride substrate and / or support substrate) was observed for the presence or absence of fractures and cracks. The evaluation was as follows, and the evaluation results are summarized in Table 1. (Evaluation) ◎: Very good, no fractures or cracks observed ○: Good, no fractures observed but small cracks observed △: Fair, no fractures observed but cracks observed ×: Poor, fractures observed

[0073]

[0074] The laminated substrate according to the embodiment of the present invention can be applied to, for example, a semiconductor device.

[0075] 10 Support substrate, 20 Group III element nitride crystal substrate, 21 First main surface, 22 Second main surface, 31 Base substrate, 31a Upper surface, 31b Lower surface, 32 Seed crystal film, 33 Seed crystal substrate, 34 Group III element nitride crystal layer, 35 Laminated substrate, 36 Freestanding substrate, 51 Channel layer, 52 Barrier layer, 53 Device layer, 61 Source electrode, 62 Drain electrode, 63 Gate electrode, 100 Bonded substrate, 101 Junction, 200 HEMT element.

Claims

1. A bonded substrate comprising a group III element nitride crystal substrate and a support substrate made of a material different from that of the group III element nitride crystal substrate, wherein the support substrate is made of crystals having a hexagonal crystal structure, and the minimum angle formed between the m-plane of the group III element nitride crystal substrate and the m-plane of the support substrate in a planar view is 1° or greater.

2. The bonded substrate according to claim 1, wherein the minimum angle formed between the m-plane of said Group III nitride crystal substrate and the m-plane of said support substrate in plan view is 15° or less.

3. The bonded substrate according to claim 1, wherein the minimum angle formed between the m-plane of said Group III element nitride crystal substrate and the m-plane of said support substrate in plan view is 3° or more.

4. The bonded substrate according to claim 1, wherein the thickness of said Group III element nitride crystal substrate is 0.5 μm or more and 10 μm or less.

5. The laminated substrate according to claim 1, wherein the thickness of the support substrate is 100 μm or more and 1000 μm or less.

6. The bonded substrate according to claim 1, wherein the thermal expansion coefficient of said Group III element nitride crystal substrate is greater than the thermal expansion coefficient of said support substrate.

7. The laminated substrate of claim 1, wherein the support substrate comprises silicon carbide.

8. A semiconductor device comprising: a laminated substrate according to any one of claims 1 to 7; and a device layer provided on the laminated substrate.

9. A method for manufacturing a semiconductor device, comprising forming a device layer on the bonded substrate according to any one of claims 1 to 7 at a temperature of 1000°C or higher.

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