Electronic-component-mounted article and resin-encapsulated electronic component

Abstract

Provided is an electronic-component-mounted article that has excellent heat resistance. This electronic-component-mounted article comprises: a chip-type electronic component that is provided with an element body and an external electrode covering a portion of the element body; a mounting substrate that is provided with a substrate electrode for mounting the chip-type electronic component; and a fillet that connects the external electrode of the chip-type electronic component and a substrate electrode of the mounting substrate, the external electrode including, in the following order from the element-body side, a Ni plating layer and a protective layer that covers the Ni plating layer.

Description

Electronic component mounting products and resin-encapsulated electronic components

[0001] The present invention relates to an electronic component mounted product and a resin-sealed electronic component.

[0002] A resin-sealed electronic component is known, which is formed by mounting a chip-type electronic component on a substrate electrode by solder reflow using Sn-based solder and then resin-sealing the chip-type electronic component (see, for example, Patent Document 1). The chip-type electronic component has terminal electrodes (external electrodes) for electrical connection with the substrate electrodes. The outermost surface of the external electrode is usually formed with a plating layer (e.g., a Ni plating layer) to improve solder wettability, etc.

[0003] International Publication No. 2009 / 001621

[0004] In recent years, there has been a trend toward heat resistance for electronic components and their mounted products, particularly in automotive applications. In an electronic component mounted product in which a chip-type electronic component is mounted on a substrate electrode, if the outermost surface of the external electrode is a Ni-plated layer and the chip-type electronic component is mounted using Sn-based solder, the Ni-plated layer and the fillet made of Sn-based solder come into direct contact. When an electronic component mounted product is exposed to high temperatures, Ni diffusion from the Ni-plated layer to the fillet side is promoted, which can lead to the formation of "Kirkendall voids" near the interface between the Ni-plated layer and the fillet. Progression of Kirkendall void formation can ultimately lead to the destruction of the bond between the external electrode and the fillet. Therefore, there is a demand for electronic component mounted products that are less likely to generate Kirkendall voids even at high temperatures and can be used stably even at high temperatures (i.e., have excellent heat resistance). Patent Document 1 does not consider suppressing the formation of Kirkendall voids.

[0005] A first object of the present invention is to provide an electronic component mounted product having excellent heat resistance, and a second object of the present invention is to provide a resin-sealed electronic component obtained by resin-sealing such an electronic component mounted product.

[0006] According to one aspect of the present invention, there is provided an electronic component mounting product comprising: a chip-type electronic component having an element body and an external electrode covering a portion of the element body; a mounting board having board electrodes for mounting the chip-type electronic component; and a fillet connecting the external electrodes of the chip-type electronic component and the board electrodes of the mounting board, wherein the external electrodes include, from the element body side, a Ni plating layer and a protective layer covering the Ni plating layer, in this order.

[0007] According to another aspect of the present invention, there is provided a resin-sealed electronic component comprising: the electronic component mounted product described above; and a resin sealing material for sealing the chip-type electronic component of the electronic component mounted product.

[0008] According to the first aspect of the present invention, an electronic component mounted product having excellent heat resistance can be provided. According to the second aspect of the present invention, by using the electronic component mounted product according to the first aspect, a resin-sealed electronic component having excellent heat resistance can be provided.

[0009] 4A is a schematic front view of an electronic component mounted product according to embodiment 1. FIG. 4B is a schematic cross-sectional view of a chip-type electronic component included in the electronic component mounted product shown in FIG. 1. FIG. 4C is a partial schematic cross-sectional view of the electronic component mounted product shown in FIG. 1. FIG. 4D is a cross-sectional SEM image of the vicinity of the interface between an external electrode and a fillet of a chip-type electronic component in an electronic component mounted product. FIG. 4B is a partial enlarged view of the cross-sectional SEM image of FIG. 4A. FIG. 4D is a partial schematic cross-sectional view for explaining a method for manufacturing an electronic component mounted product according to embodiment 2. FIG. 4E is a graph for explaining a temperature profile of reflow. FIG. 4F is a partial schematic cross-sectional view for explaining a method for manufacturing an electronic component mounted product according to modification 2-1. FIG. 4F is a partial schematic cross-sectional view for explaining a method for manufacturing an electronic component mounted product according to modification 2-1. FIG. 4G is a partial schematic cross-sectional view for explaining a method for manufacturing an electronic component mounted product according to modification 2-2. FIG. 4H is a schematic front view of an electronic component mounted product and a resin-sealed electronic component according to modification 4-1. FIG. 4H is a schematic front view of an electronic component mounted product and a resin-sealed electronic component according to modification 4-2. FIG. 4I is a cross-sectional SEM image of an electronic component mounted product according to an example (magnification x 450). 1 is a cross-sectional SEM image of an electronic component mounted product according to an example (magnification: ×3000). ａｖｅ10 is a graph showing the results of a heat shock reliability test of an electronic component mounted product.

[0010] (Embodiment 1: Electronic Component Mounted Product 100) FIG. 1 is a schematic front view of an electronic component mounted product 100 according to embodiment 1, and FIG. 2 is a schematic cross-sectional view of a chip-type electronic component 10 (sometimes simply referred to as "electronic component 10") included in the electronic component mounted product 100. Note that FIG. 2 is a cross-section of the chip-type electronic component 10 in a plane (LT plane) perpendicular to the W direction. FIG. 3 is a partially enlarged schematic cross-sectional view of the electronic component mounted product 100 shown in FIG. 1 , taken along the LT plane of the chip-type electronic component 10. As shown in FIG. 1, the electronic component mounted product 100 includes the electronic component 10, a mounting substrate 80 on which the electronic component 10 is mounted, and fillets 91 and 92 for electrically connecting the electronic component 10 and the mounting substrate 80. Each component will be described in turn.

[0011] (Electronic component 10) The electronic component 10 includes an element body 20 and external electrodes (a pair of external electrodes 30, 40 in the example shown in FIGS. 1 and 2 ) that cover portions of the element body 20. As shown in FIG. 2 , the first external electrode 30 covers one end face 21 of the element body 20 and a side face 23 adjacent thereto, and the second external electrode 40 covers the other end face 22 of the element body 20 and a side face 23 adjacent thereto. The external electrodes 30, 40 include, in this order from the element body 20 side (i.e., from the inside to the outside), Ni plating layers 34, 44 and protective layers 351, 451 that cover the Ni plating layers 34, 44. The protective layers 351, 451 cover at least portions of the surfaces of the Ni plating layers 34, 44, preferably covering 50% or more, more preferably 70% or more, of the surfaces of the Ni plating layers 34, 44, and particularly preferably covering the entire surfaces of the Ni plating layers 34, 44. The external electrodes 30 and 40 may further include an underlayer 31 and 41 between the element body 20 and the Ni plating layer 34 and 44 .

[0012] The protective layers 351, 451 are layers for protecting the Ni plating layers 34, 44 from the fillets 91, 92. In the electronic component mounted product 100 according to the first embodiment, the protective layers 351, 451 covering the Ni plating layers 34, 44 prevent direct contact between the Ni plating layers 34, 44 (see FIG. 2 ) and the fillets 91, 92 (see FIG. 1 ), or reduce the area of ​​direct contact between them. Therefore, when the electronic component mounted product 100 is exposed to high temperatures, diffusion of Ni from the Ni plating layers 34, 44 toward the fillets 91, 92 is suppressed or prevented. This effectively suppresses the occurrence of Kirkendall voids, resulting in an electronic component mounted product 100 with high heat resistance.

[0013] The protective layers 351 and 451 are preferably made of a Cu—Sn alloy. ６ Sn ５ (η phase), and Cu ３ It is preferable that the alloy contains at least one selected from the group consisting of Cu, Sn (ε phase), and Cu. ６ Sn ５ Since the formation of microvoids is small, the protective layers 351 and 451 are Cu. ６ Sn ５ By including a large amount of Cu (for example, 95 to 100% by volume of the entire protective layer 351, 451), it is possible to suppress the formation of cracks in the external electrodes 30, 40 due to heat shock, and it is possible to obtain a highly reliable electronic component mounted product 100. ６ Sn ５ It is most preferred that the composition consists of only

[0014] Cu in the protective layers 351 and 451 ６ Sn ５ In order to increase the ratio, it is effective to adjust the layer structure and component composition of the external electrodes 30 and 40, the component composition of the solder, and the layer structure and component composition of the board electrodes 801 and 802 of the mounting board 80 during reflow.

[0015] Cu ６ Sn ５The content (volume %) of Cu in the Cu-Sn alloy constituting the protective layers 351 and 451 can be determined from the elemental mapping of Cu and Sn obtained by SEM-EDX measurement of the electronic component mounted product 100. By analyzing the elemental mapping of Cu and Sn in more detail, it is possible to determine the Cu content (volume %) of the Cu-Sn alloy constituting the protective layers 351 and 451. ６ Sn ５ (η phase) and Cu ３ Sn (ε phase) can be identified. ６ Sn ５ (η phase) is present, and Cu is present in the portion with a relatively low Sn content. ３ Sn (ε phase) is present.

[0016] The specific analysis procedure will be described in detail. First, based on the Sn element mapping and Cu element mapping, the range containing both Sn and Cu is identified as the "Cu-Sn alloy region." Next, the Sn element mapping is observed, and the range in the "Cu-Sn alloy region" where the Sn content is relatively low (the range that is light in color in the Sn element mapping) is identified as the Cu-Sn alloy region. ３ The area where the Sn content is relatively high (the area where the color is dark in the Sn element mapping) is the Sn area. ６ Sn ５ The magnification during SEM-EXD measurement is, for example, 10,000 times. ３ Sn and Cu ６ Sn ５ After identifying the regions, the area of ​​each region is calculated. ３ The area of ​​the Sn region is "S1", and the area of ​​Cu ６ Sn ５ The area of ​​the region is "S2", and Cu is calculated from the following formula: ６ Sn ５ Calculate the area ratio of Cu ６ Sn ５ Area ratio of Cu phase (%) = S2 / (S1+S2) × 100 ６ Sn ５ The area ratio of the Cu phase is ６ Sn ５ It can be considered as the volume fraction of the Cu phase. ６ Sn５ The volume fraction of the phase is Cu ６ Sn ５ It can be determined using procedures and formulas for determining the area fraction of a phase.

[0017] The Cu source for forming the Cu—Sn alloy can be supplied by various methods, and for example, the substrate electrodes 801, 802 of the mounting substrate 80 may be formed from Cu to serve as the Cu source. As the Sn source, mainly, Sn-based solder is used as the solder for forming the fillets 91, 92, and an Sn plating layer (not shown) is formed on the external electrodes 30, 40, etc.

[0018] 3 , an outer surface 351 a of the protective layer 351 (the surface opposite to the surface facing the element body 20) may be in contact with the fillet 91. Note that, for the sake of detailed illustration, this specification may only describe the first external electrode 30 and the configuration located in the vicinity of the first external electrode 30 (e.g., the fillet 91, the board electrode 801, and the mounting electrode 803 described later, etc.), but it goes without saying that the second external electrode 40 and the configuration located in the vicinity of the second external electrode 40 (e.g., the fillet 92, the board electrode 802, and the mounting electrode 804 described later, etc.) may have similar characteristics. Furthermore, the first external electrode 30 and the second external electrode 40 may be simply referred to as the "external electrode 30" and the "external electrode 40," respectively.

[0019] 4A is a cross-sectional SEM image of the area surrounded by the dashed line in FIG. 3, and shows the vicinity of the interface between the external electrode 30 and the fillet 91 in the cross section of the electronic component mounted product 100 (LT surface of the chip-type electronic component 10). Note that the cross-sectional SEM image of FIG. 4A is disclosed for the purpose of explaining how to check the Ni plating layer 34, the protective layer 351, and the fillet 91, and therefore other structures (particularly the base layer 31 and the element body 20) are not shown (blacked out). As shown in the cross-sectional SEM image of FIG. 4A, the outer surface 351a has irregularities. The protrusions may be thin columnar (or needle-like). The average surface roughness Ry of the outer surface 351a of the protective layer 351 ａｖｅWhen the outer surface 351a of the protective layer 351 has a predetermined surface roughness or more, the adhesiveness between the protective layer 351 and the fillet 91 is improved due to the anchor effect. This makes it possible to more effectively prevent the interfacial peeling between the protective layer 351 and the fillet 91 due to heat shock. The average surface roughness Ry of the outer surface 351a ａｖｅ is more preferably 3.0 μm or more.

[0020] Average surface roughness Ry of outer surface 351a ａｖｅ is determined by the following procedure. First, the cross section of the electronic component mounted assembly 100 (the LT surface of the chip-type electronic component 10) is polished to expose it, and the cross section (LT surface) is observed using an SEM. For SEM observation, an arbitrary position on the Ni plating layer 34 of the external electrode 30 is selected, and the observation position is adjusted so that the protective layer 351 covering the Ni plating layer 34 is positioned near the center of the image. A cross-sectional SEM image of a predetermined field of view (40 μm × 30 μm) is acquired using an SEM device at a magnification of 3000x. The cross-sectional SEM image is analyzed, and the "maximum thickness" and "minimum thickness" of the protective layer 351 within one field of view are measured. Here, the "thickness" of the protective layer 351 refers to the dimension perpendicular to the tangent to the outer surface of the Ni plating layer 34. FIG. 4B is an enlarged view of the cross-sectional SEM image shown in FIG. 4A , including the thinnest portion of the protective layer 351. The thickness indicated by the arrow is the "minimum thickness" of the protective layer 351. 4C is an enlarged view of the cross-sectional SEM image shown in FIG. 4A, showing the area including the thickest part (the most protruding convex part) of the protective layer 351. The thickness indicated by the arrow is the "maximum thickness" of the protective layer 351. The difference between the "maximum thickness" and the "minimum thickness" is defined as the "surface roughness Ry." Cross-sectional SEM images are obtained at four different locations, and the surface roughness Ry is calculated for each cross-sectional SEM image. The average surface roughness Ry is calculated by arithmetically averaging the Ry values. ａｖｅ Ask for.

[0021] The "cross section" of the electronic component mounted assembly 100 (LT surface of the electronic component 10) for performing various measurements is basically a cross section passing through the vicinity of the center (position w / 2) of the dimension w in the W direction of the chip-type electronic component 10. However, if there is a problem in measuring the cross section at that position, a cross section passing through a position away from the vicinity of the center (for example, position w / 4) may be used.

[0022] Various chip-type electronic components mounted by reflow soldering can be used as the electronic component 10. Examples of the electronic component 10 include chip-type ceramic electronic components such as thermistors including positive temperature coefficient (PTC) thermistors and negative temperature coefficient (NTC) thermistors, varistors, inductors, and capacitors.

[0023] (Mounting Board 80) As shown in FIG. 1 , the mounting board 80 includes at least board electrodes 801 and 802 for mounting the electronic component 10. The mounting board 80 may further include mounting electrodes 803 and 804 used when mounting the electronic component-mounted device 100 on an external board or the like. The mounting electrode 803 and the board electrode 801 provided thereon may be formed as a single component. The mounting electrode 803 and the board electrode 801 may also be formed from two components. As an example, the mounting electrode 803 and the board electrode 801 may be prepared separately and then stacked. As another example, the mounting electrode 803 may be prepared first, and a metal film may be formed on its upper surface by plating or the like to form the mounting electrode 803. The board electrodes 801 and 802 may be formed from Cu, which can serve as a Cu source for the protective layer 351 made of a Cu—Sn alloy.

[0024] 1 , the external electrodes 30, 40 of the electronic component 10 and the board electrodes 801, 802 of the mounting board 80 are mounted by reflow soldering. Therefore, the electronic component mounted assembly 100 has fillets 91, 92 that connect the external electrodes 30, 40 and the board electrodes 801, 802. The type of metal material suitable for forming the fillets 91, 92 varies depending on the material that forms the board electrodes 801, 802.

[0025] When the substrate electrodes 801, 802 are formed from Cu (i.e., when the substrate electrodes 801, 802 serve as the Cu source for the protective layer 351 made of a Cu—Sn alloy), the fillets 91, 92 can be formed from a metal material containing the Sn source for the protective layer 351, such as a solder such as Sn-3.0Ag-0.5Cu, Sn-0.7Cu, or Sn-10Sb, or a Sn-based alloy. When the substrate electrodes 801, 802 are formed from a metal material other than Cu, the Cu source for the protective layer 351 made of a Cu—Sn alloy must be supplied from the metal material used to form the fillets 91, 92. The fillets 91, 92 can be formed from a metal material containing both a Cu source and a Sn source, such as a solder such as Sn-5.0Cu-0.15Ni-x, or a Sn—Cu-based alloy.

[0026] (Embodiment 2: Manufacturing Method of Electronic Component Mounted Product 100) A manufacturing method of the electronic component mounted product 100 will be described with reference to FIG. 5. The manufacturing method of the electronic component mounted product 100 includes the following steps (1) to (3): (1) Step of preparing an electronic component 10' (2) Step of preparing a mounting substrate 80 (3) Step of mounting the electronic component 10' on the mounting substrate 80 For each step, the explanation will focus on the differences from general manufacturing methods for electronic component mounted products. In cases where general manufacturing processes for electronic component mounted products can be applied, details may be omitted.

[0027] (Step (1): Step of Preparing Electronic Component 10′) In step (1), an electronic component 10′ is prepared. As shown in FIG. 5 , the electronic component 10′ includes an element body 20 and an external electrode 30′ that covers a portion of the element body 20. In this example, the external electrode 30′ includes a Ni plating layer 34. Furthermore, a base layer 31 may be provided between the Ni plating layer 34 and the element body 20, and a Sn plating layer 35 may be provided to cover the Ni plating layer 34.

[0028] (Step (2): Step of Preparing Mounting Substrate 80) In step (2), a mounting substrate 80 including a substrate electrode 801 is prepared. In the example of FIG. 5 , the mounting substrate 80 includes a mounting electrode 803 and a substrate electrode 801 formed thereon. The substrate electrode 801 is preferably formed from a Cu material (e.g., Cu plating, Cu foil, etc.) and can serve as the Cu source for the protective layer 351 (see FIG. 2 ). The mounting electrode 803 is formed from an electrically conductive material, such as Cu, Au, Ag, AgPd, Pd, Ni, Al, etc. As described above, the mounting electrode 803 and the substrate electrode 801 may be integrally molded, or may be prepared separately and then laminated. Alternatively, the substrate electrode 801 may be formed on the surface of the mounting electrode 803 by plating, etc.

[0029] (Step (3): Step of Mounting Electronic Component 10' on Mounting Board 80) In step (3), the electronic component 10' is mounted on the mounting board 80 by reflow soldering. Solder paste 910 is applied to the upper surfaces of the board electrodes 801 of the mounting board 80. Next, the electronic component 10' is placed on the upper surface of the board electrodes 801 so that the external electrodes 30' contact the solder paste 910. The suitable solder paste 910 varies depending on the material from which the board electrodes 801 are formed.

[0030] When the substrate electrode 801 is formed from Cu (i.e., when the substrate electrode 801 serves as the Cu source for the protective layer 351 made of a Cu—Sn alloy), for example, Sn-3.0Ag-0.5Cu, Sn-0.7Cu, Sn-10Sb, or the like is suitable as the solder used in the solder paste 910. When the substrate electrode 801 is formed from a metal material other than Cu, the Cu source for forming the protective layer 351 made of a Cu—Sn alloy must be supplied from the solder paste 910. For example, Sn-5.0Cu-0.15Ni-x, or the like is suitable as the solder used in the solder paste 910.

[0031] Instead of the solder paste 910, a laminate structure consisting of a metal plating layer and a flux coating covering the metal plating may be formed on the surface of the substrate electrode 801, and the electronic component 10′ may be reflow-mounted on the mounting substrate 80 using the laminate structure. The flux coating may function as a pre-coat for protecting the surface of the metal plating layer. When the substrate electrode 801 is formed of Cu, Sn plating may be used as the metal plating layer.

[0032] When the substrate electrode 801 is formed from a metal material other than Cu, a Cu / Sn multilayer plating can be used as the metal plating layer. When using Cu / Sn multilayer plating, the amount of Cu source supplied can be controlled by the thickness of each layer, further stabilizing product reliability. The film thickness ratio of the multilayer plating is, for example, Cu:Sn = 3:20. Compared to forming the substrate electrode 801 from a metal material other than Cu, forming a fillet by reflow using a stacked structure including a multilayer plating layer allows for a relatively lower reflow temperature than forming a fillet by reflow using a solder paste 910 including a Cu source and an Sn source.

[0033] Thereafter, reflow is performed to melt the solder paste 910 or the laminated structure, and form a fillet 91 (see FIG. 3). At this time, the Sn plating layer 35 (see FIG. 5) of the external electrode 30' melts, and instead a protective layer 351 (see FIG. 3) is formed. The reflow is performed using a temperature control different from the temperature profile of a general reflow. Preheating is performed for a relatively long time. If the preheating time is short, the protective layer 351 that covers the Ni plating layer 34 of the external electrode 30 cannot be formed. It is also preferable to heat up to the reflow temperature at a rate faster than usual. This reduces the average surface roughness Ry of the outer surface 351a of the protective layer 351. ａｖｅ The thickness can be increased to 2.5 μm or more. In general reflow conditions, the preheating time is 60 to 120 seconds, and the heating rate to the reflow temperature is 3° C. / second. The temperature profile during reflow is explained in detail below.

[0034] Fig. 6 is a graph showing an example of a reflow temperature profile. It is assumed that Sn-3.0Ag-0.5Cu solder (melting point: 217°C) is used as the solder. As shown in Fig. 6, the temperature profile includes a preheating step and a reflow step.

[0035] (Preheating Step) First, preheating is performed in the temperature range of 150°C to 170°C. This temperature range is lower than the melting point of solder (217°C). The time from time t1 when the temperature reaches 150°C to time t3 when the temperature reaches 170°C is defined as the "holding time ta" of the preheating step. This can be expressed as the following formula: ta = t3 - t1 The holding time ta is preferably 60 seconds or more, more preferably 100 to 140 seconds, and particularly preferably 115 to 125 seconds. As an example, the holding time ta is approximately 120 seconds.

[0036] If the holding time t1 is too short, the activation of the Ni-plated surface by the Sn-based material and the flux in the solder paste is insufficient, and the Cu—Sn alloy that forms the protective layer precipitates as particles dispersed within the fillets 91 and 92. As a result, the protective layers 351 and 451 cannot be formed.

[0037] Furthermore, the time spent in the temperature range of 165°C ± 5°C (160°C to 170°C) is defined as the "residence time tb," and this residence time is controlled to, for example, approximately 60 seconds or more. This allows the protective layers 351, 451 to be formed with a thickness sufficient to cover the Ni plating layers 34, 44. Here, if the time taken to reach 160°C is t2 and the time taken to reach 170°C is t3, the following formula is established: tb = t3 - t2 ≈ 60 (seconds)

[0038] (Reflow Step) Following the preheating step, the reflow step is performed at a reflow temperature Tp that is equal to or higher than the melting point of the solder. The reflow temperature Tp is set to be higher than the melting point of the solder (217°C), for example, in the range of 240°C to 260°C. The average heating rate from the final preheating temperature (170°C) to the reflow temperature Tp is set to 5°C / second or higher. The average heating rate is calculated by dividing the temperature difference ΔT1 (absolute value) between 170°C and the reflow temperature Tp by the time tc from time t3 when 170°C is reached to time t4 when the reflow temperature Tp is reached (see the following formula). Average heating rate (°C / second) = ΔT1 (°C) / tc (seconds) = (Tp (°C) - 170 (°C)) / (t4 (seconds) - t3 (seconds))

[0039] If the heating rate up to the reflow temperature is fast, the reaction rate between Cu and Sn increases, and roughening of the deposit surface can be promoted when the Cu—Sn alloy forming the protective layer is deposited on the Ni plating layer. Therefore, the average surface roughness of the surface of the protective layer 351, 451 covering the Ni plating layer 34, 44 is set to Ry ａｖｅ can be made 2.5 μm or more.

[0040] Once the reflow temperature Tp is reached, the reflow temperature Tp is maintained for a time td (referred to as the "reflow step retention time td"). The retention time td is, for example, approximately 60 seconds. The retention time td is the time from when the reflow temperature Tp is reached (reflow start time t4) to when cooling from the reflow temperature Tp begins (reflow end time t5), and is expressed as the following formula: td=t5-t4

[0041] After reflow is complete, the part is cooled to room temperature RT. The average cooling rate from the reflow temperature Tp to 150°C is 2°C / sec to 5°C / sec. The average cooling rate is calculated by dividing the temperature difference ΔT2 (absolute value) between the reflow temperature Tp and 150°C by the time te from the end of reflow t5 to the time t6 when 150°C is reached (following formula). Average cooling rate (°C / sec) = ΔT2 (°C) / te (sec) = (Tp (°C) - 150 (°C)) / (t6 (sec) - t5 (sec))

[0042] The cooling rate from 150° C. to room temperature RT is not particularly limited, and cooling may be carried out by natural cooling, for example.

[0043] (Variation 2-1) In Variation 2-1 of Embodiment 2, the configuration of the mounting substrate prepared in step (2) is different, but otherwise the manufacturing method is the same as that of Embodiment 2. The differences will be mainly described. As shown in FIG. 7, a substrate electrode 801' of a mounting substrate 80' has a three-layer structure. From the mounting electrode 803 side, a first layer 801a, a second layer 801b, and a third layer 801c are stacked. The material forming the first layer 801a is not particularly limited, and may be, for example, Cu. The second layer 801b is formed from a material other than Cu, such as Ni. The third layer is made of Cu.

[0044] Next, to perform step (3), solder paste 910 is applied to the upper surface of the third layer 801c of the substrate electrode 801', and reflow is performed. The reflow melts the solder paste 910 and the third layer 801c, forming the fillet 91 and the protective layer 351 (see FIG. 8). The third layer 801c serves as the Cu source for the protective layer 351. In this modified example 2-1, the supply amount of the Cu source can be controlled by controlling the thickness of the third layer of the substrate electrode 801'.

[0045] (Variation 2-2) In Variation 2-2 of Embodiment 2, the configuration of the external electrode of the electronic component prepared in step (1) is different, but otherwise the manufacturing method is the same as that of Embodiment 2. The differences will be mainly described. As shown in FIG. 9 , in electronic component 10″ prepared in step (1), external electrode 30″ includes Ni plating layer 34 and Cu-containing layer 36 covering Ni plating layer 34. Furthermore, base layer 31 may be provided between Ni plating layer 34 and element body 20, and Sn plating layer 35 may be provided to cover Cu-containing layer 36. Cu-containing layer 36 may be formed from a Cu plating layer or a CuSn plating layer.

[0046] Next, to perform step (3), solder paste 910 is applied to the upper surface of board electrode 801, followed by reflow. The reflow dissolves solder paste 910 and a portion of external electrode 30" (Sn plated layer 35 and Cu-containing layer 36), forming fillet 91 and protective layer 351 (see FIG. 3). Sn plated layer 35 and Cu-containing layer 36 serve as the Sn source and Cu source for protective layer 351, respectively. In this modified example 2-2, external electrode 30" of electronic component 10" contains a Cu source, so board electrode 801 can be formed from a material other than Cu.

[0047] (Embodiment 3: Resin-sealed electronic component 1) A resin-sealed electronic component can be formed using the electronic component mounted product 100 according to embodiment 1. The resin-sealed electronic component includes the electronic component mounted product 100 and a resin encapsulant that encapsulates the electronic component mounted product 100. In the resin-sealed electronic component 1 shown in FIG. 1, the resin encapsulant 95 is molded to cover the entire electronic component 10 of the electronic component mounted product 100 and the upper surface side of the mounting substrate 80. By using the electronic component mounted product 100 with excellent heat resistance, a resin-sealed electronic component 1 with excellent heat resistance can be obtained. The resin encapsulant 95 can be formed by a general molding method using a known molding resin material.

[0048] Mounting substrate 80 of electronic component mounted device 100 may further include mounting electrodes 803 and 804 that are used when mounting resin-encapsulated electronic component 1 on an external substrate or the like. As shown in Fig. 1 , within mounting substrate 80, mounting electrodes 803 and 804 are arranged on the lower surface side of mounting substrate 80, and substrate electrodes 801 and 802 are arranged on the upper surface side. In other words, within mounting substrate 80, mounting electrodes 803 and 804 and substrate electrodes 801 and 802 are provided on opposite sides of each other.

[0049] (Embodiment 4: Modifications of electronic component mounted product and resin-sealed electronic component) Modifications of electronic component mounted products and resin-sealed electronic components will be described below. The following description will focus on differences from electronic component mounted product 100 according to embodiment 1 and resin-sealed electronic component 1 according to embodiment 3, and will omit a description of the same points.

[0050] 10 , in which a mounting substrate 83 includes a substrate main body 830 made of an insulating material, substrate electrodes 831 and 832 formed on the upper surface of the substrate main body 830, and mounting electrodes 833 and 834 formed on the lower surface of the substrate main body 830. The substrate main body 830 is formed with a through-hole 835 for electrically connecting the substrate electrode 831 to the mounting electrode 833 formed thereunder, and a through-hole 836 for electrically connecting the substrate electrode 832 to the mounting electrode 834 formed thereunder. This allows current to flow from the mounting electrodes 833 and 834 to the electronic component 10 via the substrate electrodes 831 and 832.

[0051] Furthermore, resin sealing material 95 is molded so as to cover the entire electronic component 10 of electronic component mounted assembly 300 and the upper surface side of substrate body 830, thereby making it possible to obtain resin-sealed electronic component 3.

[0052] (Variation 4-2) Variation 4-2 of Embodiment 4 is an electronic component mounted device 400 shown in FIG. 11 , in which a mounting substrate 84 includes a substrate main body 840 made of an insulating material, substrate electrodes 841 and 842 formed on the upper surface of the substrate main body 840, and a mounting electrode 843 formed on the lower surface of the substrate main body 840. In electronic component mounted device 400, no through holes are formed in the substrate main body 840. Therefore, the substrate electrodes 841 and 842 are insulated from the mounting electrode 843. Instead, current-carrying electrodes 845 and 846 are provided on the upper surfaces of the substrate electrodes 841 and 842. Current can be passed through the current-carrying electrodes 845 and 846 to the electronic component 10 via the substrate electrodes 841 and 842.

[0053] 11 , the mounting electrode 843 is disposed on the lower side of the substrate body 840, while the board electrodes 841, 842 and the current-carrying electrodes 845, 846 are disposed on the upper side of the substrate body 840. In other words, the mounting electrode 843 and the board electrodes 841, 842 are provided on opposite sides of the substrate body 840, and the current-carrying electrodes 845, 846 and the board electrodes 841, 842 are provided on the same side of the substrate body 840.

[0054] Furthermore, resin encapsulant 95 is molded so as to cover the entire electronic component 10 of electronic component-mounted device 400 and the upper surface side of substrate body 840, and to expose upper surfaces 845 a, 846 a of current-carrying electrodes 845, 846, thereby obtaining resin-encapsulated electronic component 4. One method for mounting resin-encapsulated electronic component 4 on an external substrate or the like is to die-bond mounting electrode 843 to the external substrate or the like, and then wire-bond upper surfaces 845 a, 846 a of current-carrying electrodes 845, 846 exposed on upper surface 95 a of resin encapsulant 95 to power-supply electrodes such as external electrodes.

[0055] Example 1 An electronic component was prototyped under the following conditions: (Step (1)) An electronic component 10' was fabricated as shown in Fig. 5. For the external electrode 30', the underlayer 31 was formed from Cu, and a Ni plating layer 34 and a Sn plating layer 35 were further provided.

[0056] (Step (2)) A mounting substrate 80 was fabricated as shown in Fig. 1. The mounting substrate 80 was made of Cu, and substrate electrodes 801 and 802 and mounting electrodes 803 and 804 were integrally formed.

[0057] (Step (3)) A Sn plating layer and a flux coat were sequentially laminated on the surfaces of the substrate electrodes 801 and 802. Thereafter, reflow was performed using the reflow temperature profile shown in FIG. 6. The reflow conditions were as follows: (Preheating) ta = 120 seconds tb = 60 seconds (Reflow) Average heating rate = 5°C / second Tp = 250°C td = 60 seconds Average cooling rate = 3°C / second

[0058] In this way, an electronic component mounted product 100 having the configuration shown in FIG. 1 was obtained. SEM-EDX measurement was performed on the obtained electronic component mounted product under the following conditions. FIGS. 12A and 12B show cross-sectional SEM images of the electronic component mounted product. Note that FIGS. 12A and 12B show the corners, fillets, and substrate electrodes of the electronic component mounted product. The internal structure of the element body 20 is not shown (blacked out). Processing conditions: Surface treatment by ion milling after cross-section polishing SEM device: JEOL, JSM-IT500HR, BED-C, 15 kV, working distance approximately 10 mm, Std-PC60 Magnification: ×450 for FIG. 12A, ×3000 for FIG. 12B Analysis: Elemental analysis using JSM-IT500HR and EDX

[0059] The cross-sectional SEM images of Figures 12A and 12B and the results of EDX element mapping (not shown) confirmed that an uneven Sn-Cu alloy protective layer was formed on the surface of the Ni plating layer in the external electrodes of the electronic component.

[0060] Example 2: The relationship between the surface roughness of the protective layer and heat resistance was confirmed. Five types of electronic component mounted samples (Samples 1 to 5) were produced by changing the various conditions (temperature and time) of the preheating step and / or reflow step in process (3). Three samples were selected for each type and subjected to SEM-EDX measurement in the same manner as in Example 1. The cross-sectional SEM images obtained were analyzed to determine the average surface roughness Ry of the protective layer. ａｖｅ The SEM-EDX measurement was performed at four locations (four visual fields) per sample, and the surface roughness Ry was determined for each visual field. The arithmetic mean value of the obtained surface roughness Ry (four data) was taken as the average surface roughness Ry of the sample. ａｖｅ Three average surface roughness values ​​Ry per type ａｖｅ The average surface roughness Ry of each sample was ａｖｅ (denoted as "Ry" in FIG. 13) was plotted and shown in FIG.

[0061] Furthermore, 10 samples were selected for each type and subjected to a heat shock reliability test under the following conditions: Heat shock test conditions: -55°C to 175°C (30 minutes each, in air) 1000 cyc Evaluation equipment: Thermal Shock Chamber TSE-11-A manufactured by Espec

[0062] After the heat shock reliability test, the samples were checked for the occurrence of interfacial delamination failure. Observation surface: The sample was cut and the cross section polished so that the LT surface was exposed. Observation conditions: A VHX-7000 digital microscope (manufactured by Keyence Corporation) was used, with a lens of E100, a magnification of 400x, coaxial incident light, and a tilt angle of 0 degrees. Evaluation criteria: The entire interface where the fillet 91 and the protective layer 351 contact was observed, and the case where one or more interfacial delaminations with a length of 50 μm or more were observed was evaluated as "poor (NG)", and the case where no interfacial delaminations with a length of 50 μm or more were observed was evaluated as "good (G)".

[0063] Furthermore, if the length of the interfacial peeling is 50 μm or more, unacceptable fluctuations may occur in the electrical characteristics of the electronic component mounted product (for example, the change in the resistance value characteristics of an electronic component mounted product using an NTC element may exceed the general tolerance range of ±3%), so a "length of interfacial peeling of 50 μm" was used as the criterion for determining whether the product is pass or fail.

[0064] Average surface roughness Ry ａｖｅ The electronic component mounting samples 1 to 4 under conditions 1 to 4, in which the average surface roughness Ry was 2.5 μm or more, showed good results (G) in the heat shock reliability test. ａｖｅ In the heat shock reliability test, sample 5 of the electronic component mounting product under condition 5, in which the thickness was less than 2.5 μm, was judged to be defective (NG) because interfacial peeling failure occurred between the fillets 91, 92 and the protective layer 351 due to the progression of Kirkendall voids.

[0065] The disclosure of this specification may include the following aspects: <1> An electronic component mounted product comprising: a chip-type electronic component including an element body and external electrodes covering a portion of the element body, a mounting board including board electrodes for mounting the chip-type electronic component, and a fillet connecting the external electrodes of the chip-type electronic component to the board electrodes of the mounting board, wherein the external electrodes include, from the element body side, a Ni plating layer and a protective layer covering the Ni plating layer, in this order.

[0066] <2> The outer surface of the protective layer is in contact with the fillet, and the average surface roughness Ry of the outer surface ａｖｅ The electronic component mounting assembly according to <1>, wherein the thickness is 2.5 μm or more.

[0067] <3> The electronic component mounting assembly according to <1> or <2>, wherein the protective layer is made of a Cu—Sn alloy.

[0068] <4> The Cu—Sn alloy is Cu ６ Sn ５ , and Cu ３ The electronic component mounting assembly according to <3>, further comprising at least one selected from the group consisting of Sn.

[0069] <5> The electronic component mounting assembly according to any one of <1> to <4>, wherein the substrate electrode is made of Cu.

[0070] <6> The electronic component mounted product according to any one of <1> to <5>, wherein the mounting substrate includes a substrate body made of an insulating material.

[0071] <7> A resin-sealed electronic component comprising: the electronic component mounted product according to any one of <1> to <6>; and a resin sealing material for sealing the chip-type electronic component of the electronic component mounted product.

[0072] <8> The resin-sealed electronic component according to <7>, wherein the mounting substrate of the electronic component-mounted component further includes a mounting electrode electrically connected to the substrate electrode, and the mounting electrode is provided on the opposite side to the substrate electrode.

[0073] <9> The resin-sealed electronic component according to <7> or <8>, wherein the mounting substrate of the electronic component-mounted component further includes a mounting electrode insulated from the substrate electrode and a current-carrying electrode electrically connected to the substrate electrode, the mounting electrode being provided on the opposite side of the substrate electrode, and the current-carrying electrode being provided on the same side as the electronic component-mounting surface of the substrate electrode.

[0074] This application claims priority based on Japanese Patent Application No. 2024-067587, filed on April 18, 2024, the entire contents of which are incorporated herein by reference.

[0075] 100, 300, 400 Electronic component mounted product 10 Electronic component 20 Base body 30, 40 External electrode 31, 41 Underlayer 34, 44 Ni plating layer 35 Sn plating layer 351, 451 Protective layer 80 Mounting substrate 801, 802 Substrate electrode 91, 92 Fillet

Claims

1. An electronic component mounting product comprising: a chip-type electronic component having an element body and external electrodes covering a portion of the element body; a mounting board having board electrodes for mounting the chip-type electronic component; and a fillet connecting the external electrodes of the chip-type electronic component and the board electrodes of the mounting board, wherein the external electrodes include, from the element body side, a Ni plating layer and a protective layer covering the Ni plating layer, in this order.

2. The outer surface of the protective layer is in contact with the fillet, and the average surface roughness Ry of the outer surface ａｖｅ 2. The electronic component mounting assembly according to claim 1, wherein the thickness is 2.5 μm or more.

3. The electronic component assembly according to claim 1 or 2, wherein the protective layer is made of a Cu-Sn alloy.

4. The Cu-Sn alloy is Cu ６ Sn ５ , and Cu ３ The electronic component package according to claim 3 , further comprising at least one element selected from the group consisting of Sn.

5. An electronic component mounted product according to any one of claims 1 to 4, wherein the substrate electrode is made of Cu.

6. An electronic component mounted product according to any one of claims 1 to 5, wherein the mounting substrate includes a substrate body made of an insulating material.

7. A resin-sealed electronic component comprising: an electronic component mounted product according to any one of claims 1 to 6; and a resin sealing material for sealing the chip-type electronic component of the electronic component mounted product.

8. The resin-sealed electronic component according to claim 7, wherein the mounting substrate of the electronic component mounting device further includes a mounting electrode that is electrically connected to the substrate electrode, and the mounting electrode is provided on the opposite side to the substrate electrode.

9. A resin-sealed electronic component according to claim 7 or 8, wherein the mounting substrate of the electronic component mounted product further includes a mounting electrode insulated from the substrate electrode and a current-carrying electrode conductive with the substrate electrode, the mounting electrode being provided on the opposite side of the substrate electrode, and the current-carrying electrode being provided on the same side as the electronic component mounting surface of the substrate electrode.

Images